CN223108839U - Edge Ring - Google Patents
Edge RingInfo
- Publication number
- CN223108839U CN223108839U CN202421942862.1U CN202421942862U CN223108839U CN 223108839 U CN223108839 U CN 223108839U CN 202421942862 U CN202421942862 U CN 202421942862U CN 223108839 U CN223108839 U CN 223108839U
- Authority
- CN
- China
- Prior art keywords
- edge ring
- wafer
- wafer carrier
- sub
- edge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Drying Of Semiconductors (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The disclosure provides an edge ring, which comprises an inner side face, an outer side face, a top face and a bottom face, wherein the inner side face comprises a first part intersected with a first direction and a second part connected with the first part and the top face, an included angle between the second part and the first direction is smaller than 45 degrees, and the first direction is the thickness direction of the edge ring.
Description
Technical Field
The present disclosure relates to the field of semiconductor technologies, and in particular, to an edge ring.
Background
In performing a plasma etching process on a semiconductor structure, a wafer needs to be fixed at the bottom of an etching chamber, and in order to reduce damage to the wafer caused by a wafer fixing means, an electrostatic Chuck (ESC) has been proposed as a wafer fixing device. The electrostatic chuck adsorbs the wafer by electrostatic attraction to secure, support and transfer the wafer within the etching chamber. However, the area of the wafer is smaller than that of the wafer carrying surface of the electrostatic chuck, which may cause that the rf electric field cannot be concentrated on the wafer surface, the etching rate of the central portion of the wafer may be different from that of the edge portion of the wafer, and the exposed wafer carrying surface is easily bombarded by plasma, so that the electrostatic chuck is polluted.
Disclosure of utility model
In view of the above, embodiments of the present disclosure provide an edge ring comprising an inner side, an outer side, a top surface, and a bottom surface, wherein,
The inner side surface comprises a first part intersected with a first direction and a second part connected with the first part and the top surface, an included angle between the second part and the first direction is smaller than 45 degrees, and the first direction is the thickness direction of the edge ring.
In an alternative embodiment, the angle of the second portion to the first direction is in the range of 20 degrees to 30 degrees.
In an alternative embodiment, the line of intersection of the first portion and the second portion is circular, the circle having a diameter in the range 298 mm to 305 mm.
In an alternative embodiment, the thickness of the edge ring in the first direction ranges from 7 mm to 8 mm.
In an alternative embodiment, the second portion has a dimension in the first direction in the range of 4 mm to 5 mm.
In an alternative embodiment, the edge ring surrounds a wafer carrier, the second portion surrounds a wafer carrier surface of the wafer carrier, the wafer carrier surface is perpendicular to the first direction, the first portion has a width in the second direction that is greater than twice a minimum distance between the first portion and the wafer carrier surface in the second direction, and the second direction is perpendicular to the first direction.
In an alternative embodiment, the edge of the wafer on the wafer carrying surface protrudes from the side of the wafer carrying device, the first part comprises a first sub-part located right below the wafer in the first direction and a second sub-part connected with the first sub-part, and the width of the second sub-part in the second direction is larger than that of the first sub-part in the second direction.
In an alternative embodiment, the inner side surface further comprises a third portion connected to both the first portion and the bottom surface, the third portion intersecting the bottom surface.
In an alternative embodiment, the edge ring is located in an etching station and surrounds an electrostatic chuck in the etching station.
In an alternative embodiment, the edge ring is grounded or connected to a radio frequency power source.
In the technical scheme provided by the disclosure, an included angle between the second part of the inner side of the edge ring and the first direction is smaller, and under the condition that the radial dimension of the bottom surface of the edge ring is unchanged, the radial dimension of the first part of the edge ring, the radial dimension of the second part and the diameter of the circular boundary line between the first part and the second part are larger. On the one hand, the larger size of the second part in the first direction can increase the loss margin of the edge ring, so that the service life of the edge ring can be prolonged, on the other hand, the larger size of the first part in the radial direction and the larger diameter of the circular boundary line can increase the distance between the second part and the wafer, so that the possibility that the wafer is contacted with the edge ring and the material deposited on the back and the side surface of the wafer is peeled off to pollute the edge ring can be reduced, and the service life of the edge ring can be further prolonged and the cleaning frequency of the edge ring can be reduced.
Drawings
FIG. 1 is a top view of an edge ring provided by an embodiment of the present disclosure;
FIG. 2 is a cross-sectional view taken along line AA' of FIG. 1;
FIG. 3 is a cross-sectional view of a wafer carrier and edge ring provided in an embodiment of the present disclosure;
FIG. 4 is a cross-sectional comparison of an edge ring provided by an embodiment of the present disclosure with an edge ring provided by the related art;
Fig. 5 is a cross-sectional view of an edge ring provided in another embodiment of the present disclosure.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present disclosure. However, it will be apparent to one skilled in the art that the present disclosure may be practiced without one or more of these details. In other instances, well-known functions and constructions are not described in detail to avoid obscuring the present disclosure, i.e., not all features of an actual embodiment are described herein.
In the drawings, like numbers refer to like elements throughout.
It should be understood that spatially relative terms, such as "under," "above," "over," and the like, may be used herein for convenience of description to describe one element or feature as illustrated in the figures as compared to another element or feature. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "under" or "beneath" other elements would then be oriented "on" the other elements or features. Thus, the exemplary terms "under" and "under" may include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatially relative descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
In order to reduce damage to a wafer caused by a wafer fixing means when performing a plasma etching process on a semiconductor structure, an electrostatic Chuck (ESC) has been proposed as a wafer fixing device to replace a conventional mechanical jig. The electrostatic chuck adsorbs the wafer by electrostatic attraction to secure, support and transfer the wafer within the etching chamber. In addition, the electrostatic chuck can be used as a lower electrode, and is arranged opposite to an upper electrode arranged on the inner wall of the etching chamber, at least one of the upper electrode and the lower electrode is connected with a radio frequency power supply, so that a radio frequency electric field can be formed between the upper electrode and the lower electrode, reaction gas can be excited into plasma in the radio frequency electric field after being introduced into the etching chamber, and the plasma can further contact with the surface of a wafer fixed on the electrostatic chuck and react, so that the plasma etching of the wafer is realized.
In some examples, the area of the wafer is smaller than the area of the wafer carrying surface of the electrostatic chuck, which may result in that the rf electric field cannot be concentrated on the wafer surface, the etching rate of the center portion of the wafer may be different from that of the edge portion of the wafer, and the exposed wafer carrying surface is susceptible to the bombardment of the plasma, resulting in contamination of the electrostatic chuck.
In order to solve the above-mentioned problems, an Edge Ring (Edge Ring) is proposed, which may include a material similar to that of a wafer, and may be disposed around the wafer in an etching chamber, on one hand, to concentrate an rf electric field on the wafer surface and minimize a difference between an etching rate at a center portion of the wafer and an etching rate at an Edge portion, and on the other hand, to protect a wafer carrying surface of an electrostatic chuck from being bombarded by plasma.
In some embodiments, a plasma etching process may be applied to form a channel structure in a three-dimensional NAND-type memory, and the forming of the channel structure includes forming a channel hole extending in a vertical direction and penetrating the multi-layer stack structure using the plasma etching process. As the memory storage density increases, the number of layers of the stacked structure increases by a multiple, and the aspect ratio of the channel holes to be formed further increases. In order to form the trench hole with a higher aspect ratio, the energy of the rf power source used in the etching chamber needs to be increased, however, the increase of the rf power source energy may result in a reduction of the service life of the component including the edge ring, and the replacement frequency of the component and the maintenance frequency of the etching chamber may increase, thereby increasing the production cost. In addition, during the formation of the three-dimensional NAND-type memory, for example, during the formation of the multi-layered stack structure using the deposition process, the back and side surfaces of the wafer are also susceptible to material deposition, and in the etching chamber, the deposited material on the back and side surfaces of the wafer is susceptible to flaking off from the wafer to contaminate components including the edge ring, thereby also causing an increase in the cleaning frequency or replacement frequency of the edge ring. Accordingly, there is a need for further improvements in the construction of edge rings to extend the service life of the edge ring.
In this regard, the present disclosure proposes the following embodiments.
The embodiment of the disclosure provides an edge ring, which comprises an inner side surface, an outer side surface, a top surface and a bottom surface, wherein the inner side surface comprises a first part intersected with a first direction and a second part connected with the first part and the top surface, an included angle between the second part and the first direction is smaller than 45 degrees, and the first direction is the thickness direction of the edge ring.
Fig. 1 is a top view of an edge ring provided in an embodiment of the present disclosure, and fig. 2 is a cross-sectional view of fig. 1 along line AA' passing through the center O of the edge ring. Referring to fig. 1 and 2 in combination, the edge ring includes an inner side surface 100, an outer side surface 104, a top surface 105, and a bottom surface 106, wherein the inner side surface 100 includes a first portion 101 intersecting a first direction and a second portion 102 connected to both the first portion 101 and the top surface 105, an included angle a of the second portion 102 to the first direction is less than 45 degrees, and the first direction is a thickness direction of the edge ring. Here, the first direction is taken as the Z direction as an example.
In some specific examples, the angle of the second portion 102 from the first direction a ranges from 20 degrees to 30 degrees.
In a specific example, the second portion 102 makes an angle a of 24.7 degrees with respect to the first direction.
In some specific examples, referring to fig. 1 and 2, the line of intersection of the first portion 101 and the second portion 102 is circular with a diameter D1 in the range of 298 mm to 305 mm.
In a specific example, the diameter D1 of the circle is 302 millimeters.
In some specific examples, the thickness T1 of the edge ring in the first direction ranges from 7 millimeters to 8 millimeters.
In a specific example, the thickness T1 of the edge ring in the first direction is 7.4 millimeters.
In some specific examples, the dimension T2 of the second portion 102 in the first direction ranges from 4 millimeters to 5 millimeters.
In some specific examples, as shown in fig. 2, the first portion 101 is perpendicular to the first direction.
In some embodiments, as shown in FIG. 3, the edge ring surrounds the wafer carrier 201, the second portion 102 surrounds the wafer carrier 200 of the wafer carrier 201 and the wafer 202 disposed on the wafer carrier 200, the wafer carrier 200 is perpendicular to the first direction, the width S4 of the first portion 101 in the second direction is greater than twice the minimum spacing S3 of the first portion 101 from the wafer carrier 200 in the second direction, and the second direction is perpendicular to the first direction. Here, the second direction is exemplified as the X direction.
In some embodiments, with continued reference to FIG. 3, the edge of the wafer 202 on the wafer carrier 200 protrudes beyond the sides of the wafer carrier 201, the first portion 101 includes a first sub-portion directly below the wafer 202 in a first direction and a second sub-portion connected to the first sub-portion, and the width S2 of the second sub-portion in the second direction is greater than the width S1 of the first sub-portion in the second direction.
In the disclosed embodiment, the first portion 101 of the inner side 100 of the edge ring has a larger dimension in the radial direction of the edge ring, and the second sub-portion of the first portion 101 has a larger dimension in the radial direction than the first sub-portion directly under the wafer 202. Thus, the second portion 102 may have a greater distance from the wafer 202, thereby reducing the likelihood of the wafer 202 coming into contact with the edge ring and causing material deposited on the back and sides of the wafer 202 to flake off and contaminate the edge ring, extending the service life of the edge ring and reducing the frequency of cleaning the edge ring
It should be noted that, in the embodiment of the present disclosure, referring to fig. 2, the radial direction of the edge ring is any direction passing through the center O of the edge ring and perpendicular to the Z direction, for example, the radial direction of the edge ring may be the X direction in the drawing.
Fig. 4 is a cross-sectional comparison diagram of an edge ring provided by an embodiment of the present disclosure and an edge ring provided by a related art, referring to fig. 2 and fig. 4 in combination, an included angle b between an inclined portion of an inner side surface of the edge ring provided by the related art and a first direction is larger than an included angle a between a second portion 102 of the edge ring provided by an embodiment of the present disclosure and the first direction, and the included angle a is smaller than 45 degrees, and the included angle b is larger than 45 degrees, and a dimension T3 of the inclined portion of the inner side surface of the edge ring provided by the related art in the first direction is smaller than a dimension T2 of the second portion 102 of the edge ring provided by the embodiment of the present disclosure in the first direction.
Referring to fig. 1, 2, 3 and 4 in combination, since the included angle a between the second portion 102 of the inner side surface 100 of the edge ring and the first direction is smaller, the dimension S4 of the first portion 101 of the edge ring in the radial direction, the dimension T2 of the second portion 102 in the first direction, and the diameter D1 of the circular boundary line between the first portion 101 and the second portion 102 are all larger when the dimension of the bottom surface of the edge ring in the radial direction is unchanged. On the one hand, the larger size of the second portion 102 in the first direction can increase the wear margin of the edge ring, so that the service life of the edge ring can be prolonged, on the other hand, the larger size of the first portion 101 in the radial direction and the larger diameter of the circular boundary line can increase the distance between the second portion 102 and the wafer 202, so that the possibility that the wafer 202 contacts the edge ring and the material deposited on the back surface and the side surface of the wafer 202 is peeled off to pollute the edge ring can be reduced, the service life of the edge ring can be further prolonged and the cleaning frequency of the edge ring can be reduced, and on the other hand, the larger diameter of the circular boundary line between the first portion 101 and the second portion 102 can improve the cleaning efficiency when the edge ring is cleaned through WAC (Waferless Auto Clean). In summary, the edge ring provided by the present disclosure can prolong the service life, reduce the cleaning frequency and improve the cleaning efficiency, thereby reducing the production cost and improving the production efficiency.
In some embodiments, referring back to fig. 2, medial side 100 further includes a third portion 103 coupled to both first portion 101 and bottom surface 106, third portion 103 intersecting bottom surface 106. Here, the third portion 103 is taken as an example perpendicular to both the bottom surface 106 and the first portion 101.
In other embodiments, fig. 5 is a cross-sectional view of an edge ring provided by the present disclosure, the edge ring may include an outer side 304, a top surface 305, a bottom surface 306, and an inner side, which may include a first portion 301, a second portion 302, and a third portion 303. Wherein, the included angle between the second portion 302 and the first direction is smaller than 45 degrees, the first portion 301 may intersect the first direction, and the included angle between the first portion 301 and the third portion 303 may be an obtuse angle. Thus, the distance between the inner side surface of the edge ring and the wafer 202 on the wafer carrier 201 can be further increased, the possibility that the wafer 202 contacts the edge ring and causes the material deposited on the back surface and the side surface of the wafer 202 to peel off to pollute the edge ring is further reduced, and thus, the service life of the edge ring can be further prolonged and the cleaning frequency of the edge ring can be reduced.
In some specific examples, the edge ring provided in the above embodiments may be located in an etching machine, which may be a plasma etching machine. The etching machine may include an etching chamber, the wafer carrier 201 may be an electrostatic chuck for carrying a wafer in the etching chamber, the electrostatic chuck may utilize electrostatic attraction to adsorb the wafer, so as to fix, support and transfer the wafer in the etching chamber, and when the electrostatic chuck transfers the wafer into the etching chamber and is disposed at a position where plasma etching is performed, the edge ring may be disposed around the electrostatic chuck and the wafer.
In some embodiments, an edge ring located in the plasma etching station may be grounded or connected to a radio frequency power supply. In some specific examples, the edge ring may be connected to a rf power source with a lower electrode located in the electrostatic chuck, so that an rf electric field may be formed between the upper electrode and the lower electrode, and between the upper electrode and the edge ring, to minimize a difference between an electric field intensity at a center portion of the wafer and an electric field intensity at an edge portion.
In some embodiments, during movement of the electrostatic chuck carrying the wafer, the second portion of the edge ring makes an angle less than 45 degrees with the first direction, and the first portion of the edge ring has a larger radial dimension, so that the diameter of the circular boundary line between the first portion and the second portion is larger, and the wafer is in contact with the edge ring, and the possibility of causing material deposited on the back surface and the side surface of the wafer to peel off to pollute the edge ring is lower, thereby prolonging the service life of the edge ring and reducing the cleaning frequency of the edge ring. In addition, since the second portion of the edge ring has a larger dimension in the first direction, the edge ring has a larger loss margin when performing the plasma etching process, and thus the replacement frequency of the edge ring may be relatively low when a larger rf power is required to form a channel hole having a higher aspect ratio. Therefore, the edge ring provided by the disclosure can reduce the cost of the plasma etching process and improve the efficiency and reliability of the plasma etching process.
The features disclosed in the several device embodiments provided in the present disclosure may be combined arbitrarily without conflict to obtain a new device embodiment.
The foregoing is merely specific embodiments of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the disclosure, and it is intended to cover the scope of the disclosure.
Claims (10)
1. The edge ring is characterized by comprising an inner side surface, an outer side surface, a top surface and a bottom surface, wherein,
The inner side surface comprises a first part intersected with a first direction and a second part connected with the first part and the top surface, an included angle between the second part and the first direction is smaller than 45 degrees, and the first direction is the thickness direction of the edge ring.
2. The edge ring of claim 1, wherein the second portion is angled from the first direction by an angle in the range of 20 degrees to 30 degrees.
3. The edge ring of claim 1, wherein the line of intersection of the first portion and the second portion is circular, the circular having a diameter in the range of 298 mm to 305 mm.
4. The edge ring of claim 1, wherein a thickness of the edge ring in the first direction ranges from 7 millimeters to 8 millimeters.
5. The edge ring of claim 1, wherein the second portion has a dimension in the first direction ranging from 4 millimeters to 5 millimeters.
6. The edge ring of claim 1, wherein the edge ring surrounds a wafer carrier, the second portion surrounds a wafer carrier surface of the wafer carrier, the wafer carrier surface is perpendicular to the first direction, a width of the first portion in a second direction is greater than twice a minimum spacing of the first portion from the wafer carrier surface in the second direction, and the second direction is perpendicular to the first direction.
7. The edge ring of claim 6, wherein an edge of a wafer on the wafer carrier protrudes from a side of the wafer carrier, the first portion includes a first sub-portion directly below the wafer in the first direction and a second sub-portion connected to the first sub-portion, and a width of the second sub-portion in the second direction is greater than a width of the first sub-portion in the second direction.
8. The edge ring of claim 1, wherein the inner side further comprises a third portion connected to both the first portion and the bottom surface, the third portion intersecting the bottom surface.
9. The edge ring of claim 1, wherein the edge ring is located in an etching station and surrounds an electrostatic chuck in the etching station.
10. The edge ring of claim 9, wherein the edge ring is grounded or connected to a radio frequency power source.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202421942862.1U CN223108839U (en) | 2024-08-09 | 2024-08-09 | Edge Ring |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202421942862.1U CN223108839U (en) | 2024-08-09 | 2024-08-09 | Edge Ring |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN223108839U true CN223108839U (en) | 2025-07-15 |
Family
ID=96339772
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202421942862.1U Active CN223108839U (en) | 2024-08-09 | 2024-08-09 | Edge Ring |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN223108839U (en) |
-
2024
- 2024-08-09 CN CN202421942862.1U patent/CN223108839U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11430640B2 (en) | Substrate processing apparatus | |
| US20210035785A1 (en) | Substrate processing apparatus | |
| US6611417B2 (en) | Wafer chuck system | |
| US6726805B2 (en) | Pedestal with integral shield | |
| US9966236B2 (en) | Powered grid for plasma chamber | |
| EP0794566B1 (en) | Wafer spacing mask for a substrate support chuck and method of fabricating same | |
| US5740009A (en) | Apparatus for improving wafer and chuck edge protection | |
| KR101673039B1 (en) | Electrostatic chuck | |
| JP5796076B2 (en) | Highly conductive electrostatic chuck | |
| US9818583B2 (en) | Electrode plate for plasma etching and plasma etching apparatus | |
| US6992876B1 (en) | Electrostatic chuck and its manufacturing method | |
| US5885469A (en) | Topographical structure of an electrostatic chuck and method of fabricating same | |
| US10236201B2 (en) | Wafer carrier for smaller wafers and wafer pieces | |
| JP6867149B2 (en) | Board holding member | |
| US20080194113A1 (en) | Methods and apparatus for semiconductor etching including an electro static chuck | |
| KR20050047148A (en) | Electrostatic chuck for supporting a substrate | |
| KR20120067934A (en) | High efficiency electrostatic chuck assembly for semiconductor wafer processing | |
| CN223108839U (en) | Edge Ring | |
| KR100954754B1 (en) | Substrate Tray for Plasma Processing Equipment | |
| US20230369018A1 (en) | Substrate processing apparatus | |
| CN214830647U (en) | Target bearing device and semiconductor device manufacturing equipment | |
| KR100639572B1 (en) | Electrostatic chuck with double flat | |
| US20040000375A1 (en) | Plasma etch chamber equipped with multi-layer insert ring | |
| CN219117539U (en) | Semiconductor device processing equipment | |
| KR100459646B1 (en) | Separable shield ring |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |