DE102020208381A1 - Power converter and method for operating a power converter - Google Patents

Abstract

A power converter with a half-bridge comprising at least two power semiconductors, set up for pulse width modulation by means of the half-bridge, also designed to carry out voltage-free switching by individually adapting the switching times of the power semiconductors, is set up to switch the power semiconductors at a definable maximum frequency.

Description

The invention relates to a power converter for electrical conversion between a first and at least one second voltage, the power converter comprising at least two power semiconductors which form a half bridge and the power converter comprising an LC filter. The invention also relates to an operating method for such a converter.

Converters with a downstream LC filter are often used to operate an electromagnetic actuator, for example a rotating electrical machine. They are also used as line-feeding or line-fed converters. In the simplest case, the converter comprises two power semiconductors connected in series to form a half-bridge, which are operated with pulse width modulation and thus convert an input voltage into an output voltage. In the frequent case of three-phase operation, three half-bridges, each with two power semiconductors, can be used to generate a three-phase system.

To operate a three-phase electric motor, the converter can also be set up and operated as a three-phase frequency converter. By appropriately controlling the power semiconductors, a variable-frequency three-phase system is generated in this case, with which the motor or the network is fed.

The pulse width modulation can in principle work with a fixed switching frequency for the power semiconductors, the fixed switching frequency being, for example, 5 kHz or 30 kHz. In this case, the power semiconductors are switched on under voltage and the resulting switching losses are accepted.

Alternatively, it is possible to always switch on the power semiconductors in a de-energized state. This significantly reduces the switching losses that occur. To switch on without voltage, the switching times of the power semiconductors must be selected appropriately for each switching process, which can be done on the basis of calculations and / or measurements. The resulting switching times and the switching frequency resulting from the switching times depend, among other things, on the amount of the output voltage generated by the converter, the intermediate circuit voltage used, the output current, and component parameters. It is disadvantageous that the required switching frequency is so high that it can no longer be performed by the power semiconductors and / or their control. The correct functioning of the converter is adversely affected in such operating ranges.

It is the object of the present invention to specify a converter and a method for its operation with which the disadvantages mentioned at the outset are reduced.

This object is achieved by a power converter with the features of claim 1. With regard to the method, one solution consists in a method having the features of claim 10.

The converter according to the invention for electrical conversion comprises a series connection of a first and a second switching device and a control device for controlling the switching devices.

The control device is designed to switch the activated switching devices with a frequency of at least 10 Hz and to determine the switching times for the switching device in such a way that a voltage-free switch-on is achieved with the smallest possible current ripple if there is a definable minimum time interval between two successive switch-on times or two consecutive switch-off times one of the switching devices (14, 15) is not undershot, and in the other case the switching times must be determined in such a way that a voltage-free switch-on in compliance with the definable minimum interval between the consecutive switch-on times or two consecutive switch-off times of the same switching device ( 14, 15) is complied with.

In the method according to the invention for operating a converter for electrical conversion, a first and a second switching device form a series circuit. The switching devices are switched with a frequency of at least 10 Hz. Switching times for switching on and / or switching off one of the switching devices are determined, with a subsequent switching-on time for the same switching device being determined from a preceding switching-on time for the switching device, or a subsequent switching-off time for the same switching device being determined from a previous switching-off time for the switching device, which is a voltage-free Switching with the smallest possible current ripple possible, it is checked for this switch-on time whether it is within a definable time interval after the previous switch-on time of the same switching device or for this switch-off time it is checked whether it is a definable minimum time interval after the preceding switch-off time the same switching device and, if this is not the case, defines the next switching time of the same switching device so that it lies the minimum time interval after the previous switching time of the same switching device.

For the invention, it was recognized that the difficulties with the variable switching frequency, which arise with pure voltage-free switching, can be reduced by always maintaining a minimum time interval between two successive switching times.

This minimum time interval is always maintained between two switching times of the same switch that relate to the same type of switching process, i.e. between two switch-off processes or between two switch-on processes. On the other hand, the time interval between a switch-off process and a switch-on process or vice versa can remain very short, since this interval is responsible for setting the output voltage, that is to say is used for the pulse width modulation.

Compliance with the minimum time interval between two switch-on times or two switch-off times of the same switch results in an upper limit for the switching frequency that is not exceeded during operation. This advantageously avoids problems with the switching devices that occur when the switching frequency is too high. In this case, the de-energized switching is advantageously retained. The requirement of switching with as high a frequency as possible in order to keep the resulting current ripple low and to reduce the conduction losses that occur is treated as secondary. At the same time, in the areas in which voltage-free switching is possible without falling below the minimum time interval, voltage-free switching, in particular voltage-free switching on, is implemented, which leads to a high efficiency of the converter.

It goes without saying that the required current mean value is always maintained in all cases.

The converter can be single-phase or multi-phase, for example three-phase. A three-phase converter can have three half-bridges connected in parallel, each with two switching devices. The control device of the three-phase converter can furthermore be designed to generate a three-phase voltage system, that is to say voltages which are phase-shifted by 120 ° with respect to one another.

In a polyphase converter, in particular a three-phase converter, the control device is preferably designed to control the half-bridges according to the invention. The procedure described is preferably implemented independently for the half bridges, i.e. the determined switching times of the power semiconductors of a first of the half bridges do not influence the switching times of the power semiconductors of the other half bridges.

The converter is preferably operated as an inverter or is part of a converter, in particular a frequency converter. In this case, an input voltage is applied to the external connections of the series connection of the two switching devices, usually an intermediate circuit direct voltage. At its output, the converter then generates an alternating voltage, either with a mains frequency, for example 50 Hz or 60 Hz, or with a variable frequency with which an electric motor is controlled, for example.

• Die Steuereinrichtung des Stromrichters kann ausgestaltet sein, die Schalteinrichtungen unter Verwendung einer Pulsweitenmodulation zu schalten. Dadurch kann in verhältnismäßig einfacher Weise jede Art der Ausgangsspannung, beispielsweise eine Wechselspannung von beliebiger Schwingungsform und beliebiger Frequenz unterhalb der Schaltfrequenz der Schalteinrichtungen erzeugt werden.

Further advantageous configurations of the device according to the invention and the method according to the invention emerge from the dependent claims. The embodiments of the independent claims can be combined with the features of one of the subclaims or preferably also with those from several subclaims. Accordingly, the following features can also be provided:

• The control device of the converter can be designed to switch the switching devices using pulse width modulation. As a result, any type of output voltage, for example an alternating voltage of any waveform and any frequency below the switching frequency of the switching devices, can be generated in a relatively simple manner.

The control device can be designed to use a frequency of less than 500 kHz as the maximum frequency. This avoids problems with the control of most power semiconductors, but still maintains voltage-free switching.

The control device can be designed to use a maximum frequency of less than 150 kHz. This means that the emission of electromagnetic interference is reduced in a frequency range above 150 kHz, which makes it easier to comply with relatively strict EMC standards, which are available, for example, in a frequency band from 150 kHz to 30 MHz.

The control device can be designed to calculate the switching times, in particular the switch-on times for the power semiconductors for each switching action. In other words, the control device is designed to continuously calculate the next following switching time from current data. As a result, the best possible switching time is always achieved, which is possible within the framework of the specifications, for example de-energized switching and compliance with the minimum time interval.

The control device can be designed to determine the switching times by means of one or more current measurements. For example, the switching thresholds (positive and negative) can be specified by comparators with digital-to-analog converters. As a result, both switching times of the switching devices are predetermined by the switching thresholds of the comparators.

The control device can also be designed to determine the switching times by means of a current measurement in combination with a calculation.

The switching devices include power semiconductor switches, in particular a GaN-based switch or a SiC-based switch. The wide bandgap switches in particular allow a high switching frequency and thus make it possible to select the definable minimum time interval to be very small.

As a result, the current ripple can be minimized and the conduction losses can be minimized in the broadest possible range of operating states.

The switching devices can each include exactly one power semiconductor. This means that they are designed as a minimal half bridge.

The invention is described and explained in more detail below with reference to the figures of the drawing in connection with an exemplary embodiment.

• 1 einen einphasigen Stromrichter mit einer Halbbrücke,
• 2 einen dreiphasigen Stromrichter,
• 3 Kurvenformen für den zeitlichen Verlauf von Formen der Schaltfrequenz,
• 4 und 5 Kurvenformen für den zeitlichen Verlauf von Strömen und Spannung im Stromrichter.

Show it

• 1 a single-phase converter with a half bridge,
• 2 a three-phase converter,
• 3 Waveforms for the temporal course of forms of the switching frequency,
• 4th and 5 Waveforms for the temporal course of currents and voltage in the converter.

1 shows a single-phase, simple power converter 10. The power converter 10 comprises a half bridge 12, which has a series connection of an upper power semiconductor 14 and a lower power semiconductor 15. In this example, the power semiconductors are Si-MOSFETs, but in other designs they can also be IGBT, GaN or SiC-based switches.

An upper connection of the half bridge 12 forms a first connection 17 of the converter 10, which in applications is often connected to the positive pole of a DC voltage, for example the one in 1 DC voltage intermediate circuit 13 shown is connected.

A lower connection of the half bridge 12 forms a second connection 18 of the converter 10, which in applications is often connected to the negative pole of the DC voltage, for example the DC voltage intermediate circuit 13 or another reference potential.

The potential point 11, which lies between the upper power semiconductor 14 and the lower power semiconductor 15, is connected to a choke 21 which, together with a capacitor 22, forms an LC filter 23. The potential point between the choke 21 and the capacitor 22 forms a third connection 19 of the converter 10. In applications of the converter 10, the third connection 19 is often an AC voltage connection. In the in 1 In the example shown, the converter 10 is connected to a load, for example a motor 26.

The reference potential to which the capacitor 22 is connected apart from the third connection 19 is the center point 24 of the DC voltage intermediate circuit 13. This reference potential is also used for the connection of the motor 26.

If the power converter 10 is used as an inverter or as part of a converter, the alternating voltage to be generated is typically formed by pulse width modulation of the two power semiconductors 14, 15. In the case of pulse width modulation, the two power semiconductors 14, 15 are essentially switched on alternately, apart from relatively short dead times. As a result, the voltage connected to the first connection 17 of the converter 10 and the voltage connected to the second connection 18 of the converter 10 are alternately applied to the potential point 11 between the power semiconductors 14, 15.

The switching frequency with which the power semiconductors are switched is high compared to the frequency of the alternating voltage to be output. Typically the switching frequency is im kHz range, for example 5 kHz or 20 kHz, if the alternating voltage to be generated is mains frequency. The duty cycle used of the two power semiconductors 14, 15 determines the mean voltage level at the potential point 11. The subsequent low-pass filtering, for example with the LC filter 23, is used to reduce the high-frequency voltage components that are impressed on the alternating voltage, to reduce, i.e. to smooth the alternating voltage.

2 shows a three-phase converter 50 according to a further exemplary embodiment of the invention. The three-phase converter can be used, for example, to operate a motor with a variable rotational frequency. As with the single-phase converter 10 of 1 a DC voltage intermediate circuit 13 is typically connected to the connections 17, 18 in the three-phase converter 50, which is shown in FIG 2 is not shown.

Furthermore, three half-bridges, each with two power semiconductors 51... 56 connected in series, are connected in parallel to one another between the connections 17, 18. The function of these half-bridges corresponds to the half-bridge 12 of the single-phase converter 10, each of the half-bridges here being assigned to one of the phases of the output voltage.

The center points 59a ... c of the half bridges are each connected to an LC filter. This includes a choke 57a ... c and two capacitors 58a ... f for each phase, one of which is connected to the first connection 17 and one to the second connection 18. The potential point between the respective choke 57a ... c and the respective capacitors 58a ... f forms a load connection 60a ... c for the respective phase.

By activating the power semiconductors 51 ... 56 accordingly, a variable-frequency three-phase system is generated, with which the motor is fed. This gives the motor a sinusoidal three-phase system with only a small proportion of harmonics.

In many applications, a fixed switching frequency 41 is used in order to carry out the pulse width modulation, the exact frequency depending on the type of power semiconductors 14, 15 used and many other parameters. In this case, the power semiconductors can be switched hard, that is to say regardless of whether, for example, a voltage is present across the power semiconductor 14, 15 when switched on or not. This results in noticeable switching losses.

The course of the switching frequency 41 in this simple case is over approximately one period of the alternating voltage in 3 shown, where on the x-axis the 3 the time is plotted.

The switching losses that result when the power semiconductors 14, 15 are switched on hard can be reduced if the switching times are selected so that the power semiconductors 14, 15 are always switched on without voltage. If a fixed switching frequency 41 is maintained, however, there is a considerable current ripple which leads to line losses.

A further improvement results if the fixed switching frequency 41 is abandoned and a variable switching frequency 42 is used instead. An exemplary course of this variable frequency 42 is also shown in FIG 3 shown.

In 4th the course of the resulting current 31 of the choke 21 is shown, together with the course of the smoothed current 32 and the alternating voltage 33 between the third connection 19 and the reference potential at the intermediate circuit center 24. The current 31 of the choke 21 is shown as an area because it has a ripple with a significantly higher frequency than the motor current frequency. The current ripple in the choke 21 arises from the voltage applied to the choke 21, which can be determined from the voltage applied to the first and second terminals 17, 18, for example an intermediate circuit voltage and the motor voltage 33 and the modulation.

If the capacitive charge reversal current of the filter capacitance is neglected, the mean value of current 31 corresponds to motor current 32 to be switched on without voltage. In order to achieve this, the current 31 must have a negative sign when the upper power semiconductor 14 is switched on and a positive sign when the lower power semiconductor 15 is switched on. However, this is only a necessary, but not a sufficient criterion for de-energized switching on. To ensure de-energized switching, the dead time must be selected accordingly and the output capacitance must be adjusted before switching on the respective power semiconductor 14, 15 (and also that of the opposite power semiconductor 14, 15) to be reloaded.

The power semiconductor 14, 15 may only be switched on when the output capacitance is discharged to approximately 0 V (and charged to the intermediate circuit voltage of the other power semiconductor 14, 15) in order to guarantee voltage-free switching. Typically stream 31 will be like this shaped so that de-energized switching is safely achieved and at the same time not too high current values occur, as these cause conduction losses.

The mean value of the current 31 over a switching period must correspond to the motor current if the capacitive charge reversal current of the capacitor 22 is neglected. This results, for example, in the in 4th The curve profile of the current 31 shown. The variable switching frequency 42 in 3 has the lowest value in the range of the maxima and minima of the motor voltage and the motor current. In contrast, when the motor current crosses zero, the maximum of the variable switching frequency 42 occurs. The switching frequencies achieved there can be very high and extend into the MHz range or beyond.

An exemplary embodiment for the invention will now be explained with reference to the power converters 10, 50. It is not necessary to adapt the topologies. The adaptations required for the exemplary embodiment of the invention take place in a control device 16 which carries out the control, that is to say the switching operations, of the power semiconductors 14, 15, 51... 56.

The control device 16 is designed in such a way that it maintains a specifiable maximum switching frequency for the switching operations. In this exemplary embodiment, the maximum switching frequency should be 500 kHz.

If the variable switching frequency 42 increases in the course of a motor current period and reaches the predeterminable maximum of the switching frequency, for example in the region of the sine zero crossing, then the control device 16 does not allow any further increase in the switching frequency. Thus, in the range in which the variable switching frequency 42 is above the maximum of the switching frequency, switching is always carried out at a switching frequency which corresponds to the maximum of the switching frequency, that is to say 500 kHz in this example. The power semiconductors 14, 15, 51 There is always a minimum time interval that corresponds to the reciprocal of the maximum switching frequency, i.e. 2 µs in this example. For these areas there is therefore a fixed-frequency operation for the half-bridge concerned. The result is a switching frequency 43, the course of which in 3 is shown.

As soon as the variable switching frequency 42 falls again below the maximum switching frequency, a switching frequency 43 which corresponds to the variable switching frequency 42 is used again. The power semiconductors 14, 15 are thus switched with a variable switching frequency in one sub-area of the motor current period, while the motor current period is switched at a fixed frequency in another sub-area. Operation with variable switching frequency typically occurs in those ranges of the motor current sine in which it assumes relatively large amounts. Therefore, the variable frequency circuit is operated primarily in the sine minima and maxima. In the areas around the zero crossings of the motor current sine, the converter works at a fixed frequency at the maximum switching frequency due to the high resulting variable switching frequency 42, whereby the curve for the switching frequency 43 is shown in FIG 3 results.

The switch-on times can be used to implement the method described, i.e. the time interval between two successive switch-on times of the same power semiconductor 14, 15, 51 ... 56 is considered for the frequency. However, the switch-off times can also be used, that is to say the time interval between two consecutive switch-off times of the same power semiconductor 14, 15, 51... 56 can be considered. The respective other switching time of the power semiconductor 14, 15, 51... 56 under consideration is then obtained by specifying the mean current value. The switching times for the other power semiconductor 14, 15, 51 other power semiconductors 14, 15, 51 ... 56, apart from dead times in which both power semiconductors 14, 15, 51 ... 56 are switched off.

If the maximum permissible switching frequency of 500 kHz is specified in this exemplary embodiment, this results in the same operating point of the converter as in FIG 4th in the 5 shown curves of current 31 in the choke 21, motor current 32 and motor voltage 33. When looking at the ripple of the choke current 31, it is noticeable that this compared to 4th has a widening in the area of the zero crossings of the motor current sine. This expansion results from the specification of the maximum switching frequency of 500 kHz. The lower switching frequency in this range compared to operation without specifying a maximum frequency, that is to say operation with the variable switching frequency 42, results in a higher current ripple with the same inductance and voltage ratios. This also increases the effective value of the inductor current 31, which can lead to slightly increased losses in the power semiconductors 14, 15.

The shaping of the coil current, i.e. the determination of the switching times, can be done by various methods. The required switching frequency and the duty cycle, that is to say the switching times of the half-bridge 12, can thus be determined exclusively by means of calculations on an ideal (lossless) half-bridge 12. This means that there is no need to measure the coil current. The calculations are preferably carried out in each switching period, but can alternatively also be carried out less frequently, for example every n switching periods, where n is an integer> 1.

Alternatively, the switching thresholds (positive and negative) can be specified by comparators with corresponding digital-to-analog converters. As a result, both switching processes (times) of the half bridge are specified by the switching thresholds of the comparators. In a further alternative, a combination of the two aforementioned methods can also be used. For this purpose, the switch-on time of the upper power semiconductor 14 is specified in the positive half-oscillation of the motor current sine by detection with the aid of a comparator. The other switching time is determined by calculation on an ideal half bridge 12. In the negative half-oscillation, the switchover takes place analogously, but with twisted switching actions. With this method, too, the switch-on time of the lower power semiconductor 15 can be calculated in every switching period or, alternatively, every n switching periods.

List of reference symbols

10, 50

Power converter

11, 59a ... c

Potential point between the power semiconductors

12th

Half bridge

13th

Intermediate circuit

14, 15, 51 ... 56

Power semiconductors

16

Control device

17, 18, 19

connections

21, 57a ... c

throttle

22, 58a ... f

capacitor

23

LC filter

24

DC link center point

31

Choke current

32

Motor current

33

Motor voltage

41

fixed switching frequency

42

variable switching frequency

43

Switching frequency with maximum

60a ... c

Load connection

Claims (13)

Converter (10, 50) for electrical conversion comprising a series connection of a first and a second switching device (14, 15) and a control device (16) for controlling the switching devices (14, 15), the control device (16) being designed to control the To switch switching devices (14, 15) with a frequency of at least 10 Hz and to determine the switching times for the switching devices (14, 15) so that a voltage-free switch-on is achieved with the smallest possible current ripple, if there is a definable minimum time interval between two successive switch-on times or two consecutive switch-off times of one of the switching devices (14, 15) is not undershot, and in the other case to determine the switching times so that a voltage-free switch-on while observing the definable minimum time interval between the successive switch-on times or the aufei nander following switch-off times of the same switching device (14, 15) is observed. Power converter (10, 50) according to one of the preceding claims, in which the control device (16) is designed to switch the switching devices (14, 15) using pulse width modulation. Power converter (10, 50) according to one of the preceding claims, in which the control device (16) is designed to use a frequency of less than 500 kHz as the maximum frequency. Power converter (10, 50) according to one of the preceding claims, in which the control device (16) is designed to use a maximum frequency of less than 150 kHz. Power converter (10, 50) according to one of the preceding claims, in which the control device (16) is designed to use a maximum frequency of at least 10 kHz, in particular at least 100 kHz. Power converter (10, 50) according to one of the preceding claims, in which the control device (16) is designed to set the switching times for to calculate the power semiconductors (14, 15) for each switching operation. Converter (10, 50) according to one of the preceding claims, in which the control device (16) is designed to determine the switching times by two current measurements. Power converter (10, 50) according to one of the preceding claims, in which the control device (16) is designed to determine the switching times by means of a current measurement in combination with a calculation. Power converter (10, 50) according to one of the preceding claims, in which one or both switching devices (14, 15) comprise a power semiconductor, in particular a GaN-based switch or a SiC-based switch. Power converter (10, 50) according to one of the preceding claims, in which the switching devices (14, 15) each comprise exactly one power semiconductor. Single-phase converter (10) according to one of the preceding claims. Three-phase converter (50) according to one of the Claims 1 until 10 . Method for operating a converter (10, 50) for electrical conversion, in which - a first and a second switching device (14, 15) form a series circuit and are switched with a frequency of at least 10 Hz, - Switching times for switching on and / or switching off one of the switching devices (14, 15) are determined, with a subsequent switching-on time being determined from a preceding switching-on time or a subsequent switching-off time of the same switching device being determined from a previous switching-off time, which enables voltage-free switching with the lowest possible current ripple makes it possible to check for this switch-on time whether it lies within a definable minimum time interval after the previous switch-on time of the same switching device or for this switch-off time it is checked whether it is within a definable minimum time interval after the previous switch-off time of the same switching device and if this is not the case , determines the next switch-on time or switch-off time of the same switching device in such a way that it sets the minimum time interval after the previous switch-on time or off switching time of the same switching device.

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