DE102022129856A1 - Implementation of a voltage without direct measurement reference - Google Patents

Abstract

The present invention describes a circuit arrangement for regulating a current I _load through a load R _load of unknown size with a regulator to which a target voltage U _target and an actual voltage U _mess dependent on the current I _load to be regulated are fed, and which regulates the current I _load depending on a difference between the target voltage U _target and the actual voltage U _mess , wherein - the actual voltage U _mess can be tapped off at a sensing resistor R _mess connected in series with the load R _load , wherein the sensing resistor R _mess is arranged highside and has no direct ground reference, and the target voltage U _target is made available by a lowside circuit component, characterized in that a voltage transfer takes place and in a first variant the regulator USI lowside is arranged and the actual voltage U _mess tapped off at the sensing resistor R _mess is transferred from highside to lowside, or in a second variant the regulator highside is arranged and the target voltage U _target is transferred from lowside to highside.

Description

The present invention relates to a circuit arrangement according to the preamble of patent claim 1, a measuring arrangement according to the preamble of patent claim 10 and a method for measuring a voltage according to the preamble of patent claim 11.

The regulation of a current I _load by a load R _load is usually carried out in such a way that a controller regulates the current I _load to the desired value by specifying a target voltage U _target and comparing it with a current-dependent actual voltage U _measure via an actuator. The load R _load can be a simple ohmic resistor, but also a complex load, e.g. an electric motor or sensor electronics.

This principle, known from the state of the art, is in the 1 and 2 shown.

1 shows a first circuit known from the prior art for regulating a current I _g .

At the 1 In the circuit shown, the load R _{last is} connected to the positive pole of a DC power supply and has no direct ground reference. A current regulator USI, hereinafter also referred to as regulator for short, receives the current-dependent actual voltage U _mess via a separate sensing resistor R _mess , which is connected in series with the load R _last . The current I _last flowing through the sensing resistor R _mess causes a voltage drop at this resistor at the level of the actual voltage U _mess used for the measurement, which can then be further processed. The target voltage U _target and the actual voltage U _mess are fed to the current regulator USI for control purposes.

2 shows a second circuit known from the prior art for controlling a current I _g if a size or behavior of the load R _last is known.

If the load R _last is known, then according to the embodiment in 2 the load R _load can be connected directly to ground and the sensing resistor R _mess can be omitted. Since the resistance of the load R _load is known, the actual voltage U _mess , i.e. the voltage drop across the load R _load , can be used for control.

It is usual, but not mandatory, for the negative terminal of the DC supply voltage to be connected to the common reference point or common ground of connected circuit parts or circuits. The ground can be referred to as the "low side" and the positive terminal of the supply voltage as the "high side".

A control can be implemented more easily if the supply of the controller and the setpoint and actual value have a direct ground reference and are therefore on the low side or are related to it

In certain constellations, it can also be a disadvantage if the load R _load has no ground reference. An absolute necessity for the load R _load to be grounded can be present, for example, where ground-related shielding must be used or if other ground-related circuits, e.g. communication circuits connected to ground or a display, are connected to the load.

This circumstance leads to the 3 presented concept.

3 shows a circuit known from the prior art for controlling a current I _g .

In the circuit shown, the load R _last and the regulator USI are on the low side, the actual voltage U _mess for the actual value of the current I _mess is tapped off on the high side using a sensing resistor R _mess . The actual voltage U _mess is referenced to ground as a differential voltage via two parallel-connected voltage dividers T, which are connected to the sensing resistor R _mess on the input side and output side. The actual voltage U _mess is independent of the supply voltage DC _in , and depends only on the current I _mess flowing through the sensing resistor R _mess , which corresponds to the current I _last through the load R _last .

The circuit shown does have disadvantages, however. Firstly, an additional differential amplifier is required to amplify the voltage applied to the voltage dividers T. Furthermore, both the voltage dividers T and the differential amplifiers must be suitable for high values of the supply voltage DC _in .

The actual voltage U _mess is also divided down by the voltage divider T, which means that the differential voltage that can be tapped at the voltage divider T is reduced in the division ratio of the voltage divider T. As the differential voltage decreases, the control tends to become less precise and therefore worse. Nevertheless, the circuit shown is common and various semiconductor manufacturers offer integrated circuits with this structure.

As already mentioned, the load R _load can also be a complex load, e.g. two-wire electronics, e.g. with 4-20 mA cut For 4-20 mA interfaces, the current I _g impressed into the current loop is correlated to a measured value.

A two-wire field device according to the present invention is understood to be a field device that is connected to a higher-level unit via two lines, wherein both a power supply and a measured value transmission take place via these two lines.

The energy and/or signal transmission between the two-wire field device and the higher-level units is carried out according to the well-known 4 mA to 20 mA standard, in which a 4 mA to 20 mA current loop, i.e. a two-wire line, is formed between the field device and the higher-level unit. In addition to the analog transmission of signals, it is possible for the measuring devices to transmit additional information to or receive information from the higher-level unit according to various other protocols, particularly digital protocols. Examples of this include the HART protocol or the Profibus-PA protocol.

The power supply for these field devices is also provided via the 4 mA to 20 mA current signal, so that no additional supply line is required in addition to the two-wire line. In order to keep the wiring and installation effort as well as the safety measures as low as possible, for example when used in explosion-proof areas, it is also not desirable to provide additional power supply lines.
With two-wire field devices, the available input power is significantly limited. The electronics in the field device must be designed in such a way that they still work reliably even with a minimum signal current of 4 mA.

In 4 the problem with a missing ground reference of the load R _last , in this case a two-wire electronics with a 4-20 mA interface for the transmission of measured values, is shown. Due to the missing ground reference of the two-wire electronics R _last and the ground coupling of a downstream circuit Ext, a variable potential is present at the connection node between the two-wire electronics R _last and the downstream circuit Ext, which in the case shown depends on the size of the sensing resistance R _mess and the loop current I _last .

A solution could be a circuit according to 3 However, the inaccuracies and sluggishness of this circuit cannot be tolerated in this application. It is therefore recommended to use the 5 and 6 The two-wire electronics are located lowside with ground reference and generate the ground-related setpoint U _set . The sensing resistor R _mess is located highside.

Based on this constellation, there are two variants: Either, as in 5 the controller is on highside, and the setpoint U _soll must be transferred from lowside to highside. Or it is as in 6 the controller to lowside, and the actual value U _mess must be transferred from highside to lowside. The circuit according to 5 can be advantageous because the actual value U _mess is fed directly to the high-side regulator, which can then adjust the current I _g more quickly if necessary than if U _mess is first fed to the low-side regulator via another amplifier stage.

It is the object of the present invention to provide a circuit arrangement by means of which an improved voltage measurement without direct ground reference and thus also a current determination without direct ground reference is possible.

A circuit arrangement according to the invention for regulating a current through a load of unknown size with a regulator to which a target voltage and an actual voltage dependent on the current to be regulated are supplied, and which regulates the current depending on a difference between the target voltage and the actual voltage, wherein the actual voltage can be tapped at a sensing resistor connected in series with the load, wherein the sensing resistor is arranged highside and has no direct ground reference, and wherein the target voltage is provided by a circuit component located lowside, is characterized in that a voltage transfer takes place and in a first variant the regulator is arranged lowside and the actual voltage tapped at the sensing resistor is transferred from highside to lowside, or in a second variant the regulator is arranged highside and the target voltage is transferred from lowside to highside.

In the present application, highside refers to circuit sections that are connected to a supply voltage, in particular to a positive connection of the supply voltage. Lowside refers to circuit sections that are connected to ground. A separation between highside and lowside is usually at the load that is supplied with the supply voltage.

Because the actual voltage is transferred from highside to lowside or the target voltage from lowside to highside in the present circuit arrangement, complex Filters and amplification arrangements can be dispensed with. This is possible in particular because the respective voltage is preferably transmitted in full and not, as in the prior art, significantly reduced by voltage dividers. Non-linearities, manufacturing tolerances in the components, signal contamination and thermal effects no longer have such a large impact. The control is therefore more direct and less susceptible to interference.

In one design variant, the circuit component providing the target voltage is the load, which can in particular be designed as a two-wire electronics.

In a two-wire sensor, the integrated two-wire electronics transmit a measured value via the current flowing in the two-wire loop. This means that the two-wire electronics specify which current should flow in the two-wire loop depending on the measured value. The regulation of this current flowing in the two-wire loop is determined by comparing the current-dependent actual voltage falling across the sensing resistor with a target voltage output by the two-wire electronics. Either this target voltage is transferred from the low side to the high side so that the controller can sit there and immediately compare the actual voltage with the transferred target voltage. Alternatively, the actual voltage is transferred from the high side to the low side and the controller located there compares the transferred actual voltage with the target voltage provided by the low side.

In a preferred embodiment, the voltage transfer takes place by means of at least one switched capacitor and a second capacitor. Through appropriate charge balancing processes between the switched capacitor and the second capacitor, the respective voltage can be transferred reliably and in full from high side to low side or vice versa with just a few switching cycles.

In a specific embodiment, in the first variant, the switched capacitor highside is arranged parallel to the sensing resistor and can be connected to the second capacitor via a changeover switch that can be controlled in the same time, with the second capacitor lowside being arranged and connected to ground on the one hand and to the regulator on the other. In the second variant, the switched capacitor is connected to the target voltage on the one hand and to ground on the other hand and can be connected to the second capacitor via a changeover switch that can be controlled in the same time, with the second capacitor highside being arranged and connected to the supply voltage on the one hand and to the regulator on the other.

These two variants of the present circuit arrangement ensure a simple structure with few components and an efficient transmission of the respective voltage from highside to lowside or from lowside to highside.

In one embodiment of the invention, the changeover switches are designed as semiconductor switching elements. Using appropriate semiconductor switching elements, an energy- and space-saving as well as robust implementation of the present circuit arrangement can be created. Semiconductor switching elements offer the possibility of a discrete structure of the circuit arrangement, i.e. using a large number of individual, discrete components, but also enable a hybrid or integrated structure, i.e. the integration of parts of the circuit arrangement or even the entire circuit arrangement.

Corresponding semiconductor switching elements can be realized, for example, using MOSFETs.

For a particularly simple implementation of the circuit arrangement, the switched capacitor and the second capacitor can have an identical capacitance value. In a discrete design, these are preferably identical components, and in an integrated design, they are identically manufactured components. This ensures that external influences have the same effect on both capacitors. Thermal influences, for example, are negligible.

In a preferred embodiment, the switched capacitor and the second capacitor have a capacitance value between 1 nF and 10 nF, preferably between 1 nF and 5 nF. For an energy-saving implementation of the present circuit, it has been shown that the size of the capacitance used has a significant influence. The larger the capacitance of the capacitors used, the more charge must be transferred for a voltage transfer. In concrete terms, more transferred charge also means more energy consumption, which is to be avoided in particular with two-wire field devices.

Preferably, the components used have a dielectric strength of at least 30 V. A nominal voltage of 24 V is common in the industry, so 30 V takes sufficient tolerances into account.

Since two-wire sensors and field devices can be operated with different supply voltages in the range of 5 V to 30 V, it is important that the circuit arrangement has a dielectric strength that covers the entire range of possible input voltages.

A method according to the invention for regulating a current through a load of unknown size with a regulator to which a target voltage and an actual voltage dependent on the current to be regulated are supplied, and which regulates the current depending on a difference between the target voltage and the actual voltage, wherein the actual voltage is tapped at a sensing resistor connected in series with the load, wherein the sensing resistor is arranged highside and has no direct ground reference, and wherein the target voltage is provided by a circuit component located lowside, is characterized in that a voltage transfer takes place and in a first variant the regulator is arranged lowside and the actual voltage tapped at the sensing resistor is transferred from highside to lowside, or in a second variant the regulator is arranged highside and the target voltage is transferred from lowside to highside.

Preferably, the current is regulated by the load to transmit a measured value.

Preferred embodiments, features and properties of the proposed field device correspond to those of the proposed method and vice versa.

Advantageous embodiments and variants of the invention emerge from the subclaims and the following description. The features listed individually in the subclaims can be combined with each other in any technically reasonable manner and with the features explained in more detail in the following description and represent other advantageous embodiments of the invention.

• 1 eine aus dem Stand der Technik bekannte erste Schaltung zur Regelung eines Stroms (schon behandelt),
• 2 eine aus dem Stand der Technik bekannte zweite Schaltung zur Regelung eines Stroms (schon behandelt),
• 3 eine aus dem Stand der Technik bekannte Schaltung zur Regelung eines Stroms (schon behandelt),
• 4 eine Schaltung mit einer Last ohne direkten Massebezug und einer nachgeschalteten Schaltung mit Massebezug (schon behandelt),
• 5 eine aus dem Stand der Technik bekannte Schaltung mit einem Highside angeordneten Regler (schon behandelt),
• 6 eine aus dem Stand der Technik bekannte Schaltung mit einem Lowside angeordneten Regler (schon behandelt),
• 7a eine erste Schaltung gemäß der vorliegenden Anmeldung mit einem Lowside angeordneten Regler in einer ersten Schaltstellung,
• 7b die Schaltung aus 7a in einer zweiten Schaltstellung,
• 8a eine zweite Schaltung gemäß der vorliegenden Anmeldung mit einem Highside angeordneten Regler in einer ersten Schaltstellung und
• 8b die Schaltung aus 8a in einer zweiten Schaltstellung.

The present invention is explained in detail below using exemplary embodiments with reference to the accompanying figures. They show:

• 1 a first circuit known from the prior art for regulating a current (already discussed),
• 2 a second circuit known from the prior art for regulating a current (already discussed),
• 3 a circuit known from the state of the art for regulating a current (already discussed),
• 4 a circuit with a load without direct ground reference and a downstream circuit with ground reference (already discussed),
• 5 a circuit known from the state of the art with a high-side regulator (already discussed),
• 6 a circuit known from the state of the art with a low-side regulator (already discussed),
• 7a a first circuit according to the present application with a low-side arranged regulator in a first switching position,
• 7b the circuit from 7a in a second switching position,
• 8a a second circuit according to the present application with a high-side regulator in a first switching position and
• 8b the circuit from 8a in a second switching position.

In the figures, unless otherwise stated, identical reference symbols designate identical or corresponding components with identical functions.

7 shows in the two 7a and 7b two states of the circuit arrangement according to the present application.

In the 7 The circuit arrangement shown has a voltage supply DC _in , which is connected on the one hand to ground and on the other hand to highside. At the highside output of the voltage supply DC _in , a sensing resistor R _mess is connected in series with the voltage supply DC _in , so that depending on a current I _last flowing through the sensing resistor R _mess , an actual voltage U _mess drops across the sensing resistor R _mess . This is connected in series with a controlled current source, to which its control signal is fed from a differential amplifier USI. The differential amplifier is supplied on the input side at its non-inverting input with a target voltage U _target , which is provided by the load R _last designed as a two-wire electronics.

At its inverting input, the differential amplifier USI is supplied with the actual voltage U _messls transmitted to the low side, so that the differential amplifier regulates the current I _g depending on a difference between the actual voltage U _messls transmitted to the low side and the target voltage U _soll .

The transfer of the actual voltage U _mess from highside to lowside takes place in the embodiment shown as follows.

A switched capacitor C _sw is arranged parallel to the sensing resistor R _mess . The switched capacitor C _sw is connected on the input side and output side to a changeover switch S1, S2, which switches the switched capacitor C _sw in parallel to the sensing resistor R _mess in a first switching position and in parallel to a second capacitor C ₂ in a second switching position. The changeover switches S1, S2 are designed, for example, as semiconductor switching elements and are supplied with a switching signal in such a way that they switch in unison.

In the 7a In the first switching position shown, in which the switched capacitor C _sw is connected in parallel to the sensing resistor R _mess , the switched capacitor C _sw is charged to the actual voltage U _mess falling across the sensing resistor R _mess .

In the 7b In the second switching position shown, the switched capacitor C _sw is connected in parallel to the second capacitor C ₂ so that a charge equalization takes place between the switched capacitor C _sw and the second capacitor C ₂ . In a first switching cycle comprising the first switching state and the second switching state, the second capacitor C ₂ - assuming it was previously uncharged - is charged to half the actual voltage U _mess applied to the sensing resistor R _mess (if C _sw = C ₂ ). The voltage U _messls on the second capacitor C ₂ is therefore ½ U _mess .

The second capacitor C ₂ is charged with each switching operation to a voltage that is closer to the actual voltage U _mess . With a second switching cycle, the voltage on the second capacitor C ₂ can be charged to ¾ of the actual voltage U _mess . A third cycle charges the second capacitor to ⅞ U _mess and each further switching cycle halves the difference between the voltage on the second capacitor U _messls and the actual voltage U _mess .

In practice, the voltage on the second capacitor C ₂ is reached with sufficient accuracy after 15 to 20 cycles, depending on the dimensioning of the circuit and the output charge of the second capacitor C.

A disadvantage of this variant is that the voltage U _messls on the second capacitor C ₂ can only follow the actual voltage U _mess with a time delay due to the necessary switching cycles. However, by appropriately selecting and dimensioning the sensing resistor R _mess , the capacitance of the switched capacitor C _sw and the second capacitor C ₂ as well as the switching frequency f _schalt , the control can still be made sufficiently fast.

$${\text{C}}_{\text{sw}}={\text{C}}_{\text{2}}=1\text{ nF},$$

$${\text{f}}_{\text{schalt}}=100\text{ kHz mit 50}\%\text{ Tastverh}\ddot{\text{a}}\text{ltnis}.$$

An example dimensioning of the above-mentioned components is as follows: $${\text{R}}_{\text{measure}}=10\mathrm{\Omega },$$

$${\text{C}}_{\text{sb}}={\text{C}}_{\text{2}}=1\text{nF},$$

$${\text{e}}_{\text{switch}}=100\text{kHz with 50}\%\text{Touch ratio}\ddot{\text{a}}\text{ltnis}.$$

The disadvantage with the time delay of the circuit according to 7 can be used with the 8th shown concept can be circumvented.

8th shows in the two 8a and 8b two states of a second circuit arrangement according to the present application.

In this embodiment of the circuit arrangement, the sensing resistor R _mess is connected directly to the regulator USI on the high side. The target voltage U soll provided by the load R _last , which in this case is also designed as a two-wire electronics, is transferred from the low side to the high side. For this purpose, the target voltage U _{soll is} fed to the switched capacitor C _sw , which in this embodiment can also be switched between the control output of the second electronics and ground and a parallel connection to the second capacitor C ₂ by means of two changeover switches S1, S2.

In the 8a In the first switching position shown, the switched capacitor C _sw is connected via the two changeover switches S1, S2 on the one hand to the target voltage U _soll provided by the two-wire electronics and on the other hand to ground. In this switching position, the switched capacitor C _sw is charged to the target voltage U _soll .

In the 8b In the second switching position shown, the switched capacitor C _sw is connected in parallel to the second capacitor C ₂ via the two changeover switches S1, S2. This results in a charge equalization between the switched capacitor C _sw and the second capacitor C ₂ , so that after the charge equalization, half the target voltage U _soll is present as voltage U _sollhs on the second capacitor C ₂ (if U _sollhs was previously 0 and C _sw = C ₂ ).

In a second phase in the switching position according to 8a the switched capacitor C _sw is again connected to the target voltage U _soll and the switched capacitor C _sw is charged again to U _soll . This is followed by another phase in the switching position according to 8b , in which the switched capacitor C _sw is connected to the second capacitor C ₂ and due to the resulting charge equalization the voltage U _sollhs applied to the second capacitor C ₂ increases to ¾ of the target voltage U _soll .

By cyclically switching the changeover switches S1, S2, the second capacitor C ₂ is successively charged via the switched capacitor C _sw until the voltage U _sollhs on the second capacitor C ₂ corresponds to the target voltage U _soll .

In practice, this is achieved after 15 to 20 cycles, comprising the first switching position and the second switching position with sufficient accuracy.

In the 8th In the circuit arrangement shown, the voltage U _sollhs on the second capacitor C ₂ follows the target voltage U _soll with a time delay, but this is not a problem if the switching frequency f _schalt , with which the two changeover switches S1, S2 are switched, is approximately 15-20 times as high as the update rate of the target voltage U _soll . This is the case in most applications, so the circuit arrangement shown solves all of the problems mentioned above.

$${\text{C}}_{\text{sw}}={\text{C}}_{\text{2}}=1\text{ nF},$$

$${\text{f}}_{\text{schalt}}=1\text{ kHz mit }50\%\text{ Tastverh}\ddot{\text{a}}\text{ltnis}.$$

An example dimensioning of the above-mentioned components is as follows: $${\text{R}}_{\text{measure}}=10$$

$${\text{C}}_{\text{sb}}={\text{C}}_{\text{2}}=1\text{nF},$$

$${\text{e}}_{\text{switch}}=1\text{kHz with}50\%\text{Touch ratio}\ddot{\text{a}}\text{ltnis}.$$

In the circuit arrangements shown, the 7 and 8th only a single precise amplifier is required as a current regulator USI. The conversion of the actual voltage U _mess falling across the sensing resistor R _mess from high side to low side, or the target voltage U _soll from low side to high side, is carried out by means of the capacitors C _sw , C ₂ . The capacitance values of the capacitors C _sw , C ₂ used and their drift have no influence on the accuracy of the control. The circuit arrangement can be designed in such a way that the resistances of the changeover switches S1, S2 have no relevant influence on the accuracy of the control. The only requirement is low leakage currents. Suitable capacitors and switches are available on the market.

Because temperature-dependent components can be dispensed with, the temperature dependence of the control is reduced. Furthermore, by appropriately dimensioning the components used, it is possible to make the circuit extremely energy-efficient and at the same time voltage-resistant for voltages of up to 30 V, for example.

List of reference symbols

C2

second capacitor

Csw

switched capacitor

DCin

Supply voltage, power supply

fswitch

Switching frequency

Ilast

Electricity

Imess

Actual current

Rlast

Load, two-wire electronics

Rmess

Sensing resistance

S1, S2

Changeover switch

T

Voltage divider

Measure

Actual voltage

Umessls

Actual voltage lowside

USI

Current regulator, regulator

Usoll

Target voltage

Usollhs

Target voltage highside

Claims (12)

Circuit arrangement for regulating a current I _load through a load R _load of unknown size with a regulator to which a target voltage U _target and an actual voltage U _mess dependent on the current I _load to be regulated are fed, and which regulates the current I _load depending on a difference between the target voltage U _target and the actual voltage U _mess , whereby - the actual voltage U _mess can be tapped off at a sensing resistor R _mess connected in series with the load R _load , whereby the sensing resistor R _mess is arranged on the high side and has no direct ground reference, and - the target voltage U _target is made available by a circuit component lying on the low side, characterized in that a voltage transfer takes place and in a first variant the regulator USI is arranged on the low side and the actual voltage U _mess tapped off at the sensing resistor R _mess is transferred from the high side to the low side, or in a second variant the regulator is arranged on the high side and the target voltage U _target is transferred from the low side to the high side. Circuit arrangement according to Claim 1 , characterized in that the target span The circuit component _providing the voltage U is the load R _last . Circuit arrangement according to one of the preceding claims, characterized in that the load R _last is designed as a two-wire electronics. Circuit arrangement according to Patent claim 3 , characterized in that the target voltage U _soll is generated by the two-wire electronics and can be tapped therefrom. Circuit arrangement according to one of the preceding claims, characterized in that the voltage transfer takes place by means of at least one switched capacitor C _sw and a second capacitor C ₂ . Circuit arrangement according to Claim 5 , characterized in that in the first variant the switched capacitor C _sw highside is arranged parallel to the sensing resistor R _mess and can be connected to the second capacitor C ₂ via synchronously controllable changeover switches S1, S2, wherein the second capacitor C ₂ lowside is arranged and is connected on the one hand to ground and on the other hand to the regulator USI and in the second variant the switched capacitor C _sw is connected on the one hand to the target voltage U _soll and on the other hand to ground and can be connected to the second capacitor C ₂ via synchronously controllable changeover switches S1, S2, wherein the second capacitor C ₂ highside is arranged and is connected on the one hand to the supply voltage DC _in and on the other hand to the regulator USI. Circuit arrangement according to one of the preceding claims, characterized in that the changeover switches S1, S2 are designed as semiconductor switching elements. Circuit arrangement according to one of the preceding claims, characterized in that the switched capacitor C _sw and the second capacitor C ₂ have an identical capacitance value. Circuit arrangement according to Claim 8 , characterized in that the switched capacitor C _sw and the second capacitor C ₂ have a capacitance value between 1 nF and 10 nF, preferably between 1 nF and 5 nF. Circuit arrangement according to one of the preceding claims, characterized in that components used have a dielectric strength of at least 30 V. Measuring arrangement for determining a measured value and for transmitting the measured value as a current value impressed into a two-wire loop with a switching arrangement according to one of the Patent claims 1 until 10 . Method for controlling a current I _load through a load R _load of unknown size with a regulator to which a target voltage U _target and an actual voltage U _mess dependent on the current I _load to be controlled are supplied, and which regulates the current I _load depending on a difference between the target voltage U _target and the actual voltage U _mess , wherein - the actual voltage U _mess is tapped at a sensing resistor R _mess connected in series with the load R _load , wherein the sensing resistor R _mess is arranged highside and has no direct ground reference, and - the target voltage U _target is made available by a lowside circuit component, characterized in that a voltage transfer takes place and in a first variant the regulator USI lowside is arranged and the actual voltage U _mess tapped at the sensing resistor R _mess is transferred from highside to lowside, or in a second variant the regulator USI highside is arranged and the target voltage U _target is transferred from lowside to highside.

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