DE102023100735A1 - DC-DC converter arrangement - Google Patents

Abstract

A direct current converter arrangement (10) for converting electrical energy, comprising an input (Vin) for supplying electrical energy to be converted, a first output (15-1) for outputting a first part of the converted electrical energy at a first voltage (VO1), a second output (15-2) for outputting a second part of the converted electrical energy at a second voltage (VO1), a first switching element (S1), a second switching element (S2), a first diode (D1), a second diode (D2), an induction coil (L), wherein the input (Vin), the first switching element (S1), the induction coil (L) and the second switching element (S2) are arranged in series in the order given and form a first circuit (31, 33), wherein the input (Vin), the first switching element (S1), the induction coil (L) and the first diode (D2) are arranged in series in the order given and form a second circuit (32) wherein the second diode (D2), the induction coil (L), and the second switching element (S2) are arranged in series in the order given and form a third circuit (34), wherein the first switching element (S1) and the second switching element (S2) are designed to be in a closed or open state, wherein a configuration of the states of the first switching element (S1) and the second switching element (S2) is designed to enable a current flow through one of the circuits (31, 32, 33, 34).

Description

The invention relates to a DC-DC converter arrangement for converting electrical energy, in particular the invention relates to a DC-DC converter arrangement with one input and two outputs, with an induction coil and voltage compensation capability. The invention further relates to a use of a DC-DC converter arrangement, a method and a computer program product.

Technological background

The embodiments described herein generally relate to the field of power conversion, i.e. the conversion of direct current (DC) to direct current (DC), or direct voltage to direct voltage, more specifically converters with voltage balancing capability.

The environmental threat posed by fossil fuel power generation has increased the demand for power from renewable energy sources. Moreover, DC-DC converters are required in many applications such as renewable energy, portable chargers, PFC, HVDC, radar, electric vehicles and aircraft. Various research projects are considering developments of conventional topologies to meet the requirements of DC-DC converters.

In the past, multiple independent conventional single-input single-output (SISO) DC-DC converters, such as boost, buck-boost, buck and cuk converters, were used with a single DC source to provide different voltages at multiple outputs. However, using multiple independent SISO converters increases the number of components used, the cost and the system volume. In the current art, to reduce the number of components, multiple SISO converters are integrated to obtain a single-input multi-output (SIMO) DC-DC converter.

Due to the multiple use of inductors, proposed single-input dual-output (SIDO) DC-DC converters have large weight and volume and limited power density. In this context, single-inductor single-input dual-output (SI-SIDO) topologies have gained interest for applications where two different voltages are required at the outputs. In addition, the use of a single inductor increases the power density of SI-SIDO DC-DC converters.

Voltage balancing of dual output DC-DC converters is essential for certain applications, such as DC link capacitors of three-level neutral-point-clamped (3L-NPC) inverters and bipolar low-voltage DC (LVDC) distribution systems.

In the prior art, a configuration of the SI-SIDO DC-DC converter is proposed as a voltage balancer in a bipolar low-voltage DC distribution system. The bipolar low-voltage DC power supply is a three-line DC bus system that serves as a small DC distribution network for residential and commercial buildings. It connects various DC energy sources (such as fuel cells, batteries, and photovoltaic cells) and loads in a three-voltage distribution system to improve the reliability and efficiency of the system. Unbalanced power consumption may occur between the bipolar LVDC terminals and affect the quality of the DC network. The SIDO DC-DC converter with the inherent voltage balancing capability must be employed to ensure the voltage balance between the DC buses and guarantee a high-quality DC network.

In a two-stage grid-tied DC-AC photovoltaic conversion system with 3L-NPC in the second stage, voltage balancing of the DC link outputs is a mandatory requirement, which increases the quality of the sinusoidal output voltage and current and contributes to improving the system stability.

Some SIDO converters with DC link voltage balancing capability have already been proposed. These topologies are suitable for feeding the low voltage bipolar DC distribution system and the 3L-NPC inverter, but suffer from the high number of inductors and switches used in their structures. Apart from the voltage balancing capability, in photovoltaic applications such topologies must provide a solution to limit the leakage current and be able to extract the maximum power from the photovoltaic system.

There is significant demand for new SI-SIDO three-level boost converters in two-level grid-tied PV configurations with NPC inverters.

The invention is based on the object of overcoming the disadvantages of the prior art and providing a SI-SIDO DC-DC converter arrangement with an increased power density and a small number of components.

The problem is solved by the subject matter of the independent patent claims. Preferred embodiments and further developments of the invention emerge from the features mentioned in the respective dependent claims, the drawings and the associated description.

Summary of the invention

One aspect of the invention relates to a direct current converter arrangement for converting electrical energy, comprising an input for supplying electrical energy to be converted, a first output for outputting a first part of the converted electrical energy at a first voltage, a second output for outputting a second part of the converted electrical energy at a second voltage, a first switching element, a second switching element, a first diode, a second diode, an induction coil, wherein the input, the first switching element, the induction coil and the second switching element are arranged in series in the order given and form a first circuit, wherein the input, the first switching element, the induction coil and the first diode are arranged in series in the order given and form a second circuit, wherein the second diode, the induction coil and the second switching element are arranged in series in the order given and form a third circuit, wherein the first switching element and the second switching element are designed to be in a closed or open state, wherein a configuration of the states of the first switching element and the second switching element is designed to be a to allow current to flow through one of the circuits.

According to the invention, a three-level SI-SIDO DC-DC converter topology is proposed, which is derived from conventional boost and buck-boost SISO converters. Accordingly, a time-multiplexed control (TMC) scheme is given to merge the boost and buck converters. The proposed converter can operate in both continuous conduction mode (CCM) and discontinuous conduction mode (DCM). Due to the voltage balancing capability and the provision of a common star point between the output capacitors, this topology is suitable for the bipolar low voltage DC distribution system. Furthermore, the structure of the proposed converter provides the common grounding condition for the two-level 3L-NPC based photovoltaic inverter applications.

This arrangement allows a direct current input voltage to be converted into two different direct current output voltages using very few components. If the two output voltages are connected together, the input voltage can also be tapped so that the arrangement can provide a total of three output voltages. For this purpose, it is preferably provided that the first output and the second output are connected in series.

Preferably, the first switching element and the second switching element are metal oxide semiconductor field effect transistors (MOSFETs). These are particularly well suited for use because insulated gate bipolar transistors (IGBTs) have a limitation in switching frequency (higher switching frequencies are not possible with IGBTs). Typically, IGBTs can support 20 to 40 kHz switching frequency, but MOSFETs can support up to 1 MHz. In addition, IGBTs have a long turn-off time. Compared to MOSFETs, IGBTs have limited ability to block high reverse voltages. In the proposed converter, the use of an IGBT is not possible because in the experimental model the turn-off time of the IGBT is high and high voltage spikes can occur when switching between boost and buck-boost modes. By using a MOSFET with a short turn-off time, the voltage spikes are reduced and the converter functions properly.

Preferably, the induction coil comprises an inductance of 100 µH to 1000 µH.

The formulas discussed below show that the inductance of a buck-boost converter is larger than that of a boost converter. Here, a buck-boost converter is combined with a boost converter and they share one inductance for both the modes of operation buck-boost converter and boost converter. In this case, if an inductance has to be chosen for the combined form of boost and buck-boost converter, the buck-boost inductance with a larger value is the right one. The current ripple could be in the desired range if the right inductance is used. Depending on the application of the converter, the size of the inductance may vary. The input voltage, output voltage, high switching frequency of the switches and the time sharing factor affect the size range of the inductance in the proposed converter.

According to the invention, more preferably the induction coil comprises an inductance of 300 µH to 500 µH, and even more preferably the induction coil comprises an inductance of 400 µH.

Preferably, in the second circuit, a first output capacitor is arranged in series between the first diode and the input, and preferably in the third circuit, a second output capacitor is arranged in series between the second switching element and the second diode. In boost and buck converters, the capacitor is used to smooth the output voltage by filtering out any ripples in the voltage waveform. The capacitor is connected in parallel with the load and stores electrical charge which is then discharged across the load when required to ensure a smooth and stable output voltage. The capacitor helps reduce noise and fluctuations in the output voltage, which can improve the performance and reliability of the circuit. The size of the capacitor determines the amount of output voltage ripple. Preferably, the first output capacitor is connected between a cathode of the first diode and the negative polarity of the input. Preferably, the second output capacitor is arranged between a source of the second switching element and an anode of the second diode. Preferably, the negative polarity of the input is connected to a positive polarity of the second output capacitor.

Preferably, an input capacitor is arranged in parallel to the input. This has the advantage that it filters the input noise and stabilizes the input voltage.

Preferably, the DC-DC converter arrangement comprises no more than two switching elements, no more than two diodes and no more than one induction coil. Induction coils take up a lot of space. In the DC-DC converter arrangement according to the invention, space is saved because the arrangement has the functions of a SISO boost converter and a SISO inversion converter, but with fewer components.

Another aspect of the invention relates to a method for converting electrical energy, comprising the following steps: providing a DC converter arrangement according to one aspect of the invention, switching the first switching element and the second switching element to the closed state, here electrical energy flows through the first circuit to magnetize the induction coil, switching the first switching element to the closed state and switching the second switching element to the open state, here electrical energy flows through the second circuit to provide the first voltage at the first output, switching the first switching element and the second switching element to the closed state, here electrical energy flows through the first circuit to magnetize the induction coil, and switching the first switching element to the open state and switching the second switching element to the closed state, here electrical energy flows through the third circuit to provide the second voltage at the second output.

Preferably, electrical energy flows through the first circuit for a first time period or a first switching time (t ₀ to t ₁ in 4a) .

Preferably, the switching of the first switching element into the closed state and the switching of the second switching element into the open state are only carried out when electrical energy has flowed through the first circuit for a first period or a first switching time.

Preferably, electrical energy flows through the second circuit for a second time period or a second switching time (t ₁ to t ₂ in 4a) .

Preferably, the switching of the first switching element and the second switching element into the closed state is only carried out when electrical energy has flowed through the second circuit for a second period or a second switching time.

Preferably, electrical energy flows through the first circuit for a third time period or a third switching time (t ₃ to t ₄ in 4b) .

Preferably, the switching of the first switching element to the open state and the switching of the second switching element to the closed state are only carried out when electrical energy has flowed through the first circuit for a third period or a third switching time.

Preferably, electrical energy flows through the third circuit for a fourth time period or a fourth switching time (t ₄ to t ₅ in 4b) .

A ripple current does not determine the switching time and the duty cycles, but the switching time and the duty cycles determine the current ripple. The switching of the second switching element does not occur because the inductor current reaches a certain value. It is carried out due to the predefined timing of the switching elements, and this timing (duty cycle of the switching elements and the time of high frequency switching (TSW)) then determines the minimum and maximum of the induction current.

A further aspect of the invention relates to a use of a DC converter arrangement according to an aspect of the invention.

A further aspect of the invention relates to a computer program comprising instructions which, when the program is executed by a computer, cause the computer to carry out the method according to an aspect of the invention.

The embodiments and aspects of the invention can be advantageously combined with one another, unless stated otherwise in individual cases.

Short description of the characters

• 1a Ein konventioneller SISO-Aufwärtswandler (engl. SISO boost converter),
• 1b ein konventioneller SISO-Inverswandler (engl. SISO buck-boost converter),
• 2 eine Ausführungsform der Gleichstrom-Umwandleranordnung gemäß der Erfindung,
• 3a bis 3d die Ausführungsform aus 2, wobei erfindungsgemäße Betriebsarten dargestellt sind,
• 4a eine schematische Darstellung von Simulationsergebnissen einer Simulation einer Gleichstrom-Umwandleranordnung gemäß einer Ausführungsform der Erfindung während des Betriebs als Aufwärtswandler,
• 4b eine schematische Darstellung von Simulationsergebnissen einer Simulation einer Gleichstrom-Umwandleranordnung gemäß einer Ausführungsform der Erfindung während des Betriebs als Inverswandler,
• 5 eine Verwendung einer Gleichstrom-Umwandleranordnung gemäß einer Ausführungsform der Erfindung in einem Niederspannungs-Gleichstromverteilungssystem,
• 6 eine Verwendung einer Gleichstrom-Umwandleranordnung gemäß einer Ausführungsform der Erfindung in einem zweistufigen netzgekoppelten DC-AC- Photovoltaik-Umwandlungssystem mit 3L-NPC.

The invention is explained in more detail below using an embodiment and associated drawings. The figures show:

• 1a A conventional SISO boost converter,
• 1b a conventional SISO buck-boost converter,
• 2 an embodiment of the DC converter arrangement according to the invention,
• 3a to 3d the embodiment of 2 , wherein operating modes according to the invention are shown,
• 4a a schematic representation of simulation results of a simulation of a DC converter arrangement according to an embodiment of the invention during operation as a boost converter,
• 4b a schematic representation of simulation results of a simulation of a DC converter arrangement according to an embodiment of the invention during operation as an inverse converter,
• 5 a use of a DC converter arrangement according to an embodiment of the invention in a low-voltage DC distribution system,
• 6 a use of a DC-DC converter arrangement according to an embodiment of the invention in a two-stage grid-connected DC-AC photovoltaic conversion system with 3L-NPC.

Detailed description of the invention

1a shows a conventional SISO boost converter arrangement. This arrangement has a DC voltage source V _in , an induction coil L, a diode D, a switching element S, an output capacitor C and a consumer, shown here with a resistor R. The conventional SISO boost converter arrangement provides an output voltage V _out . An inductance (coil) L is connected in series with a freewheeling diode D, behind which a charging capacitor C sums up the output voltage. The coil L is connected to ground by a suitable switch S. The input voltage at the coil L now drops, the current through the coil L and thus the energy stored in the magnetic field increases. If the switch S is opened, the coil L tries to maintain the current flow. The voltage at its secondary end increases very quickly until it exceeds the voltage across the capacitor C and the diode opens. At first the current continues to flow unchanged and continues to charge the capacitor C. The magnetic field is reduced and releases its energy by driving the current via the diode D into the charging capacitor C and to the load R.

1b shows a conventional SISO inverter arrangement. This arrangement also has a DC voltage source V _in , an induction coil L, a diode D, a switching element S, an output capacitor C and a consumer, shown here with a resistor R. The conventional SISO inverter arrangement provides an output voltage V _out . The DC voltage source V _in supplies a constant positive voltage. The switch S switches the voltage to the coil L for a first period. The induction current in the coil L increases in the process. After the first period, the switch S is turned off for a second period, whereby the current through the coil L must remain constant during the switching process. This causes the diode D to conduct and charges the capacitor C to a voltage that is negative compared to the reference potential. The inverter converter, like any switching converter, can be operated in discontinuous current mode, this is the case when the current through the coil drops to 0 in one cycle, or in continuous current mode. The switching frequency depends, among other things, on the load R and the permissible ripple current.

2 shows a preferred embodiment of the DC converter arrangement 10 according to the invention. It shows: a DC voltage source V _in , an input capacitor C _in , a first switching element S1, a second switching element S2, a first diode D1, a second diode D2, a first output capacitor C1, a two output capacitor C2, and two consumers / two loads, here represented by resistors R1 and R2.

In this embodiment, a single inductor L is shared by a boost and a buck-boost converter to transfer the input energy and charge the two output capacitors C1 and C2 of the inventive arrangement. A time-division multiplexing control method is used to determine the boost and buck-boost modes. Here, the switches are shown as MOSFETs. In this example, the coil L has an inductance of 400 µH.

In 3a to 3d is the embodiment of 2 shown, with operating modes according to the invention being marked. In 3a and 3b the DC converter arrangement 10 runs as a step-up converter arrangement and in 3c and 3d the DC-DC converter arrangement 10 runs as an inverting converter arrangement. The boost and inverting converters operate alternately during operation of the DC-DC converter arrangement according to the invention. In order to divide the operating cycles between the boost and inverting converters, a time sharing factor TSF is introduced. The switching period T is divided into two equal intervals, TSF1 [t0, T/2] and TSF2 [T/2, T]. The boost and buck-boost modes are operated during the first TSF1 and the second TSF2 interval, respectively. In addition, two switching cycles d1 and d2 are defined for the high switching frequency fsw mode of S1 and S2. The first interval TSF1 and the second interval TSF2 are used together with the first switching cycle d1 and the second switching cycle d2 in the time division multiplex control method to solve the sharing problem. 4a and 4b show the operating states and theoretical waveforms based on fsw. In 4a Operating states are shown while the DC converter arrangement 10 is running as a boost converter arrangement and in 4b Operating states are shown while the DC converter arrangement 10 is running as an inverting converter arrangement.

• Gemäß 3a und 3b: Boost-Betrieb (t0 < t < T/2):
  • In 3a: erster Zustand, EIN-Zustand, [t0 - t1]: Das erste Schaltelement S1 und das zweite Schaltelement S2 sind eingeschaltet, und die Energie der Eingangsspannungsquelle V_in beginnt, die Induktionsspule L zu magnetisieren. Der Induktionsstrom steigt linear von seinem Minimalwert ILmin1 auf den Maximalwert ILmax1. Die Dioden D1 und D2 sind in diesem Zustand AUS.

Accordingly, the operating states are defined as follows:

• According to 3a and 3b : Boost mode (t0 < t < T/2):
  • In 3a : first state, ON state, [t0 - t1]: The first switching element S1 and the second switching element S2 are turned on, and the energy of the input voltage source V _in starts to magnetize the induction coil L. The induction current increases linearly from its minimum value ILmin1 to the maximum value ILmax1. The diodes D1 and D2 are OFF in this state.

In 3b : second state, OFF state, [t1 - t2]: The first switching element S1 and the first diode D1 are in the ON state and the second switching element S2 and the second diode D2 are in the OFF state. The magnetized energy of the induction coil L flows through the first diode D1 and charges the output capacitor C1 to its maximum value VO1-max. As a result, the induction current of the induction coil L drops to ILmin1.

• In 3c: dritter Zustand, EIN-Zustand, [t3 - t4]: Das erste Schaltelement S1 und das zweite Schaltelement S2 sind eingeschaltet, und die beiden Dioden D1 und D2 sind ausgeschaltet. Die Energie der Eingangsquelle V_in magnetisiert die Induktionsspule L. In diesem Fall steigt der Induktionsstrom von ILmin2 auf ILmax2.

According to 3c and 3d : Buck-boost mode (T/2 < t < T):

• In 3c : third state, ON state, [t3 - t4]: The first switching element S1 and the second switching element S2 are on, and the two diodes D1 and D2 are off. The energy of the input source V _in magnetizes the induction coil L. In this case, the induction current increases from ILmin2 to ILmax2.

In 3d : fourth state, OFF state, [t4 - t5]: The second switching element S2 and the second diode D2 are in the ON state and the second switching element S1 and the first diode D1 are in the OFF state. The magnetized energy of the induction coil L charges the output capacitor C2 to its maximum value V _O2-max . Therefore, the induction current decreases to its minimum value ILmin2.

$$M_2=\frac{V_{O2}}{V_{in}}=\frac{d_1}{1-d_1}$$

The voltage gain of the inventive DC-DC converter arrangement 10 during CCM operation is the sum of the voltage gain during boost M1 and buck-boost mode M2. Accordingly, M1 and M2 can be expressed as follows: $${\mathrm{<figure-callout\; id="1"\; label="M"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">M</figure-callout>}}_1=\frac{V_{O1}}{V_{in}}=\frac{1}{1-{\mathrm{<figure-callout\; id="2"\; label="d"\; filenames="DE102023100735A1\_0014.png,DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_2}$$

$${\mathrm{<figure-callout\; id="2"\; label="M"\; filenames="DE102023100735A1\_0014.png,DE102023100735A1\_0016.png"\; state="\{\{state\}\}">M</figure-callout>}}_2=\frac{V_{O2}}{V_{in}}=\frac{{\mathrm{<figure-callout\; id="1"\; label="d"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_1}{1-{\mathrm{<figure-callout\; id="1"\; label="d"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_1}$$

Here, V _O1 and V _O2 are the voltages at the output capacitors C1 and C2, V _in is the input DC voltage, and d ₁ and d ₂ are the switching cycles of the switching elements S1 and S2. The total output voltage gain M of the DC converter arrangement 10 according to the invention can therefore be derived from (3). $$M=\frac{V_{dc-link}}{V_{in}}=\frac{{\mathrm{<figure-callout\; id="1"\; label="V\; O"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">V</figure-callout>}}_O+V_{O2}}{V_{in}}=\frac{1-d_1{d}_2}{\left(1-d_1\right)\left(1-d_2\right)}$$

$$\mathrm{\Delta }{i}_{L-OFF}=\{\begin{array}{c}\frac{V_{O1}-V_{in}}{L}\left(1-d_2\right)T_{SW}\text{ for the boost mode}\\ -\frac{V_{O2}}{L}\left(1-d_1\right)T_{SW}\text{ for the buck}-\text{boost mode}\end{array}$$

$$\mathrm{\Delta }{i}_{L-OFF}=\mathrm{\Delta }{i}_{L-ON}=\mathrm{\Delta }{i}_L$$

The ripple current for the ON and OFF states of each mode can be expressed as follows: $$\mathrm{\Delta }{i}_{L-ON}=\{\begin{array}{c}\frac{V_{in}}{L}{d}_2{T}_{SW}\text{for the boost mode}\\ \frac{V_{in}}{L}{d}_1{T}_{SW}\text{for the buck}-\text{boost mode}\end{array}$$

$$\mathrm{\Delta }{i}_{L-OFF}=\{\begin{array}{c}\frac{{\mathrm{<figure-callout\; id="1"\; label="V\; O"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">V</figure-callout>}}_O-V_{in}}{L}\left(1-d_2\right)T_{SW}\text{for the boost mode}\\ -\frac{V_{O2}}{L}\left(1-d_1\right)T_{SW}\text{for the buck}-\text{boost mode}\end{array}$$

$$\mathrm{\Delta }{i}_{L-OFF}=\mathrm{\Delta }{i}_{L-ON}=\mathrm{\Delta }{i}_L$$

The inductance L plays an important role in the performance of the DC converter arrangement 10 according to the invention. From (4) and (5) it can be deduced that current changes have an inverse relationship to the inductance L. In other words: by choosing a suitable inductance L, the ripple current can be limited to the desired value. From (4), (5) and (6) the inductance L of the converter can therefore be calculated as follows: $$L=\{\begin{array}{c}\frac{\left({\mathrm{<figure-callout\; id="1"\; label="V\; O"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">V</figure-callout>}}_O-V_{in}\right)\left(1-d_2\right)}{\mathrm{\Delta }{i}_L{ƒ}_{SW}}=\frac{V_{in}\left({\mathrm{<figure-callout\; id="1"\; label="V\; O"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">V</figure-callout>}}_O-V_{in}\right)}{\mathrm{\Delta }{i}_L{ƒ}_{S\mathrm{<figure-callout\; id="1"\; label="W\; V\; O"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">W</figure-callout>}}{V}_O{1}_{}}\text{for the boost mode}\\ \frac{V_{in}{\mathrm{<figure-callout\; id="1"\; label="d"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_1}{\mathrm{\Delta }{i}_L{ƒ}_{SW}}=\frac{V_{O2}\left(1-d_1\right)}{\mathrm{\Delta }{i}_L{ƒ}_{SW}}\text{for the buck}-\text{boost mode}\end{array}$$

In order to avoid saturation of the inductance L, the buck-boost inductance is suitable for both the boost and buck-boost modes of the DC converter arrangement 10 according to the invention.

In an optional embodiment, a condition for balancing the DC link voltage is that both output voltages must be equal (V _O1 =V _O2 ). In this respect, the boost M1 and the buck-boost mode M2 must be equal during voltage balancing. These formulas are given for the proposed converter in the present invention. In this case, the time sharing factor (TSF) is large enough to allow the boost and buck converters to operate separately in the combined scheme. The inductance is less than 1000 µH. For the prior art, the following formula is not correct. A large inductance and a small TSF can change the operation and formula of the proposed converter.

$$d_1=\frac{1-d_1}{1-d_2}=\frac{1+d_1{d}_2}{2}$$

$$d_2=\frac{2d_1-1}{d_1}$$

The relationship between the duty cycles of boost and buck-boost mode can therefore be described as follows: $$\frac{{\mathrm{<figure-callout\; id="1"\; label="d"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_1}{1-{\mathrm{<figure-callout\; id="1"\; label="d"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_1}=\frac{1}{1-{\mathrm{<figure-callout\; id="2"\; label="d"\; filenames="DE102023100735A1\_0014.png,DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_2}$$

$${\mathrm{<figure-callout\; id="1"\; label="d"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_1=\frac{1-{\mathrm{<figure-callout\; id="1"\; label="d"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_1}{1-{\mathrm{<figure-callout\; id="2"\; label="d"\; filenames="DE102023100735A1\_0014.png,DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_2}=\frac{1+d_1{\mathrm{<figure-callout\; id="2"\; label="d"\; filenames="DE102023100735A1\_0014.png,DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_2}{2}$$

$${\mathrm{<figure-callout\; id="2"\; label="d"\; filenames="DE102023100735A1\_0014.png,DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_2=\frac{2{\mathrm{<figure-callout\; id="1"\; label="d"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_1-1}{{\mathrm{<figure-callout\; id="1"\; label="d"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">d</figure-callout>}}_1}$$

Since the DC link output capacitors are charged separately in two independent operating modes, voltage balancing can be ensured even with asymmetrical output loads. Output loads mean that the first resistor R1 is not equal to the second resistor R2. But the first output voltage V01 is equal to the second output voltage V02 when the mentioned switching cycles d1 and d2 of the switching elements S1 and S2 are applied.

DCM operation occurs when the induced current drops to zero during a switching cycle.

$$\frac{V_{O2}}{V_{in}}=-\frac{V_{in}{\left(d_1\right)}^2{T}_{SW}}{2L{I}_{O2}}\text{ for the buck}-\text{boost mode}$$

In this case, the output voltage gains (M1 and M2) of the DC converter arrangement 10 according to the invention during the two operating modes can be defined as follows: $$\frac{V_{O1}}{V_{in}}=1+\frac{V_{in}{\left(d_2\right)}^2{T}_{SW}}{2\mathrm{<figure-callout\; id="1"\; label="L\; I\; O"\; filenames="DE102023100735A1\_0016.png"\; state="\{\{state\}\}">L</figure-callout>}{I}_O{1}_{}}\text{for the boost mode}$$

$$\frac{V_{O2}}{V_{in}}=-\frac{V_{in}{\left(d_1\right)}^2{T}_{SW}}{2\mathrm{<figure-callout\; id="2"\; label="L\; I\; O"\; filenames="DE102023100735A1\_0014.png,DE102023100735A1\_0016.png"\; state="\{\{state\}\}">L</figure-callout>}{I}_O{2}_{}}\text{for the buck}-\text{boost mode}$$

In 5 a use of a DC converter arrangement according to an embodiment of the invention in a low voltage DC distribution system is shown. 5 shows the application of the proposed converter. The DC-DC converter assembly according to the invention is designed for this type of application. When we have a DC power source (solar PV or battery) and different DC voltage levels are needed to charge mobile phones, laptops and other electronic devices that use a rechargeable battery.

An input DC voltage source provides the required input for the entire circuit. The DC/DC converter 10 converts the DC voltage level of the input to another required voltage level at its outputs. The outputs of the DC/DC converter 10 feed the DC bus lines. The DC bus lines provide the required voltage for various various uses, such as charging the batteries of electric vehicles, laptops, mobile phones and powering the input of DC/AC inverters.

In 6 a use of a DC converter arrangement according to an embodiment of the invention in a two-stage grid-connected DC-AC photovoltaic conversion system with 3L-NPC is shown. In this case, the DC converter arrangement according to the invention operates in a first stage as a DC/DC converter, and in a second stage a 3L-NPC is used to provide an AC voltage. The DC converter arrangement according to the invention can deliver different voltage levels at its outputs. It can deliver equal voltage levels (voltage balancing capability) or unequal voltage levels. The DC converter arrangements known in the prior art can only deliver equal voltage levels (voltage balancing capability).

The first element from the left in Figure 6 is the input DC voltage source VPV from renewable energy sources, which provides the required input for the entire elements. An input capacitor C _in , which filters the input voltage ripple and helps to stabilize the input voltage. The DC/DC converter 10 (SI-SIDO) converts the input voltage level to the required voltage levels at the outputs. C1 and C2 are the output capacitors, which filter the voltage ripple and provide a constant DC voltage at the outputs. 3L-NPC is a DC/AC inverter, which provides the AC voltage according to the requirements of the grid voltage. The output voltage of the inverter is converted to a pure sine waveform after passing through the filter (L). Zg is the impedance of the grid and Vg is the grid voltage.

Claims (10)

DC converter arrangement (10) for converting electrical energy, comprising - an input (Vin) for supplying electrical energy to be converted, - a first output (15-1) for outputting a first part of the converted electrical energy with a first voltage (VO1), - a second output (15-2) for outputting a second part of the converted electrical energy with a second voltage (VO1), - a first switching element (S1), - a second switching element (S2), - a first diode (D1), - a second diode (D2), - an induction coil (L), wherein the input (Vin), the first switching element (S1), the induction coil (L) and the second switching element (S2) are arranged in series in the order given and form a first circuit (31, 33), wherein the input (Vin), the first switching element (S1), the induction coil (L) and the first diode (D1) are arranged in series in the order given and form a second circuit (32), wherein the second diode (D2), the induction coil (L), and the second switching element (S2) are arranged in series in the order given and form a third circuit (34), wherein the first switching element (S1) and the second switching element (S2) are designed to be in a closed or open state, wherein a configuration of the states of the first switching element (S1) and the second switching element (S2) is designed to enable a current flow through one of the circuits (31, 32, 33, 34). DC converter arrangement (10) according to Claim 1 , wherein the first switching element (S1) and the second switching element (S2) are metal-oxide-semiconductor field-effect transistors. DC-DC converter arrangement (10) according to one of the preceding claims, wherein the induction coil (L) comprises an inductance of 100 µH to 1000 µH. DC converter arrangement (10) according to one of the preceding claims, wherein in the second circuit (32) a first output capacitor (C1) is arranged in series between the first diode (D1) and the input (Vin), and wherein in the third circuit (34) a second output capacitor (C2) is arranged in series between the second switching element (S2) and the second diode (D2). Method for converting electrical energy, comprising the following steps: - providing a direct current converter arrangement (10) according to one of the preceding claims, - switching the first switching element (S1) and the second switching element (S2) to the closed state, electrical energy flows through the first circuit (31) to magnetize the induction coil (L), - switching the first switching element (S1) to the closed state and switching the second switching element (S2) to the open state, electrical energy flows through the second circuit (32) to provide the first voltage (VO1) at the first output, - Switching the first switching element (S1) and the second switching element (S2) to the closed state, whereby electrical energy flows through the first circuit (33) to magnetize the induction coil (L), and - Switching the first switching element (S1) to the open state and switching the second switching element (S2) to the closed state, whereby electrical energy flows through the third circuit (34) to provide the second voltage (VO2) at the second output. Procedure according to Claim 5 , wherein the switching of the first switching element (S1) into the closed state and the switching of the second switching element (S2) into the open state is only carried out when electrical energy has flowed through the first circuit (31) for a first switching time. Procedure according to Claim 6 , wherein the switching of the first switching element (S1) and the second switching element (S2) into the closed state is only carried out when electrical energy has flowed through the second circuit (32) for a second switching time. Procedure according to Claim 7 , wherein the switching of the first switching element (S1) to the open state and the switching of the second switching element (S2) to the closed state is only carried out when electrical energy has flowed through the first circuit (33) for a third switching time. Using a DC converter arrangement (10) according to one of the Claims 1 until 4 to provide electrical energy at a first voltage and electrical energy at a second voltage. Computer program comprising instructions which, when executed by a computer, cause the computer to carry out the method according to one of the Claims 5 until 8th to carry out.

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