FR3016080A1 - ELECTRONIC DEVICE COMPRISING A MATRIX OF ELEMENTARY ELECTRONIC CIRCUITS, ELECTRONIC SYSTEM AND TESTING METHOD - Google Patents

Abstract

An electronic device (10) comprising a matrix (11) of elementary electronic circuits (P (i, j)) arranged in rows comprising lines (Li) and columns (Clj) so as to form the matrix, the electronic device comprising row conductors (Xik, Yjg), each row conductor being connected to each elementary electronic circuit (P (i, j)) of a row, the row conductors (Xik, Yjg) comprising first row conductors ( Xik, Yjg), each first row conductor being connected to a signal generator (1 6ik; 18 ik,; 19j; 1j, 15j) external to the matrix (11) of electronic circuits and for injecting into said first row conductor (Xik, Yjg), electrical signals, for controlling the elementary pixels (P (i, j)) of the row at which said first row conductor (Xik, Yjg) is connected. The electronic device comprises a reading device (30, 31) for selectively reading the voltages conveyed by the first row conductors (Xik, Yjg), at first ends (E1ik, e1jg) of said row conductors, the signal generators being connected to the respective opposite first row conductors at respective second ends (E2ik, e2jg).

Description

The field of the invention is that of electronic devices comprising a matrix of elementary electronic circuits. BACKGROUND OF THE INVENTION The invention relates more particularly to imaging devices, in particular image sensors. The invention relates more specifically to the testing of electronic devices. An image sensor can be used for the imaging of ionizing radiation and especially X or y radiation in the medical field or that of non-destructive control in the industrial field, for the detection of radiological images. This type of electronic devices comprises a matrix of elementary electronic circuits, that is to say blocks of components. The elementary electronic circuits are arranged in rows and more precisely in rows and columns to form the matrix. Elementary circuits are also called pixels. In the image sensors as described in the patent application, the pixels are photosensitive spots. The pixels are then, for example, formed of a photosensitive zone delivering a current of electric charges as a function of the flux of photons that it receives and an electronic circuit for processing this current. The photosensitive zone generally comprises a photosensitive element or photodetector which may for example be a photodiode, a photoresistor or a phototransistor and a charge collector. The pixel also comprises, in addition to the photosensitive element and the charge collector, an electronic circuit internal to the pixel that has a control or processing function (eg switch, reset, amplification). This type of device comprises line conductors connecting line-by-line pixels and column conductors connecting the column-by-column pixels. The line and column conductors provide the necessary polarizations, commands and output channels of the information detected by the pixel. Drivers are also commonly called tracks. Some conductors rows, rows or columns, are conventionally connected to a signal generator for generating the signals that are conveyed by these row drivers.

When manufacturing the electronic device faults can affect the electronic device. Current solutions for detecting defects in image sensors include analyzing the images formed by the electronic device manually or automatically. The disadvantage of this method is that it does not indicate the nature of the defect but its consequence. In addition, if the fault is a short circuit affecting a row conductor causing too low or too high voltages on several rows or columns, the fault can not be located correctly in the matrix. Other methods of testing for defects in pixel lines and columns include injecting signals on the line conductors and reading the signals on the output of the columns. These methods determine which lines and which pixel columns are affected by a manufacturing defect. This involves equipping the test device with a device for reading the outputs of the columns. According to the applicant, these methods have the disadvantage of not making it possible to precisely locate the fault affecting the electronic device. It does not detect this fault, nor identify which row conductor is affected by a fault. However, short-circuits of line and column conductors can occur resulting in malfunctions of the electronic device see the damage of the electronic device. For example, when a row conductor is short-circuited, if a signal generator tries to inject a predetermined current or voltage, very high short-circuit currents can occur on the row conductor. A large short-circuit current can have detrimental effects on the signal generator in which the short-circuit current will flow. The fault can also propagate beyond the generator by melting the electrical connectors that are connected to the generator under the effect of the short-circuit current. It is therefore essential to be able to identify these defects so as to be able to neutralize them before the use of the electronic device. An object of the invention is to provide an electronic device equipped to make possible a test row conductors connected to signal generators that will detect and locate defects affecting these row conductors. For this purpose, the subject of the invention is an electronic device comprising a matrix of elementary electronic circuits organized in rows comprising rows and columns so as to form the matrix, the electronic device comprising row conductors, each row conductor being connected to each elementary electronic circuit of a row, the row conductors comprising first row conductors, each first row conductor being connected to a signal generator external to the matrix of electronic circuits and for injecting into said first row conductor row conductor, electrical signals, for controlling the elementary pixels of the row to which said first row conductor is connected. The electronic device comprises a reading device for selectively reading the voltages conveyed by the first row conductors at first ends of said row conductors, the signal generators being connected to the respective first row row conductors at respective second ends. The device according to the invention advantageously comprises at least one of the following characteristics taken alone or in combination: it comprises controllable electrical insulators capable of electrically isolating individually at least one of the first row conductors of the signal generator to which said first row conductor is connected, - the controllable electrical insulators comprise at least one controllable row insulator, each controllable row insulator being associated with a first row conductor, the controllable row insulator being adapted to isolate said row conductor first row conductor of the signal generator to which said first row conductor is connected, the electronic device comprising a control device of the controllable electrical insulators for individually controlling the controllable row insulators, - at least one row insulator command able is arranged such that even if the signal generator generates a signal to said first row conductor associated with said controllable electrical insulator, this signal is not propagated by said first row conductor along the row of elementary electronic circuits to which said first row conductor is connected. The invention also relates to an electronic system comprising an electronic device according to the invention and a test device adapted to be connected to the electronic device and being configured so as to enable said first conductors to be selectively tested, when connected to the electronic device: by driving said signal generators so that they deliver signals making it possible to put one of the first row conductors, called the first row conductor read, to a predefined theoretical potential, by driving the reading device of whereby the reading device reads a potential read at the first end of the first row conductor lu, the test device receiving the potential lu, - by comparing the read potential with an expected potential defined from the theoretical potential, - by detecting a defect affecting the first row driver read from at least one result of a e comparing the potential read and the expected potential. The electronic system according to the invention advantageously comprises one of the following characteristics taken alone or in combination: the test device is configured so as to sequentially test the respective first row conductors according to a predetermined test sequence; test device is configured to identify, when it detects a fault affecting the first read row driver, the nature of the fault, - the test device is configured so that when it detects a fault on one of said driver row, it controls the controllable electrical insulators so as to electrically isolate said first row conductor from the signal generator to which said first row conductor is connected.

The subject of the invention is also a method for testing the first row conductors of an electronic device according to the invention. The method comprises sequentially testing said respective first row conductors, the method comprising, for each of the first row conductors, at least a first read step comprising: - a first step of driving at least one signal generator so as to bring the first row conductor to a first predetermined theoretical potential; - a first step of driving the reading device so as to read a first potential, called first potential lu, of the first row conductor at the first end of the first row conductor, the method further comprising, for each first row conductor, a first step of detecting a fault affecting said first row conductor, from the first potential read and the first theoretical potential, comprising: - a first step of comparing the first potential read with an expected potential depending on the theoretical first potential, - a first elementary fault detection step affecting the read row conductor, from the result of the first comparison step between the expected first potential and the first read potential of the first reading step. The method advantageously comprises at least one of the following characteristics taken alone or in combination: the elementary test step comprises for each of the first row conductors, at least when no fault is detected during the first elementary step fault detection circuit, a second reading step comprising: a second step of controlling at least one signal generator so as to bring the first row conductor to a second predetermined theoretical potential; a second step of controlling the device in order to read a second potential of the first row conductor at the first end of the first row conductor, the method further comprising, for each first row conductor, a second step of detecting a fault affecting the second conductor row, from the second read potential and the second theoretical potential, comprising a second comparison step of the second potential read with a second expected potential dependent on the second theoretical potential, a second elementary fault detection step affecting the first row conductor, based on the result of the second comparison step, between the second expected potential and the second read potential, obtained during the second reading step, the first theoretical potential and the second theoretical potential comprising a high potential and a low potential associated with the row conductor; during the first reading step associated with at least one of the first row conductors connected to a signal generator intended to deliver point signals during the operation of the electronic device, the signal generators are controlled so as to activate only a single row of elementary electronic circuits, - during the first reading step associated with at least one of the first row conductors, the signal generators are controlled so that a current less than or equal to 1 mA passes in the electronic circuits elementary, - the method comprises for at least one of the first conductors connected to a bias current generator of the elementary electronic circuits, a first associated reading step in which the signal generator is piloted to which the row conductor is connected so as to fix the current carried by the lectur row conductor e to a current greater than the bias current of the elementary circuits and a second reading step in which the signal generator is piloted to which the row conductor is connected so as to fix the current carried by the row conductor to a lower current the polarization current of the elementary circuits; during the first reading step associated with one of the first row conductors to be brought to a non-zero continuous potential of power supply during the operation of the electronic device, the signal generators are piloted to select no row of electronic circuits and the signal generator connected to the first row conductor is carried high or low; during the first reading step associated with one of the first row conductors to be brought to a continuous resetting potential during the operation of the electronic device, the signal generators for delivering punctual signals are piloted when the device operates. providing high level reset control signals and driving the signal generator connected to the first row conductor to provide a high level signal; the method comprises a step of identifying the fault affecting the row conductor when a fault is detected; the process comprises: i. when a fault is detected because a read potential is different from an associated expected potential that has a high level, the identified fault is a short circuit to potential low, ii. when a fault is detected because a read potential is different from an associated expected potential which has a low level, the identified fault is a short circuit to the high potentials; when a fault is detected because a read potential is different from a first associated expected potential which has a high level and because a second read potential is different from a second associated expected potential which has a level down, the identified fault is a cut of a row conductor. The invention also relates to a method for protecting the signal generators of an electronic device according to the invention, the method comprising a defect detection step carried out according to a test method according to the invention, and for each of the first row drivers for which a fault is detected, a step of neutralizing the fault. Advantageously, the electrical isolation step consists in electrically insulating said first row conductors from said respective signal generators. Other features and advantages of the invention will become apparent on reading the detailed description which follows, given by way of nonlimiting example and with reference to the appended drawings in which: FIG. 1 schematically represents in the form of a diagram functional first example of an electronic device according to the invention. FIG. 2 diagrammatically represents an electronic system according to the invention, FIG. 3 schematically represents an example of a test method according to the invention, FIG. 4 schematically represents a second example of an electronic device according to the invention, in particular the pixel matrix, the signal generators of the electrical insulation elements and the control devices of the electrical insulation elements. The reading and control devices of the signal generators, although present as in the first example shown in Figure 1 are not shown for clarity. From one figure to another, the same elements are identified by the same references. In general, the invention relates to an electronic device 10 comprising a matrix 11 of elementary electronic circuits called pixels in the present patent application. The pixels are arranged in rows that are rows and columns. It should be noted that in the context of the present invention, the concepts of lines and columns have only a relative sense, a row of pixels and a column of pixels being other than rows of pixels arranged typically perpendicularly. one to the other. Columns (and therefore lines) do not necessarily include all the same number of pixels. The electronic device 10 may be an imaging device, in particular an image sensor. In the latter case, the pixels are elementary electronic circuits that make it possible to collect induced charges upon reception of a photon. We will describe an exemplary embodiment of the invention wherein the electronic device is an image sensor. The invention also applies in particular to electronic devices such as memory circuits, logic circuits, for example of the FPGA type, displays, or any type of detector or matrix electronic devices. FIG. 1 schematically represents a first example of an image sensor 10 comprising a matrix 11 of two lines Li with i ranging from 1 to I (with I = 2 in the example of FIG. 1) and two columns C1 with j = 1 to J (with J = 2 in the example of Figure 1). It thus comprises four elementary electronic circuits. i and j are natural numbers respectively denoting row rank and column rank in the matrix. It is understood that the actual matrices may include a much larger number of elementary circuits of up to several million. It is for example common to make matrices with pixels arranged along 3000 rows and 3000 columns. The electronic device 1 comprises pixels P (i, j) which are preferably identical. In the embodiment of the figures, the pixels are identical and, for the sake of clarity, only the elements of the pixel P (1, 1) are referenced. The electronic device 10 comprises row conductors. The row conductors comprise at least one line conductor Xik associated with a line of pixels of index i and defined as being oriented parallel to the corresponding line of pixels. k = 1 to K with K being the number of line conductors per pixel line. In the example of the figure, the row conductors comprise line conductors X11, X12, and X21, X22 associated with the respective lines L1 and L2. The row conductors comprise at least one column conductor Yjg of indices g and j associated with a column conductor of index j and defined as being oriented parallel to the column of pixels. g = 1 to G where G is the number of column conductors per column. In the embodiment of the figures, row conductors comprise column conductors Y11, Y12, Y13, and Y21, Y22, Y23 associated with respective columns C1 and C12. Each row conductor is electrically connected to each of the pixels of the corresponding row. A line conductor is electrically connected to each of the pixels of the corresponding line and a column conductor is connected to each of the pixels of the corresponding column. In other words, the row conductors electrically connect the pixels row by row. Line drivers connect pixels line by line, and column conductors connect pixels column by column. A row conductor is intended to convey electrical signals to or from each of the pixels of the corresponding row. These signals can be of different types. These may be digital signals that can take a plurality of discrete values or analog signals that can vary continuously. It may be in a non-limiting manner power supply signals such as voltages or pixel power supply currents, information collection signals, selection signals, reset commands, or gain control signals. pixels. The signals may be continuous, such as supply signals, or discontinuous, for example periodic, such as zero reset control or information collection signals. The signals injected on the row conductors are intended to control the pixels of the respective rows. The signals to be conveyed by the row conductors are generated by signal generators associated with the respective row conductors. Advantageously, the signal generators are external to the pixel array. In other words, they are not part of the pixels. They are advantageously arranged at the end of rows so as to inject the signals into the row conductors at one end of the respective row conductors which will be called the second end in the rest of the text. In other words, the signal generators are connected to the row conductors at the end of the row. This facilitates the manufacture of the electronic device.

The image sensor 10 further comprises a block 12 for controlling the rows and a block 13 for reading the columns. In the nonlimiting example shown in FIG. 1, the line control block 12 comprises an addressing circuit for line conductors 17 having different elements, not shown, such as, for example, a clock circuit, circuits switching circuit, a shift register which enable it to control the generation of the signals to be injected into line conductors, sequentially line by line and possibly line conductor line conductor. This type of control block is conventional for the skilled person. The line control block 12 comprises at least one connection point SXik for each line Li. In the example of FIG. 1, the line control block comprises two connection points SXii, SX; 2 for each line Li of pixels P (i, j). Each connection point SXik is connected to the corresponding line conductor Xik with the same indices i and k. A pixel P (i, j) comprises in the nonlimiting example shown in FIG. 1, a photodiode Dp (i, j) and three transistors Ti (i, j), T2 (i, j) and T3 (i, j). The photodiodes Dp (i, j) can naturally be replaced by any photosensitive element capable of generating photon-receiving electrical charges. The first transistor Ti (i, j) is connected by its gate G1 to the line conductor Xi2 of the line i, by its drain Di to the column conductor Y13, and by its source Si to the cathode of the photodiode Dp (i, j). The anodes of all the photodiodes Dp (i, j) are connected to a common potential, for example ground. The point of connection between the source Si of the transistor Ti (i, j) and the cathode of the photodiode Dp (i, j) is called the floating point A. The transistor T2 (i, j) is connected by its gate G2 to the point floating A, by its drain D2 to the column conductor Yj2 and its source D2 to the source S3 of the transistor T3 (i, j). The gate G3 of the transistor T3 (i, j) is connected to the line conductor> Cm and its drain D3 is connected to the column conductor 111, 1. All Y13 column conductors are subject to the same VRAZ reset potential. Similarly, all Yj2 column conductors are subjected to the same potential, called VDD supply potential. The potential VDD is, for example, provided by first voltage sources 14. The resetting potential VRAZ is for example subjected by second voltage sources 15. By potential of a point, in the present patent application, we mean the potential of the point with respect to a reference point. This reference point is usually the mass. In the example shown in FIG. 1, the signal generators comprise first signal generators 16ik, 18ik, with k = 1 to K with K equal to 2 in the example of FIG. 1, included in the control block lines 12. The first signal generators 16ik, 18ik make it possible to generate signals to be injected on the line conductors Xik. The signals injected on the conductors of the respective lines make it possible to control the pixels of the respective lines. In the embodiment of the figures, the first signal generators each comprise a voltage generator 18ik, and a buffer 16ik ("buffer" in English terminology). It is in particular the buffers 16ik that are deteriorated when the currents of short circuits carried by the associated line conductors exceed a certain threshold. The buffers 16ik serve to amplify the signals delivered by the corresponding generator. The voltage generators 18ik serve to define the amplitude of pulses applied to the line conductors Xik. The addressing circuit of the line conductors 17 makes it possible to control the generation of the control signals to be injected on the line conductors line by line and possibly line conductor by line conductor. The read block of the columns 13 comprises a connection point EYi with a column driver Y11 for each column. This point is located at the second end e2ig of the column driver concerned. The signal generators comprise second signal generators adapted to generate signals intended to be injected on the column conductors. These second signal generators comprise current sources 19i and voltage sources 14, 15i, with j = 1 to J. The pixels of the same column share a current source 19i (which is for example a transistor) and a voltage source. column reading circuit if located at the end of column. The current generator 19i and the column reading circuit si are connected to the pixels of the corresponding column by means of a conductor Yil. The transistor Ti (i, j) makes it possible to reset the voltage of the cathode of the photodiode Dp (i, j) to the reset potential VRAZ, during a reset operation during which the control signal RAZi injected on line driver Xj2 of line i is active. This operation resets the potential of the floating points. During an imaging phase, occurring after a resetting operation of the potential of the floating points A, the illumination received by the photodiode Dp (i, j) decreases the potential of its cathode. The photodiodes generate electrical charges at the floating points A. This imaging phase is followed by a reading phase during which the potential of the photodiode Dp (i, j) is read. To do this, the transistor T3 (i, j), which thus has a switch function, is turned on when the command Phi_li applied to its gate via the conductor Xil is active. When the Phi-li command is active, the pixel line Li is said to be selected. The transistors T2 (i, j) operate as a follower and the transistors T3 (i, j) and the current source form a voltage follower stage. The transistors T3 (i, j) make it possible to select the line i of pixels P (i, j) for which it is desired to read the quantity of electric charges accumulated at the floating point A. When the signal injected on the command Phi-li injected on the line conductor> Cm of a line i is active, the potential of the floating points A is copied, at an offset voltage close, to the input of the column reading circuit if at the end of the column, that is, that is to say on the conductor 1111. To carry out its copy, the transistor T2 (i, j) requires a bias current flowing in its drain and its source. This current is imposed by the current generator 19. The potentials VDD and VRAZ may be identical. The voltage sources 14, 15i can be confused. The different outputs of the column reading circuits if different columns are then processed by a read block of the columns 13. The read block of the columns 13 makes it possible to obtain a video signal of a line or a portion of a line . It may comprise a multiplexer, an amplifier and / or an analog / digital converter. It allows the reading of the outputs of the elementary electronic circuits. In summary, in the example shown in Figure 1, each row conductor is connected to a signal generator for generating signals to be conveyed by said row conductor so as to control the pixels of the corresponding row. The conductors X; 1 are connected to signal generators 16; 1,18; 1. Conductors Xj2 are connected to signal generators 16; 2,18; 2. The conductors 1112 and 1113 are connected to signal generators 14i and 15 respectively. The conductors Y11 are connected to current generators 19. The injected signals are either continuous signals (such as the VDD or VRAZ supply potentials) or point or discontinuous signals such as Phi_li, Phi_RAZi signals. They can be digital as Phi_li, Phi_RAZi can take two values, for example OV and another predetermined voltage. They can also be analog as the supply voltages VDD, VRAZ can vary continuously. The electronic device 10 according to the invention comprises a control device of the signal generators 36, 37 for controlling, preferably individually or line by line and column by column, the signal generators 16; k, 18; k ,, 19j , 14, 15. In the embodiment of the figure, this control device of the signal generators 36, 37 comprises a first control device of the signal generators 36 for controlling the signal generators, here the generators 16; k, 18, k, dedicated to line conductors, that is to say connected to line conductors at their respective second ends E2; k. In the embodiment of FIG. 1, this first control device 36 comprises the addressing circuit of the lines 17 and a first control circuit 136 making it possible to control the voltage generators 16; k. The first control circuit 136 makes it possible in particular to vary the voltage delivered by the voltage generators 16, k, preferably individually, so as to vary the amplitude of the signals that are delivered by the signal generators dedicated to the lines. The control device of the signal generators 36, 37 comprises a second control device of the signal generators 37 for controlling the signal generators, here the generators 19i 14, 15, dedicated to the column conductors, that is to say ie connected to the column conductors at their respective second ends e219. The control device 37 makes it possible to vary the voltage delivered by signal generators dedicated to the columns, preferably individually, so as to vary the amplitude of the signals that are delivered by the signal generators dedicated to the columns.

In general, the signal generators 16ik, 18k, 19, 14, 15j are external to the pixel array. In other words, they are not part of the pixels. Each signal generator is connected to a row conductor so that it can inject signals to it. The row conductor carries the signal that the corresponding signal generator injects it from the second end E2ik, e219 to the first end Etk, e1 ig of the corresponding row of pixels. Each signal generator comprises at least one voltage or current generator making it possible to impose a potential or a current on the driver to which it is connected. The voltage or current generator may comprise a voltage or current regulator, for example of the buffer type. As can be seen in FIG. 1, the electronic device 10 according to the invention comprises a reading device 30, 31 making it possible to read selectively the potentials of the respective row conductors at the first ends E1 ik, e1 ig of the respective row conductors. The first ends are the ends of the respective row conductors which are opposed to respective second ends E2ik, e219 of said respective row conductors. This last characteristic is fundamental because it makes it possible to detect a fault affecting the row conductor between the second end to which the signal is injected and the first end at which the driver potential is read by the reading device 30, 31, and that is, along the entire length of the corresponding row. The control device 20, 21 of the signal generators makes it possible to control the signal generators so as to fix the signals injected at the first end of the row conductors, and by making it possible to read selectively the potentials of the row conductors at their second level. The ends allow, using a suitable testing device and method, to test each of the row conductors, detect faults affecting these row conductors, and identify faulty row conductors. The invention applies to defects occurring after the manufacture of the device, during its use. It also makes it possible to detect the defects affecting the row conductors very early in the manufacture of the electronic device from the manufacture of row conductors and non-optically. In the embodiment of FIG. 1, the reading device 30, 31 makes it possible to read selectively the potentials of each of the row conductors. As a variant, the reading device 30, 31 does not necessarily make it possible to selectively read the potentials of all row conductors. The reading device must allow at least to read the potentials of each of the row conductors which are row conductors which are connected to a signal generator as defined above for injecting a signal on the row conductor. These row conductors are called, in the rest of the text, first row conductors. This allows, by providing a test device and a test method adapted to detect the short circuits affecting the first row conductors whose short circuits could damage signal generators. Advantageously, the first row conductors comprise several row conductors for each row. This makes it possible to identify which row conductor among the first row conductors in any row, a failure is detected. As can be seen in FIGS. 1 and 2, the reading device 30, 31 comprises a first reading circuit 30 connected to the first ends E1 ik of the line conductors. The first reading circuit 30 selectively reads the voltages of the Xik line conductors. It comprises a first active output SS1 if the first reading circuit reads the potential at the first end of one of the line conductors and inactive if the first circuit if the first reading circuit reads no potential at the first end of one of the conductors. lines. The reading device 30, 31 comprises a second reading circuit 31 connected to the first ends e1 ig of the column conductors Yig. The second reading circuit 31 selectively reads the voltages of the column conductors Yjg. comprises a second active output SS2 if the second reading circuit 31 reads the potential at the first end of one of the column conductors and is inactive if the second reading circuit 31 reads no potential at the first end of one of the column conductors Yjg Each of the first and second read circuits 30, 31 is realized in a conventional manner. Each of these circuits comprises elements not shown, such as, for example, a clock circuit, one or more multiplexers and flip-flops, for example a shift register. For example, the first read circuit 30 includes a multiplexer circuit per line. Each multiplexer circuit is connected at the input to the first ends of the conductors of the corresponding line. Each multiplexer circuit is connected to a shift register for selecting or activating one of the multiplexers, i.e. selecting a line, by propagating a control token on the respective latches connected to the multiplexers connected to the row conductors belonging to to the respective lines. The output of the selected or activated multiplexer circuit is propagated to the first output SS1. The first reading circuit 30 thus makes it possible to read the potentials of line conductors at the first end of line conductors, line by line and within said lines, line conductor by line conductor. The second read circuit 31 can be made in the same way as the first read circuit 30. Alternatively, the first read circuit 30 comprises a single multiplexer circuit connected, at the input, to the first ends of all line conductors. The second read circuit comprises a single multiplexer circuit connected to the first ends of all the line conductors. In a variant, the reading device comprises a single multiplexer circuit connected to the first ends of all the row conductors. Other embodiments of the reading device are of course conceivable. The pixels as well as the line conductors are made on a substrate. The reading device 30, 31 is made on the same substrate as the pixels. This is also advantageously the case for the row control and column reading blocks and the control device 36, 37. The electronic device 10 according to the invention comprises connection pads, made on the substrate, intended for a connection. to external circuits. The device advantageously comprises connection pads intended to connect a test device 33 visible in FIG. 2, to the electronic device 10 according to the invention so as to be able to test the row conductors. For example, in the embodiment of FIG. 1, electronic device comprises first connection pads 130a, 130b intended to connect the reading device 30, 31 to a test device 33 so that the test device receives at respective inputs 133a, 133b, the outputs SS1, SS2 of the respective reading devices 30, 31. The potential read by the reading device 30, 31 is the value of the active output SS1 or SS2 received at the input of the test device 33. The device electronics 10 includes second connection pads 230a, 230b for connecting the reading device, i.e. the respective reading circuits 30, 31 to the test device 33, so that the test device 33 can control the reading device, i.e. the respective reading circuits so as to select the row conductor whose potential is read. The second connection pads 230a, 230b are intended to be connected to first outputs 233a, 233b of the test device. The electronic device 10 comprises third connection pads 330a, 330b, 330c for connecting the control device of the signal generators to respective second outputs 333a, 333b, 333c of the test device 33 so that the test device can drive the control devices 36, 37 as shown in Fig. 1, i.e., so that the test device 33 can control the respective signal generators. The invention also relates to an electronic system, shown in FIG. 2. In FIG. 2, for the sake of clarity, the electronic device of FIG. 1 is more schematically represented. In this representation, the elementary electronic circuits are very schematically represented and the connection points are not shown. The electronic system according to the invention comprises the electronic device 10 according to the invention and a test device 33. The test device 33 is connected to the electronic device 10 as previously described. The test device 33 is connectable to the electronic device 10 and is configured to selectively test said row conductors when connected to the electronic device 10, i.e. allow to: - control said signal generators so that they deliver signals carrying one of the row conductors, called row conductor lu, to a predetermined theoretical potential taken from among a set of possible theoretical potentials for the row conductor read, - driving the reading device 30, 31 so that the reading device 30, 31 reads a potential read at the first end of the first row conductor lu, the test device 33 receiving the potential read, - compare the read potential with a expected potential defined from the theoretical potential, - detecting a fault affecting the row conductor read from at least one result of a comparison its between the potential read and the expected potential. In the embodiment of FIG. 3, the test device 33 comprises a control device 34 making it possible to control the signal generators so that they deliver signals making it possible to put the row conductor read at a predetermined theoretical potential. The theoretical potential is the potential conveyed by the row conductor read along the entire corresponding row of pixels, when the read row conductor is devoid of defects. This theoretical potential is fixed by the signals delivered by the generators. The control of the signal generators by the test device 33 is carried out via the control device 36, 37 of signal generators. The control device 34 sets the values of the signals to be generated by the signal generators dedicated to the line conductors in order to put the read row conductor at a theoretical potential and transmits them to the circuits 17 and 136 which control the generators dedicated to the line lines. way to generate these signals. The control device 34 is also able to control the control device of the columns 37. The control device 34 sets the values of the signals to be generated by the signal generators dedicated to the column conductors and transmits them to the device 37 so as to generate said signals. The control device 34 for controlling the reading device 30, 31 so that the reading device 30, 31 reads the potential of the row conductor read at its first end. The control device 34 is able to generate control commands for the reading circuits 30 and 31 so as to read selectively the potentials of the row conductors at the respective first ends of the first row conductors. It generates for example a control token for selecting the corresponding row and controls the multiplexer circuit associated with said row so as to select the desired conductor in said row. The test device 33 then receives the voltage read corresponding to the active output SS1 or SS2, on one of the inputs 133a, 133b. The test device 33 comprises a comparator 38 receiving the potential read by the reading circuit 30, 31 and making it possible to compare the read potential with an expected potential defined from the theoretical potential at which the row conductor lu is carried. The expected potential for a row conductor is equal to the theoretical potential when the multiplexer circuit of the read circuit associated with the row conductor is an analog multiplexer circuit. In this case, the potential read by the multiplexer circuit, that is to say the potential that is propagated on its output, is the potential received at the input of the multiplexer. In a variant, the multiplexer circuit is a digital multiplexer circuit. In this case, the potential can take two values, a high value corresponding to a high potential and a low value corresponding to a low potential. The expected potential then depends on a first potential threshold corresponding to a potential threshold from which the output potential of the multiplexer circuit takes the high value. The potential theoretically is the low value if the theoretical potential is lower than the first threshold and the high value if the theoretical potential is at least equal to the first threshold. The test device 33 further comprises a detector 39 for detecting a fault affecting the row conductor read from at least one comparison result between a read potential and the associated expected potential. In other words, the detector 39 receives as input the output of the comparator 38 and detects a fault affecting the row conductor read. The output of the detector 39 includes, for example, a true Boolean or yes if the read row driver is assigned a fault and false or not if the read row driver is not affected by a fault. The test device 33 also, but not necessarily, includes an identification device 40 for identifying the nature of the fault affecting the row conductor from at least one fault detection result. The test device 33 can be connected to the electronic device 33 removably as is the case in the embodiment of Figure 2 or permanently. The test device is then called integrated (or built-in-test in English terminology). The test device 33 can also be made on the same substrate as the electronic device. It is also said that the test device is an integrated test device. The control device 36, 37 of the signal generators is, in the embodiment of FIG. 1, integrated in the test device 33. In a variant, it is partially offset outside the test device 33 and can be connected to it from permanently or removably. Advantageously, the test device 33 comprises a memory 41 in which instructions are stored for the control device 34. These instructions are sequences of instructions intended for the control device 36, 37 of the signal generators and the reading device. Advantageously, these instructions are constructed so that the test device sequentially tests the respective row conductors in a predetermined test sequence to detect defects affecting the row conductors. In other words, the test device is configured to sequentially test the respective first row conductors in a predetermined test sequence determining the order in which the row conductors are tested. The control device 34, the comparator 38, the detector 39 and the identification device 40 are for example made in the form of one or more computers. As a variant, the test sequence is transmitted to the test device 33 by an external pilot, for example an operator.

A method of testing the row conductors of an electronic device according to the invention will now be described. The test method uses for example a test device according to the invention. The test method consists of sequentially testing each of the row conductors connected to a signal generator. The method comprises, for each row conductor, at least a first reading step 100 comprising: a first driving step 101, for example by means of the control device, of at least one signal generator so as to carry the row conductor said read at a predetermined first theoretical potential, - a first driving step 102 of the reading device, for example by means of the control device 34, so as to read the first potential, called first potential read, the driver of row read, at its first end. When the multiplexer circuit associated with a row conductor is a digital multiplexer circuit, the comparison step between the expected potential and the theoretical potential consists in checking whether these two potentials are different. The result of the comparison is either yes or no. When the multiplexer circuit associated with a row conductor is an analog multiplexer circuit, the step of comparing the expected potential and the theoretical potential consists in verifying whether these two potentials differ from a threshold greater than a second predetermined threshold. The result of the comparison is either yes or no. The use of analog multiplexers makes it possible to perform tests that are more accurate than digital multiplexers, but these make it possible to perform faster tests. The test method further comprises, for each row conductor, a first step 103 of detecting a fault affecting the row conductor read, for example by means of the comparator 38 and the detector 39, from the first potential read and of the first theoretical potential, comprising: - a first comparison step 104, for example by means of the comparator, of the first potential read by the control device with a first expected potential dependent on the first theoretical potential, - a first basic detection step 105 of the fault affecting the row conductor read, from the result of the first comparison step, between the first expected potential and the first read potential of the first read step. The method then optionally comprises an identification step 106 for identifying the fault detected from the result of the fault detection step 103. The method is for example carried out as follows, as shown in FIG. row conductor, the method comprises a first reading step 100 in which the potential of the conductor is set at a first theoretical high value (V = V high) followed by a first fault detection step 103 and, if no defect exists, is detected during the first fault detection step 103, a second read step, before which the driver potential is set to a second theoretical low value (V = Vbas), in a step 107, followed by a second fault detection step from the second potential read and the second expected potential. The reading steps can of course be reversed. The second reading step and the second detection step are respectively identical to the first reading step 100 and the first detection step 103, except that the theoretical input potentials of these steps are different. This method makes it possible to detect a short circuit type fault affecting the row conductor. Indeed, the short-circuits can be of the short-circuit type towards high potentials or towards low potentials, for example towards ground. If a fault is detected in the first step, the short circuit is a short circuit to ground or to low potentials. Indeed, the expected potential is the high potential and if the potential read is different from this expected potential or differs from this high potential of a threshold greater than the second threshold, it means that the short circuit is a short circuit bearing the potential row driver read at a low potential. The second reading step makes it possible to detect a short circuit towards the high potentials. The theoretical high value depends on the technology of the row driver it is close to the value allowed by the row driver. It is usually 3V especially for imagers in CMOS technology. The theoretical low value is conventionally OV. The identification step 106 consists of giving the nature of the fault, namely whether it is a short-circuit towards the high voltages or towards the ground, as previously described. This step is performed from the potential expected during the reading step that has detected the failure. In a variant, the method comprises two reading steps as described above and a comparison step carried out after each reading step from the read potential and the expected potential during these respective steps. The method comprises a single elementary detection step performed from the two read potentials and the two expected potentials. In this case, the first elementary step is the second elementary step. This embodiment makes it possible to identify a fault of the cutoff type of the row conductor. Indeed, when the row conductor is cut, the corresponding input of the multiplexer circuit is set to high impedance and the probability that the potential read by the multiplexer circuit (which is the output potential of the multiplexer circuit when the corresponding input is selected) is equal to the expected potential is very low. Advantageously: - when a fault is detected because a read potential is different from an associated expected potential which has a high level, the identified fault is a short-circuit potential downwards, - when a fault is detected since a read potential is different from an associated expected potential which has a low level, the identified fault is a short circuit to the high potentials, and possibly so that when a fault is detected that a first potential lu is different from a first expected potential associated with a high level and the fact that a second potential read is different from a second expected potential associated with a low level, the identified fault is a cutoff of a row driver. Advantageously, the identification device is configured to identify faults in this manner. An exemplary embodiment of the reading step for each of the row conductors of the matrix 11 will now be given. Each reading step comprises a step of controlling at least one signal generator so as to carry the row conductor at a predetermined first theoretical potential. In the embodiment of the figures, the line conductors are the conductors on which are injected, when the device operates, discontinuous or punctual control signals. During the step of reading the line conductors, it is possible to control the signal generators 16ik, 18ik so that a single line of pixels is activated by means of an active command of Phi-li type. If only one pixel line is activated, that is, if only one of the Phi-li commands is active, the electronic device does not consume much current. The test is not destructive. As a variant, during the step of reading a line conductor, it is possible to activate several rows of pixels, that is to say to control the signal generators so that several Phi-li commands are active. In this case, power consumption can become very important. The signal generators are advantageously controlled so that no current passes in the pixels or a current less than or equal to 1 mA passes in the pixels. This test mode is valid for all row conductors. The control drivers which are the conductors other than the reading conductors may be tested while the electronic device is in operation or out of operation periods. The reading conductors corresponding to the conductors connected to the conductors connected to the reading block of the columns 13, can be tested when the electronic device is not in operation. In this case, the signal generators are piloted so as to put a maximum voltage on the read column conductor and so that the current carried by the conductors connected to the signal generators is less than or equal to 1 mA. A read row conductor may alternatively be tested when the electronic device is in operation. During the step of testing a row conductor connected to a polarization current generator 19i of the pixels, two reading steps are advantageously carried out. The test step comprises a reading step during which the signal generators are controlled, and in particular the polarization current generator to which the row conductor is connected, so as to fix the current carried by the read row conductor to a current greater than the bias current of the elementary circuits (in particular transistors). In this case the row conductor is set to a potential close to OV because we just unload the cable. The detection step using the measurements of the reading step makes it possible to detect a short circuit towards the high level. During this reading step, it is preferable to select no line of pixels (Phi-li to zero). Phi-razi can be worn indifferently at high or low level. It is possible to control the signal generators so as to select several lines of pixels (phi-li at the high level), set VDD high to drive the circuit in a nominal way and fix the current delivered by the row conductor connected to the current generator at a level below the bias current of the pixel transistors. In this case, the potential of the row conductor is raised to the high level. This reading step makes it possible to detect short circuits towards low potentials. When testing a row conductor intended to be brought to a non-zero DC supply voltage VDD during the operation of the electronic device, during the reading steps, the signal generators 16; 1 are advantageously piloted so as not to select any line (or row) of pixels (phi-li low) and the driver 14i connected to the row conductor is piloted so as to inject on the row conductor a high or low level signal. The fact of not selecting any line makes it possible not to drop artificially VDD in the row conductor read. This makes it possible not to drop the potential of the row conductor when one seeks to detect low-level shorts (when VDD is high). The control of the signal generators so that no pixel line can be selected can be performed for all the VDD values but the output of the column signal can only be obtained with VDD at the high level. To avoid all the risks of deterioration, in the method according to the invention, the first reading step 100 is first implemented for each of the row conductors intended to be brought to the potential V DD at which these potentials are brought to VDD low level and if no short circuit is detected to the high potentials, it implements a second reading step for each row conductors intended to be brought to the potential VDD, this second reading step differs only from the first reading step in which the row conductor is brought to the high level VDD potential. When testing a row conductor connected to a generator 15i intended to deliver a continuous resetting potential VRAZ, during the reading steps, the signal generators intended to deliver, when the device is operating, advantageously punctual control signals, so as to output high level Phi-RAZi reset control signals and such that the VRAZ generator 15i connected to the row conductor outputs a high level signal. Providing high level Phi-RAZi signals makes it possible not to artificially drop RAZ in the read row conductor. This makes it possible not to drop the potential of the row conductor when one seeks to detect low-level shorts (when VRAZ is high). FIG. 4 shows a partial view of an advantageous embodiment of a device 10 according to the invention. The device 10 according to the invention comprises the same elements as in the example of FIG. 1 and additional elements represented in FIG. 4. On the other hand, for the sake of clarity, not all the elements are represented, in particular the elements 30. , 31, 37, 136. The first and second ends of the row conductors are also not referenced for clarity. The electronic device 10 according to the invention advantageously comprises, as can be seen in FIG. 4, controllable electrical insulating elements 16ik, 8jg with i = 1 to I, k = 1 to K, j = 1 to J and g = 1 to G, able to electrically isolate individually row conductors Xik, Yjg signal generators 16 ik, 1 8ik, 19, 14, 15i to which row conductors are respectively connected. The controllable insulating elements are also able to individually electrically connect at least one row conductor with the corresponding signal generator. In the case where the controllable electrical insulators electrically isolate a plurality of row conductors from the signal generators to which the row conductors are respectively connected, the controllable electrical insulators are configured to permit electrically isolating the row conductors of the signal generators to which the row conductors are respectively connected. By individually, it is meant that each row conductor of the signal generator to which it is connected can be isolated independently of the state of the connection between the other row conductors and the other respective signal generators. In other words, isolating a row conductor from its signal generator does not affect the isolation of the other row conductors of their respective signal generators. The invention makes it possible, in the event of a short circuit on a row conductor, to avoid the creation of a strong short-circuit current when the generator tries to inject a signal on the conductor that is in conflict with the short circuit. -circuit. It protects the signal generators and the elements connected to these generators which are likely to melt like a fuse. Therefore, only the row concerned has a malfunction. This is particularly interesting when conductors of different rows share the same source of current or voltage (this embodiment is not shown in Figure 1) or are connected to signal generators having common elements (see Figure 1 ). It is simple to implement, precise and reversible. The electronic device furthermore has the advantage of including protection means for the integrated signal generators. The insulation elements may further isolate all or part of the generators of the respective row conductors for testing purposes or verifications. Advantageously, the controllable electrical insulating elements are arranged so that even if the signal generator generates a signal to said row conductor, this signal is not propagated by said corresponding row conductor along the circuit row. elementary electronics to which the row conductor is connected, i.e. between the two ends of the row of pixels to which the row conductor is connected. For example, the controllable electrical insulators comprise controllable row insulators 16ik and 8. Each controllable row insulator 16ik with i and k given, 8jg with given j and g, is associated with a row conductor Xik, or Yjg . In other words, each controllable row insulator is associated with a single row conductor. The controllable row insulator 16k, 8jg is for electrically isolating said row conductor with which it is associated, namely Xik, or Yjg from the signal generator to which said row conductor is connected 16ik, 18ik or 19, 14, 15i when i = 1 to 3 respectively. This characteristic makes it possible to independently isolate the respective row conductors of the corresponding respective signal generators. It makes it possible to simultaneously isolate all the row conductors of the signal generators to which they are respectively connected. It also makes it possible to keep all row conductors electrically connected to the signal generators to which they are connected at the same time. Each controllable row insulator is advantageously connected, seen from the generator, before the first pixel of the corresponding row, to the corresponding row conductor. Therefore, even if the signal generator generates a signal to said row conductor, this signal is not injected into the corresponding row conductor along the row of pixels. The controllable row insulators comprise first controllable row insulators 16ik which are integrated with the corresponding first signal generators 16ik, 18ik. Therefore, even if the signal generator generates a signal to said row conductor, this signal is not injected into the corresponding row conductor. For this purpose, the controllable row insulators are, on the non-limiting embodiment of Figures 1 and 2, buffers tri-state, called tri-state buffers in English terminology. It would also be possible to provide signal generators of the type comprising, for example, an amplifier, other means making it possible to put the output of the signal generator on high impedance. As can be seen in FIG. 2, the tri-state buffers 16ik each comprise a tri-state output Sik connected to the corresponding connection point SXik, i.e., connected to the corresponding row conductor. Each tri-state buffer 16ik is adapted to be in a first state in which it establishes the electrical connection between the signal generator 16ik, 18ik and the corresponding row conductor Xik. In this first state, the signals injected on a first input Elik of the tri-state buffer 16ik are at the output of the tri-state buffer Sik. In other words, the output of the buffer is valid. Each buffer is capable of being in a second state in which the signals injected on a first input El ik of the tri-state buffer 16ik are not found at the output of the tri-state buffer Sik. This is done when the second input E2ik receives an isolation command to put the tri-state output Sik in high impedance. No signal generated by the generator can no longer be transmitted to the corresponding line driver via the Sik tri-state output. The signal generator and the corresponding row conductor are electrically isolated from each other. This type of insulation is preferably associated with the conductors intended to convey digital signals. The controllable insulators comprise, in the embodiment of FIG. 1, second controllable row insulators 8jg which are embodied as mechanical switches for electrically opening and closing the corresponding respective conductors Yjg interposed between the row conductors and respective signal generators. In other words, everything happens as if these second insulators put the corresponding row conductors on high impedance. Advantageously, each second controllable row insulator 8jg connects the signal generator and the corresponding row conductor and is arranged, seen from the signal generator, before the first pixel of the corresponding row. In other words, each second controllable row insulator 8jg is interposed between the signal generator and the row conductor connection point at the first pixel of the row. Each second controllable insulator 8jg is adapted to be in a first state in which it establishes the electrical connection between the row conductor and the corresponding signal generator and in a second state in which it electrically isolates the row conductor of the corresponding signal generator. . The switches here are analog switches since the signals delivered by the corresponding signal generators 19, 14, 15i are analog signals. This configuration has the advantage that even if the signal generator generates a signal for said row conductor, this signal is not propagated by said corresponding row conductor along the row of elementary electronic circuits to which the signal is connected. row conductor, i.e. between the two ends of the row of pixels to which the row conductor is connected. In other words, this feature makes it possible to avoid the creation of short-circuit currents due to short-circuits created between the pixels situated at the ends of the corresponding row, which constitutes the bulk of the length of the line conductor. It is also possible to provide controllable row insulators made in the form of switches for treating the short-circuits of row conductors intended to convey digital signals. These conductors are connected to signal generators delivering digital signals. However, this solution is less compact and more difficult to manufacture than a solution with tri-state buffers. As can be seen in FIG. 1, the controllable row insulators are advantageously arranged outside the matrix of pixels 11.

The electronic device according to the invention comprises a control device 20, 21 of insulating elements for controlling the controllable electrical insulating elements. The control device 20, 21 advantageously makes it possible to individually control the controllable row insulators. In other words, the control device 20, 21 is able to address the respective controllable row insulators respective commands having values independent of each other. In the embodiment of the figures, the control device 20, 21 comprises a first device 20 for controlling the isolation elements for controlling or programming line insulators 16ik and a second control device 21 for controlling or programming the column insulators 8. The control device 20, 21 makes it possible to individually send to each individual insulator connection commands enabling them to be placed individually in a first state (as described above) or isolation commands making it possible to put them in place. individually in a second state (as previously described). The second state is also called the isolation state. This control device is conventionally made by the person skilled in the art by means of shift registers configured so as to make it possible to address row, row-by-row and driver-by-wire row insulators within each row. Advantageously, the test device 33 is configured so that when it detects a fault on one of the row conductors, it controls the controllable electrical insulators so as to electrically isolate said row conductor from the signal generator to which said conductor row is connected. For this purpose, the electronic device 10 comprises fourth connection pads 430a, 430b intended to connect the control device 20, 21 to the test device so that the test device, in particular the control device 34, can control the device. The control device 20, 21 is advantageously independent of the at least one addressing block of row conductors 12 for generating discontinuous control signals to be injected on row conductors. In other words, the control device 20, 21 is able to generate commands independent of the commands generated by the addressing block of the row conductors 12. The addressing block of the row conductors comprises in FIG. controlling lines 12 comprising the first signal generators and being able to generate discontinuous control signals to be injected on the line conductors. This independence has the advantage of avoiding the transmission of the commands generated by the first generators to row conductors even if these signals are generated. This avoids the propagation in the electronic device of a fault related to a short circuit affecting a row conductor, including deteriorating the associated signal generator, without having to change the commands addressed row drivers. In a variant not shown in the figures, the electronic device comprises row conductors as defined above also called first row conductors but also second row conductors. Each first row conductor is intended to be electrically connected to a signal generator. The second row conductors are conductors that are not connected to signal generators outside the pixel array. The important thing is that at least one and preferably every first row conductor is connected to a signal generator via a controllable row insulator for electrically isolating said first row conductor from the associated signal generator. . The controllable insulators may also include other controllable row insulators, with each second row conductor connected to the controller 20, 21 through a controllable row insulator. The second row conductors are then connected to the reading device 30, 31 and the test device. The invention also relates to a method for protecting a signal generator, an electronic device according to the invention. The method comprises the defect detection method as described above. The method further comprises, for each row conductor on which a fault is detected, a step 108 of defect neutralization which in the particular non-limiting case of the device of Figure 4, an electrical isolation step of electrically isolating said row conductor of said signal generator. This step is implemented by means of the controllable electrical insulation elements. Advantageously, the isolation step 108 comprises a step of generation, by the control device 20, 21, of the insulation elements of an isolation command intended for the controllable row insulator associated with the predetermined row conductor. for example, the one that is in short circuit, the isolation control for putting the controllable row insulator into an isolation state in which it electrically isolates the row conductor signal generator.

Claims (20)

REVENDICATIONS1. An electronic device (10) comprising a matrix (11) of elementary electronic circuits (P (i, j)) arranged in rows comprising lines (Li) and columns (Cli) so as to form the matrix, the electronic device comprising row conductors (Xik, Yjg), each row conductor being connected to each elementary electronic circuit (P (i, j)) of a row, the row conductors (Xik, Y19) comprising first row conductors ( Xik, Yjg), each first row conductor being connected to a signal generator (16; k; 18k;; 19j; 14; 15i) external to the matrix (11) of electronic circuits and for injecting into said first row conductor (Xik, Yjg), electrical signals, for controlling the elementary pixels (P (i, j)) of the row to which said first row conductor (Xik, Yjg) is connected, characterized in that the electronic device comprises a device reading signal (30, 31) for selectively reading the voltages conveyed by the first row conductors (Xik, Y19), at first ends (E1ik, el 19) of said row conductors, the signal generators being connected to the first respective row conductors opposite at respective second ends (E2; k, e219). An electronic device (10) according to claim 1, comprising controllable electrical isolation elements (18jk 8) adapted to electrically isolate at least one of the first row conductors of the signal generator to which said first row conductor is connected. . An electronic device according to the preceding claim, wherein the controllable electrical insulating elements (16; k; 8ig) comprise at least one controllable row insulator (16; k; each controllable row insulator (16; k; 8) being associated with a first row conductor (Xik, Yjg), the controllable row insulator being adapted to isolate said first row conductor (Xik, Yjg) from the signal generator (18ik, 16ik; 19i; 14i; 15) to which said first row conductor (Xik, Y19) is connected, the electronic device (10) comprising a control device of the controllable electrical insulators (20, 21) for individually controlling the controllable row insulators (16ik; 8jg) . An electronic device (10) according to the preceding claim, wherein at least one controllable row insulator is arranged such that even if the signal generator generates a signal to said first row conductor associated with said controllable electrical insulator, this signal is not propagated by said first row conductor along the row of elementary electronic circuits to which said first row conductor is connected. An electronic system comprising an electronic device (10) according to any one of the preceding claims and a test device (33) adapted to be connected to the electronic device (10) and configured to selectively test said first drivers. when connected to the electronic device (10): by driving said signal generators so as to deliver signals enabling one of the first row conductors, called the first row conductor, to be read at a theoretical potential predefined, - by driving the reading device (30, 31) so that the reading device (30, 31) reads a potential read at the first end of the first row conductor lu, the test device (33) receiving the potential read, - by comparing the read potential with an expected potential defined from the theoretical potential, - by detecting a fault affecting the first rank conductor e read from at least one result of comparing the read potential and the expected potential. An electronic system according to the preceding claim, wherein the test device (33) is configured to sequentially test the respective first row conductors (Xik, Yjg) according to a predetermined test sequence. An electronic system according to any one of claims 5 to 6, wherein the test device (33) is configured to identify, when it detects a fault affecting the first read row driver, the nature of the fault. An electronic system according to any one of claims 5 to 7, dependent on any one of claims 2 to 4, the test device (33) being configured so that when it detects a fault on one of said driver of row, it controls the controllable electrical insulators (1 6jk 8jg) so as to electrically isolate said first row conductor from the signal generator to which said first row conductor is connected. A method of testing the first row conductors of an electronic device according to any one of claims 1 to 4, the method of sequentially testing said respective first row conductors, the method comprising, for each of the first drivers row arrangement, at least a first read step (100) comprising: - a first driving step (101) of at least one signal generator so as to bring the first row conductor to a predetermined first theoretical potential; first step of driving the reading device (102) so as to read a first potential, called first potential lu, of the first row conductor at the first end of the first row conductor, the method further comprising, for each first conductor of row, a first step of detecting (103) a fault affecting said first row conductor, from the first mate and a first theoretical potential comprising: - a first step of comparing (104) the first potential read with an expected potential dependent on the first theoretical potential, - a first elementary fault detection step (105) affecting the row conductor read from the result of the first comparison step (104) between the first expected potential and the first read potential of the first read step. 10. Test method according to the preceding claim, wherein the elementary test step comprises for each of the first row conductors, at least when no fault is detected in the first elementary fault detection step, a second reading step comprising: - a second step of driving at least one signal generator so as to bring the first row conductor to a second predetermined theoretical potential, - a second step of controlling the reading device so as to read a second potential of the first row conductor at the first end of the first row conductor, the method further comprising, for each first row conductor, a second step of detecting a fault affecting the second row conductor from the second row conductor read potential and the second theoretical potential, comprising: a second comparison step of the second I potential read with a second expected potential dependent on the second theoretical potential, - a second elementary fault detection step affecting the first row conductor, from the result of the second comparison step, between the expected second potential and the second read potential. obtained in the second reading step, the first theoretical potential and the second theoretical potential comprising a high potential and a low potential associated with the row conductor. 11. A test method according to any one of claims 9 to 10, wherein, in the first reading step associated with at least one of the first row conductors connected to a signal generator for delivering punctual signals during the operation of the electronic device, the signal generators are controlled so as to activate only one row of elementary electronic circuits. 12. Test method according to any one of claims 9 to 11, wherein, during the first reading step associated with at least one of the first row conductors, the signal generators are controlled so that a lower current or equal to 1mA passes in the elementary electronic circuits. 13. Test method according to claim 10, comprising, for at least one of the first conductors connected to a bias current generator 19j of the elementary electronic circuits, a first associated reading step in which the signal generator is piloted to which the driver row is connected to fix the current carried by the read row conductor to a current higher than the bias current of the elementary circuits and a second read step in which the signal generator is piloted to which the row conductor is connected so as to fix the current carried by the row conductor to a current lower than the bias current of the elementary circuits. 14. Test method according to any one of claims 9 to 13, wherein during the first reading step associated with one of the first row conductor to be brought to a continuous potential nonnul supply during operation of the electronic device , the signal generators are piloted to select no row of electronic circuits and the signal generator connected to the first row conductor is raised to high level or low level. 15. Test method according to any one of claims 9 to 14, wherein during the first reading step associated with one of the first row conductor to be brought to a continuous reset potential during operation of the electronic device. , the signal generators for providing point signals are piloted when the device is operative to deliver high level reset control signals and the signal generator connected to the first row conductor is piloted so as to output a signal generator. high level signal. A test method according to any one of claims 9 to 15, comprising a step of identifying the fault affecting the row conductor when a fault is detected. 17. Test method according to the preceding claim wherein: - when a fault is detected because a read potential is different from an associated expected potential which has a high level, the identified fault is a short circuit to the low potentials, - when a fault is detected because a read potential is different from an associated expected potential which has a low level, the identified fault is a short circuit to high potentials. 18. Test method according to the preceding claim according to claim 10, wherein when a fault is detected because a read potential is different from a first expected potential associated with a high level and the fact that a second potential lu is different from a second expected potential associated with a low level, the identified fault is a cut of a row driver. A method for protecting the signal generators of a device according to any of claims 1 to 4, the method comprising a defect detecting step performed according to a test method according to any one of claims 9 to 15, and for each of the first row conductors for which a fault is detected, a step of neutralizing the fault. 20. The method according to the preceding claim wherein the electrical isolation step (108) comprises electrically insulating said first row conductors of said respective signal generator.