GB2318894A - Controlling access by two computer processors to a shared resource - Google Patents
Controlling access by two computer processors to a shared resource Download PDFInfo
- Publication number
- GB2318894A GB2318894A GB9716473A GB9716473A GB2318894A GB 2318894 A GB2318894 A GB 2318894A GB 9716473 A GB9716473 A GB 9716473A GB 9716473 A GB9716473 A GB 9716473A GB 2318894 A GB2318894 A GB 2318894A
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- processor
- resource
- flag
- lock flag
- processors
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
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- Theoretical Computer Science (AREA)
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- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
Abstract
Ensuring that only one of two processors has access to a shared resource, such as a memory, at any time, and resolving simultaneous access requests. A processor seeking access to the resource sets, 24, a corresponding lock flag at the resource, and then checks, 25, whether the other processor has, in the meantime, set its lock flag. If the second processor determines that the first processor's lock flag has not been set, it seizes control of the resource and sets a contention flag to a value indicating successful seizure; otherwise, the second processor abandons the attempt and sets the contention flag accordingly (fig. 2). Should the first processor determine, 30, that the second processor has set its lock flag while it set its own lock flag, the first processor seizes control of the resource, 35, or otherwise, 33, depending on the value of the contention flag set by the second processor. The resource is released on task completion (figs. 3 and 4).
Description
"A method and apparatus for controlling access
by two computer processors to a shared resource"
The present invention relates to a method and apparatus for controlling access by two computer processors, namely, a first processor and a second processor to a shared resource so that only one of the two processors has access to the resource at any one time. The invention also relates to a computer programme adapted for carrying out the method.
It is known to control access by two computer processors, for example, the central processor units of a computer, or the central processor units of respective computers to a shared resource, typically, a common memory resource using hardware, for example, bus locking mechanisms. However, where such hardware locking mechanisms are not provided, controlling access to a shared resource by two computer processors so that only one of the processors has access to the resource at any one time presents serious problems. Such problems arise in particular, when the processors execute instructions at disparate speeds, and/or where the processors are entirely different. Indeed, such problems arise even where the computer processors are similar, and operate at similar speeds.
There is therefore a need for a method for controlling access by two computer processors to a shared resource so that only one of the two processors has access to the resource at any one time.
The present invention is directed towards providing such a method, and also, to an apparatus for controlling access by the two computers to the shared resource. The invention is also directed to a computer programme adapted for carrying out the method.
According to the invention there is provided a method for controlling access by two computer processors, namely, a first processor and a second processor to a shared resource so that only one of the two processors has access to the resource at any one time, the method comprising the steps of:
causing each of the first and second processors to set a corresponding lock flag at the resource as the respective processors are seizing control of the resource, the first processor setting a first lock flag, and the second processor setting a second lock flag,
causing the second processor to set a contention flag at the resource to a first value as the second processor seizes control of the resource, and to a second value if the second processor fails to seize control of the resource,
so that if the two processors are simultaneously attempting to seize control of the resource, and both processors have set their respective lock flags, the first processor can ascertain from the value of the contention flag if the second processor has successfully seized the resource.
Preferably, the first processor seizes control of the resource in response to the value of the contention flag. Advantageously, the first processor seizes control of the resource in response to the status of the second lock flag.
Preferably, the second processor seizes control of the resource in response to the status of the first lock flag.
In one embodiment of the invention the first processor prior to setting the first lock flag makes a first check to ascertain if the second lock flag has been set, and if the second flag has been set, the first processor abandons that attempt to seize control of the resource, if the second lock flag has not been set, the first processor sets the first lock flag.
Preferably, the first processor having set the first lock flag makes a second check to ascertain if the second lock flag has been set, and if the second lock flag has not been set the first processor seizes control of the resource.
Advantageously, the first processor having detected as a result of the second check that the second lock flag has been set, clears the first lock flag and checks the contention flag, and continues to check the contention flag until it has been set to the first or second value.
In one embodiment of the invention the first processor on detecting that the contention flag has been set to the first value clears the contention flag and abandons that attempt to seize control of the resource.
In another embodiment of the invention the first processor on detecting the contention flag has been set to the second value clears the contention flag and proceeds to make a further check on the second lock flag, which further check corresponds to the first check on the second lock flag, and the first processor then continues to repeat the steps of the method after the first check on the second lock flag, depending on the results of the said further check.
Preferably, the second processor before commencing an attempt to seize control of the resource clears the contention flag.
In one embodiment of the invention the second processor prior to setting the second lock flag makes a first check to ascertain if the first lock flag has been set, and if so, the second processor abandons that attempt to seize control of the resource, if the first lock flag has not been set, the second processor sets the second lock flag.
In another embodiment of the invention the second processor having set the second lock flag makes a second check to ascertain if the first lock flag has been set, and if the first lock flag has not been set, the second processor sets the contention flag to the first value and seizes control of the resource.
In a further embodiment of the invention the second processor having determined as a result of the second check that the first lock flag has been set, the second processor clears the second lock flag and sets the contention flag to the second value and abandons that attempt to seize control of the resource.
In one embodiment of the invention the method further comprises the step of causing each of the first and second processors to set corresponding request flag at the resource to indicate a request for access to the resource, the first processor setting a first request flag, and the second processor setting a second request flag.
In one embodiment of the invention the first processor on completing a task in the resource clears the contention flag and the first lock flag, for releasing control of the resource, and checks if the second request flag has been set. Preferably, the first processor on completing the task in the resource, and on determining that the second request flag has not been set terminates the method, and on determining that the second request flag has been set, the first processor sets the second lock flag for providing access to the resource by the second processor.
In another embodiment of the invention the second processor on completing a task in the resource clears the second lock flag for releasing control of the resource, and checks if the first request flag has been set.
Preferably, the second processor on completing the task in the resource, and on determining that the first request flag has not been set terminates the method, and on determining that the first request flag has been set sets the first lock flag for providing access to the resource by the first processor.
In one embodiment of the invention each processor clears the request flag as it seizes control of the resource.
Additionally, the invention provides apparatus for controlling access by two computer processors, namely, a first processor and a second processor to a shared resource so that only one of the two processors has access to the resource any one time, the apparatus comprising:
a means for permitting each of the first and second processors to set a corresponding lock flag at the resource as the respective processors are seizing control of the resource, the first processor setting a first lock flag, and the second processor setting a second lock flag,
a means for permitting the second processor to set a contention flag at the resource to a first value as the second processor seizes control of the resource, and to a second value as the second processor fails to seize control of the resource,
so that if the two processors are simultaneously attempting to seize control of the resource, and both processors have set their respective lock flags, the first processor can ascertain from the value of the contention flag if the second processor has successfully seized the resource.
In one embodiment of the invention the first processor comprises a first seizing means for seizing control of the resource, the first seizing means being responsive to the value of the contention flag. Preferably, the first seizing means is responsive to the status of the second lock flag.
In another embodiment of the invention the second processor comprises a second seizing means for seizing control of the resource, the second seizing means being responsive to the status of the first lock flag.
Additionally the invention comprises a computer programme for controlling access by two computer processors, namely, a first processor and a second processor to a shared resource so that only one of the two processors has access to the resource at any one time, the computer programme being adapted for carrying out the method according to the invention.
Further, the invention provides a computer programme comprising a sub-routine for controlling access by two computer processors, namely, a first processor and a second processor to a shared resource so that only one of the two processors has access to the resource at any one time, the sub-routine being adapted for carrying out the method according to the invention.
The invention also provides a medium comprising a computer programme according to the invention.
The invention will be more clearly understood from the following description of a preferred embodiment thereof which is given by way of example only with reference to the accompanying drawings, in which:
Fig. 1 is a flow chart of a sub-routine of a
computer programme which is loaded into one of a
pair of computer processors for controlling access
by the two computer processors to a shared
resource, the sub-routine being part of a method
according to the invention for controlling access
to the shared resource,
Fig. 2 is a flow chart of a sub-routine of a
computer programme forming another part of the
method for controlling access to the shared
resource, the sub-routine being loaded into the
other of the pair of computer processors,
Fig. 3 is a flow chart of a sub-routine of a
computer programme which also forms part of the
method according to the invention for controlling
access by the two computers to the resource, the
sub-routine being loaded into the computer
processor into which the sub-routine of Fig. 1 is
loaded, and
Fig. 4 is a flow chart of a sub-routine of a
computer programme which also forms part of the
method according to the invention for controlling
access by the two computers to the resource, the
sub-routine being loaded into the computer
processor into which the sub-routine of Fig. 2 is
loaded.
Referring to the drawings there is illustrated four sub-routines of a computer programme for carrying out c method according to the invention for controlling access by two computer processors to a shared resource, in this embodiment of the invention a shared memory resource. The sub-routines of Figs. 1 and 3 control one of the computer processors, which for convenience, will be referred to as the first processor, and the sub-routines of Figs. 2 and 4 control the other of the computer processors, which for convenience will be referred to as the second processor. Before describing the sub-routines in detail with reference to Figs. 1 to 4, a broad outline of the method for controlling the two processors will be given.
Each processor on desiring access to the resource sets a corresponding request flag at the resource to indicate a request for access to the resource. The first processor sets a first request flag, and the second processor sets a second request flag. Each processor also sets a corresponding lock flag at the resource as the corresponding processor is seizing control of the resource. The first processor sets a first lock flag, while the second processor sets a second lock flag. The second processor sets a contention flag at the resource to a first value, in this case one, as the second processor seizes control of the resource for indicating to the first processor that the second processor has successfully seized the resource. The second processor sets the contention flag to a second value, in this case two, should the second processor fail to successfully seize control of the resource. By setting the contention flag to either one of the two values, the first processor if it is simultaneously attempting to seize control of the resource, and if both the first and second processors have set their respective first and second lock flags, the first processor can ascertain from the value of the contention flag whether the second processor has successfully seized the resource or otherwise. Should the second processor not have successfully seized control of the resource, the first processor then proceeds to do so. Should the second processor have successfully seized control, the first processor abandons that attempt.
Turning now to Figs. 1 to 4, the four sub-routines of the computer programme will now be described. However, for convenience, the sub-routine of Fig. 2 will first be described. The sub-routine of Fig. 2 is carried out by the second processor in an attempt to seize control of the resource. Block 1 of the sub-routine commences the sub-routine which then moves to Block 2. Block 2 clears the contention flag to the value zero should it have been set. The sub-routine then moves to Block 3 which sets the second request flag to the value one, indicating to the first processor that the second processor is requesting access to the resource. The sub-routine having set the second request flag moves to
Block 4 which makes a first check to ascertain if the first lock flag has been set by the first processor at the resource. If Block 4 ascertains that the first lock flag has been set, the sub-routine moves to Block 5 which terminates the sub-routine, thereby abandoning that attempt by the second processor to gain access to the resource.
On the other hand, should Block 4 determine that the first lock flag has not been set, the sub-routine moves to Block 6 which sets the second lock flag of the second processor to the value one at the resource.
This indicates to the first process that the second processor is attempting to seize control of the resource. The sub-routine then moves to Block 7 which makes a second check to ascertain if the first processor had set the first lock flag at the resource while the second processor was setting the second lock flag. Should Block 7 determine that the first lock flag has not been set, the sub-routine moves to Block 8 which seizes control of the resource and locks the resource for the second processor, and also sets the contention flag to the first value, namely one, thereby indicating to the first processor that the second processor has successfully seized control of the resource. The sub-routine then moves to Block 9 which clears the second request flag to the value zero, and in turn moves to Block 10 which initiates the relevant programme to carry out the desired task at the resource.
Should Block 7 determine that while the second lock flag of the second processor was being set the first lock flag of the first processor had also been set, then the sub-routine moves to Block 12. Block 12 clears the second lock flag to the value zero, and then moves the sub-routine to Block 14, which sets the contention flag at the resource to the second value, namely two. This, thus indicates to the first processor that the second processor was unsuccessful in seizing the resource. The sub-routine then moves to
Block 5 which terminates the sub-routine and abandons that attempt to seize control of the resource.
Referring now to Fig. 1 the sub-routine for controlling the first processor during an attempt to seize control of the resource will now be described. Block 20 starts the sub-routine which immediately moves to Block 21 which sets the first request flag of the first processor at the resource to the value one to indicate to the second processor that the first processor requires access to the resource. The sub-routine then moves to Block 22 which makes a first check to ascertain if the second lock flag has been set by the second processor. If so, the sub-routine moves to
Block 23 which terminates the sub-routine, thereby abandoning that attempt to gain access to the resource.
Should Block 22 determine that the second lock flag has not been set, the sub-routine moves to Block 24 which sets the first lock flag of the first processor at the resource to the value one. The sub-routine then moves to Block 25 which makes a second check to ascertain if the second lock flag had been set while the first lock flag was being set. Should Block 25 determine that the second lock flag had not been set, the sub-routine moves to Block 26 which seizes control of the resource and locks the resource for the first processor, and also clears the first request flag to zero. The subroutine then moves to Block 27 which calls up the appropriate computer programme to carry out the desired task at the resource.
Should Block 25 determine that the second lock flag had been set, the sub-routine moves to Block 30 which clears the first lock flag. The sub-routine then moves to Block 31 which checks the value of the contention flag, which is set by the second processor. Should
Block 31 determine that the contention flag is set to the value zero, in other words, is still cleared, the sub-routine remains in a loop until the value of the contention flag is not zero. At which stage, the subroutine moves to Block 32. Block 32 checks if the value of the contention flag is one, indicating that the second processor successfully seized control of the resource, and if Block 32 determines that the value of the contention flag is one the sub-routine moves to
Block 33 which clears the value of the contention flag to zero and returns the sub-routine to Block 23 which terminates the sub-routine, thereby abandoning that attempt to seize control of the resource.
Should Block 32 determine that the value of the contention flag is not one, in other words, it must be two, the sub-routine moves to Block 35 which clears the value of the contention flag to zero, and returns the sub-routine to Block 22 to make a further check on the second lock flag, which is the equivalent to the first check on the second lock flag, and the sub-routine then continues through the remainder of the steps of the sub-routine depending on the state of the second lock flag.
Referring now to Fig. 3 the sub-routine of the computer programme by which the first processor releases the resource on the first processor having completed the task will now be described. Block 40 starts the subroutine which then moves to Block 41. Block 41 clears the contention flag at the resource to zero, and the sub-routine moves to Block 42 which clears the first lock flag at the resource to zero, thereby releasing control of the resource. The sub-routine then moves to
Block 43 which checks if the second request flag had been set, indicating a request by the second processor to gain access to the resource. Should Block 43 determine that the second flag had not been set, the sub-routine moves to Block 44 which terminates the subroutine. On the other hand, should Block 43 determine that the second request flag had been set, the subroutine moves to Block 45 which sets the second lock flag of the second processor at the resource to one, and sends a message to the second processor that its second lock flag has been set. The sub-routine then moves to Block 44 which ends the routine.
Turning now to Fig. 4 the sub-routine of the computer programme by which the second processor releases the resource on completing the task at the resource will now be described. Block 50 starts the sub-routine which immediately moves to Block 51. Block 51 clears the second lock flag to zero, thereby releasing control of the resource. The sub-routine then moves to Block 52, which checks if the first request flag of the first processor has been set indicating a request to gain access to the resource. On Block 52 determining that the first request flag has not been set, the subroutine moves to Block 53 which terminates the subroutine. On the other hand, should Block 52 determine that the first request flag had been set, the sub routine moves to Block 54 which sets the first lock flag of the first processor at the resource to one, and sends a message to the first processor indicating that its first lock flag has been set. The sub-routine then moves to Block 53 which terminates the sub-routine.
It is desirable that both the first and second processors should be permitted to execute the subroutines of Figs. 1 and 2 with their respective interrupts disabled so that arbitration carried out by the sub-routines is not preempted. This, in general, is important since the first processor which sits in a loop at Block 31 awaiting the contention flag to be set to either the first or second values to ascertain the course of action taken by the second processor.
Claims (29)
1. A method for controlling access by two computer processors, namely, a first processor and a second processor to a shared resource so that only one of the two processors has access to the resource at any one time, the method comprising the steps of:
causing each of the first and second processors to set a corresponding lock flag at the resource as the respective processors are seizing control of the resource, the first processor setting a first lock flag, and the second processor setting a second lock flag,
causing the second processor to set a contention flag at the resource to a first value as the second processor seizes control of the resource, and to a second value if the second processor fails to seize control of the resource,
so that if the two processors are simultaneously attempting to seize control of the resource, and both processors have set their respective lock flags, the first processor can ascertain from the value of the contention flag if the second processor has successfully seized the resource.
2. A method as claimed in Claim 1 in which the first processor seizes control of the resource in response to the value of the contention flag.
3. A method as claimed in Claim 1 or 2 in which the first processor seizes control of the resource in response to the status of the second lock flag.
4. A method as claimed in any preceding claim in which the second processor seizes control of the resource in response to the status of the first lock flag.
5. A method as claimed in any preceding claim in which the first processor prior to setting the first lock flag makes a first check to ascertain if the second lock flag has been set, and if the second flag has been set, the first processor abandons that attempt to seize control of the resource, if the second lock flag has not been set, the first processor sets the first lock flag.
6. A method as claimed in Claim 5 in which the first processor having set the first lock flag makes a second check to ascertain if the second lock flag has been set, and if the second lock flag has not been set the first processor seizes control of the resource.
7. A method as claimed in Claim 6 in which the first processor having detected as a result of the second check that the second lock flag has been set, clears the first lock flag and checks the contention flag, and continues to check the contention flag until it has been set to the first or second value.
8. A method as claimed in any preceding claim in which the first processor on detecting that the contention flag has been set to the first value clears the contention flag and abandons that attempt to seize control of the resource.
9. A method as claimed in any preceding claim in which the first processor on detecting the contention flag has been set to the second value clears the contention flag and proceeds to make a further check on the second lock flag, which further check corresponds to the first check on the second lock flag, and the first processor then continues to repeat the steps of the method after the first check on the second lock flag, depending on the results of the said further check.
10. A method as claimed in any preceding claim in which the second processor before commencing an attempt to seize control of the resource clears the contention flag.
11. A method as claimed in any preceding claim in which the second processor prior to setting the second lock flag makes a first check to ascertain if the first lock flag has been set, and if so, the second processor abandons that attempt to seize control of the resource, if the first lock flag has not been set, the second processor sets the second lock flag.
12. A method as claimed in Claim 11 in which the second processor having set the second lock flag makes a second check to ascertain if the first lock flag has been set, and if the first lock flag has not been set, the second processor sets the contention flag to the first value and seizes control of the resource.
13. A method as claimed in Claim 12 in which the second processor having determined as a result of the second check that the first lock flag has been set, the second processor clears the second lock flag and sets the contention flag to the second value and abandons that attempt to seize control of the resource.
14. A method as claimed in any preceding claim in which the method further comprises the step of causing each of the first and second processors to set corresponding request flag at the resource to indicate a request for access to the resource, the first processor setting a first request flag, and the second processor setting a second request flag.
15. A method as claimed in Claim 14 in which the first processor on completing a task in the resource clears the contention flag and the first lock flag, for releasing control of the resource, and checks if the second request flag has been set.
16. A method as claimed in Claim 15 in which the first processor on completing the task in the resource, and on determining that the second request flag has not been set terminates the method, and on determining that the second request flag has been set, the first processor sets the second lock flag for providing access to the resource by the second processor.
17. A method as claimed in any of Claims 14 to 16 in which the second processor on completing a task in the resource clears the second lock flag for releasing control of the resource, and checks if the first request flag has been set.
18. A method as claimed in Claim 17 in which the second processor on completing the task in the resource, and on determining that the first request flag has not been set terminates the method, and on determining that the first request flag has been set sets the first lock flag for providing access to the resource by the first processor.
19. A method as claimed in any of Claims 14 to 18 in which each processor clears the request flag as it seizes control of the resource.
20. A method for controlling access by two computer processors, namely, a first processor and a second processor to a shared resource so that only one of the two processors has access to the resource at any one time, the method being substantially as described herein with reference to and as illustrated in the accompanying drawings.
21. Apparatus for controlling access by two computer processors, namely, a first processor and a second processor to a shared resource so that only one of the two processors has access to the resource any one time, the apparatus comprising:
a means for permitting each of the first and second processors to set a corresponding lock flag at the resource as the respective processors are seizing control of the resource, the first processor setting a first lock flag, and the second processor setting a second lock flag,
a means for permitting the second processor to set a contention flag at the resource to a first value as the second processor seizes control of the resource, and to a second value as the second processor fails to seize control of the resource,
so that if the two processors are simultaneously attempting to seize control of the resource, and both processors have set their respective lock flags, the first processor can ascertain from the value of the contention flag if the second processor has successfully seized the resource.
22. Apparatus as claimed in Claim 21 in which the first processor comprises a first seizing means for seizing control of the resource, the first seizing means being responsive to the value of the contention flag.
23. Apparatus as claimed in Claim 21 or 22 in which the first seizing means is responsive to the status of the second lock flag.
24. Apparatus as claimed in any of Claims 21 to 23 in which the second processor comprises a second seizing means for seizing control of the resource, the second seizing means being responsive to the status of the first lock flag.
25. Apparatus for controlling access by two computer processors, namely, a first processor and a second processor to a shared resource so that only one of the two processors has access to the resource at any one time, the apparatus being substantially as described herein with reference to and as illustrated in the accompanying drawings.
26. A computer programme for controlling access by two computer processors, namely, a first processor and a second processor to a shared resource so that only one of the two processors has access to the resource at any one time, the computer programme being adapted for carrying out the method of any of Claims 1 to 20.
27. A computer programme comprising a sub-routine for controlling access by two computer processors, namely, a first processor and a second processor to a shared resource so that only one of the two processors has access to the resource at any one time, the sub-routine being adapted for carrying out the method of any of
Claims 1 to 20.
28. A computer programme for controlling access by two computer processors, namely, a first processor and a second processor to a shared resource so that only one of the two processors has access to the resource at any one time, the computer programme being substantially as described herein with reference to and as illustrated in the accompanying drawings.
29. A medium comprising a computer programme as claimed in any of Claims 26 to 28.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IE960753A IE960753A1 (en) | 1996-10-29 | 1996-10-29 | A method and apparatus for controlling access by two¹computer processors to a shared resource |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB9716473D0 GB9716473D0 (en) | 1997-10-08 |
| GB2318894A true GB2318894A (en) | 1998-05-06 |
| GB2318894B GB2318894B (en) | 2001-03-07 |
Family
ID=11041290
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9716473A Expired - Fee Related GB2318894B (en) | 1996-10-29 | 1997-08-04 | A method and apparatus for controlling access by two computer processors to a shared resource |
Country Status (2)
| Country | Link |
|---|---|
| GB (1) | GB2318894B (en) |
| IE (1) | IE960753A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2364143A (en) * | 2000-06-30 | 2002-01-16 | Nokia Corp | Resource allocation |
| US20080005794A1 (en) * | 2004-08-25 | 2008-01-03 | Nec Corporation | Information Communication Device and Program Execution Environment Control Method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0032182A1 (en) * | 1979-12-03 | 1981-07-22 | HONEYWELL INFORMATION SYSTEMS ITALIA S.p.A. | Apparatus for accessing to common resources by several processors in a multiprocessor system |
| WO1983004117A1 (en) * | 1982-05-19 | 1983-11-24 | Western Electric Company, Inc. | Shared resource locking apparatus |
| EP0130593A2 (en) * | 1983-07-01 | 1985-01-09 | Bull HN Information Systems Inc. | Shared resource lockout apparatus |
-
1996
- 1996-10-29 IE IE960753A patent/IE960753A1/en not_active IP Right Cessation
-
1997
- 1997-08-04 GB GB9716473A patent/GB2318894B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0032182A1 (en) * | 1979-12-03 | 1981-07-22 | HONEYWELL INFORMATION SYSTEMS ITALIA S.p.A. | Apparatus for accessing to common resources by several processors in a multiprocessor system |
| WO1983004117A1 (en) * | 1982-05-19 | 1983-11-24 | Western Electric Company, Inc. | Shared resource locking apparatus |
| EP0130593A2 (en) * | 1983-07-01 | 1985-01-09 | Bull HN Information Systems Inc. | Shared resource lockout apparatus |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2364143A (en) * | 2000-06-30 | 2002-01-16 | Nokia Corp | Resource allocation |
| US7150020B2 (en) | 2000-06-30 | 2006-12-12 | Nokia Corporation | Resource management |
| US20080005794A1 (en) * | 2004-08-25 | 2008-01-03 | Nec Corporation | Information Communication Device and Program Execution Environment Control Method |
| US8640194B2 (en) * | 2004-08-25 | 2014-01-28 | Nec Corporation | Information communication device and program execution environment control method |
Also Published As
| Publication number | Publication date |
|---|---|
| GB9716473D0 (en) | 1997-10-08 |
| GB2318894B (en) | 2001-03-07 |
| IE960753A1 (en) | 1998-05-06 |
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