GB2572248B - Resource allocation - Google Patents
Resource allocation Download PDFInfo
- Publication number
- GB2572248B GB2572248B GB1901486.9A GB201901486A GB2572248B GB 2572248 B GB2572248 B GB 2572248B GB 201901486 A GB201901486 A GB 201901486A GB 2572248 B GB2572248 B GB 2572248B
- Authority
- GB
- United Kingdom
- Prior art keywords
- resource allocation
- allocation
- resource
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/65—Details of virtual memory and virtual address translation
- G06F2212/657—Virtual address space management
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Multi Processors (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB1901486.9A GB2572248B (en) | 2017-09-15 | 2017-09-15 | Resource allocation |
| GB2001798.4A GB2578998B (en) | 2017-09-15 | 2017-09-15 | Resource allocation |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB1714922.0A GB2566514B (en) | 2017-09-15 | 2017-09-15 | Resource allocation |
| GB1901486.9A GB2572248B (en) | 2017-09-15 | 2017-09-15 | Resource allocation |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB201901486D0 GB201901486D0 (en) | 2019-03-27 |
| GB2572248A GB2572248A (en) | 2019-09-25 |
| GB2572248B true GB2572248B (en) | 2020-04-01 |
Family
ID=65996937
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB1901486.9A Active GB2572248B (en) | 2017-09-15 | 2017-09-15 | Resource allocation |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2572248B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114153753B (en) * | 2021-12-06 | 2024-06-25 | 海光信息技术股份有限公司 | Storage resource allocation method, device and non-transitory storage medium |
| CN114741238B (en) * | 2022-03-10 | 2025-04-04 | 北京和利时系统工程有限公司 | Data consistency method, device and computer readable storage medium |
| CN115562798B (en) * | 2022-06-14 | 2023-11-03 | 澜起电子科技(上海)有限公司 | PCIe device resource dynamic allocation method and system |
| CN118747163B (en) * | 2024-06-25 | 2025-09-23 | 上海壁仞科技股份有限公司 | Processing circuit and method of operation for a processing circuit |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040160449A1 (en) * | 2003-02-18 | 2004-08-19 | Microsoft Corporation | Video memory management |
| US20110087840A1 (en) * | 2009-10-09 | 2011-04-14 | Glasco David B | Efficient line and page organization for compression status bit caching |
| US20140281366A1 (en) * | 2013-03-15 | 2014-09-18 | Cognitive Electronics, Inc. | Address translation in a system using memory striping |
| US20170192901A1 (en) * | 2016-01-05 | 2017-07-06 | Knuedge, Inc. | Disjointed virtual memory scheme with block bypass |
-
2017
- 2017-09-15 GB GB1901486.9A patent/GB2572248B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040160449A1 (en) * | 2003-02-18 | 2004-08-19 | Microsoft Corporation | Video memory management |
| US20110087840A1 (en) * | 2009-10-09 | 2011-04-14 | Glasco David B | Efficient line and page organization for compression status bit caching |
| US20140281366A1 (en) * | 2013-03-15 | 2014-09-18 | Cognitive Electronics, Inc. | Address translation in a system using memory striping |
| US20170192901A1 (en) * | 2016-01-05 | 2017-07-06 | Knuedge, Inc. | Disjointed virtual memory scheme with block bypass |
Also Published As
| Publication number | Publication date |
|---|---|
| GB201901486D0 (en) | 2019-03-27 |
| GB2572248A (en) | 2019-09-25 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) |
Free format text: REGISTERED BETWEEN 20240822 AND 20240828 |