HK1196708A - Light emitting devices having light coupling layers with recessed electrodes - Google Patents

Description

Light emitting device having light coupling layer with recessed electrode

Cross referencing

This application claims priority to U.S. patent application serial No. 13/249,196, filed on 29/9/2011, and is incorporated herein by reference in its entirety.

Background

Lighting applications typically use incandescent or gas filled bulbs. Such bulbs generally do not have a long operating life and therefore require frequent replacement. Gas-filled tubes, such as fluorescent tubes or neon tubes, have a long lifetime but operate using high voltages and are relatively expensive. Further, both the light bulb and the gas-filled lamp consume a large amount of energy.

Light Emitting Diodes (LEDs) are devices that rely on the recombination of electrons and holes to emit light. LEDs typically include a chip of semiconductor material doped with impurities to create a p-n junction. Current flows from the p-side or anode to the n-side or cathode. Charge carriers-electrons and holes-flow into the p-n junction from electrodes having different voltages. When an electron encounters a hole, the electron and hole recombine in a process that can cause energy (hv) to be radiated in the form of photons. Photons or light are emitted from LEDs and are used in various applications, such as lighting applications and electronic applications.

LEDs are relatively inexpensive, operate at low voltages, and have a long operating life compared to incandescent or gas filled bulbs. Furthermore, LEDs consume relatively little power and are compact. These properties make LEDs particularly desirable and well suited for various applications.

Despite these advantages, LEDs come with various limitations. These limitations include material limitations that can limit the efficiency of the LED, structural limitations that can limit the transmission of light generated by the LED out of the device, and manufacturing limitations that can result in high processing costs. Accordingly, there is a need for improved LEDs and methods of manufacturing LEDs.

Disclosure of Invention

In an aspect of the present invention, a light emitting device including a Light Emitting Diode (LED) is provided. In one embodiment, a light emitting device includes a substrate, a p-type group III-V semiconductor layer adjacent to the substrate, an active layer adjacent to the p-type semiconductor layer, and an n-type group III-V semiconductor layer adjacent to the active layer. The light coupling structure adjacent to the n-type group III-V semiconductor layer includes one or more group III-V semiconductor materials. The light coupling structure includes a hole extending to the n-type group III-V semiconductor layer. An electrode formed within the hole is in electrical communication with the n-type group III-V semiconductor layer.

In another embodiment, a light emitting diode includes a substrate and a first layer adjacent to the substrate, the first layer having one of a p-type group III-V semiconductor and an n-type group III-V semiconductor. A second layer adjacent to the first layer includes an active material configured to generate light when an electron recombines with a hole in the active material. A third layer adjacent to the second layer includes the other of the p-type group III-V semiconductor and the n-type group III-V semiconductor. The light coupling structure adjacent to the third layer includes one or more III-V semiconductor materials. The light coupling structure includes an opening extending to the third layer. An electrode located within the opening is in electrical communication (e.g., ohmic contact) with the third layer.

In another embodiment, a light emitting device includes a first layer of a first type of III-V semiconductor material and a second layer adjacent to the first layer. The second layer includes an active material configured to generate light when electrons and holes recombine in the active material. A third layer adjacent to the second layer includes a second type of III-V semiconductor material. The light coupling structure adjacent to the third layer includes a third type of III-V semiconductor material. The light coupling structure includes an opening extending through at least a portion of the light coupling structure. An electrode adjacent the light coupling structure is in electrical communication with one of the first layer and the second layer. In some cases, the third type of III-V semiconductor material is different from the first type of III-V semiconductor material and the second type of III-V semiconductor material.

In other aspects of the invention, methods of forming light emitting devices including light emitting diodes are provided. In one embodiment, a method of forming a light emitting device includes providing an optical coupling structure over a substrate within a reaction chamber (or within a reaction space if the reaction chamber includes a plurality of reaction spaces). The light coupling structure includes an opening that exposes one of an n-type semiconductor layer and a p-type semiconductor layer adjacent to the light coupling structure. The light coupling structure includes a group III-V semiconductor material. An electrode is then formed within the opening, the electrode being in electrical communication with one of the n-type semiconductor layer and the p-type semiconductor layer formed adjacent to the active layer. The active layer is formed adjacent to the other of the n-type semiconductor layer and the p-type semiconductor layer. And the other of the n-type semiconductor layer and the p-type semiconductor layer is formed adjacent to the substrate.

In another embodiment, a method of forming a light emitting device includes providing a substrate having a buffer layer within a reaction chamber; and roughening (roughening) a portion of the buffer layer to form a light coupling layer. The photo-coupling layer is formed adjacent to one of the n-type semiconductor layer and the p-type semiconductor layer adjacent to the active layer. The active layer is formed adjacent to the other of the n-type semiconductor layer and the p-type semiconductor layer. And the other of the n-type semiconductor layer and the p-type semiconductor layer is formed adjacent to the substrate.

In another embodiment, a method of forming a light emitting device includes forming a buffer layer adjacent to a first substrate within a reaction chamber; and forming an n-type group III-V semiconductor layer adjacent to the buffer layer. An active layer is formed adjacent to the n-type group III-V semiconductor layer, and a p-type group III-V semiconductor layer is formed adjacent to the active layer. A second substrate is then provided adjacent to the p-type group III-V semiconductor layer. The first substrate is then removed to expose the buffer layer. A light coupling layer is then formed from the buffer layer. The light coupling layer includes an opening extending to the n-type group III-V semiconductor layer. An electrode is then provided within the opening.

Other aspects and advantages of the present invention will become readily apparent to those skilled in this art from the following detailed description, wherein only exemplary embodiments of the invention are shown and described. As will be realized, the disclosure is capable of other and different embodiments and its several details are capable of modification in various other respects, all without departing from the disclosure. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.

All publications, patents and patent applications mentioned in this specification are herein incorporated by reference to the same extent as if each individual publication, patent or patent application was specifically and individually indicated to be incorporated by reference.

Drawings

A better understanding of the features and advantages of the present invention will be obtained by reference to the following detailed description that sets forth illustrative embodiments, in which the principles of the invention are utilized, and the accompanying drawings of which:

FIG. 1 schematically illustrates a light emitting diode;

fig. 2 schematically illustrates a light emitting device having a light coupling layer according to an embodiment of the present invention;

fig. 3 schematically illustrates a light emitting device having a light coupling structure according to an embodiment of the present invention;

fig. 4 schematically illustrates a light emitting device according to an embodiment of the present invention;

fig. 5 shows a method of forming a light emitting device according to an embodiment of the invention;

6A-6L schematically illustrate a method of forming a light coupling layer and an electrode over an n-type gallium nitride layer according to an embodiment of the invention; and

fig. 7 shows a system for forming a light emitting device according to an embodiment of the invention.

Detailed Description

While various embodiments of the present invention have been shown and described herein, it will be obvious to those skilled in the art that such embodiments are provided by way of example only. Numerous variations, changes, and substitutions will now occur to those skilled in the art without departing from the invention. It should be understood that various modifications to the embodiments of the invention described herein can be used to practice the invention.

The term "light-emitting device" as used in this specification refers to a device that is arranged to generate light upon recombination of electrons and holes within a light-emitting region (or "active layer") of the device, for example upon application (or flow) of a positive bias current through the light-emitting region. In some cases, the light emitting device is a solid state device that converts electrical energy into light. A light emitting diode ("LED") is a light emitting device. There are a variety of different LED device structures made of different materials and having different structures and performed in various ways. Some light emitting devices emit laser light, while others produce non-monochromatic light. Certain LEDs are optimized for performance in a particular application. The LED may be a so-called blue LED including a Multiple Quantum Well (MQW) active layer having indium gallium nitride. The blue LED may emit non-monochromatic light having a wavelength ranging from about 440 nanometers to about 500 nanometers. Phosphor coatings are typically provided to absorb some of the emitted blue light. The phosphor in turn fluoresces to emit light at other wavelengths, so that the light emitted by the overall LED device has a wider range of wavelengths.

The term "layer" as used in this specification refers to a layer of atoms or molecules on a substrate. In some cases, the layer comprises an epitaxially grown layer or a plurality of epitaxially grown layers. The layer may comprise a film or a membrane. In some cases, a layer is a structural component of a device (e.g., a light emitting device) for a predetermined device function, e.g., an active layer is configured to generate (or emit) light. The thickness of a layer is typically from about one single atomic Monolayer (ML) to tens, hundreds, thousands, millions, billions, or more. In an example, the layer is a multilayer structure having a thickness greater than one monoatomic monolayer. Further, a layer may comprise multiple layers (or sub-layers) of material. In an example, a multiple quantum well active layer includes a plurality of well and barrier layers. The layer may comprise a plurality of sub-layers. For example, the active layer may include a barrier sublayer and a well sublayer.

The term "coverage" as used in this specification refers to the fraction of surface covered or occupied by an object relative to the total surface area, for example: a 10% coverage of an item means that 10% of the surface is covered by the item. In some cases, coverage is represented by a single layer (ML), with 1ML corresponding to complete coverage of a surface by a particular object. For example: a pit coverage of 0.1ML indicates that 10% of the surface is covered by pits.

The term "active region" (or "active layer") as used in this specification refers to a light emitting region of a Light Emitting Diode (LED) that is configured to generate light. The active layer includes an active material that generates light by recombination of electrons and holes with the aid of an electrical potential applied across the active layer. The active layer may comprise one or more layers (or sub-layers). In some cases, the active layer includes one or more barrier layers (or cladding layers, such as GaN) and one or more quantum well ("well") layers (such as InGaN). In an example, the active layer includes multiple quantum wells, in which case the active layer may be referred to as a multiple quantum well ("MQW") active layer.

The term "doped" as used in this specification refers to a structure or layer that is chemically doped. The layers may be doped with either an n-type chemical dopant (also referred to herein as "n-doping") or a p-type chemical dopant (also referred to herein as "p-doping"). In some cases, the layers are undoped or unintentionally doped (also referred to herein as "u-doped" or "u-type"). In one example, the u-GaN (or u-type GaN) layer includes undoped or unintentionally doped GaN.

The term "adjacent" or "adjacent to" as used in this specification includes "immediately adjacent", "adjoining", "in contact with" and "beside" thereof. In some examples, adjacent elements are separated from each other by one or more intervening layers. For example: the thickness of the one or more intermediate layers can be less than about 10 micrometers ("microns"), 1 micron, 500 nanometers ("nm"), 100nm, 50nm, 10nm, 1nm, or less. In an example, a first layer is adjacent to a second layer when the first layer is in direct contact with the second layer. In another example, a first layer is adjacent to a second layer when the first layer is separated from the second layer by a third layer.

The term "substrate" as used in this specification refers to any workpiece on which a film or film is desired to be formed. Substrates include, but are not limited to, silicon, germanium, silicon dioxide, sapphire, zinc oxide, carbon (e.g., graphite), SiC, AlN, GaN, spinel (spinel), coated silicon, silicon-on-oxide, silicon carbide-on-oxide, glass, gallium nitride, indium nitride, titanium dioxide and aluminum nitride, ceramic materials (e.g., alumina, AlN), metallic materials (e.g., molybdenum, tungsten, copper, aluminum), and combinations (or alloys) thereof.

The term "III-V semiconductor" as used in this specification refers to a material having one or more group III species (e.g., aluminum, gallium, indium) and one or more group V species (e.g., nitrogen, phosphorus). In some cases, the III-V semiconductor material is selected from gallium nitride (GaN), gallium arsenide (GaAs), aluminum gallium arsenide (AlGaAs), gallium arsenic phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), gallium phosphide (GaP), indium gallium nitride (InGaN), aluminum gallium phosphide (AlGaP), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), and aluminum gallium indium nitride (AlGaInN).

The term "dopant" as used in this specification refers to a chemical dopant, such as an n-type dopant or a p-type dopant. P-type dopants include, but are not limited to, magnesium, beryllium, zinc, and carbon. N-type dopants include, but are not limited to, silicon, germanium, tin, antimony, and selenium. The p-type semiconductor is a semiconductor doped with a p-type dopant, and the n-type semiconductor is a semiconductor doped with an n-type dopant. n-type group III-V materials, such as n-type gallium nitride ("n-GaN"), include group III-V materials doped with n-type dopants. p-type III-V materials, such as p-type GaN ("p-GaN"), include III-V materials doped with p-type dopants. The III-V material includes at least one III-group element selected from boron, aluminum, gallium, indium, and thallium, and at least one V-group element selected from nitrogen, phosphorus, arsenic, antimony, and bismuth.

The term "injection efficiency" used in the present specification refers to a ratio at which electrons passing through the light emitting device are injected into an active region of the light emitting device.

The term "internal quantum efficiency" as used in this specification refers to the proportion of all electron-hole recombination events within the active region of the light emitting device that are radiated (i.e., produce photons).

The term "extraction efficiency" as used in this specification refers to the proportion of photons generated within the active region of a light emitting device that escape the device.

The term "external quantum efficiency" (EQE) as used in this specification refers to the ratio of the number of photons emitted from an LED to the number of electrons passing through the LED. I.e. EQE = injection efficiency x internal quantum efficiency x extraction efficiency.

The term "light coupling structure" as used in this specification refers to a structure arranged to allow light to be transmitted from a first medium to a second medium. The first medium has a first refractive index and the second medium has a second refractive index different from the first refractive index. A light coupling structure (or layer) couples light from the first medium to the second medium.

The term "hole" as used in this specification refers to an opening or bore. In some cases, the holes are recesses. The hole comprises an opening (e.g. a leak, a mouth or a bore) through which an object can pass. In some embodiments, the hole is a recessed region. In some cases, the hole is an etched-back region. The holes may be filled with materials including, but not limited to, metal or semiconductor materials.

While silicon has various advantages, such as the ability to use commercially available semiconductor fabrication techniques suitable for silicon, the formation of III-V semiconductor-based LEDs on silicon substrates has still been subject to various limitations. For example: both the lattice mismatch and the coefficient of thermal expansion mismatch between silicon and gallium nitride can result in structural stresses that produce defects, such as dislocations, during the formation of the gallium nitride film.

LEDs may be formed from various semiconductor device layers. In some cases, III-V semiconductor LEDs provide device parameters (e.g., light wavelength, external quantum efficiency) that are superior to other semiconductor materials. Gallium nitride (GaN) is a binary group III-V direct bandgap (direct bandgap) semiconductor that can be used in optoelectronic applications as well as high power and high frequency devices.

Group III-V semiconductor-based LEDs may be formed on a variety of substrates, such as silicon, germanium, sapphire, or silicon carbide (SiC). Silicon offers various advantages over other substrates, such as the ability to use current process technology, in addition to the use of large size wafers that help maximize the number of LEDs formed in a predetermined period of time. Fig. 1 shows an LED100 having a substrate 105, an AlN layer 110 adjacent the substrate 105, an AlGaN layer 115 adjacent the AlN layer 110, an n-type GaN ("n-GaN") layer 120 adjacent the buffer layer 115, an active layer 125 adjacent the n-GaN layer 120, an electron blocking (e.g., AlGaN) layer 130 adjacent the active layer 125, and a p-type GaN ("p-GaN") layer 135 adjacent the electron blocking layer 130. The electron blocking layer 130 is configured to minimize recombination of electrons and holes within the p-GaN layer 135. In some cases, LED100 includes a u-type GaN ("u-GaN") layer between AlGaN layer 115 and n-GaN layer 120. The u-GaN layer may provide for enhanced coalescence (coalescence) between the AlGaN layer 115 and the n-GaN layer 120. The substrate 100 may be formed of silicon. In some cases, LED100 includes a substrate 140 (substrate 2) adjacent to p-GaN layer 135. In this case, the substrate 105 may be excluded. In some cases, AlGaN layer 110 is part of buffer layer 115.

While silicon provides various advantages, forming III-V semiconductor based LEDs on silicon substrates suffers from various limitations. For example: lattice mismatch and thermal expansion coefficient mismatch between silicon and gallium nitride both create structural stresses that can cause high defect density and cracking problems within the LED device. In an example, for an LED having a GaN epitaxial growth layer (also referred to as an "epitaxial layer") on a silicon substrate, as the GaN epitaxial layer becomes thicker, the stress within the epitaxial layer increases. The increased stress can cause the silicon wafer to bend and crack. The cracking problem is more severe for n-doped silicon GaN layers because of, at least in part, the high tensile strain in the silicon-doped GaN. The thickness of the silicon doped GaN layer may be selected to avoid cracking. Thickness limitations of group III-V semiconductor layers on silicon impose various challenges for forming group III-V semiconductor-based LEDs with desired performance characteristics.

In some cases, the extraction efficiency of the LED device may be improved by means of light from a light coupling layer formed from a portion of the n-type semiconductor layer adjacent to the LED active layer. The light coupling layer couples light generated within the LED active layer from a first medium to a second medium, e.g., from the medium within the LED to the external environment. However, in the case where the photo coupling layer is formed from an n-type semiconductor layer, part of the n-type semiconductor layer is sacrificed for optical extraction, thus reducing the effective thickness of the n-type semiconductor layer for current diffusion. In this case, a thicker n-type semiconductor layer is necessary for sufficient roughening and current diffusion. However, the use of a thick n-type semiconductor layer can make the growth of crack-free device layers difficult.

The structures and methods provided herein advantageously enable the formation of III-V semiconductor-based LED devices on silicon with reduced, if not eliminated cracking, while providing desirable performance characteristics (e.g., external quantum efficiency) for the devices. In some embodiments, a roughened u-type group III-V semiconductor (e.g., u-GaN) layer located over an n-type group III-V semiconductor (e.g., n-GaN) layer is used as the light coupling layer (or light coupling structure). In some cases, a roughened buffer layer is provided over (or adjacent to) the n-type group III-V semiconductor layer. In this case, roughening of the n-type group III-V semiconductor layer may be reduced (if not eliminated) thereby providing optimal current spreading, while advantageously enabling the use of a relatively thin group III-V semiconductor layer thereby helping to avoid cracking.

Light emitting device with light coupling layer

In an aspect of the present invention, a light emitting device includes a substrate, a p-type semiconductor layer adjacent to the substrate, an active layer adjacent to the p-type semiconductor layer, and an n-type semiconductor layer adjacent to the active layer. The light emitting device includes a light coupling structure adjacent to the n-type or p-type semiconductor layer. In some embodiments, at most a portion of the light coupling structure is formed from the n-type or p-type semiconductor layer.

In certain embodiments, the device further comprises an electrode in electrical communication with the n-type or p-type semiconductor layer. In some cases, the electrode is recessed within the optical coupling layer. The electrode can be disposed within a hole (or recess) formed in the optical coupling layer. In one embodiment, the electrode is in contact with (or in electrical contact with) the n-type or p-type semiconductor layer.

In some embodiments, the light coupling structure (or light coupling layer) couples light from a first medium having a first refractive index to a second medium having a second refractive index. The first and second refractive indices may be different. In some cases, the second refractive index is less than the first refractive index.

During operation of the light emitting device, at least some of the light generated within the active layer is directed to the light coupling structure, which scatters the light at various angles, while at least some of the light is directed out of the light emitting device. The light coupling structure can help guide light generated by the active layer of the device.

In some embodiments, the light emitting device has an external quantum efficiency of at least about 40%, or at least about 50%, or at least about 60%, or at least about 65%, or at least about 70%, or at least about 75%, or at least about 80%, or at least about 85%, or at least about 90%, or at least about 95% at a drive current of about 350 mA.

In some cases, the light coupling structure has a corrugated or roughened surface. In some embodiments, the light coupling structure has a first surface (e.g., a top surface) opposite a second surface (e.g., a bottom surface). The corrugations of the first surface are larger than the corrugations of the second surface. The first surface may be in contact with the external environment, such as air or vacuum, or with one or more layers, such as a protective layer.

The n-type and/or p-type semiconductor layers may be formed of a group III-V semiconductor material, such as gallium nitride. The substrate may be formed of silicon. In an embodiment, the thickness of the n-type semiconductor layer is selected to minimize stress caused by lattice mismatch and thermal mismatch between the silicon substrate and the III-V semiconductor. In other cases, however, such as when device formation under induced stress conditions is desired, the thickness of the n-type semiconductor layer is selected to maintain a predetermined stress level.

In some embodiments, a light emitting device includes a first layer of a first type of III-V semiconductor material, a second layer of a second type of III-V semiconductor material, and an active layer between the first layer and the second layer. The light emitting device has a light coupling layer adjacent to the second layer. The optical coupling layer includes a third type of group III-V semiconductor material. In some cases, the third type of III-V semiconductor material is different from the first type of III-V semiconductor material and the second type of III-V semiconductor material. A hole (or recess) formed in the light coupling layer extends through at least a portion of the light coupling layer toward the second layer. In some cases, the hole extends through all or substantially all of the light coupling layer. An electrode formed within the hole provides a current path to the second layer.

In some embodiments, the hole defines a channel within the light coupling layer. The channel extends along some or all of the optical coupling layer. The electrode in this case is formed within the channel and is in electrical communication with the second layer.

In some cases, the first type of group III-V semiconductor material is selected from one of an n-type group III-V semiconductor and a p-type group III-V semiconductor, and the second type of group III-V semiconductor material is selected from the other of the n-type group III-V semiconductor and the p-type group III-V semiconductor. In an example, the first layer is formed of p-GaN and the second layer is formed of n-GaN. In some cases, the third type of III-V semiconductor material includes a u-type III-V semiconductor material, a doped III-V semiconductor material, and/or a III-V semiconductor material that includes aluminum. In one example, the third type of III-V semiconductor material includes u-GaN (i.e., GaN that is undoped or unintentionally doped). In another example, the third type of III-V semiconductor material includes n-GaN or p-GaN. In another example, the third type of group III-V semiconductor material includes AlGaN or AlN.

In some cases, at most a portion of the light coupling layer is formed from an n-type or p-type group III-V semiconductor layer adjacent to the light coupling layer. In one example, an LED includes a substrate and a first layer adjacent to the substrate. The first layer includes one of a p-type group III-V semiconductor and an n-type group III-V semiconductor. The LED includes a second layer adjacent to the first layer. The second layer comprises an active material arranged to generate light by applying a positive bias potential across the second layer. The LED further includes a third layer adjacent to the second layer. The third layer includes the other of the p-type group III-V semiconductor and the n-type group III-V semiconductor. A light coupling structure is disposed adjacent to the third layer. The light coupling structure includes one or more III-V semiconductor materials, such as one or more layers of III-V semiconductor materials. At most a portion of the light coupling structure is formed by the third layer. In one embodiment, some of the light coupling structures are formed from the third layer. In another embodiment, the light coupling structure is not formed from the third layer.

The LED further includes an electrode adjacent to the third layer. The electrode is in electrical communication with the third layer. In some cases, the first layer has a p-type group III-V semiconductor (e.g., p-GaN) and the third layer has an n-type group III-V semiconductor (e.g., n-GaN).

The light coupling structure includes a fourth layer and a fifth layer, where the fourth layer is adjacent to the third layer of LEDs. In some embodiments, the fourth layer includes one or more of an n-type group III-V semiconductor, a u-type group III-V semiconductor, and a group III-V semiconductor including aluminum. In some cases, the fourth layer includes one or more of n-type gallium nitride, u-type gallium nitride, aluminum gallium nitride, and aluminum nitride. In certain embodiments, the fifth layer comprises one or more of a u-type group III-V semiconductor and a group III-V semiconductor comprising aluminum. In some cases, the fifth layer includes one or more of u-type gallium nitride, aluminum gallium nitride, and aluminum nitride. In an example, the fourth layer includes one or more of n-GaN, u-GaN, AlGaN, and AlN, and the fifth layer includes one or more of u-GaN, AlGaN, and AlN.

In some embodiments, the light coupling structure of the LED includes a sixth layer adjacent to the fifth layer. In this case, the fifth layer is located between the fourth layer and the sixth layer. In certain embodiments, the sixth layer comprises a group III-V semiconductor comprising aluminum. In some cases, the group III-V semiconductor containing aluminum is aluminum gallium nitride or aluminum nitride.

The light coupling structure includes a hole extending through the light coupling layer to the third layer. The hole traverses various layers in the light coupling structure, such as the fourth layer and the fifth layer.

In an example, the light emitting device includes a silicon substrate, a p-GaN layer over the silicon substrate, an active layer over the p-GaN layer, an n-GaN layer over the active layer, and a light coupling layer over the n-GaN layer. The optical coupling layer includes AlGaN and/or AlN, and in some cases, u-GaN. The light coupling layer may in some cases comprise n-GaN. For example, the optical coupling layer may include an n-GaN sublayer adjacent to the n-GaN layer, a u-GaN sublayer over the n-GaN sublayer, and an AlGaN or AlN sublayer over the u-GaN sublayer. As another example, the light coupling layer may include an n-GaN sublayer adjacent to the n-GaN layer and an AlGaN or AlN sublayer over the n-GaN sublayer. The light coupling layer includes a hole extending to the n-GaN layer. The device includes an electrode formed within the hole and in electrical contact with the n-GaN layer. In some cases, the electrical contact is an ohmic contact.

The aperture of the light coupling layer may be a channel extending from the top surface of the light coupling layer through at least a portion of the light coupling layer. The channel also extends along the surface of the light coupling layer. In some cases, the electrode formed within the hole is a line extending along at least a portion or substantially all of the hole. The electrode is laterally bounded by the optical coupling layer. In some cases, the electrode is recessed within the optical coupling layer. Alternatively, the hole of the light coupling layer is a via (or through hole) from the top surface of the light coupling layer through at least part of the light coupling layer. In some cases, the hole extends through all or a substantial portion of the light coupling layer.

In some embodiments, the n-type and p-type semiconductor layers are formed of a III-V semiconductor material. In an example, the n-type and p-type semiconductor layers include gallium nitride. In this case, the n-type semiconductor layer includes gallium nitride and an n-type dopant (e.g., silicon), and the p-type semiconductor layer includes gallium nitride and a p-type dopant (e.g., magnesium).

In certain embodiments, the light coupling structures are formed from various combinations of III-V materials. In some embodiments, the light coupling structure includes a first layer (or sublayer) and a second layer adjacent to the first layer. In an example, the first layer includes u-type GaN (u-GaN) and the second layer includes aluminum gallium nitride (AlGaN) or aluminum nitride (AlN). In another example, the first layer comprises AlGaN and the second layer comprises AlN. At least a portion of the light coupling layer may be formed from the n-type semiconductor layer. In another example, the first layer is formed of n-GaN and the second layer is formed of u-GaN, AlGaN, or AlN. In some cases, the optical coupling layer includes a third layer of semiconductor material adjacent to the second layer. In an example, the third layer includes a group III-V semiconductor material, such as AlGaN or AlN.

The light emitting device includes a first electrode in electrical communication with the n-type semiconductor layer, and a second electrode in electrical communication with the p-type semiconductor layer. In some cases, the first electrode is adjacent to the photo-coupling layer and the second electrode is adjacent to the substrate. The first electrode may include one or more of titanium, aluminum, nickel, platinum, gold, silver, rhodium, copper, and chromium. The second electrode may include one or more of aluminum, titanium, chromium, platinum, nickel, gold, rhodium, and silver. In some cases, the second electrode is formed from one or more of platinum, nickel, silver, rhodium, and gold.

In some embodiments, the first electrode covers a portion of the n-type semiconductor layer. The shape and distribution of the first electrode may be selected to minimize obstruction of light emitted from the light emitting device by the first electrode. In some cases, the first electrode is recessed within the optical coupling layer.

In some cases, the light coupling layer (or structure) is a roughened layer, such as a roughened layer of a buffer material. In one embodiment, the thickness of the light coupling layer is between about 10nm and 3 microns, between about 100nm and 2 microns, or between about 200nm and 1.5 microns. In another embodiment, the bottom (or floor) of the hole may have a corrugation of between about 1nm and 500nm or between about 10nm and 100 nm.

In some embodiments, the light coupling layer is a roughened layer. In some cases, the roughened layer has protrusions. In some embodiments, the light coupling layer has roughness (or corrugations) between about 10 nanometers (nm) and 3 microns, between about 100nm and 2 microns, or between about 200nm and 1.5 microns. In other embodiments, the light coupling layer has corrugations that are greater than or equal to about 10nm, or greater than or equal to about 50nm, or greater than or equal to about 100nm, greater than or equal to about 200nm, or greater than or equal to about 300nm, or greater than or equal to about 400nm, or greater than or equal to about 500nm, or greater than or equal to about 1000 nm.

In some embodiments, the light coupling layer has protrusions (e.g., heights) with dimensions between about 10 nanometers (nm) and 3 microns, between about 100nm and 2 microns, or between about 200nm and 1.5 microns. In other embodiments, the light coupling layer has protrusions with dimensions greater than or equal to about 10nm, or greater than or equal to about 50nm, or greater than or equal to about 100nm, or greater than or equal to about 200nm, or greater than or equal to about 300nm, or greater than or equal to about 400nm, or greater than or equal to about 500nm, or greater than or equal to about 1000 nm.

The hole (or recess) exposes a portion of the optical coupling layer or a layer (e.g., the n-type semiconductor layer) underlying the optical coupling layer. In some cases, the exposed portion has a corrugation that is smaller than a corrugation of the light coupling layer. In certain embodiments, the exposed portion has a corrugation of less than or equal to about 500 nanometers (nm), less than or equal to about 300nm, less than or equal to about 200nm, or less than or equal to about 100 nm. The exposed portion may have a corrugation of between about 1nm and 500nm or between about 10nm and 100 nm.

The corrugation or surface roughness of the light-coupling layer and the depressed surface of the hole (i.e. the bottom of the hole) can be measured by means of various surface spectroscopic tools, such as Scanning Tunneling Microscopy (STM), Atomic Force Microscopy (AFM) or various surface scattering techniques, such as raman spectroscopy. The corrugations may correspond to half the height of the light coupling layer (e.g., pit-to-peak distance).

In some cases, the aperture includes one or more sidewalls and a floor. In some cases, the aperture is box-shaped or rectangular. In other cases, the aperture is semi-circular or semi-elliptical. In this case, the hole does not have a floor. The aperture may be a line (along the surface of the light coupling layer) having a first dimension that is longer than a second dimension perpendicular thereto. Alternatively, the first and second dimensions may be substantially the same. In this case, the hole may be a via type structure.

In some cases, the optical coupling layer includes one or more light coupling bodies (light coupling moieties) disposed at a surface of the optical coupling layer. In some embodiments, the light coupling body is a protrusion. The optical coupling body may be formed of a diffusive optical transport material. In some embodiments, the individual light coupling bodies of the light coupling body may be two-dimensional or three-dimensional, such as three-dimensional cones or corners, or lines having a two-dimensional geometric profile. The individual optical couplers may have a reduced width along an axis oriented away from the active layer. In one embodiment, the individual optical couplers have a triangular cross-section. In another embodiment, the individual light coupling body is pyramidal or substantially pyramidal. In other cases, the individual optical couplers have a substantially constant width along an axis oriented away from the active layer. In one embodiment, the individual optical couplers have a square or rectangular cross-section. In an example, the individual optical coupling body is rod-shaped. The corrugations at the surface of the optical coupling layer may be selected to optimize the coupling of light from the first medium to the second medium. The first medium may be inside the light emitting device and the second medium may be outside the light emitting device.

In certain embodiments, the substrate comprises one or more of silicon, germanium, silicon oxide, silicon dioxide, titanium oxide, titanium dioxide and sapphire, silicon carbide, alumina, aluminum nitride, copper, tungsten, molybdenum, and combinations thereof. In a particular embodiment, the substrate is silicon, such as p-type silicon.

In some cases, the light emitting device further includes an optical reflector between the substrate and the p-type semiconductor layer. The optical reflector may be formed of silver, platinum, gold, and one or more of nickel, rhodium, and indium.

In certain embodiments, the active layer includes an active material having a group III-V semiconductor. In some cases, the active material is a quantum well active material, such as a Multiple Quantum Well (MQW) material. In an embodiment, the active material comprises alternating well layers (or sub-layers) and barrier (or cladding) layers. In an example, the active layer includes a well layer formed of indium gallium nitride and/or indium aluminum gallium nitride. In this case, the barrier layer may be formed of gallium nitride. In another example, the active layer includes a well layer formed of aluminum gallium nitride. In this case, the barrier layer may be formed of aluminum nitride or gallium nitride. The active material of the active layer may be compositionally graded (also referred to as "graded" within this specification) with two or more elements. In an example, the active layer includes graded indium gallium nitride In_xGa_1-xN, where "x" is a number between 0 and 1, and the barrier (or cladding) layer is formed of GaN. The composition of such a layer may vary from the first side to the second side of the active layer. In some cases, the well layer includes an acceptor material, and/or the barrier layer includes a donor material. In some embodiments, the barrier material comprises one or more of gallium nitride, indium gallium nitride, and aluminum nitride, and the well material comprises one or more of indium gallium nitride, indium aluminum gallium nitride.

Alternatively, the active layer may be formed of AlGaInP. In some cases, the AlGaInP-containing quantum well active layer includes one or more well layers formed of AlGaInP and one or more barrier layers formed of AlInP.

In other embodiments, the light emitting device includes a light coupling structure adjacent to the p-type semiconductor layer. In an example, a light emitting device includes a substrate, a first layer having an n-type group III-V semiconductor adjacent to the substrate, an active layer adjacent to the first layer, a second layer having a p-type group III-V semiconductor adjacent to the active layer, and a light coupling structure adjacent to the second layer. The n-type and p-type group III-V semiconductors may be formed from gallium nitride. The substrate may be formed of silicon. The light coupling structure may include a single layer or multiple layers.

The light coupling structure includes a hole extending at least partially through the light coupling structure. In some cases, the hole (e.g., channel) extends through all of the light coupling layer. The light emitting device includes a first electrode in electrical communication with the second layer, for example, using a doped layer in direct contact with the second layer, or between the electrode and the second layer. In other cases, the hole extends through the light coupling structure to the top surface of the second layer. In this case, the hole portion is defined by the top surface of the second layer. The light emitting device includes a second electrode in electrical communication with the first layer.

Fig. 2 shows a light emitting device 200 according to an embodiment of the present invention. The device 200 may be a Light Emitting Diode (LED), such as a vertically stacked LED. The device 200 includes (bottom-up) a bottom electrode 205, a substrate 210, an optically reflective layer 215, a p-type semiconductor layer 220, an active layer 225, an n-type semiconductor layer 230, a photo-coupling layer 235, and a top electrode 240. Arrows within device 200 indicate the direction of current flow when a potential is applied across electrodes 205 and 240. The top electrode 240 is formed within a hole 245 formed in the optical coupling layer 235. The electrode 240 is in contact with the n-type semiconductor layer 230 at the surface 250 of the n-type semiconductor layer 230.

The active layer 225 may be a quantum well active layer having a well layer and a barrier layer, or a Multiple Quantum Well (MQW) active layer having a plurality of well layers and barrier layers. In an example, the active layer 225 is formed of alternating GaN barrier layers and indium gallium nitride well layers or indium aluminum gallium nitride well layers. The active layer 225 is configured to generate light when electrons and holes recombine within the active layer 225.

The optical coupling layer 235 is configured to couple light generated within the device 200 and emit the light from the n-type semiconductor layer 230 to an environment outside the device 200 or to another layer above the optical coupling layer 235. In one embodiment, the light coupling layer 235 helps light to transmit from the n-type semiconductor layer 230 having a first refractive index to a material or environment having a second refractive index (which is lower than the first refractive index).

The optically reflective layer 215 is formed of a material that is configured to reflect light generated within the active layer 225 toward the light coupling layer 235. With the help of the optically reflective layer 215, light rays that are initially generated within the active layer 225 and directed towards the substrate 210 are reflected by the optically reflective layer 215 towards the active layer 225 and the light coupling layer 235. In some cases, optically reflective layer 215 is formed from a reflective p-type electrode. In other cases, the optically reflective layer is formed from silver, platinum, gold, nickel, aluminum, rhodium, and indium. In some cases, the optically reflective layer 215 is an omnidirectional reflector.

The device 200 may include one or more additional layers. For example, the device 200 may include a pit generation layer (pit generation layer) interposed between the n-type semiconductor layer 230 and the active layer 225, which is configured to promote the formation of V pits (or V defects) within the active layer 225. In an embodiment, the device 200 includes an electron blocking layer interposed between the p-type semiconductor layer 220 and the active layer 225, the electron blocking layer configured to minimize electron-hole recombination within the p-type semiconductor layer 220.

In some cases, n-type semiconductor layer 230 is formed of an n-type group III-V semiconductor, such as n-type gallium nitride. In some cases, the p-type semiconductor layer 220 is formed of a p-type group III-V semiconductor, such as p-type gallium nitride. In an example, the n-type semiconductor layer 230 is n-doped by means of silicon. In another example, the p-type semiconductor layer 220 is p-type doped with magnesium.

In some embodiments, the optical coupling layer 235 is formed of one or more semiconductor materials. In some cases, the light coupling layer 235 is formed from a buffer layer material. The optical coupling layer 235 may be compositionally graded between a first semiconductor material and a second semiconductor material, such as between a first III-V semiconductor and a second III-V semiconductor. Alternatively, the optical coupling layer 235 includes one or more discrete layers of compositionally graded.

In some cases, the light coupling layer (or structure) 235 includes a material having M1 in general_xM2_1-xC_yMultiple sublayers (or) of materials of formulaLayer) where "M1" and "M2" are group III materials and "C" is a group V material. In some cases, the optical coupling layer 235 includes a plurality of layers selected from Al_xGa_1-xN, where "x" is a number between 0 and 1. For example, the optical coupling layer 235 may include one or more materials selected from the group consisting of AlN, AlGaN, and u-type GaN. In an example, the photo coupling layer 235 includes a u-type GaN layer (i.e., a layer having u-GaN) and an AlGaN layer (i.e., a layer having AlGaN). In another example, the photo coupling layer 235 includes a u-type GaN layer, an AlGaN layer, and an AlN layer (i.e., is a layer having AlN). In another example, the photo coupling layer 235 includes an n-GaN layer, an AlGaN layer, and an AlN layer. In another example, the optical coupling layer 235 includes an n-GaN layer and an AlGaN layer. The optical coupling layer 235 may also include an AlN layer. In another example, the optical coupling layer 235 includes a u-GaN layer and an AlGaN layer. The optical coupling layer 235 also includes an AlN layer. In some cases, the u-GaN layer is optional.

In some cases, the light coupling layer 235 is formed of a u-type semiconductor material. In an embodiment, the optical coupling layer 235 is formed of a u-type group III-V semiconductor, such as u-type gallium nitride (u-GaN). The optical coupling layer 235 may comprise a layer of semiconductor material, such as a group III-V semiconductor material (e.g., AlGaN), on top of the u-type semiconductor material. In some embodiments, the optical coupling layer 235 includes a layer of n-type semiconductor material (e.g., n-GaN) and a layer of u-type semiconductor material. The n-type semiconductor material layer may be formed from a portion of the n-type group III-V semiconductor layer 230.

In some cases, the optical coupling layer 235 is formed of an aluminum-containing group III-V semiconductor material (e.g., AlGaN). In some cases, the optical coupling layer 235 includes additional III-V semiconductor layers. In an example, the optical coupling layer includes an AlGaN layer and an AlN layer. The AlGaN layer is disposed beside the n-type semiconductor layer 230. In some embodiments, the optical coupling layer 235 includes a layer of n-type semiconductor material and one or more aluminum-containing layers, such as an AlGaN layer and/or an AlN layer, adjacent to the layer of n-type semiconductor material. In some cases, the n-type semiconductor material layer is formed from a portion of the n-type group III-V semiconductor layer 230. The optical coupling layer 235 may include a u-type group III-V semiconductor layer (e.g., u-GaN) between the n-type semiconductor layer 230 and the one or more aluminum-containing layers.

The bottom electrode 205 is formed adjacent to the substrate 210. The bottom electrode 205 is in electrical communication with the p-type semiconductor layer 220 through the substrate and the optically reflective layer 215. In some cases, the device 200 includes one or more additional layers between the bottom electrode 205 and the substrate 210.

The top electrode 240 is formed in the hole 245. The top electrode 240 is in electrical communication with the n-type semiconductor layer 230. As illustrated, the top electrode 240 is in contact with the n-type semiconductor layer 230. In some cases, the contact is an ohmic contact. In some cases, the device 200 includes one or more additional layers between the top electrode 240 and the n-type semiconductor layer 230.

Alternatively, the p-type semiconductor layer 220 and the n-type semiconductor layer 230 may be reversed. That is, the photo coupling layer 235 is adjacent to the p-type semiconductor layer, and the n-type semiconductor layer is disposed between the substrate 210 and the active layer 225.

Fig. 3 shows a light emitting device 300 according to an embodiment of the present invention. Device 300 includes a (bottom-up) semiconductor layer 305, a light coupling layer (or structure) 310, and an electrode 315. The optical coupling layer 310 includes a first layer (or sublayer) 320 and a second layer (or sublayer) 325. The light coupling layer 310 includes a light coupling body 330. The electrode 315 is formed within a hole (or opening) 335 of the optical coupling layer 310. The electrode 315 is in contact with the semiconductor layer 305.

In an embodiment, the semiconductor layer 305 is formed of an n-type semiconductor. In another embodiment, the semiconductor layer 305 is formed of a p-type semiconductor. In some cases, the semiconductor layer 305 is formed of an n-type or p-type group III-V semiconductor. In one example, semiconductor layer 305 is formed of n-GaN.

The first layer 320 is formed of a semiconductor material. In some cases, the first layer is formed of an n-type or p-type semiconductor material. The first layer 320 is formed of a III-V semiconductor. By way of example, the first layer is formed of n-GaN. As another example, the first layer 320 is formed of u-type GaN. As another example, the first layer 320 is formed of p-GaN. As another example, the first layer 320 is formed of an aluminum-containing group III-V semiconductor material, such as AlGaN. In one embodiment, the first layer 320 is formed from a portion of the semiconductor layer 305.

In some embodiments, the second layer 325 is formed of a semiconductor material. In some cases, second layer 325 is formed of a III-V semiconductor. In one example, the second layer 325 is formed of gallium nitride, such as u-type GaN. In other examples, the second layer 325 is formed from an aluminum-containing group III-V semiconductor, such as aluminum gallium nitride or aluminum nitride.

The light coupling structure 310 can include a third layer adjacent to the second layer 325. The third layer may comprise a group III-V semiconductor, such as an aluminum-containing group III-V semiconductor (e.g., AlGaN or AlN).

The electrode 315 is formed from one or more elemental metals. In some embodiments, the electrode 315 may be formed of one or more of titanium, aluminum, nickel, platinum, gold, silver, rhodium, copper, and chromium.

In certain embodiments, first layer 320 is formed of a first III-V semiconductor and second layer 325 is formed of a second III-V semiconductor.

In some cases, the light coupling layer 310 is formed from a single layer of a group III-V semiconductor, such as a single layer of a u-type group III-V semiconductor, an n-type or p-type group III-V semiconductor, or an aluminum-containing group III-V semiconductor.

In one example, the first layer 320 is formed of u-GaN and the second layer 325 is formed of AlGaN or AlN. In some cases, the optical coupling layer 310 includes a third layer over the second layer 325. The third layer may be formed of AlGaN or AlN. As another example, the first layer 320 is formed of n-GaN (e.g., silicon-doped GaN) and the second layer 325 is formed of u-GaN, AlGaN, or AlN. Such a configuration may be useful in cases where semiconductor layer 305 is formed of n-GaN (e.g., silicon-doped GaN). As another example, the first layer 320 is formed of n-GaN, the second layer 325 is formed of AlGaN, and the third layer (not shown) is formed of AlN. As another example, the first layer 320 is formed of n-GaN; the second layer 325 is formed of one of u-GaN, AlGaN, and AlN; and the third layer is formed of the other of u-GaN, AlGaN, and AlN. As another example, the light coupling layer 310 is formed of a single layer having u-GaN, AlGaN, or AlN.

In some cases, the light coupling layer 310 is formed from a buffer layer material used to form the device 300. In some cases, the buffer layer material includes one or more group III-V semiconductor materials, such as one or more of u-GaN, AlGaN, and AlN. The light coupling layer 310 may be formed by roughening a buffer layer from a previous processing operation (see below).

The light coupling layer 310 may be formed of 1, or 2, or 3, or 4, or 5, or 6, or 7, or 8, or 9, or 10 or more layers. For example, the optical coupling layer 310 includes a u-GaN, aluminum gallium nitride (AlGaN), or aluminum nitride (AlN) layer, and no other layer. As another example, the light coupling layer 310 is formed of a u-GaN layer and an AlGaN (or AlN) layer. As another example, the light coupling layer 310 is formed of an n-GaN layer and a u-GaN, AlGaN, or AlN layer. As another example, the light coupling layer 310 is formed of an AlGaN layer and an AlN layer. As another example, the light coupling layer 310 is formed of an n-GaN layer, an AlGaN layer, and an AlN layer. The light coupling layer 310 may include an optional u-GaN layer.

In certain embodiments, the optical coupling body 330 is two-dimensional or three-dimensional. In some cases, optical coupling body 330 is a straight line with a triangular cross-section (e.g., pointing into the plane of the page). Alternatively, the optical coupling body 330 may have a square or rectangular cross-section. In other cases, the optical coupling body 330 is three-dimensional. In this case, the optical coupling body 330 can be conical or pyramidal in shape. Alternatively, the optical coupling body 330 may be rod-shaped.

In certain embodiments, the device 300 includes one or more additional layers. In an example, the device 300 includes an active layer underlying the semiconductor layer 305, and another semiconductor layer 305 underlying the active layer. The active layer is configured such that electrons and holes, when recombined within the active layer, generate light. Some of the light generated within the active layer is directed toward the light coupling layer 310, and the light coupling layer 310 scatters light at various angles, while at least some of the light is directed out of the device 300. Thus, the light coupling layer 310 may increase the fraction of light generated by the device 300 that is directed out of the device.

In certain embodiments, the light coupling layer 310 has corrugations between about 10nm and 3 microns, between about 100nm and 2 microns, or between about 200nm and 1.5 microns. In some cases, the optical coupling layer 310 has corrugations that are less than 0.5 microns. The fold corresponds to the distance between the highest point of the individual optical coupler and the lowest point of the individual optical coupler, such as illustrated by "D" in FIG. 3. The electrode 315 has a height (H) greater than D. In other cases, the electrode 315 has a height less than or equal to D.

The electrode 315 is located within the cavity (or hole) 335 and contacts the semiconductor layer 305 at a surface 340 of the semiconductor layer 305. This configuration provides a current path from the semiconductor 305 to the electrode 315. The contact between the electrode 315 and the semiconductor layer 305 may be ohmic, helping to maximize the efficiency of extracting electrons from the device 300.

In some embodiments, the bottom (or floor) 340 of the hole 335 may have a corrugation of between about 1nm and 500nm or between about 10nm and 100 nm. In some cases, the bottom 340 has a corrugation of less than about 0.5 microns, 0.1 microns, or 0.01 microns. The corrugation of the bottom 340 is smaller than the corrugation of the light coupling layer 310.

In certain embodiments, the light coupling layer 310 couples light from a first medium having a first refractive index to a second medium having a second refractive index. In an embodiment, light coupling layer 310 (including light coupling body 330) couples light from a medium inside device 300 (e.g., semiconductor layer 305) to a medium above light coupling layer 310 (e.g., outside device 300).

In an example, a light emitting device includes a III-V semiconductor located over a silicon substrate. In accordance with an embodiment of the present invention, fig. 4 shows a light emitting device 400, the light emitting device 400 having (bottom-up) a contact layer 405, a substrate 410, a reflective layer 415, a p-type group III-V semiconductor layer 420, an active layer 425, an n-type group III-V semiconductor layer 430, a light coupling layer 435, and an electrode 440. Contact layer 405 may be used TO provide electrical contact between device 400 and a package substrate, such as a Transistor Outline (TO) header or a metal matrix printed circuit board (MCPCB). The light coupling layer 435 includes a portion of the material of the n-type group III-V semiconductor layer 430. In some cases, however, the light coupling layer 435 does not comprise a portion of the material of the n-type group III-V semiconductor layer 430. The electrode may be formed by a reflective n-type electrode. Electrode 440 is recessed within optical coupling layer 435. In some cases, the electrode 440 is formed within a hole (or cavity) formed within the optical coupling layer 435. The electrode 440 is in electrical communication with the n-type group III-V semiconductor layer 430. In some cases, electrode 440 is in ohmic contact with the n-type group III-V semiconductor layer.

The substrate 410 may be formed of silicon, germanium, silicon oxide, silicon dioxide, titanium oxide, titanium dioxide, or sapphire. In some cases, substrate 410 may be made of silicon, germanium, or other semiconductor, ceramic (e.g., Al)₂O₃Aluminum nitride, magnesium oxide) material or metal (e.g., molybdenum, tungsten, copper, aluminum).

The reflective layer 415 is formed of a material that is configured to reflect light. In an embodiment, the reflective layer 415 is formed of silver.

In some cases, p-type group III-V semiconductor layer 420 is formed of p-type GaN. In an embodiment, p-type doping is achieved with magnesium, although other p-type dopants may be used as desired to achieve desired device performance. The p-type group III-V semiconductor layer 420 has a thickness between about 10 nanometers (nm) and 1000nm or between about 50nm and 500 nm.

The active layer 425 may be a quantum well active layer. In certain embodiments, the active layer 425 is a multiple quantum well active layer comprising a plurality of interleaved well layers and barrier layers. In some cases, active layer 425 includes a GaN barrier layer and an indium gallium nitride well layer or an indium aluminum gallium nitride well layer.

In some embodiments, the n-type group III-V semiconductor layer 430 is formed of n-type GaN. In an embodiment, n-type doping is achieved with silicon, although other n-type dopants may be used as desired to achieve desired device performance. The n-type group III-V semiconductor layer 430 has a thickness between about 500nm and 5 microns or between about 1 micron and 3 microns. In some cases, the n-type group III-V semiconductor layer 430 has a thickness less than or equal to 5 microns, or less than or equal to 4 microns, or less than or equal to 3 microns, less than or equal to 2 microns, or less than or equal to 1 micron.

In certain embodiments, the optical coupling layer 435 has corrugations between about 10nm and 3 microns, between about 100nm and 2 microns, or between about 200nm and 1.5 microns. The corrugations may be selected to achieve desired device performance. An electrode 440 is located on a surface of the n-type group III-V semiconductor layer 430. The corrugations of the surface are between about 1nm and 500nm or between about 10nm and 100 nm.

In some cases, contact layer 405 is in electrical communication with substrate 410 and p-type group III-V semiconductor layer 420. The contact layer 405 may be in ohmic contact with the substrate 410. Device 400 includes another electrode in electrical communication with n-type group III-V semiconductor layer 430. The other electrode may be provided by a hole or via extending from the top surface (at or beside the light coupling layer 435) to the n-type group III-V semiconductor layer 430.

As illustrated, the optical coupling layer 435 is formed from a layer of aluminum gallium nitride or aluminum nitride. In some cases, the optical coupling layer 435 includes a u-type GaN layer plus an AlGaN or AlN layer. In some cases, the light coupling layer 435 includes a u-GaN layer between the n-type group III-V semiconductor layer 430 and the AlGaN or AlN layer.

In an example, the optical coupling layer 435 is formed of an AlGaN layer. In other examples, the optical coupling layer 435 is formed from an AlN layer. In another example, the photo coupling layer 435 is formed of an AlGaN layer over the n-type group III-V semiconductor layer 430 and an AlN layer over the AlGaN layer. In another example, the optical coupling layer 435 is formed of a u-GaN layer over the n-type group III-V semiconductor layer 430 and an AlGaN layer over the u-GaN layer. In this case, the optical coupling layer 435 may include an AlN layer over the AlGaN layer.

Method for forming optical coupling layer

In another aspect of the present invention, a method of forming a light coupling layer (or structure) is provided. The methods provided herein can be used to form an optocoupler device for use with a light emitting device, such as a Light Emitting Diode (LED). In particular embodiments, the methods provided herein are used to form a light coupling layer for use with an LED having a group III-V semiconductor on a silicon substrate.

In some embodiments, a method of forming a light emitting device includes providing a substrate within a reaction chamber and forming one or more device layers on the substrate. In some cases, the light emitting device is formed on a substrate that will be included in the final light emitting device product. In other cases, the substrate is a carrier substrate and the stack of device structures formed on the substrate will be converted to other substrates to be included in the end product. In this case, the carrier substrate will not be included in the end product. In certain embodiments, the substrate comprises one or more of silicon, germanium, silicon oxide, silicon dioxide, titanium oxide, titanium dioxide, SiC, or sapphire. In a particular implementation, the substrate is silicon, such as n-type silicon.

The reaction chamber may be a vacuum chamber configured for film formation. In some cases, the vacuum chamber is an Ultra High Vacuum (UHV) chamber. In situations where a low pressure environment is desired, the reaction chamber may be evacuated by means of a pumping system having one or more vacuum pumps, such as one or more turbomolecular ("turbo") pumps, as well as diffusion and mechanical pumps. The reaction chamber can include a control system for regulating precursor flow rates, substrate temperature, chamber pressure, and evacuation of the chamber.

The growth conditions may be adjusted based on the selection of one or more processing parameters used to form the light emitting device. In certain embodiments, the growth conditions are selected from one or more of a growth temperature, a carrier gas flow rate, a precursor flow rate, a growth rate, and a growth pressure.

Various source gases (or precursors) may be used in the methods described within this specification. Gallium precursors include one or more of trimethyl gallium (TMG), triethyl gallium (di-ethyl gallium) chloride, diethyl gallium chloride (di-ethyl gallium chloride), and coordinated gallium hydride compounds (e.g., dimethyl gallium chloride). The aluminum precursor may include one or more of Triisobutylaluminum (TIBAL), Trimethylaluminum (TMA), Triethylaluminum (TEA), and dimethylaluminum hydride (DMAH). The indium precursor may include one or more of Trimethylindium (TMI) and Triethylindium (TEI). The nitrogen precursor may include ammonia (NH)₃) Nitrogen (N)₂) And plasma-excited ammonia and/or N₂One or more of (a). The p-type dopant precursor may include a boron precursor (e.g., B)₂H₆) One or more of magnesium precursor(s) (e.g., biscyclopentadienyl magnesium), aluminum precursor(s), to name a few. The n-type precursor may include a silicon precursor (e.g., SiH)₄) Germanium precursors (e.g., tetramethylgermanium), tetraethylgermanium, dimethylaminomethylgermanium tetrachloride, isobutylgermanium) and phosphorus precursors (e.g., PH)₃) To name a few.

In some cases, by including He, Ar, N₂And H₂To provide one or more precursors within the reaction chamber. In an embodiment, the flow rate of the carrier gas during the formation of the active layer is approximately 1 liter per minute and 20 liters per minute.

Fig. 5 shows a method 500 of forming a light emitting device according to some embodiments of the invention. In some cases, the first substrate is selected from the group consisting of silicon, germanium, silicon oxide, silicon dioxide, titanium oxide, titanium dioxide, sapphire, silicon carbide (SiC), ceramic materials (e.g., aluminum, AlN), and metallic materials (e.g., molybdenum, tungsten, copper, aluminum). In one embodiment, the first substrate is silicon.

In a first step 505, the first substrate is provided within the reaction chamber, and a buffer layer is formed beside the first substrate. The buffer layer is formed by introducing one or more precursors of the buffer layer into the reaction chamber and exposing the substrate to the one or more precursors. In certain embodiments, the buffer layer is formed of a III-V semiconductor material. In some cases, the buffer layer is formed from a stack having an AlGaN layer and an AlN layer, wherein the AlN layer is directly adjacent to the first substrate. In this case, the AlN layer is formed by introducing an aluminum precursor and a nitrogen precursor into the reaction chamber, and the AlGaN layer is formed by introducing an aluminum precursor, a gallium precursor, and a nitrogen precursor into the reaction chamber. The aluminum precursor may be TMA, the gallium precursor may be TMG, and the nitrogen precursor may be NH₃. In some cases, the buffer layer includes a u-type GaN layer adjacent to the AlGaN layer. The u-GaN layer is formed by directing a gallium precursor and a nitrogen precursor into the reaction chamber.

Next, in step 510, an n-type III-V semiconductor layer is formed adjacent to the buffer layer. The n-type group III-V semiconductor layer is formed by introducing a group III precursor, a group V precursor, and a precursor of an n-type dopant into the reaction chamber. In an example, where the n-type group III-V semiconductor layer includes n-GaN, the n-GaN layer is formed by introducing a gallium precursor, a nitrogen precursor, and a precursor of the n-type dopant into the reaction chamber. In the case where the n-type dopant is silicon, the precursor of the n-type dopant may be Silane (SiH)₄）。

Next, in step 515, an active layer is formed adjacent to the n-type III-V semiconductor layer. In certain embodiments, the active layer comprises a quantum well material, such as a Multiple Quantum Well (MQW) material. The active layer is formed by forming one or more well layers interleaved with one or more barrier layers. In an example, the active layer includes a GaN (or AlN) barrier layer and an indium gallium nitride or indium aluminum gallium nitride well layer. In this case, the active layer is formed by introducing a gallium (or aluminum) precursor and a nitrogen precursor into the reaction chamber to form a barrier layer, and then introducing an indium precursor, a gallium precursor, and a nitrogen precursor (and an aluminum precursor if an aluminum indium gallium well nitride layer is required) to form a well layer. These operations may be repeated as desired to form an active layer having a predetermined number of stacks (or periods) of barrier layers and well layers. In an example, these operations are repeated until an active layer having at least 1 cycle, at least 10 cycles, at least 20 cycles, at least 50 cycles, or at least 100 cycles is formed.

Next, in step 520, a p-type III-V semiconductor layer is formed adjacent to the active layer. The p-type group III-V semiconductor layer is formed by introducing a group III precursor, a group V precursor, and a precursor of a p-type dopant into the reaction chamber. In an example, in the case where the p-type group III-V semiconductor layer includes p-GaN, the p-GaN layer is formed by introducing a gallium precursor, a nitrogen precursor, and a precursor of the p-type dopant, for example, biscyclopentadienyl magnesium (biscyclopentadienyl magnesium) for a magnesium dopant, into the reaction chamber. In some cases, a layer of reflective material (e.g., Ag) is formed on the p-type group III-V semiconductor subsequent to the formation of the p-type group III-V semiconductor. A protective metal layer is then formed over the layer of reflective material. In some cases, the protective metal layer includes one or more of gold, platinum, titanium, tungsten, nickel. The protective metal layer may be formed by various deposition means, such as physical vapor deposition (e.g., magnetron sputtering).

Next, in step 525, a second substrate is provided adjacent to the p-type III-V semiconductor layer. In some cases, the second substrate is selected from the group consisting of silicon, germanium, silicon oxide, silicon dioxide, titanium oxide, titanium dioxide, sapphire, silicon carbide (SiC), ceramic materials (e.g., aluminum, AlN), and metallic materials (e.g., molybdenum, tungsten, copper, aluminum). In some cases, the second substrate is provided adjacent to the p-type group III-V semiconductor layer by contacting the second substrate with the p-type group III-V semiconductor layer. In other cases, a metal material is formed over the second substrate to help bond the second substrate to the initial (nascent) light emitting diode (i.e., the device stack including the p-type III-V semiconductor layer on the first substrate). In an embodiment, the metallic material comprises one or more metals selected from indium, copper, silver, gold and tin, such as a silver tin copper alloy or a gold tin alloy (e.g. 80% gold, 20% tin). The metallic material layer may be formed by various deposition means, such as physical vapor deposition (e.g., magnetron sputtering, evaporation deposition). Next, in step 530, the first substrate is removed to expose the buffer layer.

Next, in step 535, an optical coupling layer is formed from the buffer layer, and in some cases the n-type III-V semiconductor layer. The light coupling layer is formed with an opening (or hole) extending through at least a portion of the buffer layer. In some embodiments, the light coupling layer is formed by roughening the buffer layer.

Next, in step 540, an electrode is provided within the opening. In an embodiment, the electrode is formed by means of a physical vapor deposition technique, such as sputtering. The electrode is in electrical communication with the n-type group III-V semiconductor layer. In an example, the electrode is in electrical contact with the n-type group III-V semiconductor layer.

In some cases, at least a portion of the n-type group III-V semiconductor layer is roughened while the remaining portion (e.g., the portion of the n-type group III-V semiconductor layer within the hole) is not roughened.

During one or more steps of method 500, the substrate is heated to facilitate forming the light emitting device. In an example, during formation of the active layer (step 515), the substrate is heated at a temperature between about 750 ℃ and 850 ℃.

Fig. 6A-6L schematically illustrate a method for forming a light coupling layer according to an embodiment of the invention. Fig. 6A shows a light emitting device 600 having an n-GaN layer 605 and a buffer layer 610 over the n-GaN layer 605. The n-GaN layer is formed on an active layer and a p-GaN layer (not shown) formed on a substrate, such as a silicon substrate. Referring next to fig. 6B, a metal layer 615 is formed on the buffer layer 610. The metal layer 615 may be formed on the buffer layer 610 using various deposition methods, such as physical vapor deposition (e.g., sputtering). The metal material may include one or more of gold (Au), tin (Sn), silver (Ag), nickel (Ni), and platinum (Pt).

Referring next to fig. 6C, a photodefinable layer 620 having a photodefinable material is deposited over the metal layer 615. In some cases, the photodefinable material is a photoresist. In an example, the photodefinable material is a photoresist compatible with 157nm, 193nm, 248nm, or 365nm wavelength photoresist systems, 193nm wavelength immersion systems, extreme ultraviolet systems (including 13.7nm systems), or electron beam lithography systems. Examples of photoresist materials include argon fluoride (ArF) sensitive photoresist, i.e., photoresist suitable for use with an ArF light source, and krypton fluoride (KrF) sensitive photoresist, i.e., photoresist suitable for use with a KrF light source. ArF photoresists may be used in photolithography systems that utilize relatively short wavelength (e.g., 193 nm) light. KrF photoresists can be used for relatively longer wavelength photolithography systems, such as 248nm systems. In other cases, nano-imprint lithography (e.g., by using molding or mechanical force to make a photoresist pattern) is used.

Referring next to fig. 6D, a predetermined portion of the photodefinable layer 620 is removed to define a hole 625 extending to the metal layer 615. In some cases, a portion of the photodefinable layer 620 is exposed to radiation through a reticle (reticle) and then developed to define the holes 625 within the photodefinable layer 620. The predetermined portion 625 is then removed by cleaning the exposed and developed portion of the photodefinable layer 620. The holes in the photodefinable layer are defined, for example, by photolithography using 248nm or 193nm light, wherein the photodefinable layer is exposed through a reticle and then developed. After development, the remaining photodefinable material forms mask features (mask features).

Referring next to fig. 6E, the exposed portion 625 of the metal layer 615 is etched on the buffer layer 610. This is achieved by means of a chemical etchant that selectively etches the metal layer 615 but not the photodefinable layer 620. Suitable chemical etchants include KCN, KI: I₂、HCl:HNO₃、HNO₃:H₂O、NH₄OH:H₂O₂Sodium hydroxide and/or potassium hydroxide, Ar ion beam sputtering, Cl₂Plasma, HBr plasma.

Referring next to fig. 6F, the photodefinable layer 620 is removed to expose the metal layer 615 on the buffer layer 610. The metal layer 615 is then heated to produce metal particles 630 from the metal layer, as shown in fig. 6G. In some cases, the metal layer 615 is heated to a temperature of less than about 700 ℃, less than about 600 ℃, less than about 500 ℃, less than about 400 ℃, or less than about 300 ℃. Heating is accomplished by resistive heating (e.g., by resistive heating of a susceptor supporting the substrate, see fig. 7) and/or by exposing the metal layer 615 to infrared radiation. The metal particles 630 expose portions of the buffer layer 610 between the metal particles 630.

Referring next to FIG. 6H, buffer layer 610 is etched to form a roughened buffer layer, which defines optical coupling layer 635. The metal particles 630 are etched away or removed by means of a chemical etchant that selectively etches the metal particles 630. The portion of the buffer layer 610 not covered by the metal particles 630 is etched to the n-GaN layer 605. In some embodiments, the buffer layer is roughened by etching the buffer layer, for example by means of an etching process (e.g. wet etching or dry etching). In the examples, with the aid of sodium hydroxide (NaOH), potassium hydroxide (KOH), Cl₂Plasma and/or HBr plasma to etch the buffer layer. In other embodiments, sputtering the buffer layer is used to roughen the buffer layer. In an example, by using argon (Ar) ionizationThe buffer layer is sub-sputtered to roughen the buffer layer.

In some cases, where buffer layer 610 is formed of u-GaN, AlGaN, and AlN, the roughening process removes all of the AlN layer above the u-GaN layer, leaving all or some portion of the AlGaN layer. In other cases, the roughening process removes the AlN layer and the AlGaN layer, but leaves at least a portion of the u-GaN layer. In other cases, the roughening process etches a portion of the n-GaN layer 605. As such, the optical coupling layer 635 may include n-GaN in addition to the material of the buffer layer 610 (e.g., u-GaN, AlGaN, and/or AlN). In some cases, the buffer layer 610 is formed of AlGaN adjacent to the n-GaN layer 605 and AlN adjacent to the AlGaN layer, and the roughening process etches some or all of the AlN layer, and in some cases some of the AlGaN layer.

Referring next to fig. 6I, a photodefinable layer 640 is formed over the optical coupling layer 635. The photodefinable layer 640 comprises a photodefinable material, such as a photoresist. Next, a portion of the photodefinable layer 640 has been exposed and developed (e.g., with the aid of a reticle) to form a hole 645 extending through the photodefinable layer 640 to the n-GaN layer 605, as shown in fig. 6J.

Referring next to fig. 6K, an electrode 650 is formed within aperture 645. The electrode is formed by depositing one or more metals, such as by physical vapor deposition (e.g., sputtering), within the aperture 645. Electrode 650 is formed by depositing one or more of titanium, aluminum, nickel, platinum, gold, silver, rhodium, copper, and chromium within apertures 645. The electrode 650 is in electrical communication with the n-GaN layer 605. In the illustrated embodiment, the electrode 650 is in contact with the n-GaN layer 605. The photodefinable material is then removed to provide an optical coupling layer 635 over the n-GaN layer 605, as shown in fig. 6L.

Alternatively, after forming the hole 625 (see fig. 6D), the metal layer 615 and the buffer layer 610 are etched to the n-GaN layer 605 (i.e., the buffer layer 610 is also removed). Next, an electrode 650 is formed by depositing one or more metals within the hole 625. The photodefinable layer 620 is then removed and the metal layer 615 is heated to form metal particles over the buffer layer 610. The buffer layer 610 is then etched (or roughened) to form the light coupling layer 635. In this case, the electrode 650 may be formed on the n-GaN layer without the need for the photodefinable layer 640 and associated processing operations.

In some embodiments, the substrate is exposed to a group III precursor and a group V precursor simultaneously during formation of the different device layers. In other cases, the substrate is exposed to group III precursors and group V precursors, e.g., group III precursor first and group V precursor, in an alternating manner with intervening purge or evacuation operations during various device layer formation. Generally, if multiple precursors are required to form a device layer, the precursors are introduced into the reaction chamber simultaneously or in an alternating and sequential manner.

Device layers may be formed by various deposition techniques. In certain embodiments, the device layers may be formed by Chemical Vapor Deposition (CVD), Atomic Layer Deposition (ALD), plasma enhanced CVD (pecvd), plasma enhanced ALD (peald), metal organic CVD (mocvd), hot wire CVD (hwcvd), initial CVD (icvd), modified CVD (mcvd), vapor shaft deposition (VAD), Outside Vapor Deposition (OVD), and physical vapor deposition (e.g., sputter deposition, vapor deposition).

Although the methods and structures provided within this specification are described in the context of light emitting devices having III-V semiconductor materials, such as gallium nitride, such methods and structures are applicable to other semiconductor materials. The methods and structures provided herein may be used in light emitting devices formed at least in part from gallium nitride (GaN), gallium arsenide (GaAs), aluminum gallium arsenide (AlGaAs), gallium arsenic phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), gallium phosphide (GaP), indium gallium nitride (InGaN), aluminum gallium phosphide (AlGaP), zinc selenide (ZnSe), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), and aluminum gallium indium nitride (AlGaInN).

System configured to form light emitting device

In other aspects of the invention, a system for forming a light emitting device includes a reaction chamber for holding a substrate, a pumping system in fluid communication with the reaction chamber, the pumping system configured to purge or evacuate the reaction chamber, and a computer system having a processor for executing machine readable code that implements a method for forming the light emitting device. The code may implement any of the methods provided in this specification. In an embodiment, the code implements a method that includes providing a substrate having a light coupling layer (or structure) deposited thereon within a reaction chamber, the light coupling layer comprising one or more III-V semiconductor materials, and forming an electrode on a portion of the light coupling layer, the electrode in electrical communication with one of an n-type semiconductor layer and a p-type semiconductor layer adjacent to the light coupling layer. In another embodiment, the code implements a method that includes providing a substrate having a buffer layer within a reaction chamber, and roughening the buffer layer to form a light coupling layer.

Fig. 7 shows a system 700 for forming a light emitting device according to an embodiment of the invention. System 700 includes a reaction chamber 705 having a pedestal (or substrate holder) 710 configured to hold a substrate for forming the light emitting device. The system 700 includes a first precursor storage container (or tank) 715, a second precursor storage container 720, and a carrier gas storage tank 725. The first precursor storage container 715 can be used to hold a group III precursor (e.g., TMG), and the second precursor storage container 720 can be used to hold a group V precursor (e.g., NH)₃). The carrier gas storage tank 725 is used to hold carrier gas (e.g., H)₂). The system 700 may include other storage tanks or vessels, for example, for holding other precursors and carrier gases. System 700 includes valves between the storage containers and reaction chamber 705 to isolate reaction chamber 705 from each storage container.

The system 700 further includes a vacuum system 730 for providing a vacuum to the reaction chamber 705. A vacuum system 730 is in fluid communication with the reaction chamber 705. In some cases, the vacuum system 730 is configured to isolate the reaction chamber 705 by means of a valve, such as a gate valve.

The controller (or control system) 735 of the system 700 facilitates a method for forming a light emitting device, e.g., forming one or more layers of the light emitting device, within the reaction chamber 705. The controller 735 is communicatively coupled to the valves of each of the first precursor storage vessel 715, the second precursor storage vessel 720, the carrier gas storage tank 725, and the vacuum system 730. A controller 735 is operably coupled to the pedestal 710 for regulating the temperature of the pedestal and the substrate thereon, and to the vacuum system 730 for regulating the pressure within the reaction chamber 705.

In some cases, the vacuum system 730 includes one or more vacuum pumps, such as one or more turbomolecular ("turbo") pumps, as well as a diffusion pump and a mechanical pump. The pump may include one or more back-up pumps. For example, a mechanical pump is a backup to a turbo pump.

In certain embodiments, the controller 735 is configured to adjust one or more process parameters, such as substrate temperature, precursor flow rate, growth rate, carrier gas flow rate, and chamber pressure. In some cases, the controller 735 is in communication with a valve between the storage container and the reaction chamber 705, which helps to terminate (or regulate) the flow of precursor to the reaction chamber 705. The controller 735 includes a processor configured to facilitate execution of machine executable code configured to implement the methods provided herein. The machine executable code is stored in a physical storage medium such as a flash memory, hard disk, or other physical storage medium configured to store computer executable code.

In certain embodiments, the controller 735 is configured to adjust one or more processing parameters. In certain embodiments, the controller 735 adjusts the growth temperature, carrier gas flow rate, precursor flow rate, growth rate, and/or growth pressure.

Throughout the description and claims, words using the singular or plural number also include the plural or singular number, respectively, unless the context clearly requires otherwise. Moreover, the words "herein," "below," "above," "below," and words of similar import refer to this application as a whole and not to any particular portions of this application. When the word "or" is used in reference to a listing of two or more items, the word covers the interpretation of all of the following words: any item within the manifest, all items within the manifest, and any combination of items within the manifest.

It will be appreciated from the foregoing that, although specific embodiments have been illustrated and described, various modifications may be made and are contemplated herein. Nor is the invention limited to the specific examples provided within this specification. While the invention has been described with reference to the foregoing specification, the description and illustration of embodiments of the invention is not to be construed as limiting. Moreover, it is to be understood that all aspects of the present invention are not limited to the specific depictions, configurations or relative proportions set forth herein which depend upon a variety of conditions and variables. Various modifications in form and detail of the embodiments of the invention will be apparent to those skilled in the art. It is therefore contemplated that the present invention shall also cover any such modifications, variations and equivalents.

Claims (25)

1. A light emitting device comprising:

a substrate;

a p-type group III-V semiconductor layer adjacent to the substrate;

an active layer adjacent to the p-type semiconductor layer;

an n-type group III-V semiconductor layer adjacent to the active layer;

a light coupling structure adjacent to the n-type group III-V semiconductor layer, the light coupling structure comprising one or more group III-V semiconductor materials, wherein the light coupling structure comprises a hole that extends to the n-type group III-V semiconductor layer; and

an electrode formed in the hole, the electrode in electrical communication with the n-type group III-V semiconductor layer.

2. The light emitting device of claim 1, wherein the hole exposes a portion of the n-type group III-V semiconductor layer.

3. The light emitting device of claim 2, wherein the exposed portion of the n-type semiconductor layer has a corrugation of less than or equal to about 300 nanometers (nm).

4. The light emitting device of claim 1, wherein the hole has a circular, elliptical, triangular, square, rectangular, pentagonal, hexagonal, heptagonal, or nonagonal cross-section.

5. The light emitting device of claim 1, wherein the aperture is a channel extending along at least a portion of the light coupling structure.

6. The light emitting device of claim 1, wherein the one or more III-V semiconductor materials of the light coupling structure are selected from the group consisting of n-type gallium nitride, u-type gallium nitride, aluminum gallium nitride, and aluminum nitride.

7. The light emitting device of claim 1, wherein the n-type group III-V semiconductor layer comprises n-type gallium nitride.

8. The light emitting device of claim 1, wherein the p-type group III-V semiconductor layer comprises p-type gallium nitride.

9. The light emitting device of claim 1, wherein the electrode comprises one or more elemental metals selected from the group consisting of titanium, aluminum, nickel, platinum, gold, silver, rhodium, copper, and chromium.

10. The light emitting device of claim 1, wherein the light coupling structure comprises one or more light coupling bodies, individual light coupling bodies having a width that decreases along an axis oriented away from the active layer.

11. The light emitting device of claim 1, wherein the substrate is selected from the group consisting of silicon, germanium, silicon oxide, silicon dioxide, titanium oxide, titanium dioxide, sapphire, silicon carbide, ceramic materials, and metallic materials.

12. The light emitting device of claim 1, wherein the light coupling structure has protrusions having a size between about 10 nanometers (nm) and 3 micrometers (μm).

13. The light emitting device of claim 1, further comprising an optical reflector between the substrate and the p-type group III-V semiconductor layer.

14. The light emitting device of claim 13, wherein the optical reflector is formed of one or more of silver, platinum, gold, rhodium, aluminum, and nickel.

15. A light emitting device comprising:

a first layer of a first type of group III-V semiconductor material;

a second layer adjacent to the first layer, the second layer having an active material configured to generate light when an electron recombines with a hole;

a third layer adjacent to the second layer, the third layer comprising a second type of III-V semiconductor material;

a light coupling structure adjacent to the third layer, the light coupling structure comprising a third type of III-V semiconductor material, the light coupling structure comprising an opening extending through at least a portion of the light coupling structure; and

an electrode adjacent to the light coupling structure, the electrode in electrical communication with one of the first layer and the second layer.

16. The light emitting device of claim 15, wherein the third type of III-V semiconductor material is different from the first type of III-V semiconductor material and the second type of III-V semiconductor material.

17. The light emitting device of claim 15, wherein the first type of III-V semiconductor material comprises one of an n-type III-V semiconductor and a p-type III-V semiconductor.

18. The light emitting device of claim 17, wherein the second type of group III-V semiconductor material comprises the other of the n-type group III-V semiconductor and the p-type group III-V semiconductor.

19. A method for forming a light emitting device, comprising:

providing a substrate including a buffer layer in a reaction chamber; and

roughening a portion of the buffer layer to form a light coupling layer,

wherein the light coupling layer is formed adjacent to one of the n-type semiconductor layer and the p-type semiconductor layer,

wherein the one of the n-type semiconductor layer or the p-type semiconductor layer is formed adjacent to an active layer,

wherein the active layer is formed adjacent to the other of the n-type semiconductor layer and the p-type semiconductor layer, and

wherein the other of the n-type semiconductor layer and the p-type semiconductor layer is formed adjacent to the substrate.

20. The method of claim 19, wherein the buffer layer comprises one or more III-V semiconductor materials.

21. The method of claim 20, wherein the buffer layer comprises one or more of u-type gallium nitride, aluminum gallium nitride, and aluminum nitride.

22. The method of claim 19, further comprising forming an electrode in electrical communication with the one of the n-type semiconductor layer and the p-type semiconductor layer.

23. The method of claim 19, further comprising forming an opening in the buffer layer, the opening extending through at least a portion of the buffer layer.

24. The method of claim 23, further comprising forming an electrode in the opening.

25. The method of claim 19, wherein roughening the portion of the buffer layer comprises:

forming a layer of a metallic material over the buffer layer;

defining an opening within the layer of the metallic material, the opening extending to the buffer layer;

forming metal particles from the layer of the metal material; and

and etching the buffer layer.