HK1120940B - Method and system for modulating inputted electric signal - Google Patents
Method and system for modulating inputted electric signal Download PDFInfo
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- HK1120940B HK1120940B HK08112346.8A HK08112346A HK1120940B HK 1120940 B HK1120940 B HK 1120940B HK 08112346 A HK08112346 A HK 08112346A HK 1120940 B HK1120940 B HK 1120940B
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Description
Technical Field
The present invention relates to electrical signal modulation, and more particularly, to a method and system for an all-digital class-D modulator and saturation protection techniques therefor.
Background
Mobile phone technology is continually improving, increasing efficiency and reducing the size, weight and battery requirements of handheld devices. The reduced power consumption makes the handheld device lighter, smaller, and longer talk time. Increased battery life requires increased efficiency and also supports increased functionality designed into mobile phones. Such as MP3 players, FM radios, video players and even television functions, may be integrated in the portable handheld device. Common to these functions is audio, and thus audio amplification with low power consumption and high quality is required. In addition to Radio Frequency (RF) amplification circuitry, one of the major power consumers in mobile telephone handsets is the audio amplification circuitry.
The audio output requirements of a mobile telephone handset include a powerful multi-tone ring tone, reproducing natural, clear speech and clean, noiseless music through a receiver or earpiece or a speaker in the handset. Thus, the system can provide large output power when the built-in speaker is operating, provide less power but high quality audio output for voice or music playback, and have low power consumption when in an idle state. There is still a large power usage in the audio circuit even when there is no input signal, e.g. a pause in a dialog. One way to reduce power consumption is to turn off the audio amplifier when there is no input signal. Another approach is to improve the operating efficiency of the amplifier.
The main factors of audio amplifier performance include frequency response, gain, noise and distortion. Although there is a great advantage in increasing the life of the battery, it cannot be achieved at the expense of audio signal output quality, that is, maintaining a high gain while suppressing noise and distortion.
The invention will be elucidated in the following part with reference to the drawings. Limitations and disadvantages of conventional or traditional systems will become apparent to one of skill in the art, through comparison of the present system with such conventional systems.
Disclosure of Invention
The technical problem underlying the present invention is to provide a system and/or method for an all-digital class-D modulator and saturation protection technique therefor, as described in the following description with reference to at least one of the figures, and as more fully described in the claims.
According to one aspect of the present invention, there is provided a method of modulating an input electrical signal, the method comprising:
modulating an analog input signal using a class D digital modulator;
a digital output signal proportional to the analog input signal is generated by the class D digital modulator.
Preferably, the digital class D modulator comprises a 4 th order digital class D modulator.
Preferably, the method further comprises limiting the output of at least one of the plurality of integrators in the class D digital modulator with at least one integrator feedback loop within the class D digital modulator to avoid saturation.
Preferably, the at least one integrator feedback loop comprises a limiter that limits the output of the at least one of the plurality of integrators.
Preferably, the class D digital modulator uses pulse width modulation techniques.
Preferably, the voltage amplitude of the triangular wave oscillating signal is larger than the amplitude of an integrated signal (integrated signal) generated from the analog input signal.
Preferably, the method further comprises adjusting the frequency of the triangular wave oscillating signal.
Preferably, the digital output signal of the class D digital modulator is fed back to at least one of the plurality of stages of the class D digital modulator.
Preferably, the method further comprises programming the gain of at least one of the plurality of gain stages in the class D digital modulator.
According to one aspect of the present invention, there is provided a system for modulating an input electrical signal, the system comprising:
a class D digital modulator for modulating an analog input signal;
one or more circuits for generating a digital output signal proportional to the analog input signal.
Preferably, the system further comprises a 4 th order digital class D modulator.
Preferably, at least one integrator is saturation protected in the class D digital modulator with an integrator feedback loop.
Preferably, at least one of the plurality of integrator feedback loops in the class D digital modulator employs a limiter.
Preferably, the class D digital modulator uses pulse width modulation techniques.
Preferably, the voltage amplitude of the triangular wave oscillating signal is larger than the amplitude of an integrated signal (integrated signal) generated from the analog input signal.
Preferably, the frequency of the triangular wave oscillating signal is adjustable.
Preferably, the digital output signal of the class D digital modulator is fed back to at least one of the plurality of stages of the class D digital modulator.
Preferably, the gain of at least one of the plurality of integrator gain stages is programmable.
Various advantages, aspects and novel features of the invention, as well as details of an illustrated embodiment thereof, will be more fully described in the following description and drawings.
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
FIG. 1 is a block diagram of an exemplary class D digital modulator of an embodiment of the present invention;
FIG. 2 is a graph of an exemplary digital class D digital modulator Signal Transfer Function (STF) and Noise Transfer Function (NTF) frequency response of an embodiment of the present invention;
FIG. 3 is a schematic diagram of an exemplary digital class D digital modulator output spectrum with an input amplitude of 0.5 according to an embodiment of the present invention;
FIG. 4 is a graph of signal-to-noise ratio versus output power for an exemplary modulator of an embodiment of the present invention;
FIG. 5 is a schematic diagram of an exemplary class D digital modulator with a feedback limiter according to an embodiment of the present invention;
fig. 6 is a graph of signal-to-noise ratio versus output power for a class D digital modulator with a feedback limiter according to an embodiment of the present invention.
Detailed Description
Certain aspects of the present invention relate to a method and system for modulating an input electrical signal. The method includes modulating an analog input signal with a class D digital modulator and generating a digital output signal proportional to the analog input signal. The class D digital modulator includes four stages. To avoid integrator saturation, the output of at least one integrator stage is limited with a limiter in the integrator feedback loop. The class D digital modulator employs a pulse width modulation technique. The voltage amplitude of the triangular wave oscillator is greater than the amplitude of the integrated analog input signal for an increased signal-to-noise ratio (SNR) at the desired output power. The digital output signal may be fed back to the input of at least one of the four stages of the class D digital modulator. The frequency of the triangular wave oscillator may be adjusted to match the desired output frequency. The gain stage of a class D digital modulator may be programmed to tune the Signal Transfer Function (STF) and the Noise Transfer Function (NTF).
Fig. 1 is a schematic diagram of an exemplary class D digital modulator of an embodiment of the present invention. Referring to fig. 1, the class D digital modulator may include 4 stages 141, 143, 145, 147 provided with adders 103, 109, 117, and 123, integrators 105, 111, 119, and 125, integrator gain stages 107, 115, 121, and 129, and resonator (resonator) gain feedback loops 113 and 127. In addition to these 4 stages, the class D digital modulator may include a triangular wave generator 131 and a comparator 137.
The input signal x (n) is applied to the positive input of the adder 103. The output signals y (n)139 and the resonant gain feedback loop 113 are delivered to the negative input of the adder 103. The output of the adder 103 is connected to the input of the integrator 105 and then to the integrating gain stage 107. The output of the integrating gain stage 107 is connected to the positive input of the adder 109, while the output signal 139 is delivered to the negative input of the adder 109. The output of the adder 109 is passed to an integrator 111, the output of the integrator 111 then being passed to an integrating gain stage 115. The output of the integrating gain stage 115 is connected through the resonator feedback loop 113 to the negative terminal of the adder 103 and to the positive input of the adder 117.
In addition, the resonator feedback loop 127 and the output signal y (n)139 are passed to the negative input of the adder 117. The output of the adder 117 is connected to an integrator 119, and the output of the integrator 119 is then connected to an integrating gain stage 121. The output of the integrating gain stage 121 is connected to the positive input of the adder 123. In addition, output signal y (n) is delivered to the negative input of adder 123. The output of the adder 123 is connected to an integrator 125, and the output of the integrator 125 is connected to an integrating gain stage 129. Output V of the integrating gain stage 129int135 to one input of a comparator 137. This signal is also fed back to the negative input of the adder 117 through the resonator feedback loop 127. The output of the triangular wave generator 131 is connected to the other input of the comparator 137. The output of the class D digital modulator, y (n), is defined as the output of comparator 137, which is also fed back to the negative input of adder 103, and to the negative inputs of adders 109, 117, and 123.
In operation, an input signal x (n)101 is applied to the class D digital modulator at the positive input of adder 103. The output signal y (n)139 and the signal from the feedback loop 113 are subtracted from the input signal x (n)101, then integrated by the integrator 105 and amplified by the integrating gain stage 107, respectively. The output signal of the integrating gain stage 107 is delivered to the positive input of the adder 109. Output signal y (n)139 is subtracted from the integrated output of output gain stage 107 at adder 109, and then integrated and amplified by integrator 111 and integrating gain stage 115. The output signal from the integrating gain stage 115 is fed back to the negative input of the adder 103 through a resonant feedback loop 113 and is also passed to the adder 103The positive input of the flange 117. The output signal y (n)139 and the signal from the resonant feedback loop 127 are subtracted from the positive input of the adder 117. The output signal of the adder 117 is delivered to integrator and integral gain blocks 119 and 121, and the output of the integral gain block 121 is delivered to the positive input of the adder 123. The output signal y (n)139 is subtracted from the positive input of the adder 123 and the result is provided to the integrator and integral gain blocks 125 and 129. The output signal of the integral gain module 129 is delivered to one input of a comparator 137 and also fed back to the negative input of the adder 117 via a resonant feedback loop 127. The output of the triangular wave generator 131 is fed to one input of a comparator 137. When the amplitude of the input signal Vint 135 is smaller than the input signal VOSC133, the output of the comparator 137 is low when the magnitude of the input signal Vint 135 is greater than the input signal VOSC133, the output of comparator 137 is high. This causes pulse width modulation whose pulse width is proportional to the amplitude of the input signal Vint 135.
The Signal Transfer Function (STF) is defined as the output signal Y (n)139 divided by the input signal X (n) 101. Applying this relationship to the above circuit yields the following:
similarly, the Noise Transfer Function (NTF) is determined by dividing the output signal y (n) by the quantization noise of the circuit:
the STF and NTF are used to determine the frequency response of the class D digital modulator. This is achieved by inserting multiple values into the above equation for the integral gain and the resonator feedback loop gain.
Fig. 2 is a graph of exemplary class D digital modulator Signal Transfer Function (STF) and Noise Transfer Function (NTF) frequency responses of an embodiment of the present invention. Referring to fig. 2, the STF201 and NTF 203 of the class D digital modulator are illustrated with the variables described below. The x-axis represents frequency and the y-axis represents the amplitude in dB of the STF201 and NTF 203. The upper curve shows the STF201 and NTF 203 for the frequency range 0-12MHz, while the lower curve shows the same STF201 and NTF 203 for the smaller frequency range (0-200 kHz). The frequency range of 0-20kHz is relevant for audio applications.
For stability of class D digital modulator 100, integrator output VintA Slew Rate (SR), or switching speed, of 135 is less than the triangular wave VOSC133, respectively. SR, V of sine waveint=Aisin(2*π*fu*t+) May be equal to Ai2*π*fuHere, AiIs the amplitude of the signal, fuIs the bandwidth of the STF, pi 3.14159. SR of triangular wave is 2Atri*foscHere, AtriIs the amplitude of the triangular wave signal, foscIs the frequency of the triangular wave generator 131. Thus, there is the following relationship:
Ai*2*π*fu<2*Atri*fosc
at the input signal Vint135 and Vosc133 have the same amplitude 1, this relationship is simplified to
fu<fosc/π
Thus, for stability, the bandwidth f of the STFuIs less than fosc/π。
Referring again to FIG. 2, using an integral gain factor c1To c4And a resonant gain coefficient g1And g2To show STF and NTF curves. The lower curve in fig. 2 shows STF201 and NTF 203 in the frequency range 0-200kHz, but centered in the range 0-20kHz, the STF remains relatively flat, above and below 0dB, but the NTF is more than 80dB lower than the STF.
Fig. 3 is an output spectrum of an exemplary class D digital modulator of an embodiment of the present invention at an input amplitude of 0.5. Referring to FIG. 3, the y-axis represents the magnitude in dB and the x-axis represents the frequency in Hz of the simulated output spectrum 301. The simulated spectrum shows a minimum near 20kHz, which is consistent with that shown in fig. 2. The frequency of the simulated input signal is 2kHz, coinciding with the amplitude peak 303 near 2 kHz. The resulting signal-to-noise ratio (SNR) was 113dB, demonstrating the ability of a class D digital modulator to produce an output signal with a high SNR.
Fig. 4 is a graph of signal-to-noise ratio versus output power for an exemplary modulator of an embodiment of the present invention. Referring to fig. 4, the y-axis represents SNR 401 in dB and the x-axis represents output power in dB, where 0dB corresponds to 30mW of power. The curve shows that the SNR can increase to a peak over 110dB with increasing output power, and then the SNR 401 drops sharply as the output power approaches-4 dB. The reduction in SNR 401 at higher output power is a result of integrator saturation, which can be addressed with the design shown in fig. 5.
FIG. 5 is a schematic diagram of an exemplary class D digital modulator with a feedback limiter, according to an embodiment of the present invention. Referring to fig. 5, an exemplary limiter-equipped class D digital modulator includes four stages 551, 553. 555 and 557 with adders 503, 505, 513, 515, 523, 525, 533, and 535, integrators 507, 518, 529, and 541, integrating gain stages 511, 521, 531, and 543, integrating limiters 509, 519, 527, and 539, resonant feedback loops 517 and 537, triangular wave generator 545, and comparator 547.
The input signal x (n)501 is transmitted to the positive input of the adder 503. The output signal y (n)549 and the signal from the resonant feedback loop 517 are subtracted from the input signal x (n) by adder 503. This signal is then coupled to an adder 505, where the output of a limiter 509 is also coupled. The output of the adder 505 is connected to an integrator 507, the output of the integrator 507 being fed back to the adder 505 via a limiter 509 and connected to an integrating gain stage 511. The output of the integrating gain stage 511 is connected to the positive input of the adder 513. Output signal y (n)549 is coupled to the negative input of adder 513. The output of adder 513 is connected to the input of adder 515. The output of the limiter 519 is connected to an input of the adder 515. The output of the adder 515 is connected to an integrator 518. The output of the integrator 518 is connected to an input of a limiter 519 and to a positive input of an adder 523. Output signal y (n)549 and the output of feedback loop 537 are delivered to the negative input of adder 523.
The output of adder 523 is connected to adder 525. The output of the limiter 527 is also connected to the adder 525. The output of adder 525 is connected to an integrator 529, and the output of integrator 529 is connected to the input of limiter 527 and to the input of integrating gain stage 531. The output of the integrating gain stage 531 is connected to the positive input of the adder 533. Output signal y (n)549 is connected to the negative input of adder 533. The output of adder 533 is connected to the input of adder 535. The output of limiter 539 is connected to the other input of adder 535 and the output of adder 535 is connected to integrator 541. The output of the integrator 541 is connected to the input of the limiter 539 and to the input of the integrating gain stage 543. The output of the integrating gain stage 543 is connected to one input of a comparator 547 and is also fed back to the negative input of the adder 523 through a resonant feedback loop 537. The triangle wave generator 545 is connected to the other input terminal of the comparator 547. The output of the comparator 547 is the output of the class D digital modulator and may be defined as the output signal y (n) 549. The output signal y (n)549 may be fed back to the negative inputs of the adders 503, 513, 521, and 533.
In an embodiment of the present invention, the integrator gains c of the integrating gain stages 511, 521, 531 and 5411、c2、c3And c4Can be programmed to tune the Signal Transfer Function (STF) and Noise Transfer Function (NTF) of the class D digital modulator. In addition, the gain g of the resonant feedback loops 517 and 5371And g2The STF and NTF are also accommodated by programming.
In operation, an input signal X (n)501 is transmitted to the positive input of the adder 503. The output signal of gain stage 517 and output signal y (n)549 are subtracted from x (n)501 in adder 503. The output thus generated is added to the output of the limiter 509 by the adder 505, and the output of the adder 505 is integrated by the integrator 507. The output of integrator 507 may be fed back to adder 505 through limiter 509 to avoid integrator saturation by limiting the output value of integrator 507 to between-2 and 2. The output of integrator 507 is amplified by an integrating gain stage 511 before being passed to the positive input of adder 513. Output signal y (n)549 may be subtracted from the output of gain stage 511 and the result may be added to the output of limiter 519 and then integrated by integrator 518. The output of the integrator 518 may be fed back through a limiter 519 to avoid integrator saturation by limiting the output of the integrator 518 between-2 and 2. The output of integrator 518 may be amplified with an integrating gain stage 521. The output of the integrating gain stage 521 may be fed back to the negative input of the adder 503 through a resonant feedback loop 517 and passed to the positive input of the adder 523. The output signal of the resonant feedback loop 537 and the output signal y (n)549 are subtracted from the output of the integrating gain stage 521 in adder 523. The output of the adder 523 and the output of the limiter 527 may be added by an adder 525, and the output signal of the adder 525 is integrated by an integrator 529.
The output of integrator 529 is fed back to adder 525 through limiter 527, which limits the output of integrator 529 to a value between-1 and 1 to avoid saturation of integrator 529. The output of integrator 529 is amplified by an integrating gain stage 531 before being connected to the positive input of adder 533. The output signal y (n)549 is subtracted from the output signal of the integrating gain stage 531 by adder 533 and then added to the output signal of limiter 539 in adder 535 before being integrated by the integrator. The output of the integrator 541 may be fed back to the adder 535 by the limiter 539. The limiter 539 limits the output value of the integrator 541 between-0.5 and 0.5 to avoid saturation thereof. The output of the integrator 541 may be amplified by the integrating gain stage 543 and then connected to one input of the comparator 547. The output signal of the integrating gain stage 543 is also fed back to the negative input of the adder 523 through a resonant feedback loop 537. The comparator 547 compares the output of the triangular wave generator 545 with the output of the integral gain stage 543. The comparator 547 outputs a high level when the output signal of the integrating gain stage 543 is higher than the triangular wave generator signal, and the comparator 547 outputs a low level when the output signal of the integrating gain stage 543 is lower than the triangular wave generator signal. This may result in pulse width modulation, the width of the pulses of which is proportional to the amplitude of the input signal.
Fig. 6 is a diagram illustrating the relationship between the signal-to-noise ratio (SNR) and the output power of a class-D digital modulator with a feedback limiter according to an embodiment of the present invention. Referring to fig. 6, the y-axis represents the signal-to-noise ratio of an exemplary class D digital modulator with saturation protection as described in fig. 5. The x-axis represents the output power of a class D digital modulator, with 0dB corresponding to an output power of 30 mW. The SNR increases with increasing output power and drops sharply like fig. 2 at higher power, but with saturation protection, the 0dB SNR is significantly higher and the oscillator voltage V isoscGreater than 80dB at 1.00V. Increasing the oscillator voltage to VoscThe SNR at 0dB can be further improved beyond 100dB for 1.25V.
In an embodiment of the present invention, a method and system are described for modulating an input electrical signal 501 with a class D digital modulator 500 and producing a digital output signal 549 proportional to an analog input signal 301. The class D digital modulator 500 includes four stages 551, 553, 555, and 557. To avoid integrator saturation, the output of at least one integrator 507, 518, 529 and 541 may be limited by limiters 509, 519, 527 and 539 in the integration feedback loop. The class D digital modulator 500 uses a pulse width modulation technique. To increase the signal-to-noise ratio (SNR)600 at a desired output power, the amplitude of the triangular wave oscillator output voltage 561 should be greater than the amplitude of the integrated analog input signal 559. The digital output signal 549 is fed back to at least one of the four stages 551, 553, 555, 557 of the class D digital modulator 500. The frequency of triangle wave oscillator 545 may be adjusted to match the desired output frequency. Gain value c of gain stages 511, 521, 531 and 543 in class D digital modulator 5001、c2、c3And c4The Signal Transfer Function (STF)201 and the Noise Transfer Function (NTF)203 may be programmed to be tuned.
Another embodiment of the present invention provides a machine-readable storage, having stored thereon, a computer program having at least one code section executable by a machine, thereby causing the machine to perform one or more of the steps described above.
Accordingly, the present invention may be realized in hardware, software, or a combination of hardware and software. The present invention can be realized in a centralized fashion in at least one computer system, or in a distributed fashion where different elements are spread across several interconnected computer systems. Any kind of computer system or other apparatus adapted for carrying out the methods described herein is suited. A typical combination of hardware and software could be a general purpose computer system with a computer program that, when being loaded and executed, controls the computer system such that it carries out the methods described herein. The method is implemented in a computer system using a processor and a memory unit.
An embodiment of the invention may be implemented in a board level product such as a single chip, an ASIC (application specific integrated circuit), or a single chip with various levels of integration and other discrete components of a system. The degree of integration of the system is determined primarily by speed and cost considerations. Due to the complexity of modern processors, commercially available processors may be used, which may be implemented outside of the ASIC implementation of the present system. Alternatively, if the processor is available as an ASIC core or logic module, the commercially available processor may be implemented as part of an ASIC device having various functions implemented as firmware.
The present invention can also be implemented by a computer program product, which comprises all the features enabling the implementation of the methods of the invention and which, when loaded in a computer system, is able to carry out these methods. The computer program in this document refers to: any expression, in any programming language, code or notation, of a set of instructions intended to cause a system having an information processing capability to perform a particular function either directly or after either or both of the following: a) conversion to other languages, codes or symbols; b) reproduced in a different format.
While certain features of the embodiments have been described herein, many modifications, substitutions, changes, and equivalents will now occur to those skilled in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the true spirit of the embodiments of the invention.
Claims (5)
1. A method of modulating an input electrical signal, the method comprising:
modulating an analog input signal using a class D digital modulator, a triangular wave oscillating signal having a voltage amplitude greater than an amplitude of an integrated signal generated from the analog input signal;
generating, by the class D digital modulator, a digital output signal proportional to the analog input signal;
adjusting the frequency of the triangular wave oscillation signal;
programming a gain of at least one of a plurality of gain stages in the class D digital modulator;
wherein a digital output signal of the class D digital modulator is fed back to at least one of the plurality of stages of the class D digital modulator;
the class D digital modulator comprises 4 stages (141, 143, 145, 147) provided with adders (103, 109, 117, 123), integrators (105, 111, 119, 125), integrator gain stages (107, 115, 121, 129), and resonator gain feedback loops (113, 127), and a triangular wave generator (131) and a comparator (137);
the input signal Xn acts on the positive input of the adder (103), the output signal Yn feedback loop and the resonant gain feedback loop (113) are transferred to the negative input of the adder (103), the output of the adder (103) is connected to the input of the integrator (105), then the output of the integrator (105) is connected to the integrating gain stage (107), the output of the integrating gain stage (107) is connected to the positive input of the adder (109), while the output signal Yn (139) is transferred to the negative input of the adder (109), the output of the adder (109) is transferred to the integrator (111), the output of the integrator (111) is then transferred to the integrating gain stage (115), the output of the integrating gain stage (115) is connected to the negative terminal of the adder (103) through the resonator feedback loop (113) and to the positive input of the adder (117);
the resonator feedback loop (127) and the output signal Yn are fed to the negative input of the adder (117), the output of the adder (117) is connected to the integrator (119), the output of the integrator (119) is then connected to the integrating gain stage (121), the output of the integrating gain stage (121) is connected to the positive input of the adder (123), the output signal Yn is fed to the negative input of the adder (123), the output of the adder (123) is connected to the integrator (125), the output of the integrator (125) is connected to the integrating gain stage (129), the output V of the integrating gain stage (129)intTo one input of a comparator (137), which signal is also fed back to the negative input of the adder (117) via a resonator feedback loop (127); the output of the triangular wave generator (131) is connected to the other input of the comparator (137), the output Yn of the class D digital modulator is defined as the output of the comparator (137), which is also fed back to the negative input of the adder (103), and the adder (109, b),117. 123) is provided;
in operation, an input signal Xn is applied to the class D digital modulator at the positive input of the adder (103), an output signal Yn and a signal from the feedback loop (113) are subtracted from the input signal Xn, then integrated by the integrator (105) and amplified by the integrating gain stage (107), respectively, the output signal of the integrating gain stage (107) is passed to the positive input of the adder (109), the output signal Yn is subtracted from the integrated output of the output gain stage (107) at the adder (109) and then integrated and amplified by the integrator (111) and the integrating gain stage (115), the output signal from the integrating gain stage (115) is fed back to the negative input of the adder (103) through the resonant feedback loop (113) and is also passed to the positive input of the adder (117), the output signal Yn and a signal from the resonant feedback loop (127) are subtracted from the positive input of the adder (117), the output signal of the adder (117) is fed to integrator and integral gain blocks (119, 121), and the output of the integral gain block (121) is fed to the positive input of the adder (123), the output signal Yn is subtracted from the positive input of the adder (123), the result is fed to integrator and integral gain blocks (125, 129), the output signal of the integral gain block (129) is fed to one input of a comparator (137) and also fed back to the negative input of the adder (117) via a resonant feedback loop (127), the output of a triangular wave generator (131) is fed to one input of the comparator (137), and when an input signal V is present, the output signal of the triangular wave generator (131) is fed to one input of the comparator (137)intIs smaller than the input signal VOSCWhen the amplitude of the input signal V is low, the output of the comparator (137) is at a low levelint(135) Is greater than the input signal VOSCAt an amplitude of (d), the output of the comparator (137) is high to cause pulse width modulation of the width of the pulses with the input signal VintIs proportional to the amplitude of (c).
2. The method of claim 1, further comprising limiting an output of at least one of a plurality of integrators in the class D digital modulator with at least one integrator feedback loop within the class D digital modulator to avoid saturation.
3. The method of claim 2, wherein the at least one integrator feedback loop comprises a limiter that limits an output of the at least one of the plurality of integrators.
4. A system for modulating an input electrical signal, the system comprising:
a class D digital modulator for modulating an analog input signal;
one or more circuits for generating a digital output signal proportional to the analog input signal;
wherein the class D digital modulator uses pulse width modulation techniques; the voltage amplitude of the triangular wave oscillating signal is larger than the amplitude of an integral signal generated from the analog input signal; the frequency of the triangular wave oscillating signal is adjustable; the digital output signal of the D-type digital modulator is fed back to at least one of the multiple stages of the D-type digital modulator; the gain of at least one of the plurality of integrator gain stages is programmable;
the class D digital modulator comprises 4 stages (141, 143, 145, 147) provided with adders (103, 109, 117, 123), integrators (105, 111, 119, 125), integrator gain stages (107, 115, 121, 129), and resonator gain feedback loops (113, 127), and a triangular wave generator (131) and a comparator (137);
the input signal Xn acts on the positive input of the adder (103), the output signal Yn feedback loop and the resonant gain feedback loop (113) are transferred to the negative input of the adder (103), the output of the adder (103) is connected to the input of the integrator (105), then the output of the integrator (105) is connected to the integrating gain stage (107), the output of the integrating gain stage (107) is connected to the positive input of the adder (109), while the output signal Yn (139) is transferred to the negative input of the adder (109), the output of the adder (109) is transferred to the integrator (111), the output of the integrator (111) is then transferred to the integrating gain stage (115), the output of the integrating gain stage (115) is connected to the negative terminal of the adder (103) through the resonator feedback loop (113) and to the positive input of the adder (117);
the resonator feedback loop (127) and the output signal Yn are fed to the negative input of the adder (117), the output of the adder (117) is connected to the integrator (119), the output of the integrator (119) is then connected to the integrating gain stage (121), the output of the integrating gain stage (121) is connected to the positive input of the adder (123), the output signal Yn is fed to the negative input of the adder (123), the output of the adder (123) is connected to the integrator (125), the output of the integrator (125) is connected to the integrating gain stage (129), the output V of the integrating gain stage (129)intTo one input of a comparator (137), which signal is also fed back to the negative input of the adder (117) via a resonator feedback loop (127); the output of the triangular wave generator (131) is connected to the other input of the comparator (137), the output Yn of the class D digital modulator is defined as the output of the comparator (137), which is also fed back to the negative input of the adder (103), and to the negative input of the adder (109, 117, 123);
in operation, an input signal Xn is applied to the class D digital modulator at the positive input of the adder (103), an output signal Yn and a signal from the feedback loop (113) are subtracted from the input signal Xn, then integrated by the integrator (105) and amplified by the integrating gain stage (107), respectively, the output signal of the integrating gain stage (107) is passed to the positive input of the adder (109), the output signal Yn is subtracted from the integrated output of the output gain stage (107) at the adder (109) and then integrated and amplified by the integrator (111) and the integrating gain stage (115), the output signal from the integrating gain stage (115) is fed back to the negative input of the adder (103) through the resonant feedback loop (113) and is also passed to the positive input of the adder (117), the output signal Yn and a signal from the resonant feedback loop (127) are subtracted from the positive input of the adder (117), the output signal of the adder (117) is fed to integrator and integral gain blocks (119, 121), and the output of the integral gain block (121) is fed to the positive input of the adder (123), the output signal Yn is subtracted from the positive input of the adder (123), the result is fed to integrator and integral gain blocks (125, 129), the output signal of the integral gain block (129) is fed to one input of a comparator (137) and also fed back to the negative input of the adder (117) via a resonant feedback loop (127), and the output of a triangular wave generator (131) is fed to the negative input of the adder (117)To an input of a comparator (137) when a signal V is inputintIs smaller than the input signal VOSCWhen the amplitude of the input signal V is low, the output of the comparator (137) is at a low levelint(135) Is greater than the input signal VOSCAt an amplitude of (d), the output of the comparator (137) is high to cause pulse width modulation of the width of the pulses with the input signal VintIs proportional to the amplitude of (c).
5. The system of claim 4, wherein at least one integrator is saturation protected in the class D digital modulator with an integrator feedback loop.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/566,995 US7714675B2 (en) | 2006-12-05 | 2006-12-05 | All digital Class-D modulator and its saturation protection techniques |
| US11/566,995 | 2006-12-05 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| HK1120940A1 HK1120940A1 (en) | 2009-04-09 |
| HK1120940B true HK1120940B (en) | 2013-05-03 |
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