HK1133729A

HK1133729A - Display drive apparatus and display apparatus

Info

Publication number: HK1133729A
Application number: HK10101284.1A
Authority: HK
Inventors: 白崎友之; 小仓润; 下田悟
Original assignee: 卡西欧计算机株式会社
Priority date: 2008-02-15
Filing date: 2010-02-05
Publication date: 2010-04-01

Description

Display driving device and display device

Technical Field

The present invention relates to a display driving device, a display device, and a driving method thereof, and more particularly, to a display driving device and a driving method thereof for driving a light emitting element which emits light by supplying a current corresponding to display data, and a display device and a driving method thereof provided with the display driving device and the display device.

Background

In recent years, as a next-generation display device following a liquid crystal display device, research and development of a light-emitting element type display device (light-emitting element type display) including a display panel in which current-driven light-emitting elements such as organic electroluminescence elements (organic EL elements), inorganic electroluminescence elements (inorganic EL elements), light-emitting diodes (LEDs), and the like are arranged in a matrix have been actively carried out.

In particular, a light-emitting element type display using an active matrix driving method has an advantageous feature that it has a higher display response speed than a known liquid crystal display device, has no viewing angle dependency, can realize high luminance, high contrast, high precision of display image quality, and the like, and does not require a backlight and a light guide plate as in the liquid crystal display device, and thus can further realize a thin and lightweight structure. Therefore, the present invention is expected to be applied to various electronic devices in the future.

In such a light-emitting element display to which the active matrix driving method is applied, a current control thin film transistor for causing a current to flow to an organic EL element by applying a voltage signal corresponding to pixel data to a gate electrode thereof and a switching thin film transistor for opening and closing a voltage signal corresponding to image data to the gate electrode of the current control thin film transistor are provided for each pixel.

In such a light-emitting element type display device in which the gray scale is controlled by a voltage signal, if the threshold value of the current control thin film transistor or the like fluctuates with time, the current value of the current flowing through the organic EL element fluctuates.

Disclosure of Invention

The present invention provides a display driving device, a display device, and a driving control method thereof, which can compensate for the variation of the element characteristics of a driving element and make a light emitting element emit light at an appropriate luminance level corresponding to display data, thereby providing a display device and a driving method thereof having an advantage of providing a good and uniform display image quality.

A display driving device according to the present invention for obtaining the above advantages is a display driving device for driving a display pixel having a light emitting element and a driving element having one end of a current path connected to the light emitting element, the display driving device including: a specific value detection unit that obtains a specific value corresponding to a variation amount of an element characteristic of the drive element; a gradation signal correction section for generating a corrected gradation signal in which a gradation signal corresponding to display data is corrected in accordance with the specific value, and applying the corrected gradation signal as a drive signal to the display pixel from one end of the data line; the specific value detection unit includes a difference detection unit that detects a difference between a measurement voltage detected at one end of the data line when a reference current having a preset current value is caused to flow into the current path of the drive element of the display pixel from the one end of the data line via the data line and a value obtained by amplifying a voltage difference between the measurement voltage and a reference voltage corresponding to the current value of the reference current by a preset amplification factor, and obtains the specific value based on the difference.

A display device according to the present invention for obtaining the above advantages is a display device for displaying image information, comprising: at least one display pixel including a pixel Driving Circuit (DC) having a light emitting element (OEL) and a driving element having a current path and one end connected to the light emitting element; at least 1 data line connected to the current path of the driving element; a data driving section including a specific value detecting section for obtaining a specific value corresponding to a variation amount of element characteristics of the driving element, and a gradation signal correcting section for generating a corrected gradation signal in which a gradation signal corresponding to display data is corrected based on the specific value and applying the corrected gradation signal as a driving signal to the display pixel from one end of the data line; the specific value detection unit includes a difference detection unit that detects a difference between a measurement voltage detected at one end of the data line when a reference current having a preset current value is caused to flow into the current path of the drive element of the display pixel from the one end of the data line via the data line and a value obtained by amplifying a voltage difference between the measurement voltage and a reference voltage corresponding to the current value of the reference current by a preset amplification factor, and obtains the specific value based on the difference.

A drive control method for a display device according to the present invention for achieving the above-described advantages is a drive control method for a display device that displays image information, the display device including: at least 1 display Pixel (PIX) having a light emitting element and a driving element having one end of a current path connected to the light emitting element; the method comprises the following steps: a step of causing a reference current having a preset current value to flow from one end of a data line connected to the display pixel to the current path of the driving element of the display pixel; detecting a difference value obtained by amplifying a voltage difference between a measurement voltage detected at one end of the data line and a reference voltage corresponding to a current value of the constant current at a predetermined amplification factor; obtaining a specific value corresponding to a variation amount of an element characteristic of the driving element based on the difference; and generating a corrected gray scale signal obtained by correcting a gray scale signal corresponding to display data in accordance with the specific value, and applying the corrected gray scale signal to the display pixel as a drive signal from one end of the data line.

Drawings

Fig. 1 is an equivalent circuit diagram showing a main structure of a display pixel used in a display device according to the present invention.

Fig. 2 is a signal waveform diagram showing a control operation of a display pixel used in the display device according to the present invention.

Fig. 3A and 3B are schematic explanatory views showing an operation state in a writing operation of a display pixel.

Fig. 4A is a characteristic diagram showing operation characteristics of the driving transistor of the display pixel in the writing operation.

Fig. 4B is a characteristic diagram showing a relationship between a driving current and a driving voltage of the organic EL element.

Fig. 5A and 5B are schematic explanatory views showing an operation state in the holding operation of the display pixel.

Fig. 6 is a characteristic diagram showing operation characteristics of the driving transistor in the holding operation of the display pixel.

Fig. 7A and 7B are schematic explanatory views showing an operation state in a light emitting operation of the display pixel.

Fig. 8A is a diagram showing an operating point of the driving transistor in a light emitting operation of the display pixel.

Fig. 8B is a diagram showing a change in operating point of the driving transistor when the organic EL element has a high resistance in the light emitting operation of the display pixel.

Fig. 9 is a schematic configuration diagram showing an embodiment of a display device according to the present invention.

Fig. 10 is a main part configuration diagram showing an example of a data driver and a display pixel which can be used in the display device according to the present embodiment.

Fig. 11 is a conceptual diagram illustrating a drawing operation of a reference current in a correction data acquiring operation of the display device according to the present embodiment.

Fig. 12 is a conceptual diagram illustrating a measurement voltage acquisition operation and a correction data generation operation in the correction data acquisition operation of the display device according to the present embodiment.

Fig. 13 is a flowchart showing an example of the correction data acquisition operation of the display device according to the present embodiment.

Fig. 14 is a flowchart showing an example of the display driving operation of the display device according to the present embodiment.

Fig. 15 is a conceptual diagram illustrating a writing operation of the display device according to the present embodiment.

Fig. 16 is a conceptual diagram illustrating a holding operation of the display device according to the present embodiment.

Fig. 17 is a conceptual diagram illustrating a light emitting operation of the display device according to the present embodiment.

Fig. 18 is a timing chart showing an example of the display driving operation of the display device according to the present embodiment.

Fig. 19 is an operation timing chart schematically showing a specific example of the driving method of the display device according to the present embodiment.

Detailed Description

Hereinafter, a display driving device and a driving method thereof, and a display device and a driving method thereof according to the present invention will be described in detail based on embodiments shown in the drawings.

< essential part Structure of display Pixel >

First, a main structure of a display pixel used in a display device according to the present invention and a control operation thereof will be described with reference to the drawings.

Here, for convenience, a case where an organic EL element is used as a current-driven light-emitting element provided in a display pixel will be described.

As shown in fig. 1, a display pixel used in a display device according to the present invention has the following circuit configuration: the organic EL element OLED includes a pixel circuit unit (corresponding to a pixel drive circuit DC described later) DCx and an organic EL element OLED as a current-driven light-emitting element.

The pixel circuit unit DCx includes, for example, a driving transistor (1 st switching element) T1 having a drain terminal and a source terminal connected to a power supply terminal TMv to which a power supply voltage Vcc is applied and a contact N2, and a gate terminal connected to a contact N1; a holding transistor (2 nd switching element) T2 having a drain terminal and a source terminal connected to the power supply terminal TMv (drain terminal of the driving transistor 1) and the contact N1, and a gate terminal connected to the control terminal TMh; and a capacitor (voltage holding element) Cx connected between the gate-source terminals of the driving transistor T1 (between the contact N1 and the contact N2). The contact N2 is connected to the anode terminal of the organic EL element OLED, and a constant voltage Vss is applied to the cathode terminal TMc.

Here, as described in a control operation to be described later, the power supply voltage Vcc having a voltage value different depending on an operation state is applied to the power supply terminal TMv depending on an operation state of the display pixel (pixel circuit portion DCx). A constant voltage Vss is applied to the cathode terminal TMc of the organic EL element OLED. The hold control signal Shld is applied to the control terminal TMh, and the data voltage Vdata corresponding to the gradation value of the display data is applied to the data terminal TMd connected to the contact N2.

The capacitor Cx may be a parasitic capacitance formed between the gate and source terminals of the driving transistor T1, or may be a configuration in which a capacitive element is connected in parallel between the contact N1 and the contact N2 in addition to the parasitic capacitance. Note that the element structures, characteristics, and the like of the driving transistor T1 and the holding transistor T2 are not particularly limited, and here, a case where an n-channel thin film transistor is used is shown.

< control action of display Pixel >

Next, a control operation (control method) of the display pixels (the pixel circuit portion DCx and the organic EL element OLED) having the above-described circuit configuration will be described.

As shown in fig. 2, the operating states of the display element (pixel circuit portion DCx) having the circuit configuration shown in fig. 1 can be roughly divided into: a write operation of writing a voltage component corresponding to a gradation value of display data into the capacitor Cx; a holding operation of holding the voltage component written in the writing operation in the capacitor Cx; and a light emitting operation of causing a gradation current corresponding to a gradation value of the display data to flow to the organic EL element OLED based on the voltage component held by the holding operation, and causing the organic EL element OLED to emit light at a luminance level corresponding to the display data. Each operation state will be described in detail below with reference to a time chart shown in fig. 2.

(write action)

In the writing operation, the voltage component corresponding to the gradation value of the display data is written into the capacitor Cx in a light-off state in which the organic EL element OLED is not caused to emit light.

Fig. 3A and 3B are schematic explanatory views showing an operation state of the display pixel in the writing operation.

The characteristic diagrams shown in fig. 4A and 4B correspond to amorphous silicon transistors having the design values shown in table 1. Here, the threshold voltage Vth in the initial characteristic (voltage-current characteristic) of the drain-source voltage Vds and the drain-source current Ids has, for example, a value shown in table 1.

[ TABLE 1 ]

< design value of transistor >

Thickness of gate insulating film	300nm(3000A)
Thickness of gate insulating film	300nm(3000A)	Channel width W	500μm
Channel length L	6.28μm	Channel width W	500μm
Channel length L	6.28μm	Threshold voltage Vth	2.4V

The solid line SPw shown in fig. 4A is a characteristic line showing characteristics (initial characteristics) in an initial state of the drain-source voltage Vds and the drain-source current Ids in the case of diode connection, in which an n-channel thin film transistor is used as the driving transistor T1. The broken line SPw2 shows an example of a characteristic line of the driving transistor T1 when the characteristic changes from the initial characteristic in accordance with the driving history. The details will be described later. A point PMw on the characteristic line SPw indicates an operation point of the driving transistor T1.

The characteristic line SPw has a threshold voltage Vth corresponding to the drain-source current Ids, which increases non-linearly with an increase in the drain-source voltage Vds if the drain-source voltage Vds exceeds the threshold voltage Vth. That is, in the figure, the value indicated by Veff _ gs is a voltage component that effectively forms the drain-source current Ids, and the drain-source voltage Vds is the sum of the threshold voltage Vth and the voltage component Veff _ gs as shown in the formula (1).

Vds＝Vth+Veff_gs ……(1)

A solid line SPe shown in fig. 4B is a characteristic line indicating a characteristic (initial characteristic) of the driving current Ioled with respect to the driving voltage Voled in the initial state of the organic EL element OLED. The alternate long and short dash line SPe2 shows an example of a characteristic line of the organic EL element OLED when the characteristic changes from the initial characteristic with the driving history. The details will be described later.

The characteristic line SPe has a threshold voltage Vth _ oled corresponding to the driving voltage Voled, and if the driving voltage Voled exceeds the threshold voltage Vth _ oled, the driving current Ioled increases non-linearly with an increase in the driving voltage Voled.

In the write operation, first, as shown in fig. 2 and 3A, the hold control signal Shld at the on level (high level) is applied to the control terminal TMh of the hold transistor T2 to turn on the hold transistor T2. Thereby, the gate-drain of the driving transistor T1 is connected (short-circuited), and the driving transistor T1 is set to a diode-connected state.

Next, the first power supply voltage Vccw for the write operation is applied to the power supply terminal TMv, and the data voltage Vdata corresponding to the gradation value of the display data is applied to the data terminal TMd. At this time, a current Ids corresponding to the potential difference (Vccw — Vdata) between the drain and the source flows between the drain and the source of the driving transistor T1. The data voltage Vdata is set to a voltage value for causing the current Ids flowing between the drain and the source to become a current value necessary for causing the organic EL element OLED to emit light at a luminance level corresponding to a gradation value of display data.

At this time, since the driving transistor T1 is diode-connected, as shown in fig. 3B, the drain-source voltage Vds of the driving transistor T1 is equal to the gate-source voltage Vgs, and the equation (2) is shown.

Vds＝Vgs＝Vccw-Vdata ……(2)

Then, the gate-source voltage Vgs is written (charged) into the capacitor Cx.

Here, a condition required for the value of the first power supply voltage Vccw will be described. Since the driving transistor T1 is of an n-channel type, in order for the drain-source current Ids to flow, the gate potential of the driving transistor T1 must be positive with respect to the source potential, the gate potential is equal to the drain potential and is the first power supply voltage Vccw, and the source potential is the data voltage Vdata, and therefore the relationship of expression (3) must be established.

Vdata<Vccw ……(3)

Further, the contact N2 is connected to the data terminal TMd and the anode terminal of the organic EL element OLED, and the potential Vdata of the contact N2 is required to be equal to or less than the value obtained by adding the voltage Vss at the cathode terminal TMc of the organic EL element OLED to the threshold voltage Vth _ OLED of the organic EL element OLED in order to put the organic EL element OLED in a light-off state at the time of writing, and therefore the potential Vdata of the contact N2 is required to satisfy expression (4).

Vdata≤Vss+Vth_oled ……(4)

Here, if Vss is set to the ground potential 0V, equation (5) is obtained.

Vdata≤Vth_oled ……(5)

Then, from the formulae (2) and (5), the formula (6) can be obtained,

Vccw-Vgs≤Vth_oled ……(6)

further, from equation (1), equation (7) can be obtained since Vgs — Vds — Vth + Veff — gs.

Vccw≤Vth_oled+Vth+Veff_gs ……(7)

Here, since equation (7) needs to be satisfied even if Veff _ gs is 0, equation (8) can be obtained if Veff _ gs is 0.

Vdata<Vccw≤Vth_oled+Vth ……(8)

That is, in the write operation, the value of the first power supply voltage Vccw needs to be set to a value satisfying the relationship of expression (8) in the state where the diode is connected.

Here, the influence of the characteristic change of the driving transistor T1 and the organic EL element OLED according to the driving history will be described.

It is known that the threshold voltage Vth of the driving transistor T1 increases with the driving history. A broken line SPw2 shown in fig. 4A indicates an example of a characteristic line when a characteristic change occurs due to the drive history, and Δ Vth indicates the amount of change in the threshold voltage Vth. As shown in the figure, the characteristic fluctuation of the driving transistor T1 accompanying the driving history changes so as to move the characteristic line SPw of the initial characteristic substantially in parallel. Therefore, the value of the data voltage Vdata required to obtain the gradation current (drain-source current Ids) corresponding to the gradation value of the display data must be increased by the amount of change Δ Vth in the threshold voltage Vth.

Further, it is known that the organic EL element OLED has a high resistance in accordance with the driving history. The alternate long and short dash line SPe2 shown in fig. 4B shows an example of a characteristic line when the characteristic changes according to the drive history.

The characteristic fluctuation of the organic EL element OLED due to the increase in resistance with the drive history changes in a direction in which the rate of increase of the drive current Ioled with respect to the drive voltage Voled decreases substantially with respect to the characteristic line SPe of the initial characteristic. That is, the driving voltage Voled for flowing the driving current Ioled necessary for causing the organic EL element OLED to emit light at a luminance level corresponding to the gradation value of the display data is increased by the amount of the characteristic line SPe2 — the characteristic line SPe. This increase is maximum when the drive current Ioled is at the maximum gray level of the maximum value Ioled (max), as indicated by Δ Voled max in fig. 4B.

(holding action)

In the holding operation, as shown in fig. 2 and 5A, the holding control signal Shld at the off level (low level) is applied to the control terminal TMh, and the holding transistor T2 is turned off. Thereby, the gate-drain of the driving transistor T1 is disconnected (non-connected), and the diode connection is released. Thus, as shown in fig. 5B, the drain-source voltage Vds (gate-source voltage Vgs) of the driving transistor T1 charged in the capacitor Cx in the writing operation is held.

The solid line SPh in fig. 6 is a characteristic line when the diode connection of the driving transistor T1 is released and the gate-source voltage Vgs is constant. Further, a broken line SPw shown in fig. 6 is a characteristic line when the driving transistor T1 is diode-connected. The operating point PMh at the time of holding is an intersection of the characteristic line SPw at the time of diode connection and the characteristic line SPh at the time of diode connection release.

The one-dot chain line SPo shown in fig. 6 is derived as [ characteristic line SPw-Vth ], and an intersection Po of the one-dot chain line SPo and the characteristic line SPh indicates the pinch-off voltage Vpo. Here, as shown in fig. 6, in the characteristic line SPh, the region from 0V to the pinch-off voltage Vpo of the drain-source voltage Vds is an unsaturated region, and the region above the pinch-off voltage Vpo of the drain-source voltage Vds is a saturated region.

(Lighting action)

As shown in fig. 2 and 7A, the state where the hold control signal Shld at the off level (low level) is applied to the control terminal TMh (the state where the diode connection state is released) is maintained, and the terminal voltage Vcc of the power supply terminal TMv is switched from the first power supply voltage Vccw for writing to the second power supply voltage Vcce for light emission. As a result, a current Ids corresponding to the voltage component Vgs held in the capacitor Cx flows between the drain and the source of the driving transistor T1, and this current is supplied to the organic EL element OLED, and the organic EL element OLED emits light at a luminance corresponding to the value of the supplied current.

A solid line SPh shown in fig. 8A is a characteristic line of the driving transistor T1 when the gate-source voltage Vgs is constant. The solid line SPe represents a load line of the organic EL element OLED, and is a curve showing the driving voltage Voled-driving current Ioled characteristic of the organic EL element OLED in the reverse direction with reference to the potential difference between the power supply terminal TMv and the cathode terminal TMc of the organic EL element OLED, i.e., the value of Vcce-Vss.

The operating point of the driving transistor T1 in the light emission operation shifts from PMh in the holding operation to PMe, which is the intersection of the characteristic line SPh of the driving transistor T1 and the load line SPe of the organic EL element OLED. Here, as shown in fig. 8A, the operating point PMe indicates a point at which, in a state where a voltage Vcce-Vss is applied between the power supply terminal TMv and the cathode terminal TMc of the organic EL element OLED, the voltage is divided between the source and drain of the driving transistor T1 and the anode and cathode of the organic EL element OLED. That is, at the operating point PMe, the voltage Vds is applied between the source and the drain of the driving transistor T1, and the driving voltage Voled is applied between the anode and the cathode of the organic EL element OLED.

Here, in order to prevent the current Ids (desired value current) flowing between the source and the drain of the driving transistor T1 during the writing operation and the driving current Ioled supplied to the organic EL element OLED during the light emitting operation from changing, the operating point PMe must be maintained within a saturation region on the characteristic line. Voled becomes the maximum Voled (max) at the highest gray level. Therefore, in order to maintain the PMe in the saturation region, the value of the second power supply voltage Vcce must satisfy the condition of expression (9).

Vcce-Vss≥Vpo+Voled(max) ……(9)

Here, if Vss is set to the ground potential 0V, equation (10) is obtained.

Vcce≥Vpo+Voled(max) ……(10)

Further, the holding operation of switching the holding control signal Shld from the on level to the off level and the light emitting operation of switching the power supply voltage Vcc from the voltage Vccw to the voltage Vcce may be performed in synchronization with each other.

< relationship between fluctuation of organic device characteristics and Voltage-Current characteristics >

As shown in fig. 4B, the organic EL element OLED has a higher resistance with the operation history, and the increase rate of the drive current Ioled with respect to the drive voltage Voled changes in a direction of decreasing. That is, the slope of the load line SPe of the organic EL element OLED shown in fig. 8A changes in a decreasing direction. Fig. 8B is a diagram in which the change of the load line SPe of the organic EL element OLED with the drive history is recorded, and the load line changes SPe → SPe2 → SPe 3. As a result, the operating point of the driving transistor T1 moves in the direction PMe → PMe2 → PMe3 on the characteristic line SPh of the driving transistor T1 according to the driving history.

At this time, during a period in which the operating point is in the saturation region on the characteristic line (PMe → PMe2), the drive current Ioled maintains the value of the desired value current during the write operation, but if it enters the unsaturated region (PMe3), the drive current Ioled decreases from the desired value current during the write operation, and a display failure occurs. In fig. 8B, the pinch-off point Po is located on the boundary between the unsaturated region and the saturated region, that is, the potential difference between the operating points PMe and Po at the time of light emission is a compensation margin value for maintaining the OLED drive current at the time of light emission for increasing the resistance of the organic EL. In other words, in each Ioled level, the potential difference on the characteristic line SPh of the driving transistor sandwiched between the locus SPo of the pinch-off point and the load line SPe of the organic EL element is a compensation margin. As shown in fig. 8B, the compensation margin value decreases as the value of the drive current Ioled increases, and increases as the voltage Vcce-Vss applied between the power supply terminal TMv and the cathode terminal TMc of the organic EL element OLED increases.

< relationship between variation in TFT element characteristics and Voltage-Current characteristics >

In the voltage gradation control used in the display pixel (pixel circuit section) described above, the voltage value of the data voltage Vdata is set based on the characteristic of the drain-source current Ids with respect to the drain-source voltage Vds of the driving transistor T1 when the driving transistor T1 has the initial characteristic.

However, as shown in fig. 4A, in the threshold voltage of the driving transistor T1 corresponding to the driving history: in the case where Vth is increased, when the data voltage Vdata of the same voltage value is applied, the current value of the light emission driving current supplied to the light emitting element (organic EL element OLED) is reduced as compared with when the driving transistor T1 has the initial characteristic. Therefore, the light emitting element can no longer be operated to emit light at a luminance level corresponding to the gradation value of the display data. In particular, when an amorphous silicon transistor is used as a transistor, it is known that the element characteristics greatly vary.

In the voltage-current characteristic of the n-channel amorphous silicon transistor, that is, in the relationship between the drain-source voltage Vds and the drain-source current Ids shown in fig. 4A, an increase in Vth (change from the characteristic line SPw to the characteristic line SPw 2) occurs, which is offset by the gate electric field due to the carrier trap to the gate insulating film along with the drive history and the change with time. As a result, the drain-source current Ids decreases with respect to the drain-source voltage Vds applied to the amorphous silicon transistor, and the light emission luminance of the light emitting element decreases.

Since the variation in the element characteristics occurs only at the threshold voltage Vth, the V-I characteristic line SPw2 after the variation substantially matches the voltage-current characteristics when a constant voltage (corresponding to the compensation voltage Vofst described later) corresponding to the variation Δ Vth (about 2V in the figure) in the threshold voltage Vth is clearly added to the drain-source voltage Vds of the V-I characteristic line SPw in the initial state (that is, when the V-I characteristic line SPw is shifted in parallel by Δ Vth).

That is, when writing display data into the display pixel (pixel circuit unit DCx), the data voltage corrected by adding the constant voltage (compensation voltage Vofst) lai corresponding to the variation Δ V of the element characteristic (threshold voltage) of the driving transistor T1 provided in the display pixel (corresponding to the correction gradation voltage (driving signal) Vpix described later) is applied to the source terminal (contact N2) of the driving transistor T1, so that the driving current Iem having a current value corresponding to the gradation value of the display data can be caused to flow to the organic EL element OLED by compensating for the variation of the voltage-current characteristic caused by the variation of the threshold voltage Vth of the driving transistor T1, and the light emission operation can be performed at a desired luminance level.

When the threshold voltage Vth of the driving transistor T1 varies in accordance with the drive history, the drive current Iem having a current value corresponding to the gradation value of the display data can be caused to flow into the organic EL element OLED by the correction described above, in the case where the resistance of the organic EL element OLED does not increase in accordance with the drive history. However, the degree of the high resistance of the organic EL element OLED due to the drive history is generally small compared to the variation of the threshold voltage Vth of the driving transistor T1 according to the drive history.

Therefore, in practice, by performing only the correction corresponding to the variation in the threshold voltage Vth of the driving transistor T1 with respect to the driving history, it is possible to substantially control the driving current Iem having the current value corresponding to the gradation value of the display data to flow to the organic EL element OLED, and the embodiment shown below has a configuration in which the correction corresponding to the variation in the threshold voltage Vth of the driving transistor T1 is performed.

< embodiment >

Hereinafter, the overall configuration of a display device including a display panel in which a plurality of display pixels including the main portion configuration of the pixel circuit portion as described above are arranged in 2 dimensions will be schematically and specifically described.

< display device >

Fig. 10 is a main part configuration diagram showing an example of a data driver and a display pixel (an image driving circuit and a light emitting element) which can be used in the display device according to the present embodiment.

In fig. 10, reference numerals indicating a circuit configuration corresponding to the pixel circuit unit DCx (see fig. 1) are also shown. Note that, in fig. 10, for convenience of explanation, all of various signals and data transmitted between the respective structures of the data driver and applied currents and voltages are indicated by arrows, but as described later, these signals and data, and currents and voltages are not necessarily transmitted or applied at the same time.

As shown in fig. 9 and 10, the display device 100 according to the present embodiment includes a display panel 110, a selection driver (selection driving unit) 120, a power driver (power driving unit) 130, a data driver (display driving device, data driving unit) 140, a system controller 150, and a display signal generating circuit 160.

The display panel 110 includes, for example, a plurality of selection lines Ls arranged in a row direction (left-right direction in the figure), a plurality of power supply voltage lines Lv arranged in parallel to the selection lines Ls in the row direction, a plurality of data lines Ld arranged in a column direction (up-down direction in the figure), and a plurality of display pixels PIX arranged in a matrix of n rows × m columns (n, m are arbitrary positive integers) near each intersection of the plurality of selection lines Ls and the plurality of data lines Ld, and including a main structure of the pixel circuit unit DCx (see fig. 1).

The select driver 120 applies a select signal Ssel to each select line Ls at a predetermined timing.

The power supply driver 130 applies the power supply voltage Vcc of a predetermined power supply level to each power supply voltage line Lv at a predetermined timing.

The data driver 140 supplies a drive signal (corrected gradation voltage Vpix) to each data line Ld at a predetermined timing.

The system controller 150 generates and outputs a selection control signal, a power supply control signal, and a data control signal that control at least the operating states of the selection driver 120, the power supply driver 130, and the data driver 140, based on a time signal supplied from a display signal generation circuit 160, which will be described later.

The display signal generation circuit 160 generates display data (luminance gradation data) made of a digital signal based on, for example, a video signal supplied from the outside of the display device 100, supplies the display data to the data driver 140, extracts or generates a time signal (system clock or the like) for displaying predetermined image information on the display panel 110 based on the display data, and supplies the time signal to the system controller 150.

The above-described configurations will be explained below.

(display panel)

In the display device 100 according to the present embodiment, the plurality of display pixels PIX arranged in a matrix on the substrate of the display panel 110 are grouped into an upper region and a lower region of the display panel 110, as shown in fig. 9, for example, and the display pixels PIX included in each group are connected to the branched power supply voltage lines Lv, respectively. That is, the power supply voltage Vcc applied in common to the display pixels PIX in the 1 st to n/2 nd rows in the upper region of the display panel 110 and the power supply voltage Vcc applied in common to the display pixels PIX in the 1+ n/2 th to n th rows in the lower region are independently output at different timings via different power supply voltage lines Lv by the power supply driver 130.

The select driver 120 and the data driver 140 may be disposed in the display panel 110. In some cases, the selection driver 120, the power driver 130, and the data driver 140 may be disposed in the display panel 110.

(display pixel)

The display pixel PIX used in the present embodiment is disposed in the vicinity of an intersection of the select line Ls connected to the select driver 120 and the data line Ld connected to the data driver 140.

For example, as shown in fig. 10, the organic EL element OLED is a current-driven light emitting element, and the pixel driving circuit DC is provided with a main structure (see fig. 1) including the pixel circuit portion DCx and generates a light emission driving current for driving the organic EL element OLED to emit light.

The pixel drive circuit DC includes, for example, a transistor Tr11 (diode connection transistor) having a gate terminal connected to the selection line Ls, a drain terminal connected to the power supply voltage line Lv, a source terminal connected to the contact N11, a transistor Tr12 (selection transistor) having a gate terminal connected to the selection line Ls, a source terminal connected to the data line Ld, a drain terminal connected to the contact N12, a transistor Tr13 (drive transistor: drive element) having a gate terminal connected to the contact N11, a drain terminal connected to the power supply voltage line Lv, and a source terminal connected to the contact N12, and a capacitor (voltage holding element) Cs connected between the contacts N11 and N12 (between the gate-source terminal of the transistor Tr 13).

Here, the transistor Tr13 corresponds to the drive transistor T1 shown in the main structure (fig. 1) of the pixel circuit section DCx described above, and the transistor Tr11 corresponds to the holding transistor T2, the capacitor Cs corresponds to the capacitor Cx, and the contacts N11 and N12 correspond to the contact N1 and the contact N2, respectively.

The selection signal Ssel applied from the selection driver 120 to the selection line Ls corresponds to the retention control signal Shld, and the drive signal (the corrected gradation level voltage Vpix) applied from the data driver 140 to the data line Ld corresponds to the data voltage Vdata.

The anode terminal of the organic EL element OLED is connected to the contact N12 of the pixel driving circuit DC, and a constant voltage Vss, which is a constant low voltage, is applied to the cathode terminal TMc. Here, in the drive control operation of the display device to be described later, during the write operation period in which the drive signal (the corrected gradation voltage Vpix) corresponding to the display data is supplied to the pixel drive circuit DC, the corrected gradation voltage Vpix applied from the data driver 140, the fixed voltage Vss, and the high-potential power supply voltage Vcc (Vcce) applied to the power supply voltage line Lv during the light emission operation period satisfy the relationships (3) to (10) described above, and therefore the organic EL element OLED is not turned on during the write operation.

The capacitor Cs may be a parasitic capacitance formed between the gate and the source of the transistor Tr13, may be a structure in which a capacitive element other than the transistor Tr13 is connected between the contact N11 and the contact N12 in addition to the parasitic capacitance, or may be both of them.

The transistors Tr11 to Tr13 are not particularly limited, but for example, an n-channel type amorphous silicon thin film transistor can be used by being constituted by n-channel type electric field effect transistors. In this case, with the amorphous silicon manufacturing technique that has been established, the pixel drive circuit DC composed of amorphous silicon thin film transistors whose element characteristics (electron mobility, etc.) are stable can be manufactured by a simpler manufacturing process. In the following description, a case where n-channel thin film transistors are used as the transistors Tr11 to Tr13 will be described.

The circuit configuration of the display pixel PIX (pixel drive circuit DC) is not limited to the configuration shown in fig. 10, and may be a configuration having another circuit configuration as long as the current path of at least the element corresponding to the drive transistor T1, the holding transistor T2, and the capacitor Cx, and the drive transistor T1, which are shown in fig. 1, is connected in series to the current-driven light-emitting element (organic EL element OLED). The light-emitting element driven by the pixel drive circuit DC to emit light may be other current-driven light-emitting elements such as a light-emitting diode, not limited to the organic EL element OLED.

(selection driver)

The select driver 120 sets the display pixels PIX in each row to a selected state by applying a select signal Ssel at a select level (high level in the display pixels PIX shown in fig. 1 or fig. 10) to each select line Ls based on a select control signal supplied from the system controller 150.

Specifically, the operation of applying the high-level selection signal Ssel to the selection line Ls of each line is sequentially executed at predetermined timing for each line in the correction data acquisition operation period and the writing operation period described later for each display pixel PIX of each line, and the display pixels PIX of each line are sequentially set to the selected state.

The select driver 120 may be configured to include, for example, a shift register that sequentially outputs shift signals corresponding to the select lines Ls in each row based on a select control signal supplied from the system controller 150 described later, and an output circuit unit (output buffer) that converts the shift signals into a predetermined signal level (select level) and sequentially outputs the signal level as a select signal Ssel to the select lines Ls in each row. If the drive frequency of the select driver 120 is within the operable range in the amorphous silicon transistor, a part or all of the transistors included in the select driver 120 may be manufactured together with the transistors Tr11 to Tr13 in the pixel drive circuit DC.

(Power driver)

The power supply driver 130 applies a power supply voltage Vcc (Vccw: 1 st power supply voltage) having a low potential to each power supply voltage line Lv at least in a correction data acquisition operation period and a writing operation period, which will be described later, based on a power supply control signal supplied from the system controller 150, and applies a power supply voltage Vcc (Vcce: 2 nd power supply voltage) having a higher potential than the power supply voltage Vccw having a low potential to each power supply voltage line Lv in a light emission operation period.

Here, in the present embodiment, as shown in fig. 9, the display pixels PIX are grouped into, for example, an upper area and a lower area of the display panel 110, and the independent power supply voltage lines Lv branched for each group are arranged, so that the power supply voltage Vcc having the same voltage level is applied to the display pixels PIX arranged in the same area (included in the same group) via the power supply voltage line Lv branched and arranged in the area in each operation period.

The power supply driver 130 may be configured to include, for example, a timing generator (e.g., a shift register or the like that sequentially outputs shift signals) that generates timing signals corresponding to the power supply voltage lines Lv of the respective regions (groups) based on the power supply control signal supplied from the system controller 150, and an output circuit unit that converts the timing signals into predetermined voltage levels (voltage values Vccw, Vcce) and outputs the voltage levels as the power supply voltage Vcc to the power supply voltage lines Lv of the respective regions.

(data driver)

The data driver 140 obtains correction data (specific value) which is corrected in accordance with the amount of fluctuation of the element characteristic (threshold voltage) of the transistor Tr13 (corresponding to the driving transistor T1) for light emission driving provided in each display pixel PIX (pixel driving circuit DC) arranged on the display panel 110 and stored in association with each of the plurality of display pixels PIX.

Further, a signal voltage (original gradation voltage Vorg) corresponding to display data (luminance gradation value) of each display pixel PIX supplied from a display signal generation circuit 160 described later is corrected by an offset setting value Vofst based on the correction data, and a corrected gradation voltage (drive signal) Vpix is generated and supplied to each display pixel PIX via a data line Ld.

In the present embodiment, a reference current (constant current) Iref _ x corresponding to a predetermined gray scale (x gray scale) is supplied to each display pixel PIX through a data line Ld, a reference voltage (original gray scale voltage) Vorg _ x corresponding to the predetermined gray scale (x gray scale) is subtracted from a measurement voltage Vmes _ x detected at that time, and digital data corresponding to a voltage difference as a calculation result is acquired as correction data (specific value).

The reference current Iref _ x is a current having a current value necessary for causing the organic EL element OLED to emit light at a luminance corresponding to a predetermined gray scale (x gray scale). Further, the reference voltage Vorg _ x is a voltage having a voltage value at which a current value of a current Ids flowing between the drain and the source of the transistor Tr13 is equal to the reference current Iref _ x when the reference voltage Vorg _ x is supplied to the display pixel PIX via the data line Ld when the light emission driving transistor Tr13 has initial characteristics.

The data driver (display driving device) 140 used in the present embodiment detects a voltage component (voltage difference Δ V ≈ Δ Vth) corresponding to a variation amount of an element characteristic (threshold voltage) of the transistor Tr13 for light emission driving provided in each display pixel PIX (pixel driving circuit DC) arranged on the display panel 110 shown in fig. 9, converts the voltage component into digital data, and stores the digital data as correction data corresponding to each of the plurality of display pixels PIX.

Further, a signal voltage (original gradation voltage Vorg) corresponding to display data (luminance gradation value) of each display pixel PIX supplied from a display signal generation circuit 160 described later is corrected based on the correction data to generate a corrected gradation voltage Vpix, and is supplied to each display pixel PIX via the data line Ld.

As shown in fig. 10, for example, the data driver 140 includes a shift register-data register unit 141, a gradation voltage generation unit 142, a compensation voltage generation unit 143, a voltage adjustment unit 144, a difference detection unit 145, a frame memory (memory circuit) 146, and a correction data generation unit 147.

The gradation voltage generating section 142, the compensation voltage generating section 143, the voltage adjusting section 144, the difference detecting section 145, and the correction data generating section 147 are provided for each column of the data line Ld.

Here, the difference detecting unit 145 and the correction data generating unit 147 constitute a specific value detecting unit 148, and the frame memory 146, the shift register-data register unit 141, the gradation voltage generating unit 142, the compensation voltage generating unit 143, and the voltage adjusting unit 144 constitute a gradation signal correcting unit 149.

In the present embodiment, as shown in fig. 10, the configuration in which the frame memory 146 is built in the data driver 140 has been described, but the present invention is not limited to this, and a configuration in which the frame memory 146 is separately provided outside the data driver 140 may be employed.

The shift register-data register unit 141 includes a shift register that sequentially outputs shift signals based on a data control signal supplied from the system controller 150, and a data register that takes in, based on the shift signals, correction data output from the correction data generating units 147 provided in rows during a correction data acquiring operation and outputs the correction data to the frame memory 146, transfers display data supplied from the display signal generating circuit to the gradation voltage generating units 142 provided in rows during a writing operation, and further takes in correction data output from the frame memory 146 and transfers the correction data to the compensation voltage generating units 143 provided in rows.

Specifically, the shift register/data register section 141 selectively performs (i) an operation of sequentially capturing display data (luminance gradation values) of the display pixels PIX of 1 row of the display panel 110, which are sequentially supplied as continuous data from the display signal generation circuit, in association with the display data and transferred to the gradation voltage generation sections 142 provided for each column, (ii) an operation of capturing data output from the correction data generation section 147 provided for each column based on the operation result (voltage difference Δ V) of the difference value detection section 145, the operation of sequentially transferring the correction data (digital data) corresponding to the amount of fluctuation of the element characteristics (threshold voltages) of the transistor Tr13 and the transistor Tr12 of each display pixel PIX (pixel drive circuit DC) to the frame memory 146, (iii) the operation of sequentially extracting the correction data of the display pixel PIX of 1 specific row from the frame memory 146 and transferring the correction data to the compensation voltage generator 143 provided for each column. These operations will be described in detail later.

The gradation voltage generating unit 142 includes, for example, a digital-to-analog converter (D/a converter) that converts display data (digital signals) into analog voltages and an output circuit that outputs an original gradation voltage Vorg composed of analog voltages at a predetermined timing, and generates and outputs the original gradation voltage Vorg having a voltage value for causing the organic EL element OLED to perform a light emitting operation or a non-light emitting operation (black display operation) at a predetermined gradation based on the display data of each display pixel PIX taken in via the shift register-data register unit 141.

In a state where the transistor Tr13 is the V-I characteristic line SPw, the grayscale voltage generating section 142 can automatically output, to the voltage adjusting section 144, a reference voltage Vorg _ x corresponding to a reference current Iref _ c of x grayscale level set in the transistor 3 described later, instead of the original grayscale voltage Vorg based on the display data output from the shift register-data register section 141, in a case where there is no input from the shift register-data register section 141.

The compensation voltage generator 143 includes a digital-to-analog converter (D/a converter) that converts correction data, which is a digital signal, extracted from the frame memory 146 into an analog voltage, and generates and outputs a compensation voltage (compensation voltage) Vofst corresponding to a variation amount (Δ Vth shown in fig. 4A, corresponding to a voltage difference Δ V generated in a difference detector 145, which will be described later) of the threshold voltage Vth of the transistor Tr13 of each display pixel PIX (pixel drive circuit DC) based on the correction data. Here, the generated compensation voltage (compensation voltage) Vofst is a voltage between the drain and the source of the transistor Tr13, which corrects the amount of change in the threshold voltage of the transistor Tr13 and the amount of change in the threshold voltage of the transistor Tr12 of each display pixel PIX (pixel drive circuit DC) so that a corrected gradation current having a current value approximate to a normal gradation by the corrected gradation voltage Vpix flows.

The voltage adjustment unit 144 adds the original gradation voltage Vorg output from the gradation voltage generation unit 142 and the offset voltage Vofst output from the offset voltage generation unit 143, and outputs the resultant voltage to the data lines Ld arranged in the column direction of the display panel 110 via the difference detection unit 145. Specifically, in a correction data acquisition operation described later, the reference voltage Vorg _ x, which is the original gray-scale voltage Vorg of a predetermined gray-scale (x gray-scale) output from the gray-scale voltage generation unit 142, is output to the difference detection unit 145 as it is.

On the other hand, in the writing operation, the corrected gradation voltage Vpix is a value satisfying the following expression (11). That is, the compensation voltage Vofst generated by the compensation voltage generating unit 143 based on the correction data extracted from the frame memory 146 is added to the original gradation voltage Vorg corresponding to the display data output from the gradation voltage generating unit 142 in an analog manner, and the voltage component as the sum of the voltages is output to the data line Ld as the correction gradation voltage Vpix.

Vpix＝Vorg+Vofst ……(11)

The difference detection unit 145 includes a differential amplification circuit (voltage operation unit) DAP, a constant current source (current source) SCi, and a connection path switching switch SW therein. Here, the connection path changeover switch SW is a changeover switch for selectively connecting one end of the data line Ld to either the output terminal of the constant current source SCi or the output terminal of the voltage regulator section 144.

The differential amplifier circuit DAP includes a comparator CMP having two input terminals, an output terminal, of an inverting input terminal and a non-inverting input terminal, resistance elements R1, R2, R3, R4, and a buffer circuit BUF, and has the following circuit configuration: the inverting input terminal of the comparator CMP is connected to the output terminal of the voltage regulator 144 via the resistor R1, the non-inverting input terminal is connected to the output terminal of the constant current source SCi via the resistor R3 and the buffer circuit BUF, and is connected to a low potential (for example, ground potential) via the resistor R4, and the output terminal and the inverting input terminal are connected via the resistor R2. Here, for example, the resistance values of the resistor element R2 and the resistor element R4 are set to the same value, and the resistance values of the resistor element R1 and the resistor element R3 are set to the same value. The differential amplifier circuit DAP detects a voltage difference Δ V formed by a difference between a reference voltage input to the non-inverting input terminal via the resistance element R1 and a measurement voltage input to the inverting input terminal via the resistance element R3, and outputs a value obtained by amplifying the voltage difference Δ V by a detected value of a set amplification factor as a difference value DEF. Here, when the resistance value of the resistance element R2 is R2 and the resistance value of the resistance element R1 is R1, the amplification factor a of the differential amplifier circuit DAP has a value of R2/R1, and the amplification factor a has a value of, for example, 1 to 5. When the resistance value of the resistance element R2 and the resistance value of the resistance element R1 are made equal to each other, the amplification factor a is 1, and the difference DEF output from the differential amplification circuit DAP is equal to the difference between the reference voltage and the measurement voltage. When the resistance value R2 of the resistance element R2 is made larger than the resistance value R1 of the resistance element R1, the amplification factor a becomes larger than 1, and the difference DEF output from the differential amplifier circuit DAP becomes a value obtained by multiplying the voltage difference Δ V between the reference voltage and the measurement voltage by the amplification factor a. In this case, since the value output from the differential amplifier circuit DAP can be made to be a value obtained by amplifying the voltage difference Δ V between the reference voltage and the measurement voltage, and the sensitivity of detecting the amount of change in the measurement voltage with respect to the reference voltage can be improved as compared with the case where the amplification factor a is set to 1, it is preferable to make the resistance value R2 of the resistance element R2 larger than the resistance value R1 of the resistance element R1 and to make the amplification factor a larger than 1.

In fig. 10, the differential amplifier circuit DAP is configured by 1 comparator CMP, resistance elements R1 to R4, and a buffer circuit BUF, but the present invention is not limited to this configuration, and a differential amplifier circuit configured by a well-known device amplifier circuit, for example, may be used. In the case of the differential amplifier circuit using this device amplifier circuit, since this circuit has a function of removing in-phase noise, an error in detecting the voltage difference Δ V can be reduced as compared with the case of configuring the differential amplifier circuit DAP using 1 comparator CMP as shown in fig. 1. In the instrument amplification circuit, since the impedance of the input terminal becomes high, the buffer circuit BUF can be omitted.

In the difference detection unit 145, first, in a state where a predetermined voltage (particularly, the low-potential power supply voltage Vccw) is applied to the power supply voltage line Lv, a reference current Iref _ x (for example, a current having a current value necessary for causing the organic EL element OLED to emit light at the maximum luminance gradation) corresponding to a predetermined current value of the gradation x (for example, the maximum luminance gradation) is forcibly flowed from the display pixels PIX (pixel driving circuits DC) of the selected row by the constant current source SCi so as to be drawn from the data line Ld to the data driver 140. At this time, the measurement voltage Vmes _ x measured for the data line Ld (or the constant current source SCi) of the predetermined gradation level x is output to the + side input terminal of the comparator CMP. In parallel with this, the power supply voltage line Lv is maintained at the predetermined voltage (power supply voltage Vccw), and the reference voltage Vorg _ x, which is the original gradation voltage Vorg of the predetermined gradation x and is output from the voltage adjusting section 144, is input to the input terminal on the negative side of the comparator CMP.

In the comparator CMP, in a state where the data line Ld is connected to the constant current source SCi by the connection path switching switch SW, a predetermined reference current Iref _ x is caused to flow by the constant current source SCi, and a voltage difference Δ V (═ Vmes _ x-Vorg _ x) between a measurement voltage Vmes _ x, which is a voltage generated in the data line Ld, and a reference voltage Vorg _ x, which is a potential generated by the voltage adjusting unit 144 (strictly, the grayscale voltage generating unit 142) is calculated, and a value (═ a × Δ V) obtained by multiplying the voltage difference Δ V by the amplification factor a of the differential amplifying circuit DAP is output as a difference DEF to a correction data generating unit 147 (voltage subtraction process), which will be described later. Here, the voltage difference Δ V, which is a voltage component calculated by the voltage subtraction processing of the comparator CMP, corresponds to the degree of characteristic degradation of the display pixel PIX targeted for the correction data acquisition operation at the x-gradation at the time of performing the correction data acquisition operation, and more specifically, corresponds to the change amount Δ Vth of the threshold voltage Vth of the transistor Tr13 of the pixel drive circuit DC. The present inventors have confirmed that the amount of change Δ Vth in the threshold voltage Vth of the transistor Tr13 is almost equal to the amount of change Δ Vth in any level, regardless of the value of the luminance level (gray level x) specified by the display data.

In a write operation described later, the connection path changeover switch SW is controlled so as to disconnect the data line Ld from the constant current source SCi and connect the voltage regulator 144 to the data line Ld. The corrected gradation voltage Vpix generated by adding the original gradation voltage Vorg based on the display data and the compensation voltage Vofst based on the correction data by the voltage adjustment unit 144 is applied to the display pixel PIX via the data line Ld, but the reference current Iref _ x and the subtraction process from the reference voltage Vorg _ x are not performed at this time.

The correction data generator 147 includes an analog-to-digital converter (a/D converter) that converts the difference DEF composed of an analog voltage output from the difference detector 145 into a digital signal. Then, the voltage difference Δ V corresponding to the change amount Δ Vth of the threshold voltage Vth of the transistor Tr13 of each display pixel PIX (pixel drive circuit DC) detected by the difference detection unit 145 is converted into correction data made of a digital signal, and is output to the frame memory 146 via the shift register-data register unit 141. As described above, when the amplification factor a of the differential amplifier circuit DAP of the difference detector 145 is set to a value greater than 1, the correction data generator 147 includes a data conversion circuit that generates a value corresponding to a value (DEF/a) obtained by dividing the difference DEF output from the difference detector 145 by a value corresponding to the amplification factor a of the differential amplifier circuit DAP, that is, a value corresponding to the voltage difference Δ V between the reference voltage and the measurement voltage, and supplies the value to the analog-to-digital converter. The data conversion circuit may be configured using a known division circuit or a resistance division circuit, for example.

The frame memory 146 sequentially takes in correction data, which is generated in the correction data generating unit 147 provided in each column and is composed of digital data for each of the display pixels PIX in 1 row (corresponding to the change amount Δ Vth of the threshold voltage Vth of the transistor Tr13 of each pixel driving circuit DC), via the shift register-data register unit 141, and stores the correction data for each of the display pixels PIX in the display panel 1 screen (1 frame) in each region, in the correction data acquiring operation performed before the writing operation to the display data (correction gradation voltage Vpix) of each of the display pixels PIX arranged in the display panel 110, and sequentially outputs the correction data for each of the display pixels PIX in 1 row to the compensation voltage generating unit 143 via the shift register-data register unit 141 in the writing operation.

< method for driving display device >

Next, a method of driving the display device according to the present embodiment will be described.

The drive control operation of the display device 100 according to the present embodiment generally includes a correction data acquisition operation and a display drive operation.

In the correction data acquiring operation, a voltage difference Δ V corresponding to a variation in the element characteristics (threshold voltage) of the light-emitting drive transistor Tr13 (drive transistor) of each display pixel PIX (pixel drive circuit DC) arranged on the display panel 110 is detected, and digital data corresponding to the voltage difference Δ V is stored as correction data in the frame memory 146 for each display pixel PIX.

In the display driving operation, the original gradation voltage Vorg corresponding to the display data is corrected based on the correction data obtained for each display pixel PIX, written as the correction gradation voltage Vpix to each display pixel PIX and held as a voltage component, and a light emission drive current Iem corresponding to the display data in which the influence of the variation in the element characteristics of the transistor Tr13 is compensated based on the voltage component is supplied to the organic EL element OLED and light is emitted at a predetermined luminance level.

Each operation will be specifically described below.

(correction data obtaining operation)

As shown in fig. 13, the correction data acquiring operation (compensation voltage detecting operation) according to the present embodiment is such that, first, in a state where the low-potential power supply voltage Vcc (Vccw ≦ Vss) as the write operation level is applied from the power supply driver 130 to the power supply voltage line Lv connected to the display pixels PIX in the ith row (which is a positive integer of 1 ≦ i ≦ n) (in the present embodiment, to all the display pixels PIX commonly connected to the group including the ith row), the selection signal Ssel at the selection level (high level) is applied from the selection driver 120 to the selection line Ls in the ith row, and the display pixels PIX in the ith row are set to the selection state (step S311).

Thus, the transistor Tr11 in the pixel drive circuit DC of the display pixel PIX in the i-th row is turned on, the transistor Tr13 is set to a diode-connected state, the power supply voltage Vcc (Vccw) is applied to the drain terminal and the gate terminal (the contact N11, one end side of the capacitor Cs) of the transistor Tr13, the transistor Tr12 is also turned on, and the source terminal (the contact N12, the other end of the capacitor Cs) of the transistor Tr13 is electrically connected to the data line Ld in each column.

Next, as shown in fig. 11, the difference detection unit 145 sets the connection path changeover switch SW to connect the data line Ld to the constant current source SCi and supply the reference current Iref _ x by drawing it from the data line Ld toward the data driver 140 (step S312).

At this time, the current value of the current Ids flowing between the drain and the source of the transistor Tr13 matches the current value of the reference current Iref _ x. However, since there is actually a capacitance component parasitic on the data line Ld, when a current is supplied to the data line Ld, the capacitance component is first charged. Therefore, after the supply of the reference current Iref _ x to the data line Ld is started, a delay occurs in the amount of charging time for charging the capacitance component until the current value of the current actually flowing into the data line Ld reaches the set current value of the reference current Iref _ x. The charging time is longer as the current value of the reference current Iref _ x is smaller. In the correction data obtaining operation, it is preferable that the current value of the current flowing through the data line Ld reaches the set current value of the reference current Iref _ x in a short time, and therefore, the current value of the reference current Iref _ x is preferably set to a large value corresponding to, for example, the maximum luminance level or a gray scale level in the vicinity thereof.

Next, at the time point when the current value of the current flowing in the data line Ld reaches the current value set as the reference current Iref _ x and becomes stable, the potential of the output terminal of the constant current source SCi is measured, and the measurement voltage Vmes _ x is applied to the + side input terminal of the comparator CMP in the differential amplifier circuit DAP set in the difference detection unit 145 (step S313).

Here, the measured measurement voltage Vmes _ x varies in voltage value according to the characteristic that the reference current Iref _ x flows to the drain-source transistor Tr13, respectively.

Next, as shown in fig. 12, based on a data control signal output from the system controller 150, for example, the gray-scale voltage generating unit 142 generates an original gray-scale voltage Vorg corresponding to the display data of the predetermined gray-scale (for example, x gray-scale) as a reference voltage Vorg _ x, and the reference voltage Vorg _ x is output to the difference detecting unit 145 through the voltage adjusting unit (i.e., the voltage adjusting unit as it is) (step S314).

The differential amplifier circuit DAP provided in the difference detection unit 145 performs a voltage subtraction process of calculating a voltage difference Δ V (Vmes _ x-Vorg _ x) between the measurement voltage Vmes _ x and the reference voltage Vorg _ x acquired in the comparator CMP in steps S313 and S314 and outputting a difference DEF (a × Δ V) obtained by multiplying the voltage difference Δ V by the amplification factor a of the differential amplifier circuit (step S315). Here, the voltage difference Δ V is an analog voltage corresponding to the change amount Δ Vth (Δ V ≈ Δ Vth) of the threshold voltage Vth of the transistor Tr13 of the pixel driving circuit DC at that time point of the display pixel PIX to be subjected to the correction data acquisition operation, as described above.

Next, as shown in fig. 12, the difference value output from the difference value detection unit 145 (differential amplifier circuit DAP) is converted into a value corresponding to the voltage difference Δ V by the correction data generation unit 147, subjected to a/D conversion, converted into correction data made of a digital signal, and output to the shift register/data register unit 141 (step S316).

The shift register-data register unit 141 sequentially transfers the correction data for each column to the frame memory 146, stores the correction data in each area of the frame memory 146 for each display pixel PIX, and finishes obtaining the correction data corresponding to the voltage difference Δ V (i.e., the change amount Δ Vth of the threshold voltage Vth of the transistor Tr13 of the pixel drive circuit DC) (step S317).

Next, after the correction data is acquired for the display pixels PIX in the i-th row, in order to perform the series of processing operations also for the display pixels PIX in the subsequent row (i + 1-th row) (steps S311 to S317), a process of increasing the variable "i" for specifying the row (i ═ i +1) is performed (step S318), and then it is compared and judged whether or not the variable "i" after the increase process is smaller than the total number of rows n set on the display panel 110 (i < n) (step S319).

In step S319, when the variable "i" is smaller than the number of lines n (i < n), the above-described processing from step S311 to step S318 is executed again, and in step S319, when the variable "i" matches the number of lines n (i ═ n), the correction data acquisition operation for the display pixels PIX in each line is executed for all the lines of the display panel 110, the correction data for each display pixel PIX is stored in a predetermined storage area of the frame memory 146, and the series of correction data acquisition operations is terminated.

Here, in the correction data acquisition operation, since the potentials of the terminals satisfy the relationships of the above expressions (3) to (10), no current flows through the organic EL element OLED, and no light emission operation is performed.

The step S314 of applying the reference voltage Vorg _ x from the grayscale voltage generation unit 142 to the difference detection unit 145 (the negative input terminal of the comparator CMP) may be performed before any of the steps S311 to S313.

In this way, in the correction data obtaining operation, as shown in fig. 11, the constant current source SCi is connected to the data line Ld, the measurement voltage Vmes _ x when the predetermined reference current Iref _ x is drawn and flows is measured, and as shown in fig. 12, when the drain-source current Ids _ x of the transistor Tr13 at the x gray scale level following the V-I characteristic line SPw in the initial state is set to a desired value, the voltage difference Δ V of the original gray scale voltage Vorg (i.e., the reference voltage Vorg _ x) of the negative potential for the x gray scale for flowing the drain-source current Ids of the transistor 13 equal to or approximate to the desired value in the writing operation is calculated, and a digital signal corresponding to the voltage difference Δ V (analog voltage) is stored as the correction data in the frame memory 146.

In the correction data acquiring operation, as a method for generating the reference voltage Vorg _ x by the grayscale voltage generating unit 142, for example, a method for generating the reference voltage Vorg _ x by the grayscale voltage generating unit 142 based on display data of a predetermined grayscale supplied from the display signal generating circuit 160 may be used, or a method for outputting the reference voltage Vorg _ x by the grayscale voltage generating unit 142 without supplying the display data from the display signal generating circuit 160 when the voltage value (or grayscale value) of the reference voltage Vorg _ x is a fixed value may be used. As described above, the reference voltage Vorg _ x at this time is preferably a voltage value corresponding to a case where the current value of the reference current Iref _ x is such a value that the organic EL element OLED emits light at the highest luminance level (or a gray scale level in the vicinity thereof) during the light emission operation period.

(display drive action)

Next, a description will be given of a display driving operation of the display device according to the present embodiment.

Fig. 14 is a flowchart showing an example of a display driving operation (writing operation) of the display device according to the present embodiment.

The display driving operation (see fig. 18) of the display device 100 according to the present embodiment is set so that at least the writing operation (writing operation period Twrt), the holding operation (holding operation period Thld), and the light emitting operation (light emitting operation period Tem) are performed in the display driving period (1 processing cycle period) Tcyc. (Tcyc is more than or equal to Twrt + Thld + Tem)

(write action)

In the write operation (write operation period Twrt), as shown in fig. 18, first, in a state where the power supply voltage Vcc (Vccw ≦ Vss) at the write operation level (negative voltage) is applied to the power supply voltage line Lv in the ith row, the selection signal Ssel at the selection level (high level) is applied to the selection line Ls in the ith row, the display pixels PIX in the ith row are set to the selected state, and the correction gradation voltage Vpix corresponding to the display data is applied to the data line Ld in synchronization with this timing.

Here, as shown in fig. 14, to be specific, in the method of applying the correction gradation voltage Vpix corresponding to the display data to the data line Ld, first, the luminance gradation value of the display pixel PIX to be subjected to the write operation is acquired from the display data supplied from the display signal generation circuit 160 (step S411), and it is determined whether or not the luminance gradation value is "0" (step S412). In the gradation value determination operation of step S412, when the luminance gradation value is "0", the predetermined gradation voltage (black gradation voltage) Vzero for performing the non-light emission operation (or the black display operation) is output from the gradation voltage generation section 142, and the compensation voltage Vofst is not applied to the voltage adjustment section 144 (that is, the compensation process for the fluctuation of the threshold voltage of the transistor Tr12 or the transistor Tr13 is not performed), and the compensation voltage is applied to the data line Ld as it is (step S413).

In step S412, when the luminance gradation value is not "0", the original gradation voltage Vorg having a voltage value corresponding to the luminance gradation value is generated and output from the gradation voltage generating unit 142, and the correction data corresponding to each display pixel PIX and stored in the frame memory 146, which is acquired in the above-described correction data acquiring operation, is sequentially read out via the shift register-data register unit 141 (step S414), and output to the compensation voltage generating unit 143 provided for each column of the data line Ld, and the correction data made of the digital signal is analog-converted to generate the compensation voltage Vofst (≈ Δ Vth) made of an analog voltage corresponding to the amount of change in the threshold voltage of the transistor Tr13 of each display pixel PIX (pixel driving circuit DC) (step S415).

Next, as shown in fig. 15, the voltage adjustment unit 144 adds the negative-potential original gradation voltage Vorg output from the gradation voltage generation unit 142 to the negative-potential offset voltage Vofst output from the offset voltage generation unit 143 to generate a negative-potential corrected gradation voltage Vpix (step S416), and then applies the voltage Vpix to the data line Ld. Here, the corrected gradation voltage Vpix generated by the voltage adjustment unit 144 is set to have a voltage amplitude having a relatively negative potential with reference to the power supply voltage Vcc (Vccw) at the write operation level (low potential) applied from the power supply driver 130 to the power supply voltage line Lv, and is set to be lower as the gradation level becomes higher.

Thus, the corrected gradation voltage Vpix corrected by adding the offset voltage Vofst corresponding to the variation of the threshold voltage Vth of the transistor Tr13 to the source terminal (contact N12) of the transistor Tr13 is applied, and thus the corrected voltage Vgs is written and set between the gate and the source of the transistor Tr13 (both ends of the capacitor Cs) (step S417).

In addition, also in this writing operation period Twrt, since the voltage value of the corrected gradation voltage Vpix to be applied to the contact point N12 on the anode terminal side of the organic EL element OLED is lower than the constant voltage Vss applied to the cathode terminal TMc, no current flows through the organic EL element OLED, and no light emission operation is performed.

(holding action)

Next, in the holding operation (holding operation period Thld) after the end of the writing operation period Twrt, as shown in fig. 14, the display pixels PIX in the i-th row are set to the non-selection state by applying the selection signal Ssel at the non-selection level (low level) to the selection line Ls in the i-th row, and as shown in fig. 16, the transistors Tr11 and Tr12 are turned off, the diode connection state of the transistor Tr13 is released, and the voltage component (Vgs — Vpix — Vccw) applied between the gate and the source of the transistor Tr13 is charged and held in the capacitor Cs.

(Lighting action)

Next, in the light emission operation (light emission operation period Tem) after the end of the holding operation period Thld, as shown in fig. 18, in a state where the display pixels PIX in each row are set in the non-selected state, the power supply voltage Vcc (Vcce >0V) of a high potential (positive voltage) as a light emission operation level is applied to the power supply voltage line Lv in each row, and the transistors Tr13 of the display pixels PIX (pixel drive circuits DC) operate in a saturation region. Further, by applying a positive voltage corresponding to the voltage component (| Vpix-Vccw |) set between the gate and the source of the transistor Tr13 by the writing operation described above to the anode side (contact N12) of the organic EL element OLED, as shown in fig. 17, the light emission drive current Iem (the drain-source current Ids of the transistor Tr13) having a current value corresponding to the display data (strictly, the corrected gradation voltage Vpix which is the corrected gradation voltage) flows from the power supply voltage line Lv to the organic EL element OLED via the transistor Tr13, and light emission operation is performed at a predetermined luminance level.

Next, a drive control operation in the case where the display panel shown in fig. 9 is used in the display device according to the present embodiment will be specifically described.

Fig. 19 is an operation timing chart schematically showing a specific example of the method for driving the display device according to the present embodiment.

For convenience of explanation, fig. 19 is an operation timing chart in a case where display pixels of 12 rows (1 st to 12 th rows, where n is 12) are arranged on the display panel and display pixels of 1 st to 6 th rows (corresponding to the upper region) and 7 th to 12 th rows (corresponding to the lower region) are grouped into two groups as one group.

As shown in fig. 19, the drive control operation of the display device 100 including the display panel 110 shown in fig. 9 sequentially executes the correction data acquisition operation at a predetermined timing for each row of all the display pixels PIX arranged on the display panel 110. After the correction data acquiring operation for all the rows of the display panel 110 is completed (i.e., after the correction data acquiring operation period Tadj is completed), a correction gradation voltage Vpix obtained by adding an offset voltage Vofst corresponding to a variation in element characteristics of a drive transistor (transistor Tr13) of each display pixel PIX to an original gradation voltage Vorg corresponding to display data is written to the display pixel PIX (pixel drive circuit DC) of each row of the display panel 110 within 1 frame period Tfr, an operation of holding a predetermined voltage component (| Vpix-Vccw |) is sequentially repeated for each row, and a display driving operation (shown in fig. 14) for causing all the display pixels PIX included in the group to emit light at the same luminance level corresponding to the display data (correction gradation voltage Vpix) is repeated at a timing when the writing operation is completed for the display pixels PIX (organic EL elements OLED) of the previously grouped 1 to 6 rows or 7 to 12 rows Display drive period Tcyc), image information of one screen of display panel 110 is displayed.

Specifically, in the display pixels PIX arranged in the display panel 110, in a group of the display pixels PIX in the 1 st to 6 th rows and the 7 th to 12 th rows, the correction data obtaining operation (correction data obtaining operation period Tadj) is sequentially executed from the display pixels PIX in the 1 st row in a state where the low-level power supply voltage Vcc (Vccw) is applied to the display pixels PIX through the power supply voltage line Lv commonly connected to the display pixels PIX in the group, and the correction data corresponding to the variation in the threshold voltage of the transistor Tr13 (drive transistor) in the pixel drive circuit DC is stored (stored) in a predetermined region of the frame memory 146 for each display pixel PIX in all the display pixels PIX arranged in the display panel 110.

After the correction data obtaining operation period Tadj is completed, in a group of display pixels PIX in rows 1 to 6, the writing operation (writing operation period Twrt) and the holding operation (holding operation period Thld) are sequentially performed from the display pixel PIX in row 1 in a state where the low-potential power supply voltage Vcc (Vccw) is applied to the display pixels PIX in the group via the power supply voltage line Lv commonly connected to the display pixels PIX in the group, and the display pixels PIX in rows 6 are simultaneously caused to emit light based on the luminance gradation of the display data (correction gradation voltage Vpix) written in each display pixel PIX by switching to the high-potential power supply voltage Vcc (Vcce) applied to the display pixels PIX in the group at the timing when the writing operation is completed to the display pixels PIX in row 6. This light emission operation continues for the display pixel PIX in row 1 until the timing (light emission operation period Tem in rows 1 to 6) at which the next write operation starts.

At the timing when the writing operation is completed for the display pixels PIX in the 1 st to 6 th rows, the low-potential power supply voltage Vcc (Vccw) is applied to the group of the display pixels PIX in the 7 th to 12 th rows via the power supply voltage line Lv commonly connected to the display pixels PIX in the group, the writing operation (writing operation period Twrt) and the holding operation (holding operation period Thld) are sequentially performed from the display pixels PIX in the 7 th row, and at the timing when the writing operation is completed for the display pixels PIX in the 12 th row, the high-potential power supply voltage Vcc (Vcce) is switched to be applied via the power supply voltage line Lv in the group, so that the display pixels PIX in the 6 th rows of the group emit light at a time based on the luminance gradation of the display data (correction gradation voltage Vpix) written in each display pixel PIX. (light emitting operation period Tem in lines 7 to 12). While the write operation and the hold operation are being performed on the display pixels PIX in the 7 th to 12 th rows, as described above, the high-potential power supply voltage Vcc (Vcce) is applied to the display pixels PIX in the 1 st to 6 th rows via the power supply voltage line Lv, and the operation of emitting light all at once is continued.

In this way, after the correction data acquisition operation is performed for all the display pixels PIX arranged on the display panel 110, the write operation and the hold operation are sequentially performed at predetermined timings for the display pixels PIX of each row, and at the time when the write operation to the display pixels PIX of all the rows included in each set group is completed, the drive control is performed so that all the display pixels PIX of the group emit light at once.

Therefore, according to such a driving method of the display device (display driving operation), in the 1-frame period Tfr, the light emission operation of all the display pixels (light emitting elements) in the group is not performed during the period in which the writing operation is performed on the display pixels in each row in the same group, and the non-light emission state (black display state) can be set. Here, in the operation timing chart shown in fig. 19, the display pixels PIX of 12 lines constituting the display panel 110 are grouped into two groups, and control is performed so that the light emission operation is performed at the same time at different timings for each group, so that the ratio of the black display period (black insertion rate) of the non-light emission operation in the 1-frame period Tfr can be set to 50%. Here, since the black insertion rate of approximately 30% or more is generally used as a reference for clearly recognizing a moving image without blurring or blurring in human vision, the present driving method can realize a display device having a good display image quality.

In addition, in the present embodiment (fig. 9), a case is shown in which the plurality of display pixels PIX arranged on the display panel 110 are grouped into two groups for each continuous row, but the present invention is not limited to this, and may be grouped into any number of groups such as 3 groups or 4 groups, or may be grouped into discontinuous rows such as even rows and odd rows. This makes it possible to arbitrarily set the light emission time and the black display period (black display state) according to the number of groups to be grouped, and thus improve the display image quality.

Further, instead of grouping the plurality of display pixels PIX arranged in the display panel 110 as described above, the power supply voltage lines may be provided (connected) for each row, and the power supply voltage Vcc may be independently applied at different timings to cause the display pixels PIX to emit light for each row, or the common power supply voltage Vcc may be applied to all the display pixels PIX arranged in the display panel 110 for one screen at a time to cause all the display pixels of the display panel 110 for one screen to emit light at a time.

As described above, according to the display device and the driving method thereof according to the present embodiment, the following voltage-designation type (or voltage-application type) gray scale control method can be adopted: in the period of writing operation of display data, a correction gradation voltage Vpix, which specifies a voltage value corresponding to the display data and the variation of the element characteristics (threshold voltage) of the drive transistor, is directly applied between the gate and the source of the drive transistor (transistor Tr13), so that a predetermined voltage component is held in the capacitor (capacitor Cs), and the light emission drive current Iem flowing through the light emitting element (organic EL element OLED) is controlled based on the voltage component, thereby performing the light emission operation at a predetermined luminance level.

Therefore, compared with a gradation control method of a current designation type in which a writing operation (holding a voltage component corresponding to display data) is performed by supplying a current corresponding to the display data, even when the display panel is increased in size or precision or when a low gradation display is performed, a gradation signal (correction gradation voltage) corresponding to the display data can be quickly and reliably written to each display pixel, and therefore, it is possible to suppress occurrence of insufficient writing of the display data and perform a light emitting operation at an appropriate luminance level corresponding to the display data, and to realize good display image quality.

Further, since the correction data corresponding to the fluctuation of the threshold voltage of the driving transistor provided in each display pixel is acquired before the display driving operation including the writing operation, the holding operation, and the light emitting operation of the display data to the display pixel (pixel driving circuit), and the corrected gradation signal (corrected gradation voltage) can be generated and applied to each display pixel based on the correction data at the time of the writing operation, the influence of the fluctuation of the threshold voltage (the change in the voltage-current characteristic of the driving transistor) can be compensated, and each display pixel (light emitting element) can be caused to emit light at an appropriate luminance level corresponding to the display data, and the display image quality can be improved by suppressing the unevenness of the light emitting characteristic of each display pixel.

As described above, according to the display device and the driving method thereof according to the present embodiment, when writing display data, the corrected gradation voltage Vpix obtained by correcting the voltage value corresponding to the display data is directly applied between the gate and the source of the driving transistor (transistor Tr13) in accordance with the variation of the element characteristic (threshold voltage) of the driving transistor, so that the capacitor (capacitor Cs) can hold a predetermined voltage component, and the light emission driving current Iem flowing to the light emitting element (organic EL element OLED) is controlled based on the voltage component to perform a light emission operation at a predetermined luminance level, thereby realizing a good display image quality.

Further, since the correction data corresponding to the variation of the threshold voltage of the drive transistor provided in each display pixel can be acquired before the writing operation of the display data to the display pixel (pixel drive circuit), and the corrected gradation signal (corrected gradation voltage) is generated and applied for each display pixel based on the correction data at the time of the writing operation, the influence of the variation of the threshold voltage (the variation of the voltage-current characteristic of the drive transistor) can be compensated, and each display pixel (light-emitting element) can be caused to emit light at an appropriate luminance level corresponding to the display data, and the display image quality can be improved by suppressing the variation of the light emission characteristic of each display pixel.

In addition, according to the display device and the driving method thereof of the present embodiment, in the correction data acquisition operation executed before the writing operation, the correction data corresponding to the variation in the threshold voltage of the driving transistor provided in each display pixel can be acquired by a simple control process, so that the processing load of the control unit such as the system controller can be reduced, and the operation time required for the processing can be reduced.

Claims

1. A display driving device for driving a display pixel having a light emitting element and a driving element having one end of a current path connected to the light emitting element and the current path connected to a data line,

the disclosed device is provided with:

specific value detection units (145, 147) for obtaining a specific value corresponding to the amount of variation in the element characteristics of the drive element; and

a gray scale signal correction section (141, 142, 143, 144, 146) for generating a corrected gray scale signal in which a gray scale signal corresponding to display data is corrected in accordance with the specific value, and applying the corrected gray scale signal as a drive signal to the display pixel from one end of the data line,

the specific value detection units (145, 147) each have a difference value detection unit (145) that detects a difference value formed by amplifying, at a predetermined amplification factor, a value of a voltage difference between a measurement voltage (Vmes _ x) detected at one end of the data line when a reference current (Iref _ x) is caused to flow through the data line into the current path of the drive element of the display pixel and a reference voltage (Vorg _ x) corresponding to a current value of the reference current, and the specific value detection unit obtains the specific value from the difference value.

2. The display drive apparatus according to claim 1,

the difference detection unit (145) includes a voltage calculation unit (DAP) having two input terminals including a 1 st input terminal to which the measurement voltage is applied and a 2 nd input terminal to which the reference voltage is applied, calculates and obtains the voltage difference between the measurement voltage and the reference voltage, and outputs a value amplified by the amplification factor as the difference.

3. The display drive apparatus according to claim 2,

the voltage operation unit includes a differential amplifier (CMP) having the amplification factor, the two input terminals, and an output terminal for outputting the difference.

4. The display drive apparatus according to claim 2,

the specific value detection unit (145, 147) includes a correction data generation unit that generates correction data obtained by converting a value obtained by dividing the difference value output from the voltage calculation unit by the amplification factor into a digital signal, and outputs the correction data as the specific value.

5. The display drive apparatus according to claim 4,

the gradation signal correction unit includes:

a memory circuit for storing the correction data outputted from the correction data generating section;

a gradation voltage generation unit (142) that generates a gradation voltage having a voltage value for causing the light-emitting element to emit light at a luminance level corresponding to the display data;

an offset voltage generation unit (143) that converts the correction data stored in the memory circuit into an offset voltage (Vofst) made of an analog voltage and outputs the offset voltage;

and a voltage adjustment unit (144) for generating the corrected gradation voltage by adding the compensation voltage outputted from the compensation voltage generation unit to the gradation voltage generated by the gradation voltage generation unit, and outputting the corrected gradation voltage as the drive signal.

6. The display drive apparatus according to claim 5,

the difference detection unit includes:

a current source for outputting the reference current;

a connection path switching switch for selectively connecting an output terminal of the current source or an output terminal of the voltage adjusting part to one end of the data line;

when the connection path changeover switch is switched to a side at which the output terminal of the current source is connected to one end of the data line, the reference current is supplied from the current source to one end of the data line, and the potential of the output terminal of the current source becomes the measurement voltage.

7. The display drive apparatus according to claim 1,

the reference voltage has the following voltage values: when the driving element maintains the initial characteristic, a current value of a current flowing through the current path to the driving element becomes equal to the reference current when the reference voltage is applied to the one end of the data line.

8. The display drive apparatus according to claim 1,

the current value of the reference current is set to a value necessary for the light emitting element to emit light at the highest luminance level.

9. A display device for displaying image information,

the disclosed device is provided with:

at least 1 display Pixel (PIX) having a light emitting element (OEL) and a driving element having one end of a current path connected to the light emitting element;

at least 1 data line (Ld) connected to the display pixels;

a data driving unit (140) having specific value detecting units (145, 147) for obtaining a specific value corresponding to a variation amount of an element characteristic of the driving element, and gradation signal correcting units (141, 142, 143, 144, 146) for generating a corrected gradation signal in which a gradation signal corresponding to display data is corrected based on the specific value and applying the corrected gradation signal as a driving signal to the display pixel from one end of the data line,

10. The display device according to claim 9, comprising:

a display panel (110) in which a plurality of selection lines (Ls) are arranged in a row direction, a plurality of data lines (Ld) are arranged in a column direction, and a plurality of display pixels are arranged in the vicinity of intersections of the selection lines and the data lines; and

and a selection driving unit for sequentially applying a selection signal to the selection lines to sequentially set the display pixels in each row to a selected state.

11. The display device of claim 9,

12. The display device of claim 11,

the specific value detection units (145, 147) have a correction data generation unit (147) that generates correction data obtained by converting a value obtained by dividing the difference value output from the voltage calculation unit by the amplification factor into a digital signal and outputs the correction data as the specific value.

13. The display device of claim 12,

the gradation signal correction unit includes:

a gradation voltage generation unit (142) that generates a gradation voltage having a voltage value for causing the light-emitting element to emit light at a gradation level corresponding to the display data;

14. The display device of claim 13,

the difference detection unit includes:

a current source for outputting the reference current;

15. The display device of claim 9,

16. A drive control method for a display device for displaying image information,

the display device comprises at least 1 display Pixel (PIX) having a light emitting element (OEL) and a driving element, one end of a current path of the driving element being connected to the light emitting element;

the method comprises the following steps:

supplying a reference current (Iref _ x) to the display pixel via a data line connected to the display pixel;

detecting a difference obtained by amplifying a voltage difference, which is a difference between a measurement voltage (Vmes _ x) detected at one end of the data line and a reference voltage (Vorg _ x) corresponding to a current value of the reference current, by a predetermined amplification factor;

obtaining a specific value corresponding to a variation amount of an element characteristic of the driving element from the difference;

and generating a corrected gray scale signal in which a gray scale signal corresponding to display data is corrected in accordance with the specific value, and applying the corrected gray scale signal as a drive signal to the display pixel from one end of the data line.

17. The drive control method according to claim 16,

the step of finding the specific value includes the steps of: the value obtained by dividing the difference by the amplification factor is obtained, and correction data obtained by converting the difference into a digital signal is generated.

18. The drive control method according to claim 17,

the step of applying the drive signal to the display pixel includes:

storing the correction data in a memory circuit;

generating a gradation voltage having a voltage value for causing the light emitting element to emit light at a luminance level corresponding to the display data;

reading the correction data stored in the memory circuit, converting the correction data into an offset voltage (Vofst) composed of an analog voltage, and outputting the offset voltage (Vofst);

and generating the corrected gray scale voltage by adding the compensation voltage to the generated gray scale voltage, and applying the corrected gray scale voltage to one end of the data line as the driving signal.

19. The drive control method according to claim 16,