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IL238371B - A reverse optical proximity correction method - Google Patents

A reverse optical proximity correction method

Info

Publication number
IL238371B
IL238371B IL238371A IL23837115A IL238371B IL 238371 B IL238371 B IL 238371B IL 238371 A IL238371 A IL 238371A IL 23837115 A IL23837115 A IL 23837115A IL 238371 B IL238371 B IL 238371B
Authority
IL
Israel
Prior art keywords
correction method
optical proximity
proximity correction
reverse optical
reverse
Prior art date
Application number
IL238371A
Other languages
Hebrew (he)
Other versions
IL238371A0 (en
Original Assignee
Synopsys Inc
Sidense Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/662,842 external-priority patent/US8735297B2/en
Application filed by Synopsys Inc, Sidense Corp filed Critical Synopsys Inc
Publication of IL238371A0 publication Critical patent/IL238371A0/en
Publication of IL238371B publication Critical patent/IL238371B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • H10B20/20Programmable ROM [PROM] devices comprising field-effect components
    • H10B20/25One-time programmable ROM [OTPROM] devices, e.g. using electrically-fusible links
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5252Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
IL238371A 2012-10-29 2015-04-19 A reverse optical proximity correction method IL238371B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/662,842 US8735297B2 (en) 2004-05-06 2012-10-29 Reverse optical proximity correction method
PCT/CA2013/050772 WO2014066997A1 (en) 2012-10-29 2013-10-11 A reverse optical proximity correction method

Publications (2)

Publication Number Publication Date
IL238371A0 IL238371A0 (en) 2015-06-30
IL238371B true IL238371B (en) 2020-02-27

Family

ID=49943719

Family Applications (1)

Application Number Title Priority Date Filing Date
IL238371A IL238371B (en) 2012-10-29 2015-04-19 A reverse optical proximity correction method

Country Status (5)

Country Link
KR (1) KR101700736B1 (en)
CA (1) CA2829970C (en)
IL (1) IL238371B (en)
TW (1) TWI466173B (en)
WO (1) WO2014066997A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3105783B1 (en) * 2014-02-11 2020-12-16 Intel Corporation Antifuse with backfilled terminals
CN111051993B (en) 2017-09-08 2022-06-28 Asml荷兰有限公司 A training method for machine learning-aided optical proximity error correction
CN111399334B (en) * 2019-01-03 2021-12-21 无锡华润上华科技有限公司 Mask manufacturing method and mask
TWI718861B (en) * 2020-02-04 2021-02-11 億而得微電子股份有限公司 Low voltage anti-fuse element
CN119322424A (en) * 2024-11-20 2025-01-17 重庆芯联微电子有限公司 Post-OPC detection model, establishment method thereof and OPC verification optimization method

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3396629B2 (en) * 1998-07-29 2003-04-14 松下電器産業株式会社 Mask pattern correction method
US6613485B2 (en) * 1999-11-18 2003-09-02 United Microelectronics Crop. Optical proximity correction of pattern on photoresist through spacing of sub patterns
TW455925B (en) * 2000-05-15 2001-09-21 Winbond Electronics Corp Method to reduce the optical proximity effect
KR100589041B1 (en) * 2001-03-30 2006-06-13 삼성전자주식회사 Mask and Formation Method
US6369422B1 (en) * 2001-05-01 2002-04-09 Atmel Corporation Eeprom cell with asymmetric thin window
JP2006171113A (en) * 2004-12-13 2006-06-29 Toshiba Corp Mask data creation apparatus, mask data creation method, exposure mask, semiconductor device manufacturing method, and mask data creation program
KR100816194B1 (en) * 2006-08-24 2008-03-21 동부일렉트로닉스 주식회사 Semiconductor device and photo mask for forming OPC model

Also Published As

Publication number Publication date
KR20150079871A (en) 2015-07-08
KR101700736B1 (en) 2017-01-31
WO2014066997A1 (en) 2014-05-08
CA2829970A1 (en) 2014-01-16
IL238371A0 (en) 2015-06-30
CA2829970C (en) 2014-09-09
TW201428817A (en) 2014-07-16
TWI466173B (en) 2014-12-21

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Legal Events

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FF Patent granted
KB Patent renewed