JP2000094748A - Image forming device - Google Patents

Abstract

(57) Abstract: In an image forming apparatus having a plurality of simultaneous drawing mechanisms, a bus use efficiency is improved and data is efficiently transferred to the drawing mechanism. SOLUTION: The address arrangement of an image memory in a multi-beam laser printer is set to a continuous address arrangement in response to a request from the printing mechanism so that data sent to the printing mechanism is read continuously on a main storage device. I did it. Specifically, in an n-beam laser printer, n words are arranged at consecutive addresses in the Y direction, the (n + 1) th word is arranged in the X direction next to the original scanning line, and n words are arranged again in the Y direction. I will do it. After arranging memories in n columns in this manner, successive addresses are sequentially arranged in the next n columns. Then, the drawing algorithm is made to correspond to this memory arrangement.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image forming apparatus, such as a multi-beam laser printer, which simultaneously reads a plurality of discrete image information at a high speed and prints out the information, and more particularly to an improvement in bus use efficiency. .

[0002]

2. Related Background Art (Regarding Printing System) In recent years, a printing system which performs printing with this type of image forming apparatus has been required to have higher printing quality and higher speed printing.

For this reason, for an image forming apparatus, improvement of printing resolution, colorization, improvement of printing speed, etc., are required.
Improvements have been made to improve print quality and responsiveness.

However, all these improvements mean that the rendering time of the pixels rendered by the laser beam is significantly reduced, ie the video clock is shifted to a higher frequency. At the same time, the amount of data read from the page memory also increases.

Therefore, in the improved image forming apparatus described above, the operating frequency of the circuit increases, and as the operating frequency of the circuit increases, the manufacturing cost also increases.

Generally, an image forming apparatus such as a laser printer has a built-in computer, communicates with an external device such as a host computer, receives commands and print data from the host computer, and performs bitmap processing. Performs drawing development on the memory and prints out.

Therefore, an increase in the operating frequency of the circuit as described above imposes a cost increase pressure on a computer system for image formation built in the image forming apparatus due to an increase in speed.

(Regarding Memory Technology) On the other hand, even for DRAMs currently used as a large-capacity main memory on various computer systems, higher-speed data is generally included, including the printing system described above. Access means are required.

Since such demands are stricter than the improvement of the operation speed of the element itself due to the improvement of the semiconductor manufacturing process, various measures have been taken in the circuit configuration inside the element.

A DRAM mainly used for main memory at present
Because of the mechanism of address input multiplexing and column-wise reading due to data volatility, it has a structure that enables higher-speed operation by sequential reading of continuous addresses than random access.

On the other hand, in a processor that accesses data using a DRAM as a storage element, the frequency of a memory read operation for sequentially reading successive address information is often higher than a random read frequency. .

As an example corresponding to such an access, a DRAM device may have a circuit configuration utilizing the characteristic of simultaneously reading out a large amount of bit information in response to a single access request.

[0013] With this kind of circuit configuration inside the element, information that has been simultaneously read at the time of accessing a specific address can be output at a higher speed.

If a configuration is adopted in which these are assigned to consecutive addresses, high-speed operation can be performed for accesses to consecutive addresses.

In the DRAM, a mechanism capable of reading data at a high speed at the time of accessing such a continuous address is prepared according to the actual operation of the processor, and the effective access speed is improved.

Due to the strong demands on the system for an effective speed improvement, the DRAM used as the main memory is used.
In this regard, the sequential access enhances the feature that data can be read efficiently even though it is called a random access memory.

(Technical obstacle in high-speed, high-quality printing system) In the configuration of a printing system that performs high-speed, high-resolution operation, the amount of data read from the page memory increases.

At this time, the performance decreases due to an increase in the bus occupancy of the system, which affects the image forming speed.

For example, when the image data of 600 dpi monochrome A4 is estimated to be 4 Mbytes, an apparatus that prints eight sheets per minute requires a data transfer of 32 Mbytes / min.

This is a sufficient value if one byte is read out about every 2 μsec. For a 32-bit bus width, 100 nsec.
If a memory element having a response speed of the order is used, the occupancy is only slightly more than 1%.

However, in an apparatus required to improve the print quality, the amount of data transferred to the printing mechanism increases drastically.

An increase in resolution, multi-valued printing, and an increase in printing speed all directly lead to an increase in the data transfer amount, and are factors that increase the bus occupancy.

In the case of color printing, the bus occupancy is similarly increased not only in a method of sequentially printing a single color but also in an apparatus which can perform a high-speed printing output such as a multi-color printing at the same time. Let it.

For example, in a color printing apparatus having a printing speed of 24 sheets, only reading out data to the printing mechanism occupies nearly 20% of the data bus, which is an important problem in performance.

On the other hand, it is not possible to catch up only by improving the performance of the storage device. In addition, although the system has been improved to increase the bus width and increase the number of memories that can be simultaneously accessed, it cannot keep up with the data amount required by the printing apparatus.

This is because, if the bus width is doubled, the data transfer amount is certainly improved by a factor of two. However, when the printing resolution is doubled, it is effective on a plane, that is, two-dimensionally. This is because a large amount of data transfer is required.

In an image forming apparatus compatible with a printing mechanism capable of high-speed, high-quality, multi-value printing, how to efficiently transfer data to the printing mechanism is an important performance problem.

On the other hand, the structure of the printing mechanism is also changed due to the demand for high speed and high quality.

In all printing apparatuses, an increase in operating speed inevitably causes an increase in cost. Electronic components become more expensive as the operation speed increases, and mechanical components such as mechanisms need to be reviewed for higher quality components in terms of accuracy, vibration, strength, and the like.

In particular, the mechanism of the printing mechanism is not proportional to the speed improvement, and the cost may increase geometrically.
Changes to the structure itself may be required.

Conventionally, in a laser printer in which a drawing laser element and an optical system are expensive, drawing has been performed by operating a single element as fast as possible.

However, in response to the high-speed and high-quality printing quality demanded in recent years, the pixel clock becomes too high, and the number of faces and the number of revolutions of a polygon motor or the like for performing optical scanning increase. Will be.

Therefore, it has become more reasonable to use a plurality of light emitting elements and simultaneously draw a plurality of scanning lines in terms of cost.

As a method for avoiding the shortening of the pixel drawing time, a method of simultaneously drawing pixels is generally used in a mechanism in which a pixel print head can be constructed at low cost. .

In a low-speed dot impact printer, ink jet printer, or the like, several to several hundred pixel drawing heads are prepared for simultaneous drawing.

However, in a low-speed printing mechanism in which these print heads are mechanically moved, the mechanism for forming an image on paper is simple and does not require severe timing for data transmission. Did not occur. In a printing apparatus in which a print head is moved, it is possible to temporarily stop printing and wait for transmission of image data.

However, in the electrophotographic system, it is necessary to provide a printing mechanism with a certain timing within a predetermined time from a printing request. For this reason, in the printing device,
The data access request to the main memory from the printing mechanism is
It is processed with the highest priority.

As described above, in the electrophotographic method, severe timing is required for image formation. However, since the access is of a form in which consecutive addresses are sequentially read, in terms of high-speed memory access. There were few problems.

However, when the configuration of the printing mechanism changes, when viewed from the image forming unit, when a latent image is drawn by a plurality of laser beams, the supply of bitmap data is to send different coordinates on the memory almost simultaneously. Will need to be done. In order to transfer high-resolution data, if the scanning lines are different, it is unlikely that the scanning lines will fit in the same bank on the semiconductor device, and data is sent word by word to a plurality of laser beams on the bus. In this case, almost all data transfer cycles are accesses that need to newly provide all address information, so that the transfer efficiency of the same data amount is almost twice as bad as that of the conventional sequential access.

The data read timing of the printing mechanism is asynchronous with the operation of the CPU, so that a further loss time occurs during arbitration.

[0041]

Here, suppose that the coordinates of the generated bitmap image are X-coordinates in the main scanning direction,
Assuming that the paper feeding direction is the Y coordinate, the image information supplied to the plurality of laser beams is information of a main scanning row having different Y coordinates.

For this reason, in the conventional bit map of the memory arrangement as shown in FIG. 6, an asynchronous access request for a plurality of distant addresses is almost simultaneously performed with respect to a data read request corresponding to the scanning of the printing mechanism. This causes an arbitration time for asynchronous access and a reduction in readout efficiency due to accessing a remote address.

This is not a problem in a low-speed printing mechanism in which the print head mechanically moves to perform printing, or in a printing apparatus in which the image is not generated by itself. In a device that outputs a bitmap image to a printing mechanism at a high speed, this is a significant factor in performance degradation. In other words, this is important because the bus occupancy when transmitting data to the printing mechanism is high.

Accordingly, an object of the present invention is to improve the bus use efficiency and efficiently transfer data to the drawing mechanism in an image forming apparatus having a plurality of simultaneous drawing mechanisms.

[0045]

According to the present invention, in an image forming apparatus having n simultaneous drawing mechanisms, for a page memory arrangement for generating a print image, n pieces of continuous address information are sequentially arranged in the sub-scanning direction. After that, they are sequentially arranged in the main scanning direction, and the same arrangement is repeated from the scanning line after n columns.

[0046]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In the embodiments of the present invention, a multi-beam laser printer is provided with an image memory in a multi-beam laser printer so that data sent to a printing mechanism is read continuously on a main storage device. The address arrangement is a continuous address arrangement in response to a request from the printing mechanism.

Specifically, as shown in FIG. 1, in an n-beam laser printer, n words are arranged at consecutive addresses in the Y direction, and the (n + 1) th word is arranged in the X direction next to the original scanning line. , And n words are arranged in the Y direction again. After arranging memories in n columns in this manner, successive addresses are sequentially arranged in the next n columns. Then, the drawing algorithm is made to correspond to this memory arrangement.

By adopting such an address arrangement, the data request which had to be individually supplied to each scanning line from the printing mechanism of the multi-beam laser changes to a single request for a continuous address. Memory occupancy is reduced, slower, or less expensive, devices can be used, and equivalent performance can be achieved with less expensive hardware configurations.

Hereinafter, specific embodiments of the present invention will be described with reference to the drawings. [First Embodiment] FIG. 2 is a block diagram showing a configuration of a first embodiment of the present invention.

The inside of a rectangular frame 100 in the figure shows the configuration of the image generating unit, and the rectangular frame 101 shows the configuration of the printing mechanism. In the present embodiment, the simplest example of a laser printer in which the printing mechanism 101 has two beams will be described.

Depending on the machining accuracy, the start timing of the two-beam main scan synchronization signal may vary irregularly depending on the individual device. Therefore, it is necessary to individually synchronize the video clocks. However, in a configuration in which data is read out in units of words and buffering is performed by FIFO or the like, there is no problem as to the timing of reading data from the main memory to some extent earlier.

In FIG. 2, a data input unit 110 is for inputting data from an external device.
Has a built-in program for controlling the present embodiment. The main memory 112 includes a large-capacity DRAM or the like, and the CPU 113 controls the entire image generation unit 100. The control mechanism 114 reads out a bitmap image from the main memory 112 of the image generation unit 100 in response to a data transmission request from the printing mechanism 101.

The control mechanism 114 instructs the CPU 113
The CPU 113 has a priority regarding access to the main memory 112 and receives a data request from the printing mechanism 101.
Or the CPU 113 stops accessing the main memory 112, and writes data to the FIFOs 115 and 116 in accordance with the timing requested by the printing mechanism 101.

Data is read from the main memory 112 at the timing of the previously input synchronization signal.

The data reading from the main memory 112 is continuously executed by the memory arrangement characteristic of this embodiment. The control mechanism 114 sequentially sends the sequentially read data to the FIFOs 115 and 116. In this embodiment, since the FIFOs 115 and 116 have two systems, data is sent alternately,
The data is alternately written to the FOs 115 and 116.

The data written in the FIFOs 115 and 116 are loaded from the FIFOs to the parallel-serial converters 117 and 118 at the read request timing, and the laser drive to the printing mechanism 101 in synchronization with the video clock synchronized with the synchronization signal. Is sent out as a drawing signal for use.

Parallel-serial converters 117 and 118
Is driven by a video clock whose phase is adjusted to the data request signal from the printing mechanism 101. Printing mechanism 10
There are two read timing signals from 1 and FIFO
The phase of the data read timing clock from 115 and 116 and the determination of the phase of the video clock are individually involved for each scanning line, and the phases of the respective video clocks are individually adjusted by the phase synchronization circuits 119 and 120.

The driving circuits 211 and 212 are circuits for driving the laser diodes 213 and 214, respectively. The laser beams output from the laser diodes 213 and 214 pass through the optical system 215, are scanned by the polygon mirror 216, and form a latent image on the photoconductor 217.

Providing an all-optical system independently for each laser oscillator is too costly. There is no problem when multiple light emitting elements are mounted on one chip as a device, but when using independent elements,
If necessary, the auxiliary optical system 218 aligns one optical axis in parallel with the other optical axis, and inputs the optical axis to the optical system 215. The auxiliary optical system 218 is not mounted if unnecessary.

A signal 300 is a print data input from an external device, and a signal 301 is a signal from the other print mechanism 10.
1 and an interface signal group of the image generation unit 100.

Signals 302 and 303 are driving signals for the laser diodes 213 and 214, respectively.
Reference numerals 4 and 305 denote timing signals of a data transmission request for each scanning line. At the same time, it is print timing information.

In the above configuration, when a data access request is generated, an arbitration cycle between the CPU 113 and the control mechanism 114 for the data access request, a first word read cycle, and a Read cycles for the second and subsequent words occur sequentially.

For example, the read cycle of the first word is set to 1
It is assumed that the read cycle time for the second word and thereafter is 50 nsec, and that one scanning line of the 1200 dpi A3 machine contains information of about 15,000 pixels. In addition, the bus width of the image generation unit 100 is a 32-bit width.

Comparing the transfer time of the page memory with the memory configuration of the present embodiment and the conventional page configuration of the memory configuration with a simple arrangement, only 20 μsec
There is a difference of c or more.

In the case of a 1200 dpi, 16-sheet, two-beam printing mechanism, the time required for one scan is 400 to 500 μsec. Differs in degree.

Further, a bus arbitration cycle is actually required, and the two systems are asynchronous in access and the arbitration cycle is 2
In the case of about 00 nsec, a useless time of 100 μsec or more occurs. In this case, the difference in bus occupancy is about 5% and about 30%.

In such a memory arrangement, of course, the drawing algorithm partially differs.

FIG. 3 is a flowchart showing the difference between the drawing algorithm based on the conventional memory configuration and the drawing algorithm in the present embodiment. FIG. 3A shows the drawing algorithm in the present embodiment, and FIG. Shows a conventional drawing algorithm.

Here, it is assumed that drawing is performed at coordinates x and y, the number of words per scanning line is m, the number of multibeams is n, the number of bits in a word is k, and the start address of the bit map memory is S. I do. In this embodiment, n = 2.

FIG. 3 shows the drawing coordinate calculation for the coordinates x and y. Here, for the sake of simplicity, it is assumed that the increasing direction of the x, y coordinate system coincides with the address increasing direction. The main scanning direction is defined as x, and the paper transport direction is defined as a y coordinate system.

In a conventional binary bitmap memory configuration which is simply continuous in the horizontal direction as in the conventional case, the write word address calculation formula is as shown in FIG.
As shown in S11 to S14 of (b), S + y × m + x ÷ k.

However, the operation is an integer operation, and the remainder in the division is rounded down. Perform the division first. Also, MO
D (x, k) is a remainder obtained by dividing x by k. Becomes

On the other hand, the address calculation formula in the configuration of the present embodiment changes as S + y ÷ 2 × 2 × m + x ÷ k × 2 + MOD (y, 2) as shown in S1 to S8 of FIG. Further, the bit position in the target word is MO
It is determined according to the value of D (x, k) (S5). [Second Embodiment] For color print output, it is usually necessary to print several different colors in alignment. As long as the number of colors is three, full-color printing can be performed for a time. However, since the reproducibility of black is insufficient with mixed colors, four or more colors are used in many printings. Also in the electrophotographic system, a configuration using four color toners is generally used.

As a method of generating an image, a latent image is drawn for each color, the toner is developed, and then the transfer and the print output are performed.
However, this method takes four times as long as monochrome printing. Therefore, when speed is required, FIG.
As shown in the above mechanism example, a printing mechanism that executes latent image drawing in parallel is used. That is, printing is performed on the paper 30 via the transfer body 20 by the parallel operation of the four photoconductors 10A, 10B, 10C, and 10D.

In the case of a mechanism having such an arrangement, it is necessary to simultaneously transmit image information of different colors to the printing mechanism, although it depends on the interval between the photoconductors. For this reason, although it depends on the mechanical accuracy and the like, the installation intervals of the photoconductors usually vary, and the reading of data between the colors is asynchronous.

Therefore, in one printing apparatus, the 1000th scan of the first color and the first scan of the second color occur simultaneously, but in another apparatus, the 1001th scan occurs, and in another apparatus, the 999th scan occurs simultaneously. Such mechanical variations occur.

For this reason, even if the scanning timing is simultaneous, it is not possible to synchronize the access of different color images as it is.

Therefore, in the present embodiment, reading of different color pages can be synchronized by preparing FIFOs for several scanning lines for the second and subsequent colors in consideration of mechanical accuracy, and allocation to consecutive addresses. It is characterized by.

FIG. 5 is a block diagram showing the configuration of the second embodiment of the present invention.

In the figure, the parts after the optical system are omitted. As a configuration, the FIFOs 131 to 133 for the second and subsequent colors are long by several lines, and are read in advance in consideration of a mechanical scanning line interval error. Other configurations are basically the same as those of the first embodiment.

In FIG. 5, a FIFO 130 is a FIFO of a first color, and FIFOs 131, 132, and 133 are FIFOs of a second color or later for several scanning lines in consideration of mechanical variation.
FO.

Parallel-serial converters 134 and 13
5, 136 and 138 are driven by a video clock whose phase is adjusted to the data request signal from the printing mechanism 101, and convert the parallel signals of the FIFOs 130, 131, 132 and 133 to serial.

The phase synchronization circuits 139, 140, 141, 1
Reference numeral 42 is used to synchronize the pixel sending clock with the optical scanning timing of the printing mechanism.

Laser diode drive circuits 220 and 22
1, 222 and 223 are laser diodes 22 respectively.
4, 225, 226, and 227, and signals 310, 311, 312, and 313 are laser diode drive signals. Also, the signals 314, 315, 31
6 and 317 are timing signals of a data transmission request of each scanning line.

The arrangement of the drawing addresses differs depending on the number of simultaneous drawing colors of the printing mechanism. When the simultaneous printing request overlaps only two colors at the maximum, the memory arrangement is not much different from that of the first embodiment. However, since the second column has a different color, the calculation of the drawing coordinates is different. In the case of a dense physical arrangement in which output of four colors is required at the same time, n in FIG.

The minimum distance between the scanning line of the first drawing color and the scanning line of the second drawing color is R. Simultaneous output is limited to two colors, that is, there is no simultaneous output of the first color and the third color.

The start portion of the first drawing color and the end portion of the fourth drawing color do not overlap with other colors. However, if priority is given to simplification of drawing software and simplification of hardware configuration, there is no waste. Access, but leave it as a blank area.

That is, in the image area, the first color data and the blank area are alternately allocated for each word from the start address, and are allocated to the first color data and the second color data from the R × m × 2 word. .

Assuming that the total number of scanning lines of the image data is L, the first color ends with L × m × 2 words. Since there is no overlap, 2R <L. During L-2R, the second color data and the blank area are alternately allocated, and (L + R) m × the second word is alternately allocated to the third color.

As in the first embodiment, since the address does not increase or decrease with respect to the scanning line, the calculation formula of the drawing coordinates of each color is relatively simple.

That is, the coordinates are obtained as Si + y × m × n + x ÷ k × n for the head address Si of each color. n is the number of simultaneous output colors.

The algorithm described in each of the above embodiments may be executed based on a program stored in the ROM 111 in advance, or a similar program may be executed on a hard disk, a floppy disk,
The information may be stored in various storage media such as a D-ROM and a memory card, and may be appropriately loaded into the image forming apparatus and executed.

[0093]

As described above, according to the present invention, by arranging addresses so that data reading to the printing mechanism is continuous, simultaneous occurrence of asynchronous transfer is avoided, and the main memory having a strong sequential property can be used. The bus operation can be performed efficiently and the operation performance can be improved.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram showing a page memory arrangement in an image generation unit according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a printing system according to the first embodiment of the present invention.

FIG. 3 is a flowchart showing a drawing algorithm in the first embodiment in comparison with a conventional one;

FIG. 4 is an explanatory diagram showing a configuration for performing simultaneous printing of four colors in a second embodiment of the present invention.

FIG. 5 is a block diagram illustrating a configuration of a printing system according to the second embodiment.

FIG. 6 is an explanatory diagram showing a page memory arrangement in a conventional image generation unit.

[Explanation of symbols]

 100: image generation unit, 101: printing mechanism, 110: data input unit, 111: ROM, 112: main memory, 113: CPU, 114: control mechanism, 115, 116: FIFO, 117, 118: parallel-serial converter 119, 120: phase synchronization circuit, 211, 212: drive circuit, 213, 214: laser diode, 215: optical system, 216: polygon mirror, 217: photoconductor.

Claims (4)

[Claims] In an image forming apparatus having n simultaneous drawing mechanisms, for a page memory arrangement for generating a print image, consecutive n pieces of address information are sequentially arranged in the sub-scanning direction, and then sequentially in the main scanning direction. From the scanning line after n columns,
An image forming apparatus wherein the same arrangement is repeated. 2. The image forming apparatus according to claim 1, further comprising: means for executing a drawing algorithm corresponding to the memory arrangement. 3. A method for controlling an image forming apparatus having n simultaneous drawing mechanisms, wherein, for a page memory arrangement for generating a print image, n pieces of continuous address information are sequentially arranged in the sub-scanning direction, and thereafter the main scanning is performed. Direction, and from the scanning line after n columns,
A method for controlling an image forming apparatus, wherein a similar arrangement is repeated. 4. A computer-readable storage medium storing a program for controlling an image forming apparatus having n simultaneous drawing mechanisms, wherein, for a page memory arrangement for generating a print image, n consecutive address information are stored in a sub-memory. Arranged sequentially in the scanning direction, and then arranged sequentially in the main scanning direction.
A storage medium storing a program for controlling a similar arrangement to be repeated.