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JP2000165244A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

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Publication number
JP2000165244A
JP2000165244A JP10337451A JP33745198A JP2000165244A JP 2000165244 A JP2000165244 A JP 2000165244A JP 10337451 A JP10337451 A JP 10337451A JP 33745198 A JP33745198 A JP 33745198A JP 2000165244 A JP2000165244 A JP 2000165244A
Authority
JP
Japan
Prior art keywords
voltage
power supply
inspection
reference power
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10337451A
Other languages
Japanese (ja)
Inventor
Hideaki Sakaguchi
英明 坂口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP10337451A priority Critical patent/JP2000165244A/en
Publication of JP2000165244A publication Critical patent/JP2000165244A/en
Pending legal-status Critical Current

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  • Semiconductor Integrated Circuits (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor integrated circuit device that incorporates an inspection facilitating circuit that attains measurement with high precision by using an inexpensive inspection device without increasing an inspection time. SOLUTION: The semiconductor integrated circuit device incorporates a D/A converter including a plurality of reference power supply terminals 110,... a resistance division circuit 12 that applies resistance division to a voltage among the reference power supply terminals 110,... to generate an intermediate voltage, and a gradation voltage selector switch 5 that selects any of the reference power supply voltages and intermediate voltages in response to an input digital signal and outputs an output voltage of the D/A converter from its output terminal 6. Relays 13, 14 are provided to locally short-circuit part of the resistance division circuit 12. Through the configuration above, the voltage between the output voltage being an inspection object can be extended, and digital discrimination by a comparator is attained in place of the measurement by a conventional analog voltage measurement device with high precision, the inspection time can considerably be reduced and high precision inspection is attained by using the inexpensive digital inspection device.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、少なくとも2個の
基準電源電圧入力端子と、該基準電源電圧入力端子間の
電圧を抵抗分割して、中間電圧を発生させる抵抗分割回
路と、入力ディジタル信号に応じて、上記基準電源電圧
及び中間電圧の内から一つの電圧を選択して出力させる
ためのスイッチ回路とを含むD/A変換器(DAC)を
内蔵し、該D/A変換器の出力電圧を、その出力端子よ
り出力させる構成とした半導体集積回路装置(例えば、
多階調液晶ドライバIC等)に関するものであり、特
に、その検査手法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to at least two reference power supply voltage input terminals, a resistance dividing circuit for dividing a voltage between the reference power supply voltage input terminals to generate an intermediate voltage, and an input digital signal. And a switch circuit for selecting and outputting one of the reference power supply voltage and the intermediate voltage in accordance with the D / A converter. The output of the D / A converter A semiconductor integrated circuit device configured to output a voltage from its output terminal (for example,
Multi-gradation liquid crystal driver IC, etc.), and in particular, to an inspection method thereof.

【0002】[0002]

【従来の技術】DACを内蔵する多階調液晶ドライバI
Cは、全液晶駆動出力端子毎にDACを有しており、入
力された多階調データである複数ビットのディジタル信
号に応じて、それぞれの液晶駆動出力端子からアナログ
電圧を出力する。このため、DACを内蔵する多階調液
晶ドライバICの検査は、すべてのDACから出力され
るアナログ電圧を測定し判定する。
2. Description of the Related Art Multi-tone liquid crystal driver I with a built-in DAC
C has a DAC for each liquid crystal drive output terminal, and outputs an analog voltage from each liquid crystal drive output terminal in accordance with a multi-bit digital signal which is input multi-tone data. For this reason, the inspection of the multi-tone liquid crystal driver IC having a built-in DAC is performed by measuring and determining the analog voltages output from all the DACs.

【0003】図2に従来技術の構成を示す。FIG. 2 shows the configuration of the prior art.

【0004】入力された階調データは内部回路1に蓄え
られた後、デコーダ2を介してDACのバスライン3に
与えられる。各階調データに応じて、基準電源4からの
出力電圧を決定する階調電圧選択スイッチ5の一つを選
択し、出力アンプ6’を介して各出力端子(1〜N)6
より、それぞれの階調電圧を出力する。従来の検査手法
では、この出力されたアナログ階調電圧を、高精度な電
圧測定器をもつ検査装置で電圧測定し、判定している。
[0004] The input gradation data is stored in an internal circuit 1 and then applied to a DAC bus line 3 via a decoder 2. According to each gradation data, one of the gradation voltage selection switches 5 for determining the output voltage from the reference power supply 4 is selected, and each of the output terminals (1-N) 6 is output via the output amplifier 6 '.
Thus, each gradation voltage is output. In the conventional inspection method, the output analog gray scale voltage is measured by an inspection device having a high-precision voltage measuring device to determine the voltage.

【0005】より詳細には、図3に示すように、基準電
源端子11より入力される基準電源電圧のみではなく、
抵抗分割回路12により発生される中間電圧も選択・出
力させるために、各基準電源電圧及び各中間電圧毎に、
階調電圧選択スイッチ5が設けられており、デコーダ2
よりのデコード信号に応じて、何れかのスイッチ5が選
択され、対応する階調電圧が選択・出力される。従来の
検査手法では、この出力されたアナログ階調電圧を、高
精度なアナログ電圧測定器をもつ検査装置で電圧測定
し、判定している。
More specifically, as shown in FIG. 3, not only the reference power supply voltage input from the reference power supply terminal 11 but also
In order to select and output also the intermediate voltage generated by the resistance dividing circuit 12, for each reference power supply voltage and each intermediate voltage,
A gradation voltage selection switch 5 is provided, and the decoder 2
One of the switches 5 is selected according to the decoded signal, and the corresponding gray scale voltage is selected and output. In the conventional inspection method, the output analog gray scale voltage is measured by an inspection device having a high-precision analog voltmeter and is determined.

【0006】しかしながら、アナログ電圧測定による検
査方法は、一つの電圧測定器を用いて、全液晶駆動出力
端子から出力される電圧を測定し判定するため、従来の
ディジタルテストのような、出力端子数分用意されたコ
ンパレータを使用して、全出力を同時にディジタル判定
する検査方法に比べて、検査時間は大幅に増加する。し
たがって、検査時間との兼ね合いにより、検査項目も制
限されている。また、液晶駆動出力端子から出力される
各階調電圧の電位差は非常に小さいため、それを測定し
判定するための測定器は、高精度な測定器が要求され、
非常に高価なものとなる。
However, the inspection method based on analog voltage measurement uses a single voltage measurement device to measure and determine the voltage output from all the liquid crystal drive output terminals. The test time is greatly increased as compared with a test method in which all outputs are digitally determined at the same time using a separately prepared comparator. Therefore, the inspection items are also limited due to the inspection time. In addition, since the potential difference between the gradation voltages output from the liquid crystal drive output terminal is very small, a highly accurate measuring device is required for measuring and determining the difference.
It will be very expensive.

【0007】なお、DACのテスト時間短縮を目的とし
た従来の技術として、特開平9−312569号公報に
開示されるものがある。この技術は、予め良品と分かっ
ているチップ(半導体集積回路装置)を比較基準(レフ
ァレンスDAコンバータ)として、これと被測定デバイ
ス(DUT)とを比較し、所定の範囲内(仕様範囲内)
に入っているか否かによって、良否判定を行うものであ
る。この技術によれば、DACのテスト時間短縮は実現
されるが、レファレンスチップとの相対比較により、良
否判定を行っているため、レファレンスチップの特性バ
ラツキ等によりDAC出力値にズレが生じた場合、その
ズレが、そのままテスト範囲のズレとなってしまい、正
確な仕様範囲の判定ができなくなり、実際には仕様範囲
外のものを良品と判定したり、逆に、仕様範囲内のもの
を不良品と判定したりするといった判定精度上の問題点
がある。
As a conventional technique for shortening the test time of the DAC, there is a technique disclosed in Japanese Patent Application Laid-Open No. 9-313569. In this technology, a chip (semiconductor integrated circuit device) known in advance as a non-defective product is used as a comparison reference (reference D / A converter), and this is compared with a device under test (DUT).
The pass / fail judgment is made depending on whether or not it is included. According to this technique, the test time of the DAC can be shortened. However, since the pass / fail judgment is performed based on the relative comparison with the reference chip, when the DAC output value is shifted due to the characteristic variation of the reference chip or the like, The deviation is the deviation of the test range as it is, making it impossible to accurately determine the specification range.In fact, the one outside the specification range is judged as good, and conversely, the one within the specification range is defective. There is a problem in determination accuracy, such as determining that

【0008】[0008]

【発明が解決しようとする課題】以上のように、従来の
検査手法では、アナログ電圧を測定し判定するため、検
査時間が大幅に増大するという問題点があった。また、
各階調電圧を高精度に測定するため、非常に高価な検査
装置が必要となるという問題点があった。
As described above, the conventional inspection method has a problem that the inspection time is greatly increased because the analog voltage is measured and determined. Also,
In order to measure each gradation voltage with high accuracy, there is a problem that an extremely expensive inspection device is required.

【0009】更に、検査時間短縮を目的として考案され
た特開平9−312569号公報の技術も、判定精度上
の問題点を有していた。
Further, the technique disclosed in Japanese Patent Application Laid-Open No. Hei 9-313569 devised for the purpose of shortening the inspection time also has a problem in determination accuracy.

【0010】本発明は、上記従来の事情に鑑みなされた
ものであり、検査時間の増大を招くことなく、且つ安価
な検査装置で高精度な測定を可能とする、検査容易化回
路を内蔵した半導体集積回路装置の提供を目的とするも
のである。
The present invention has been made in view of the above-mentioned conventional circumstances, and has a built-in inspection facilitating circuit which enables high-precision measurement with an inexpensive inspection device without increasing the inspection time. It is an object of the present invention to provide a semiconductor integrated circuit device.

【0011】[0011]

【課題を解決するための手段】本発明の半導体集積回路
装置は、少なくとも2個の基準電源電圧入力端子と、該
基準電源電圧入力端子間の電圧を抵抗分割して、中間電
圧を発生させる抵抗分割回路と、入力ディジタル信号に
応じて、上記基準電源電圧及び中間電圧の内から一つの
電圧を選択して出力させるためのスイッチ回路とを含む
D/A変換器を内蔵し、該D/A変換器の出力電圧を、
その出力端子より出力させる構成とした半導体集積回路
装置に於いて、上記抵抗分割回路の一部を部分的に短絡
するためのスイッチ手段を設けたことを特徴とするもの
である。
According to a semiconductor integrated circuit device of the present invention, at least two reference power supply voltage input terminals and a resistor for dividing a voltage between the reference power supply voltage input terminals to generate an intermediate voltage. A D / A converter including a dividing circuit and a switch circuit for selecting and outputting one of the reference power supply voltage and the intermediate voltage in accordance with the input digital signal; The output voltage of the converter is
In the semiconductor integrated circuit device configured to output from the output terminal, switch means for partially short-circuiting a part of the resistance dividing circuit is provided.

【0012】すなわち、本発明の半導体集積回路装置
は、検査容易化回路として、抵抗分割回路の一部を部分
的に短絡させるためのスイッチ手段を内蔵させたことを
特徴とするものであり、かかる構成によれば、上記スイ
ッチ手段をオンさせることにより、抵抗分割回路の他の
部分により生成される各階調電圧間の電位差を拡大する
ことができ、また、検査対象として設定されている抵抗
分割回路の両端に設けられている基準電源電圧入力端子
に与える電圧として、通常使用時の基準電圧に代えて、
より大きな電位差が得られる電圧、例えば、電源電圧
(当該半導体集積回路装置に印加される電源電圧、例え
ば5V)と接地電圧(GND)とを設定することによ
り、更に、各階調電圧間の電位差を拡大することができ
る。これにより、検査対象となる各出力電圧間の電位差
の拡大が可能となり、従来の高精度なアナログ電圧測定
器による測定に代えて、コンパレータによるディジタル
判定が可能となり、大幅な検査時間の短縮化、安価なデ
ィジタル検査装置の使用による高精度な検査が可能とな
るものである。
That is, the semiconductor integrated circuit device of the present invention is characterized in that a switch means for partially short-circuiting a part of the resistance dividing circuit is incorporated as a test facilitating circuit. According to the configuration, by turning on the switch means, the potential difference between the gradation voltages generated by other parts of the resistance dividing circuit can be enlarged, and the resistance dividing circuit set as an inspection target can be enlarged. As the voltage applied to the reference power supply voltage input terminal provided at both ends of
By setting a voltage at which a larger potential difference can be obtained, for example, a power supply voltage (a power supply voltage applied to the semiconductor integrated circuit device, for example, 5 V) and a ground voltage (GND), the potential difference between the gradation voltages can be further reduced. Can be expanded. As a result, the potential difference between the output voltages to be inspected can be expanded, and instead of the conventional measurement using a high-precision analog voltage measuring instrument, digital judgment by a comparator becomes possible, thereby greatly shortening the inspection time, High-precision inspection can be performed by using an inexpensive digital inspection device.

【0013】[0013]

【発明の実施の形態】以下、本発明の実施の形態につい
て、図面を参照して詳細に説明する。
Embodiments of the present invention will be described below in detail with reference to the drawings.

【0014】図1は、本発明の一実施形態である、検査
容易化回路内蔵多階調液晶ドライバICの要部構成図で
ある。
FIG. 1 is a configuration diagram of a main part of a multi-gradation liquid crystal driver IC with a built-in inspection facilitation circuit according to an embodiment of the present invention.

【0015】入力された階調データは内部回路(図示せ
ず)に蓄えられた後、デコーダ2を介してDACのバス
ライン3に与えられる。各階調データに応じて、基準電
源端子11及び抵抗分割回路12からの出力電圧を決定
する階調電圧選択スイッチ5の一つを選択し、出力アン
プ6’を介して各出力端子(1〜N)6より、それぞれ
の階調電圧を出力する。
The input gradation data is stored in an internal circuit (not shown), and then supplied to a DAC bus line 3 via a decoder 2. According to each gradation data, one of the gradation voltage selection switches 5 for determining the output voltage from the reference power supply terminal 11 and the resistance dividing circuit 12 is selected, and each of the output terminals (1 to N) is output via the output amplifier 6 '. 6) output the respective gradation voltages.

【0016】本実施形態に於いては、11個の基準電源
端子110、…、1110が設けられており(ガンマ補正
等、階調領域毎に微調整を行うため)、通常使用時に於
いては、各基準電源端子110、…、1110には、それ
ぞれ、0V(GND)、0.5V、1V、…、4.5
V、5Vが印加される。また、各基準電源端子間には、
それぞれ、抵抗分割回路12が設けられており、各抵抗
分割回路12は、それぞれ、7個の中間電圧を発生させ
る構成となっている。各中間電圧間の電位差は、全て等
しく設定されている。したがって、各中間階調電圧間の
電位差は、0.5V/8=0.0625Vと、非常に微
小な値になる。
In this embodiment, eleven reference power supply terminals 11 0 ,..., 11 10 are provided (to perform fine adjustment for each gradation area such as gamma correction) during normal use. information, the reference power supply terminal 11 0, ..., the 11 10, respectively, 0V (GND), 0.5V, 1V, ..., 4.5
V and 5V are applied. Also, between each reference power supply terminal,
Each of the resistance division circuits 12 is provided, and each resistance division circuit 12 is configured to generate seven intermediate voltages. The potential differences between the intermediate voltages are all set equal. Therefore, the potential difference between the intermediate grayscale voltages is a very small value of 0.5V / 8 = 0.0625V.

【0017】従来技術では、かかる微小な電位差の判定
が必要であったため、非常に高精度な電圧測定器を有す
る高価な検査装置を必要としていた。
In the prior art, it was necessary to judge such a minute potential difference, so that an expensive inspection device having a very accurate voltage measuring device was required.

【0018】本発明は、この問題点を解消させるもので
あり、図1の実施形態に於いては、各基準電源端子間に
2個のリレー13、14の直列接続回路を接続し、該2
個のリレー13、14の接続点を抵抗分割回路12の中
点に接続する構成としている。なお、図1に於いては、
基準電源端子1110と基準電源端子119との間に設け
られるリレー接続回路のみを示しているが、他の基準電
源端子間に於いても、同様のリレー接続回路が接続され
ているものである。
The present invention solves this problem. In the embodiment shown in FIG. 1, a series connection circuit of two relays 13 and 14 is connected between each reference power supply terminal.
The connection point of the relays 13 and 14 is connected to the middle point of the resistance dividing circuit 12. In FIG. 1,
Shows only relay connection circuit that is provided between the reference power supply terminal 11 10 and the reference power supply terminal 11 9, even in between the other of the reference power supply terminal, in which the same relay connection circuit are connected is there.

【0019】まず、基準電源端子1110と119との間
の抵抗分割回路について検査を行う場合、基準電源端子
1110に電源電圧(5V)を与え、基準電源端子119
には接地電圧(0V)を与える。次に、上側部分の検査
を行う場合には、第1リレー13をオフとし、第2リレ
ー14をオンさせる。これにより、基準電源端子1110
と119との間の抵抗分割回路の上側部分の両端に5V
が印加される。この状態で、デコーダ2に対して、所定
の階調データを与えて、アナログ電圧を出力させる。こ
のときの各出力電圧間の電位差は、5V/4=1.25
Vと、非常に大きな値になる。すなわち、第1階調電圧
は5V、第2階調電圧は3.75V、第3階調電圧は
2.50V、第4階調電圧は1.25V、第5階調電圧
は0Vとなる。これにより、例えば、0.5V以下の精
度を有するコンパレータであれば、各階調の電圧を認識
することができ、コンパレータを使用したディジタル判
定が可能となるものである。
First, when inspecting the resistance dividing circuit between the reference power supply terminals 11 10 and 11 9 , a power supply voltage (5 V) is applied to the reference power supply terminal 11 10 and the reference power supply terminal 11 9
Is supplied with a ground voltage (0 V). Next, when performing the inspection of the upper part, the first relay 13 is turned off and the second relay 14 is turned on. Thereby, the reference power supply terminal 11 10
5V across the upper portion of the resistive divider circuit between the 11 9
Is applied. In this state, predetermined grayscale data is applied to the decoder 2 to output an analog voltage. At this time, the potential difference between the output voltages is 5V / 4 = 1.25.
V and a very large value. That is, the first gradation voltage is 5V, the second gradation voltage is 3.75V, the third gradation voltage is 2.50V, the fourth gradation voltage is 1.25V, and the fifth gradation voltage is 0V. Thus, for example, a comparator having an accuracy of 0.5 V or less can recognize the voltage of each gradation, and can perform digital determination using the comparator.

【0020】以下、同様にして、下側部分の検査を行う
場合には、第1リレー13をオンさせ、第2リレー14
をオフとする。更に、次の基準電源端子間の抵抗分割回
路の検査を行う場合は、基準電源端子119に電源電圧
(5V)を与え、基準電源端子118には接地電圧(0
V)を与え、同様にして、検査を実行する。
In the same manner, when inspecting the lower portion, the first relay 13 is turned on and the second relay 14 is turned on.
Is turned off. Furthermore, when performing the test of the resistance division circuit between the following reference power supply terminal, given a power supply voltage (5V) to the reference power supply terminal 11 9, the reference power supply terminal 11 8 ground voltage (0
V), and the inspection is performed in the same manner.

【0021】なお、図1に示される階調電圧選択スイッ
チ5の構成例を図4に示す。
FIG. 4 shows an example of the configuration of the gradation voltage selection switch 5 shown in FIG.

【0022】また、上記実施形態に於いては、リレーを
用いて構成しているが、他のスイッチ手段を用いてもよ
いものである。また、スイッチ手段の接続個数も2個に
限定されるものではなく、適宜設定できることは言うま
でもない。
In the above embodiment, a relay is used, but other switch means may be used. Further, it is needless to say that the number of connected switch means is not limited to two and can be set as appropriate.

【0023】更に、上記実施形態は、本発明を多階調液
晶ドライバICに於いて実施したものであるが、本発明
は、これに限定されるものではなく、D/A変換器内蔵
の他の半導体集積回路装置に於いても、同様に、有効に
実施できるものであることは言うまでもない。
Further, in the above embodiment, the present invention is embodied in a multi-tone liquid crystal driver IC. However, the present invention is not limited to this, and includes a D / A converter. It goes without saying that the semiconductor integrated circuit device described above can also be effectively implemented.

【0024】[0024]

【発明の効果】以上、詳細に説明したように、本発明の
半導体集積回路装置は、少なくとも2個の基準電源電圧
入力端子と、該基準電源電圧入力端子間の電圧を抵抗分
割して、中間電圧を発生させる抵抗分割回路と、入力デ
ィジタル信号に応じて、上記基準電源電圧及び中間電圧
の内から一つの電圧を選択して出力させるためのスイッ
チ回路とを含むD/A変換器を内蔵し、該D/A変換器
の出力電圧を、その出力端子より出力させる構成とした
半導体集積回路装置に於いて、上記抵抗分割回路の一部
を部分的に短絡するためのスイッチ手段を設けたことを
特徴とするものであり、かかる本発明の半導体集積回路
装置によれば、検査対象となる各出力電圧間の電位差の
拡大が可能となり、従来の高精度なアナログ電圧測定器
による測定に代えて、コンパレータによるディジタル判
定が可能となり、大幅な検査時間の短縮化、及び安価な
ディジタル検査装置の使用による高精度な検査が可能と
なるものである。
As described above in detail, the semiconductor integrated circuit device of the present invention divides the voltage between at least two reference power supply voltage input terminals and the voltage between the reference power supply voltage input terminals by resistance division, and A D / A converter including a resistor dividing circuit for generating a voltage and a switch circuit for selecting and outputting one of the reference power supply voltage and the intermediate voltage in accordance with an input digital signal. A semiconductor integrated circuit device configured to output an output voltage of the D / A converter from an output terminal thereof, wherein a switch means for partially short-circuiting a part of the resistance dividing circuit is provided. According to the semiconductor integrated circuit device of the present invention, it is possible to increase the potential difference between the output voltages to be inspected, and to replace the measurement with the conventional high-precision analog voltmeter. Digital determination by the comparator can and will, in which reduction of the significant test time, and a highly accurate inspection by the use of an inexpensive digital inspection apparatus becomes possible.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施形態である多階調液晶ドライバ
ICの要部構成図である。
FIG. 1 is a main part configuration diagram of a multi-tone liquid crystal driver IC according to an embodiment of the present invention.

【図2】従来技術の構成図である。FIG. 2 is a configuration diagram of a conventional technique.

【図3】従来技術の詳細構成図である。FIG. 3 is a detailed configuration diagram of a conventional technique.

【図4】図1に示される階調電圧選択スイッチの構成例
を示す図である。
FIG. 4 is a diagram illustrating a configuration example of a gray scale voltage selection switch illustrated in FIG. 1;

【符号の説明】[Explanation of symbols]

1 内部回路 2 デコーダ 3 DACバスライン 4 基準電源 5 階調電圧選択スイッチ 6 出力端子 6’ 出力アンプ 11 基準電源端子 12 抵抗分割回路 13 第1リレー 14 第2リレー DESCRIPTION OF SYMBOLS 1 Internal circuit 2 Decoder 3 DAC bus line 4 Reference power supply 5 Grayscale voltage selection switch 6 Output terminal 6 'Output amplifier 11 Reference power supply terminal 12 Resistance division circuit 13 First relay 14 Second relay

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 少なくとも2個の基準電源電圧入力端子
と、該基準電源電圧入力端子間の電圧を抵抗分割して、
中間電圧を発生させる抵抗分割回路と、入力ディジタル
信号に応じて、上記基準電源電圧及び中間電圧の内から
一つの電圧を選択して出力させるためのスイッチ回路と
を含むD/A変換器を内蔵し、該D/A変換器の出力電
圧を、その出力端子より出力させる構成とした半導体集
積回路装置に於いて、 上記抵抗分割回路の一部を部分的に短絡するためのスイ
ッチ手段を設けたことを特徴とする半導体集積回路装
置。
1. A method comprising: dividing at least two reference power supply voltage input terminals and a voltage between the reference power supply voltage input terminals by resistance division;
A built-in D / A converter including a resistance dividing circuit for generating an intermediate voltage and a switch circuit for selecting and outputting one of the reference power supply voltage and the intermediate voltage according to an input digital signal. In the semiconductor integrated circuit device configured to output the output voltage of the D / A converter from its output terminal, a switch means for partially short-circuiting a part of the resistance dividing circuit is provided. A semiconductor integrated circuit device characterized by the above-mentioned.
JP10337451A 1998-11-27 1998-11-27 Semiconductor integrated circuit device Pending JP2000165244A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10337451A JP2000165244A (en) 1998-11-27 1998-11-27 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10337451A JP2000165244A (en) 1998-11-27 1998-11-27 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JP2000165244A true JP2000165244A (en) 2000-06-16

Family

ID=18308768

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10337451A Pending JP2000165244A (en) 1998-11-27 1998-11-27 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JP2000165244A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6879174B2 (en) 2000-09-29 2005-04-12 Sharp Kabushiki Kaisha Testing method and testing device for semiconductor integrated circuits
JP2005265636A (en) * 2004-03-18 2005-09-29 Sharp Corp Inspection method of semiconductor integrated circuit
JP2007065538A (en) * 2005-09-02 2007-03-15 Nec Electronics Corp Test method of driving circuit and driving circuit of display device
JP2007218585A (en) * 2006-02-14 2007-08-30 Yokogawa Electric Corp Test system
US8077133B2 (en) 2006-11-22 2011-12-13 Oki Semiconductor Co., Ltd. Driving circuit
US8203548B2 (en) 2006-07-20 2012-06-19 Oki Semiconductor Co., Ltd. Driving circuit

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6879174B2 (en) 2000-09-29 2005-04-12 Sharp Kabushiki Kaisha Testing method and testing device for semiconductor integrated circuits
KR100485739B1 (en) * 2000-09-29 2005-04-28 샤프 가부시키가이샤 Testing method and testing device for semiconductor integrated circuits
JP2005265636A (en) * 2004-03-18 2005-09-29 Sharp Corp Inspection method of semiconductor integrated circuit
JP2007065538A (en) * 2005-09-02 2007-03-15 Nec Electronics Corp Test method of driving circuit and driving circuit of display device
JP2007218585A (en) * 2006-02-14 2007-08-30 Yokogawa Electric Corp Test system
US8203548B2 (en) 2006-07-20 2012-06-19 Oki Semiconductor Co., Ltd. Driving circuit
US8077133B2 (en) 2006-11-22 2011-12-13 Oki Semiconductor Co., Ltd. Driving circuit

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