JP2000269403A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

(57) [Summary] [Problem] To increase mounting density. SOLUTION: A wiring board 10 is fixed to transistor chips 26 and 27, chip capacitors 28 and 29, chip resistors 30 and 31, and wires 33 are bonded on these 26 to 31. The resin sealing body 34 is formed on the wiring substrate 10 so that the other end of the group of wires 33 is exposed, and the electric wiring 35 is laid on the exposed surface of the group of wires 33 of the resin sealing body 34. The electric wiring 35 has S
The OP IC 39 is surface-mounted. SOP ・ IC3
Numeral 9 is electrically connected to transistor chips 26 and 27, chip capacitors 28 and 29, and chip resistors 30 and 31 by an electric wiring 35 and a group of wires 33. [Effect] Since the controller can be stacked on the resin sealing body in which the transistor chip, the chip capacitor, and the chip resistor are resin-sealed, high-density mounting can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a technique for manufacturing a semiconductor device, and more particularly to a technique for manufacturing a hybrid integrated circuit device (hereinafter, referred to as a hybrid IC) in which active elements and passive elements are mounted on a substrate.

[0002]

2. Description of the Related Art As a conventional hybrid IC of this kind, there is a high-density mounting structure of an electronic circuit board described in Japanese Patent Application Laid-Open No. 9-321408. That is, an electronic component having stud bumps formed on connection terminals is embedded in a substrate, and the periphery of the electronic component is covered with an insulating layer made of an insulating member. A high-density mounting structure of an electronic circuit board, wherein a stud bump is exposed and a wiring pattern electrically connected to the stud bump is formed on the insulating layer.

[0003]

However, in the above-described high-density mounting structure of an electronic circuit board, a material capable of laser drilling must be used as an insulating material for forming the insulating layer. It has been clarified by the present inventors that there is a problem that there is a limit in the adhesiveness to the wiring pattern and the crack resistance.

An object of the present invention is to provide a technique for manufacturing a semiconductor device which can be mounted at high density and has high adhesiveness and durability.

[0005] The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0006]

The outline of a typical invention among the inventions disclosed in the present application is as follows.

That is, a wire is bonded to the chip-type active element and / or the chip-type passive element fixed to the substrate, and a resin sealing body is exposed on the substrate at the other end of the wire. It is molded so that
A packaged active element is electrically connected to and fixed to the wire on one main surface of the resin sealing body.

According to the above-described means, since the packaged active element is stacked on the chip-type active element or the chip-type passive element, high-density mounting can be realized. In addition, since the wire can be bonded after the chip-type active element or the chip-type passive element is fixed to the substrate, the positional accuracy of the wire with respect to the substrate is less than that of the chip-type active element or the passive element. No need to be affected. In addition, since it is not necessary to form a hole in the resin sealing body, the resin sealing body can be formed of a resin material having good adhesiveness and crack resistance. And crack resistance can be improved.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

In this embodiment, a semiconductor device according to the present invention is a hybrid IC (a hybrid IC (a lithium ion secondary battery)) that constitutes a protection circuit device for preventing overcharge and overdischarge of a lithium battery. Hereinafter, this is referred to as a protection circuit device). By the way, since lithium batteries are used as power sources for mobile phones and PHS (Personal Handy Phone System),
There is a demand for smaller and lighter weight. The protection circuit device according to the present embodiment is a hybrid IC that meets this demand.

The protection circuit device 1 is structurally configured as shown in FIG. 1, and the circuit is configured as shown in the circuit diagram of FIG. That is, the protection circuit device 1 includes a wiring board 10, two transistor chips 26 and 27 as chip-type active elements fixed to the wiring board 10, and a chip-type passive element similarly fixed to the wiring board 10. Two chip capacitors 28,
29, two chip resistors 30, 31, two transistor chips 26, 27, two chip capacitors 28, 29
And a group of wires 33 bonded to both chip resistors 30 and 31, and a wire 33 on the wiring board 10.
Resin sealing body 34 molded so that the other end of the group is exposed
And an electric wiring 35 formed on one main surface of the resin sealing body 34
And a small active device as a packaged active device
And a semiconductor integrated circuit device (hereinafter, referred to as an SOP / IC) 39 having an outline package. The SOP / IC 39 is surface-mounted on the electric wiring 35. The two transistor chips 26 and 27, the two chip capacitors 28 and 29, the two chip resistors 30, 31 and the SOP / IC 39 are constituted by the wiring board 10, the group of wires 33 and the electric wiring 35 as shown in the circuit diagram of FIG. The protection circuit device 1 is connected to the lithium battery 2 and the load or the AC adapter 3 as shown in FIG. This protection circuit device 1 is manufactured by the following manufacturing method.

Hereinafter, a method of manufacturing a protection circuit device according to an embodiment of the present invention will be described. With this description, the details of the configuration of the protection circuit device will be clarified.

In this embodiment, the wiring board 10 shown in FIG. 3 is used for the method of manufacturing a hybrid IC. That is, the wiring board 10 includes the base 11 and is formed in a square thin plate shape having a size corresponding to the lithium battery 2. The base 11 is formed in a multilayer structure using glass epoxy resin in which glass fiber is impregnated with epoxy resin. However, it may be formed by using a plate material formed of another insulating material such as ceramic.

An active element land 12 and four passive element lands 13, 14, 15 and 16 are formed on a first main surface (hereinafter referred to as an upper surface) of the base 11, respectively. Separately, wire bonding pads 17, 1
8 are formed. External connection terminals (hereinafter referred to as power supply terminals) 19 and 20 for electrically connecting to the lithium battery 2 are provided on a pair of lower sides of the base 11, and are electrically connected to a load such as a mobile phone or a PHS and the AC adapter 3. External connection terminal (hereinafter referred to as a load terminal) 2
1 and 22 are respectively formed. A pair of control terminals 23 and 24 are respectively formed on the end side on the power supply terminal side. Each land 12 to 16, wire bonding pads 17 and 18, each terminal 19 to 24, and electric wiring 25
It is formed by a lithography process and an etching process using a conductive material such as copper.

The power supply terminals 19 and 20 and the load terminal 2
1 and 22 and control terminals 23 and 24 are electrically connected by an electric wiring 25 as shown in FIG. The electric wiring 25 is formed by a lithography method and an etching method using a conductive material such as copper, and the electric wiring 25 is formed in a through hole penetrating the base 11 or in the surface or inside of the base 11. It is formed by the laminated wiring thus formed. In the figure, 11
Reference symbol a denotes a solder resist adhered to the lower surface of the base 11.

As shown in FIG. 4, the wiring board 10
A first transistor chip 26 and a second transistor chip 27 as chip-type active elements are arranged adjacent to each other and bonded to the active element land 12. The first transistor chip 26 and the second transistor chip 27 are chips in which a high-output MOS • FET (Metal Oxide Semiconductor Field Effect Transistor) element is built, and are so-called bare chips that are not packaged. Four passive element lands 13, 14, 15,
A first chip capacitor 28, a second chip capacitor 29, a first chip resistor 30, and a second chip resistor 31 as chip-type passive elements are bonded to 16 respectively. These bonding layers 32 can be formed simultaneously by reflow soldering.

Subsequently, the first transistor chip 26, the second transistor chip 27, the first chip capacitor 2
8, the second chip capacitor 29, the first chip resistor 30,
Second chip resistor 31, first wire bonding pad 1
A wire 33 having a predetermined length is connected to the seventh wire bonding pad 18 as shown in FIG. That is, after one end of the wire 33 is first bonded, the wire 33 is fed out of the capillary by a predetermined length and cut at the intermediate portion. In this state, each of the wires 33 stands substantially vertically, and the upper ends thereof are substantially aligned.

Next, as shown in FIG. 6, on the wiring board 10, a resin sealing body 34 is provided with a first transistor chip 26, a second transistor chip 27, a first chip capacitor 28, and a second chip capacitor. 29, a first chip resistor 30, a second chip resistor 31, and a group of wires 33 are molded so as to be resin-sealed. The resin sealing body 34 is formed by a potting method. However, it may be formed by a transfer method.

After the resin sealing body 34 has sufficiently hardened, the upper surface of the resin sealing body 34 is polished, and electric wiring 35 is laid on the upper surface of the resin sealing body 34 as shown in FIG. Is done. The electric wiring 35 may be laid directly on the surface of the resin sealing body 34 or may be formed on a wiring layer formed on the resin sealing body 34.

Thereafter, as shown in FIG. 8, a solder resist film 37 is applied on the upper surface of the resin sealing body 34 so as to expose a part of the electric wiring 35, and the eight lands 36 are electrically connected. It is formed by the exposed surface of the wiring 35. The SOPs / ICs 39 as packaged active elements are mechanically and electrically connected to the eight lands 36 by soldering portions 38 formed by reflow soldering, and are surface-mounted. The SOP / IC 39 is configured as a controller that controls the first transistor chip 26 and the second transistor chip 27 to exhibit a switching function of opening and closing the input / output circuit of the lithium battery 2.

The protection circuit device 1 configured as described above is used by being surface-mounted on a mounting board or the like of a mobile phone.

According to the above embodiment, the following effects can be obtained.

1) A wire is bonded to a transistor chip, a chip capacitor, and a chip resistor fixed to a substrate, and a resin sealing body is formed on the substrate so that the other end of the wire is exposed. Since the SOP / IC is electrically connected to the wire and fixed on the upper surface, the SOP / IC can be laminated on the resin sealing body in which the transistor chip, the chip capacitor, and the chip resistor are resin-sealed. , High-density mounting can be realized. According to trial calculations, compared to a conventional protection circuit device in which all components are surface-mounted on the upper surface of the board, it is about 1/3 to
It can be reduced to half.

2) By reducing the planar area of the protection circuit device, the area occupied by a lithium secondary battery on a board of a mobile phone or the like can be reduced, so that the size of the mobile phone or the like can be further reduced. .

3) By bonding the wires after the transistor chips, chip capacitors and chip resistors are fixed to the substrate, the positional accuracy of the wires with respect to the substrate is affected by the positional accuracy of the transistor chips, chip capacitors and chip resistors with respect to the substrate. Can be avoided, so that S
Accurate surface mounting of the OP · IC can be realized.

4) Since the resin material used for molding the resin-sealed body can be freely selected by not punching the resin-sealed body, the adhesiveness and crack resistance of the resin-sealed body are improved. Can be enhanced.

5) By mechanically connecting the transistor chip to the land of the substrate by a soldering portion, the heat generated by the transistor chip is directly radiated to the substrate via the soldering portion and the land by heat conduction. Therefore, the heat dissipation performance of the transistor chip can be improved, and the desired performance can be exhibited in the transistor chip.

Although the invention made by the inventor has been specifically described based on the embodiment, the invention is not limited to the embodiment, and various changes can be made without departing from the gist of the invention. Needless to say.

For example, the chip-type active element is not limited to a transistor chip, but may be a so-called naked IC chip in which an IC is built.

As a packaged active element, S
The present invention is not limited to the use of the OP IC, but an IC having another package such as a QFP IC, or a packaged transistor may be used.

The connection to the wiring substrate such as the transistor chip, the chip capacitor and the chip resistor is not limited to soldering, but may be silver paste or taping connection.

The connecting means for surface mounting the packaged active element on the electric wiring of the resin sealing body is not limited to the reflow soldering method, but may be a flow soldering method, a silver paste method, a taping method, or the like. May be used.

In the above description, the case where the invention made by the present inventor is mainly applied to a protection circuit device for a lithium ion secondary battery, which is a field of use as a background, has been described. Applied to semiconductor devices such as high-frequency power amplifiers, semiconductor integrated circuit devices for ultra-high frequency signal processing, power amplifiers for ultra-high-speed processing used in supercomputers, multi-chip modules (MCMs), and hybrid integrated circuit devices can do.

[0034]

The effects obtained by typical aspects of the invention disclosed in the present application will be briefly described as follows.

A wire is bonded to a chip-type active element or passive element fixed to a substrate, and a resin sealing body is formed on the substrate so that the other end of the wire is exposed. By electrically connecting and fixing the packaged active elements to the wires, the packaged active elements can be stacked on chip-type active elements or passive elements, realizing high-density mounting. can do.

[Brief description of the drawings]

1A and 1B show a protection circuit device according to an embodiment of the present invention, wherein FIG. 1A is a front sectional view, FIG. 1B is a plan view, and FIG.
FIG. 3 is a plan sectional view in which a resin sealing body is omitted.

FIG. 2 is a circuit diagram thereof.

3A and 3B show a substrate, wherein FIG. 3A is a plan view, and FIG. 3B is a front sectional view taken along line bb in FIG. 3A.

4A and 4B show a state after chip bonding, in which FIG. 4A is a plan view, and FIG. 4B is a front sectional view taken along line bb of FIG.

5A and 5B show a state after wire bonding, in which FIG. 5A is a plan view, and FIG. 5B is a front sectional view taken along line bb of FIG. 5A.

6A and 6B show a state after molding of a resin sealing body, wherein FIG. 6A is a plan view, and FIG. 6B is a front sectional view taken along line bb of FIG.

7A and 7B show the state after the formation of the electric wiring, wherein FIG. 7A is a plan view and FIG. 7B is a front sectional view taken along the line bb of FIG.

FIG. 8 shows a state after surface mounting, where (a) is a plan view,
(B) is front sectional drawing which follows the bb line | wire of (a).

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Protection circuit device (semiconductor device), 2 ... Lithium battery (lithium ion secondary battery), 3 ... AC adapter, 1
0: Wiring board, 11: Base, 11a: Solder resist, 12: Land for active element, 13, 14, 15, 16
... Lands for passive elements, 17, 18 ... Wire bonding pads, 19, 20 ... Power supply terminals (external connection terminals), 2
1, 22: load terminal (external connection terminal), 23, 24: control terminal (external connection terminal), 25: electric wiring, 26, 27
... transistor chips (chip-type active elements), 28,
29: chip capacitor (chip type passive element), 3
0, 31 ... chip resistor (chip type passive element), 32 ...
Bonding layer, 33: wire, 34: resin sealing body, 3
5: electrical wiring, 36: land, 37: solder resist film, 38: soldering portion, 39: SOP / IC (packaged active element).

Claims (10)

[Claims] A wire is bonded to a chip-type active element and / or a chip-type passive element fixed to a substrate, and a resin sealing body is exposed on the substrate at the other end of the wire. And a packaged active element is electrically connected to the wire and fixed to one main surface of the resin sealing body. 2. The semiconductor device according to claim 1, wherein said chip-type active element is a transistor. 3. The chip-type passive element is a chip capacitor and a chip resistor.
Or the semiconductor device according to 2. 4. The semiconductor device according to claim 1, wherein the packaged active element is a semiconductor integrated circuit device provided with a resin-sealed type packaging. 5. A step of fixing a chip-type active element and / or a chip-type passive element to a substrate, and a step of bonding a wire to the chip-type active element and / or the chip-type passive element. A step of forming a resin sealing body on the substrate so that the other end of the wire is exposed; and an active element packaged on one main surface of the resin sealing body electrically connected to the wire. And fixing the semiconductor device. 6. The method according to claim 5, wherein external connection terminals are formed on the substrate. 7. A chip type active element and / or
7. The method according to claim 5, wherein the chip-type passive element is reflow-soldered. 8. The method for manufacturing a semiconductor device according to claim 5, wherein said resin sealing body is formed by a potting method. 9. The resin sealing body is polished to expose the other end of the wire.
9. A method for manufacturing a semiconductor device according to item 8. 10. The semiconductor device according to claim 5, wherein said packaged active element is reflow-soldered to one main surface of said resin sealing body. Production method.