JP2000221907A - Electroluminescence display device - Google Patents
Electroluminescence display deviceInfo
- Publication number
- JP2000221907A JP2000221907A JP11022158A JP2215899A JP2000221907A JP 2000221907 A JP2000221907 A JP 2000221907A JP 11022158 A JP11022158 A JP 11022158A JP 2215899 A JP2215899 A JP 2215899A JP 2000221907 A JP2000221907 A JP 2000221907A
- Authority
- JP
- Japan
- Prior art keywords
- tft
- display device
- organic
- channel
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000005401 electroluminescence Methods 0.000 title description 4
- 239000004020 conductor Substances 0.000 claims abstract description 14
- 239000010408 film Substances 0.000 claims description 51
- 239000010409 thin film Substances 0.000 claims description 10
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000013078 crystal Substances 0.000 claims description 5
- 230000008859 change Effects 0.000 abstract description 6
- 239000010410 layer Substances 0.000 description 30
- 108091006146 Channels Proteins 0.000 description 24
- 239000000758 substrate Substances 0.000 description 15
- 239000003990 capacitor Substances 0.000 description 13
- 229910004298 SiO 2 Inorganic materials 0.000 description 7
- 239000011651 chromium Substances 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 229910052804 chromium Inorganic materials 0.000 description 5
- 230000005684 electric field Effects 0.000 description 5
- 108010075750 P-Type Calcium Channels Proteins 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 239000003513 alkali Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- ZUOUZKKEUPVFJK-UHFFFAOYSA-N diphenyl Chemical compound C1=CC=CC=C1C1=CC=CC=C1 ZUOUZKKEUPVFJK-UHFFFAOYSA-N 0.000 description 2
- 230000005525 hole transport Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 229920006395 saturated elastomer Polymers 0.000 description 2
- 229910000846 In alloy Inorganic materials 0.000 description 1
- 241001024304 Mino Species 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 108090000699 N-Type Calcium Channels Proteins 0.000 description 1
- 102000004129 N-Type Calcium Channels Human genes 0.000 description 1
- NRCMAYZCPIVABH-UHFFFAOYSA-N Quinacridone Chemical class N1C2=CC=CC=C2C(=O)C2=C1C=C1C(=O)C3=CC=CC=C3NC1=C2 NRCMAYZCPIVABH-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 108010025037 T140 peptide Proteins 0.000 description 1
- 239000007983 Tris buffer Substances 0.000 description 1
- JHYLKGDXMUDNEO-UHFFFAOYSA-N [Mg].[In] Chemical compound [Mg].[In] JHYLKGDXMUDNEO-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 229910052790 beryllium Inorganic materials 0.000 description 1
- 235000010290 biphenyl Nutrition 0.000 description 1
- 239000004305 biphenyl Substances 0.000 description 1
- 230000009849 deactivation Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910021424 microcrystalline silicon Inorganic materials 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229920003217 poly(methylsilsesquioxane) Polymers 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
- 239000000057 synthetic resin Substances 0.000 description 1
Landscapes
- Transforming Electric Information Into Light Information (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Thin Film Transistor (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、エレクトロルミネ
ッセンス素子及び薄膜トランジスタを備えたエレクトロ
ルミネッセンス表示装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electroluminescent display device having an electroluminescent element and a thin film transistor.
【0002】[0002]
【従来の技術】近年、エレクトロルミネッセンス(Elec
tro Luminescence:以下、「EL」と称する。)素子
を用いたEL表示装置が、CRTやLCDに代わる表示
装置として注目されており、例えば、そのEL素子を駆
動させるスイッチング素子として薄膜トランジスタ(Th
in Film Transistor:以下、「TFT」と称する。)を
備えたEL表示装置の研究開発も進められている。2. Description of the Related Art In recent years, electroluminescence (Elec)
tro Luminescence: Hereinafter, referred to as “EL”. An EL display device using an element has attracted attention as a display device replacing a CRT or an LCD. For example, a thin film transistor (Th) is used as a switching element for driving the EL element.
in Film Transistor: Hereinafter, referred to as “TFT”. Research and development of an EL display device having ()) are also in progress.
【0003】図6に有機EL表示装置の1表示画素の等
価回路図を示し、図7に有機EL表示装置の1表示画素
を示す平面図を示し、図8(a)に図7中のA−A線に
沿った断面図を示し、図8(b)に図7中のB−B線に
沿った断面図を示す。FIG. 6 is an equivalent circuit diagram of one display pixel of the organic EL display device, FIG. 7 is a plan view showing one display pixel of the organic EL display device, and FIG. FIG. 8B is a cross-sectional view taken along a line BB in FIG. 7.
【0004】図6及び図7に示すように、ゲート信号線
51とドレイン信号線52とに囲まれた領域に表示画素
が形成されている。両信号線の交点付近にはスイッチン
グ素子である第1のTFT130が備えられており、そ
のTFT130のソース13sは後述の保持容量電極線
54との間で容量をなす容量電極55を兼ねるととも
に、有機EL素子を駆動する第2のTFT140のゲー
ト41に接続されている。第2のTFT140のソース
43sは有機EL素子の陽極61に接続され、他方のド
レイン43dは有機EL素子を駆動する駆動電源線53
に接続されている。As shown in FIGS. 6 and 7, a display pixel is formed in a region surrounded by a gate signal line 51 and a drain signal line 52. A first TFT 130 serving as a switching element is provided near the intersection of the two signal lines, and a source 13 s of the TFT 130 also serves as a capacitance electrode 55 forming a capacitance with a storage capacitance electrode line 54 described later, and an organic TFT. It is connected to the gate 41 of the second TFT 140 that drives the EL element. The source 43s of the second TFT 140 is connected to the anode 61 of the organic EL element, and the other drain 43d is connected to the drive power supply line 53 for driving the organic EL element.
It is connected to the.
【0005】また、TFTの付近には、ゲート信号線5
1と並行に保持容量電極線54が配置されている。この
保持容量電極線54はクロム等から成っており、ゲート
絶縁膜12を介してTFTのソース13sと接続された
容量電極55との間で電荷を蓄積して容量を成してい
る。この保持容量160は、第2のTFT140のゲー
ト電極41に印加される電圧を保持するために設けられ
ている。Further, a gate signal line 5 is provided near the TFT.
A storage capacitor electrode line 54 is arranged in parallel with the storage capacitor electrode line 1. The storage capacitor electrode line 54 is made of chromium or the like, and forms a capacitor by storing charge between the capacitor electrode 55 connected to the source 13s of the TFT via the gate insulating film 12. The storage capacitor 160 is provided to hold a voltage applied to the gate electrode 41 of the second TFT 140.
【0006】まず、スイッチング用のTFTである第1
のTFT130について説明する。First, the first TFT, which is a switching TFT, is used.
The TFT 130 will be described.
【0007】図8(a)に示すように、石英ガラス、無
アルカリガラス等からなる絶縁性基板10上に、クロム
(Cr)、モリブデン(Mo)などの高融点金属からな
るゲート電極11を兼ねたゲート信号線51及びAlか
ら成るドレイン信号線52を備えており、有機EL素子
の駆動電源でありAlから成る駆動電源線53を配置す
る。As shown in FIG. 8A, a gate electrode 11 made of a high melting point metal such as chromium (Cr) or molybdenum (Mo) is formed on an insulating substrate 10 made of quartz glass, non-alkali glass or the like. A gate signal line 51 and a drain signal line 52 made of Al are provided, and a drive power line 53 made of Al, which is a drive power source for the organic EL element, is provided.
【0008】続いて、ゲート絶縁膜12、及びp−Si
膜からなる能動層13を順に形成し、その能動層13に
は、いわゆるLDD(Lightly Doped Drain)構造が設
けられている。即ち、ゲート電極11の両側に低濃度領
域13LDとその外側に高濃度領域のソース13s及び
ドレイン13dが設けられている。Subsequently, a gate insulating film 12 and p-Si
An active layer 13 composed of a film is formed in order, and the active layer 13 is provided with a so-called LDD (Lightly Doped Drain) structure. That is, the low concentration region 13LD is provided on both sides of the gate electrode 11, and the source 13s and the drain 13d of the high concentration region are provided outside the low concentration region 13LD.
【0009】そして、ゲート絶縁膜12、能動層13及
びストッパ絶縁膜14上の全面には、SiO2膜、Si
N膜及びSiO2膜の順に積層された層間絶縁膜15を
設け、ドレイン13dに対応して設けたコンタクトホー
ルにAl等の金属を充填してドレイン電極16を設け
る。更に全面に例えば有機樹脂から成り表面を平坦にす
る平坦化絶縁膜17を設ける。An SiO 2 film and a Si film are formed on the entire surface of the gate insulating film 12, the active layer 13 and the stopper insulating film 14.
An interlayer insulating film 15 laminated in the order of the N film and the SiO 2 film is provided, and a contact hole provided corresponding to the drain 13 d is filled with a metal such as Al to form a drain electrode 16. Further, a flattening insulating film 17 made of, for example, an organic resin and flattening the surface is provided on the entire surface.
【0010】次に、有機EL素子の駆動用のTFTであ
る第2のTFT140について説明する。Next, the second TFT 140 which is a TFT for driving the organic EL element will be described.
【0011】図8(b)に示すように、石英ガラス、無
アルカリガラス等からなる絶縁性基板10上に、Cr、
Moなどの高融点金属からなるゲート電極41を設け、
ゲート絶縁膜12、及びp−Si膜からなる能動層43
を順に形成し、その能動層43には、ゲート電極41上
方に真性又は実質的に真性であるチャネル43cと、こ
のチャネル43cの両側に、その両側にイオンドーピン
グを施してソース13s及びドレイン13dが設けられ
ている。As shown in FIG. 8B, Cr, Cr, and the like are placed on an insulating substrate 10 made of quartz glass, non-alkali glass, or the like.
A gate electrode 41 made of a high melting point metal such as Mo is provided,
Gate insulating film 12 and active layer 43 made of p-Si film
In the active layer 43, an intrinsic or substantially intrinsic channel 43c is formed above the gate electrode 41, and both sides of the channel 43c are subjected to ion doping on both sides to form a source 13s and a drain 13d. Is provided.
【0012】そして、ゲート絶縁膜12及び能動層43
上の全面には、SiO2膜、SiN膜及びSiO2膜の順
に積層された層間絶縁膜15を形成し、ドレイン43d
に対応して設けたコンタクトホールにAl等の金属を充
填して駆動電源50に接続された駆動電源線53を配置
する。更に全面に例えば有機樹脂から成り表面を平坦に
する平坦化絶縁膜17を形成して、その平坦化絶縁膜1
7のソース43sに対応した位置にコンタクトホールを
形成し、このコンタクトホールを介してソース13sと
コンタクトしたITO(Indium Thin Oxide)から成る
透明電極、即ち有機EL素子の陽極61を平坦化絶縁膜
17上に設ける。The gate insulating film 12 and the active layer 43
On the entire upper surface, an interlayer insulating film 15 laminated in the order of a SiO 2 film, a SiN film and a SiO 2 film is formed, and a drain 43d is formed.
Are filled with metal such as Al, and a drive power supply line 53 connected to a drive power supply 50 is arranged. Further, a flattening insulating film 17 made of, for example, an organic resin and flattening the surface is formed on the entire surface.
A contact hole is formed at a position corresponding to the source 43s of No. 7, and a transparent electrode made of ITO (Indium Thin Oxide) contacting the source 13s via this contact hole, that is, the anode 61 of the organic EL element is formed on the planarizing insulating film 17 Provided above.
【0013】有機EL素子160は、ITO等の透明電
極から成る陽極61、MTDATA(4,4-bis(3-met hy
lphenylphenylamino)biphenyl)から成る第1ホール輸
送層62、TPD(4,4,4-tris(3-methylphenylphenyla
mino)triphenylanine)からなる第2ホール輸送層6
3、キナクリドン(Quinacridone)誘導体を含むBeb
q2(10-ベンゾ〔h〕キノリノール−ベリリウム錯体)
から成る発光層64及びBebq2から成る電子輸送層
からなる発光素子層65、マグネシウム・インジウム合
金から成る陰極66がこの順番で積層形成された構造で
ある。この陰極66は、図7に示した有機EL表示装置
を形成する基板10の全面、即ち紙面の全面に設けられ
ている。The organic EL element 160 includes an anode 61 made of a transparent electrode such as ITO, and an MTDATA (4,4-bis (3-methy).
lphenylphenylamino) biphenyl), the first hole transport layer 62, TPD (4,4,4-tris (3-methylphenylphenyla
Second hole transport layer 6 composed of mino) triphenylanine)
3. Beb containing quinacridone derivatives
q2 (10-benzo [h] quinolinol-beryllium complex)
A light emitting element layer 65 made of an electron transport layer made of Bebq2, and a cathode 66 made of a magnesium-indium alloy are stacked in this order. The cathode 66 is provided on the entire surface of the substrate 10 forming the organic EL display device shown in FIG. 7, that is, on the entire surface of the paper.
【0014】また有機EL素子は、陽極から注入された
ホールと、陰極から注入された電子とが発光層の内部で
再結合し、発光層を形成する有機分子を励起して励起子
が生じる。この励起子が放射失活する過程で発光層から
光が放たれ、この光が透明な陽極から透明絶縁基板を介
して外部へ放出されて発光する。In the organic EL device, holes injected from the anode and electrons injected from the cathode are recombined inside the light emitting layer, and excite the organic molecules forming the light emitting layer to generate excitons. Light is emitted from the light emitting layer during the process of radiation deactivation of the excitons, and the light is emitted from the transparent anode to the outside through the transparent insulating substrate to emit light.
【0015】ここで、図3に第2のTFTの特性を示
す。FIG. 3 shows the characteristics of the second TFT.
【0016】横軸に、図6中の駆動電源線53と保持容
量170との交点173における電位を基準としたゲー
ト電圧Vgsを、縦軸にドレイン電流Idsを示す。The horizontal axis indicates the gate voltage Vgs based on the potential at the intersection 173 between the drive power supply line 53 and the storage capacitor 170 in FIG. 6, and the vertical axis indicates the drain current Ids.
【0017】陰極が第2のTFTのチャネルの上方に無
い場合では、図3中の実線で示すような特性を示す。ま
た、陰極が有機EL表示装置の全面に形成されている場
合、即ち例えばこの陰極が−10Vの電位をもつ場合、
TFT特性は図3中の破線のように変化する。When the cathode is not above the channel of the second TFT, the characteristics shown by the solid line in FIG. 3 are exhibited. Further, when the cathode is formed on the entire surface of the organic EL display device, that is, for example, when the cathode has a potential of -10 V,
The TFT characteristics change as shown by the broken line in FIG.
【0018】これは、チャネル43c上方に設けられた
有機EL素子160の陰極66には電圧が印加されるが
その電圧によってチャネル43cに対してバックチャネ
ルが発生するためである。即ち、図5(b)に示したよ
うに、有機EL表示装置は基板10上に第2のTFT1
40を形成し、更にその上に有機EL素子160を設け
た構造であり、有機EL素子160の陰極66が全面に
形成されている構造であるため、その陰極66に電圧が
印加されるとその電圧によって生じる電界によって電荷
が生じ、いわゆるバックチャネルを生じてしまうためで
ある。This is because a voltage is applied to the cathode 66 of the organic EL element 160 provided above the channel 43c, and the voltage generates a back channel with respect to the channel 43c. That is, as shown in FIG. 5B, the organic EL display device includes the second TFT 1 on the substrate 10.
40, and the organic EL element 160 is further provided thereon. Since the cathode 66 of the organic EL element 160 is formed on the entire surface, when a voltage is applied to the cathode 66, the This is because electric charges are generated by an electric field generated by a voltage and a so-called back channel is generated.
【0019】[0019]
【発明が解決しようとする課題】ところが、第2のTF
T140は有機EL素子160を駆動する電源からの電
流を第2のTFT140のゲート41に印加された電圧
に応じて制御して有機EL素子60に供給する機能を有
しているが、この陰極の電位による特性変動の量(Δ
V)は、チャネル上にあるストッパ絶縁膜、平坦化絶縁
膜の膜厚、膜質によって決まり、これらが表示面内で変
動した場合、ΔVは容易に変動することになる。ΔVの
ばらつきはEL発光素子層に流れる電流を変動させるこ
とになるため、各表示画素ごとに発光輝度のばらつきを
生じ表示にムラが発生するという欠点があった。However, the second TF
T140 has a function of controlling the current from a power supply for driving the organic EL element 160 in accordance with the voltage applied to the gate 41 of the second TFT 140 and supplying the current to the organic EL element 60. The amount of characteristic variation due to potential (Δ
V) is determined by the thickness and quality of the stopper insulating film and the planarizing insulating film on the channel, and when these change within the display surface, ΔV easily changes. Since the variation of ΔV changes the current flowing in the EL light emitting element layer, there is a disadvantage that the emission luminance varies for each display pixel and the display becomes uneven.
【0020】そこで本発明は、上記の従来の欠点に鑑み
て為されたものであり、第2のTFTの特性の変動をな
くし本来EL素子に供給されるべき電流を供給して表示
ムラの発生しないEL表示装置を提供することを目的と
する。Accordingly, the present invention has been made in view of the above-mentioned conventional disadvantages, and eliminates fluctuations in the characteristics of the second TFT and supplies a current which should be supplied to the EL element, thereby causing display unevenness. It is an object of the present invention to provide an EL display device that does not use such a display device.
【0021】[0021]
【課題を解決するための手段】本発明のEL表示装置
は、陽極と陰極との間に発光層を有するエレクトロルミ
ネッセンス素子と、非単結晶半導体膜からなる能動層の
ドレインがドレイン信号線に、ゲートがゲート信号線に
それぞれ接続された第1の薄膜トランジスタと、非単結
晶半導体膜からなる能動層のドレインが前記エレクトロ
ルミネッセンス素子の駆動電源に、前記能動層のチャネ
ルの下方に設けたゲートが前記第1の薄膜トランジスタ
のソースにそれぞれ接続された第2の薄膜トランジスタ
とを備えたエレクトロルミネッセンス表示装置であっ
て、該第2の薄膜トランジスタの能動層に設けられたチ
ャネルの上方に該チャネルを覆う導電体を設けているも
のである。According to an EL display device of the present invention, an electroluminescent element having a light emitting layer between an anode and a cathode, and a drain of an active layer formed of a non-single-crystal semiconductor film are connected to a drain signal line. A first thin film transistor having a gate connected to a gate signal line, a drain of an active layer made of a non-single-crystal semiconductor film serving as a drive power source for the electroluminescent element, and a gate provided below a channel of the active layer being provided as a gate. An electroluminescent display device comprising: a second thin film transistor connected to a source of a first thin film transistor; and a conductor covering the channel provided above a channel provided in an active layer of the second thin film transistor. It is provided.
【0022】また、上述のEL表示装置の前記導電体は
前記駆動電源に接続された駆動電源線を前記チャネル上
方にまで延在させて設けたエレクトロルミネッセンス表
示装置である。Further, the conductor of the above-mentioned EL display device is an electroluminescence display device in which a drive power supply line connected to the drive power supply is provided to extend above the channel.
【0023】更に、上述のEL表示装置の前記導電体は
前記ゲート信号線を前記チャネル上方にまで延在させて
設けたエレクトロルミネッセンス表示装置である。Further, the above-mentioned conductor of the EL display device is an electroluminescence display device provided with the gate signal line extending above the channel.
【0024】[0024]
【発明の実施の形態】本発明のEL表示装置について以
下に説明する。 <第1の実施の形態>図1に本発明を有機EL表示装置
に適用した場合の1表示画素を示す平面図を示し、図2
(a)に図1中のA−A線に沿った断面図を示し、図2
(b)に図1中のB−B線に沿った断面図を示す。DESCRIPTION OF THE PREFERRED EMBODIMENTS An EL display device according to the present invention will be described below. <First Embodiment> FIG. 1 is a plan view showing one display pixel when the present invention is applied to an organic EL display device, and FIG.
FIG. 2A is a sectional view taken along the line AA in FIG.
FIG. 2B is a sectional view taken along line BB in FIG.
【0025】図1に示すように、ゲート信号線51とド
レイン信号線52とに囲まれた領域に表示画素が形成さ
れている。両信号線の交点付近には第1のTFT30が
備えられており、そのTFT30のソース13sは保持
容量電極線54との間で容量をなす容量電極55を兼ね
るとともに、第2のTFT40のゲート41に接続され
ている。第2のTFTのソース43sは有機EL素子6
0の陽極61に接続され、他方のドレイン43dは有機
EL素子を駆動する駆動電源線53に接続されている。As shown in FIG. 1, a display pixel is formed in a region surrounded by a gate signal line 51 and a drain signal line 52. The first TFT 30 is provided near the intersection of the two signal lines, and the source 13 s of the TFT 30 also functions as the capacitance electrode 55 that forms a capacitance with the storage capacitance electrode line 54, and the gate 41 of the second TFT 40. It is connected to the. The source 43s of the second TFT is the organic EL element 6
The other drain 43d is connected to a drive power supply line 53 for driving the organic EL element.
【0026】また、TFTの付近には、ゲート信号線5
1と並行に保持容量電極線54が配置されている。この
保持容量電極線54はクロム等から成っており、ゲート
絶縁膜12を介してTFTのソース13sと接続された
容量電極55との間で電荷を蓄積して容量を成してい
る。この保持容量は、第2のTFT40のゲート電極4
1に印加される電圧を保持するために設けられている。The gate signal line 5 is located near the TFT.
A storage capacitor electrode line 54 is arranged in parallel with the storage capacitor electrode line 1. The storage capacitor electrode line 54 is made of chromium or the like, and forms a capacitor by storing charge between the capacitor electrode 55 connected to the source 13s of the TFT via the gate insulating film 12. This storage capacitor is connected to the gate electrode 4 of the second TFT 40.
1 is provided to hold the voltage applied to the switch 1.
【0027】このように有機EL素子60及びTFT3
0,40を備えた表示画素が基板10上にマトリクス状
に配置されることにより有機EL表示装置が形成され
る。As described above, the organic EL element 60 and the TFT 3
An organic EL display device is formed by arranging display pixels including 0 and 40 on the substrate 10 in a matrix.
【0028】図2に示すように、有機EL表示装置は、
ガラスや合成樹脂などから成る基板又は導電性を有する
基板あるいは半導体基板等の基板10上に、TFT及び
有機EL素子を順に積層形成して成る。ただし、基板1
0として導電性を有する基板及び半導体基板を用いる場
合には、これらの基板10上にSiO2やSiNなどの
絶縁膜を形成した上にTFT及び有機EL表示装置を形
成する。As shown in FIG. 2, the organic EL display device comprises:
A TFT and an organic EL element are sequentially laminated on a substrate 10 such as a substrate made of glass or synthetic resin, a conductive substrate, or a semiconductor substrate. However, substrate 1
In the case where a substrate having conductivity and a semiconductor substrate are used as 0, a TFT and an organic EL display device are formed after forming an insulating film such as SiO 2 or SiN on the substrate 10.
【0029】本実施の形態においては、第1及び第2の
TFT30,40ともに、ゲート電極を能動層13の下
方に設けたいわゆるボトムゲート型のTFTであり、能
動層として多結晶シリコン(Poly-Silicon、以下、「p
−Si」と称する。)膜を用いた場合を示す。またゲー
ト電極11,41がダブルゲート構造であるTFTの場
合を示す。スイッチング用のTFTである第1のTFT
30は、図2(a)に示すように、従来の第1のTFT
140と同じ構造であるので説明は省略する。In this embodiment, both the first and second TFTs 30 and 40 are so-called bottom gate type TFTs in which a gate electrode is provided below the active layer 13, and the active layer is made of polycrystalline silicon (Poly-Si). Silicon, hereafter "p
-Si ". ) Shows the case where a film is used. Also, a case is shown where the gate electrodes 11 and 41 are TFTs having a double gate structure. First TFT that is a switching TFT
Reference numeral 30 denotes a conventional first TFT as shown in FIG.
Since the structure is the same as 140, the description is omitted.
【0030】次に、有機EL素子60の駆動用のTFT
である第2のTFT40について説明する。Next, a TFT for driving the organic EL element 60
The second TFT 40 will be described.
【0031】図2(b)に示すように、石英ガラス、無
アルカリガラス等からなる絶縁性基板10上に、Cr、
Moなどの高融点金属からなるゲート電極41を形成す
る。As shown in FIG. 2B, on an insulating substrate 10 made of quartz glass, non-alkali glass or the like, Cr,
A gate electrode 41 made of a high melting point metal such as Mo is formed.
【0032】ゲート絶縁膜12、及びp−Si膜からな
る能動層43を順に形成する。A gate insulating film 12 and an active layer 43 made of a p-Si film are sequentially formed.
【0033】その能動層43には、ゲート電極41上方
に真性又は実質的に真性であるチャネル43cと、この
チャネル43cの両側に、その両側にイオンドーピング
してソース13s及びドレイン13dが設けられてい
る。In the active layer 43, an intrinsic or substantially intrinsic channel 43c is provided above the gate electrode 41, and a source 13s and a drain 13d are provided on both sides of the channel 43c by ion doping on both sides. I have.
【0034】そして、ゲート絶縁膜12及び能動層43
上の全面に、SiO2膜、SiN膜及びSiO2膜の順に
積層された層間絶縁膜15を形成し、ドレイン43dに
対応して設けたコンタクトホールにAl等の金属を充填
して駆動電源50に接続された駆動電源線53を形成す
る。更に全面に例えば有機樹脂から成り表面を平坦にす
る平坦化絶縁膜17を形成する。そして、その平坦化絶
縁膜17のドレイン43dに対応した位置にコンタクト
ホールを形成し、このコンタクトホールを介して駆動電
源線53とコンタクトしAlからなる駆動電源線53を
形成する。このとき、同時にその駆動電源線53の一部
をチャネル43c上に延在させて覆う導電体56を形成
する。また、その平坦化絶縁膜17のソース43sに対
応した位置にコンタクトホールを形成し、このコンタク
トホールを介してソース13sとコンタクトしたITO
から成る透明電極、即ち有機EL素子の陽極61を平坦
化絶縁膜17上に形成する。Then, the gate insulating film 12 and the active layer 43
On the entire upper surface, an interlayer insulating film 15 laminated in the order of a SiO 2 film, a SiN film and a SiO 2 film is formed, and a contact hole provided corresponding to the drain 43d is filled with a metal such as Al to drive a driving power supply 50. To form a drive power supply line 53 connected to the power supply line. Further, a flattening insulating film 17 made of, for example, an organic resin and flattening the surface is formed on the entire surface. Then, a contact hole is formed at a position corresponding to the drain 43d of the planarizing insulating film 17, and the drive power supply line 53 is contacted through the contact hole to form a drive power supply line 53 made of Al. At this time, at the same time, a conductor 56 is formed to extend and cover a part of the drive power supply line 53 on the channel 43c. In addition, a contact hole is formed at a position corresponding to the source 43s of the planarizing insulating film 17, and the ITO contacted with the source 13s through this contact hole.
, Ie, the anode 61 of the organic EL element is formed on the flattening insulating film 17.
【0035】有機EL素子60の構造も従来の技術で説
明した構造と同じであるので説明を省略する。The structure of the organic EL element 60 is the same as the structure described in the prior art, and the description is omitted.
【0036】このように、第2のTFT40のチャネル
43c上方に駆動電源53の一部からなる導電体56を
形成することにより、陰極66に印加される電圧による
電界によって生じるバックチャネルを抑制することがで
きる。即ち、陰極の電位による電界やチャネル上部の膜
質、膜厚等の変動による影響を受けず、本来のTFT特
性を保持することができることになる。従って、陰極の
電位による電界やチャネル上部の膜質、膜厚等の変動等
に起因する表示ムラを防止することができる。As described above, by forming the conductor 56 which is a part of the driving power supply 53 above the channel 43c of the second TFT 40, the back channel generated by the electric field due to the voltage applied to the cathode 66 can be suppressed. Can be. That is, the original TFT characteristics can be maintained without being affected by the electric field due to the potential of the cathode and the fluctuation of the film quality, film thickness, and the like above the channel. Therefore, it is possible to prevent display unevenness due to an electric field due to the potential of the cathode, a change in film quality, film thickness, and the like above the channel.
【0037】また、第2のTFT40がp型を呈する不
純物をドーピングしたソース及びドレインを備えた能動
層を備えたp型チャネルTFTとすれば、Id−Vd特性
において飽和する領域を広くすることができるため、V
dに応じてIdが変化しにくくなる、即ちドレイン電圧の
変化に応じたドレイン電流値のばらつきが少なくなるの
で有機EL素子の発光輝度が再現性良く均一にすること
ができることから良好な階調表示を容易に得ることがで
きる。Further, if the second TFT 40 is a p-type channel TFT having an active layer having a source and a drain doped with a p-type impurity, a region saturated in the Id-Vd characteristics can be widened. V
Id is less likely to change in accordance with d, that is, the variation in drain current value in accordance with the change in drain voltage is reduced, so that the light emission luminance of the organic EL element can be made uniform with good reproducibility, so that good gradation display can be achieved. Can be easily obtained.
【0038】特に多結晶シリコンTFTでは、従来の技
術の欄で説明したように、結晶粒界が存在し、粒界にト
ラップされた電子によってポテンシャルバリアが形成さ
れ空乏層が広がる。このためドレイン電極エッジにおい
て粒界に強い電界がかかり、これにより加速された電子
が格子と衝突する衝突電離現象が発生するが、その現象
はn型チャネルTFTの場合に比べp型チャネルの場合
の方が著しく小さいことから、ドレイン電流は飽和する
領域を示し良好な飽和特性を得ることができることか
ら、第2のTFTとしてp型チャネルTFTを用いるこ
とが好ましい。 <第2の実施の形態>図4に本発明のEL表示装置の表
示画素付近の平面図を示し、図5に図4中のC−C線に
沿った断面図を示す。In particular, in a polycrystalline silicon TFT, as described in the section of the prior art, a crystal grain boundary exists, and a potential barrier is formed by electrons trapped in the grain boundary, so that a depletion layer spreads. For this reason, a strong electric field is applied to the grain boundary at the edge of the drain electrode, and this causes a collision ionization phenomenon in which accelerated electrons collide with the lattice. This phenomenon is more significant in the case of the p-type channel than in the case of the n-type channel TFT. It is preferable to use a p-type channel TFT as the second TFT because the drain current shows a region where the drain current is saturated and good saturation characteristics can be obtained since the drain current is extremely small. <Second Embodiment> FIG. 4 is a plan view showing the vicinity of a display pixel of an EL display device according to the present invention, and FIG. 5 is a cross-sectional view taken along line CC in FIG.
【0039】本実施の形態が第1の実施の形態と異なる
点は、図4に示すように、第2のTFT40のチャネル
43c上方に設けた導電体56が第2のTFT40のゲ
ート電極41の一部が延在して設けられている点であ
る。This embodiment is different from the first embodiment in that, as shown in FIG. 4, a conductor 56 provided above a channel 43c of the second TFT 40 is connected to a gate electrode 41 of the second TFT 40. It is a point that a part is provided to extend.
【0040】図4及び図5に示すように、第2のTFT
は、ゲート電極41、ゲート絶縁膜12を積層した上に
設けたp−Siから成る能動層を備えている。そして、
その能動層には不純物がドーピングされているソース4
3s及びドレイン43dを備えている。As shown in FIGS. 4 and 5, the second TFT
Has an active layer made of p-Si provided on a stack of the gate electrode 41 and the gate insulating film 12. And
The active layer has a source 4 doped with impurities.
3s and a drain 43d.
【0041】ゲート絶縁膜12及び層間絶縁膜15に設
けたコンタクトホールを介してゲート電極41とコンタ
クトした導電体56をチャネル43c上方にまで延在さ
せて設ける。即ち、ゲート電極41と同じ電位の導電体
56を設ける。A conductor 56 which is in contact with the gate electrode 41 via the contact holes provided in the gate insulating film 12 and the interlayer insulating film 15 is provided to extend above the channel 43c. That is, the conductor 56 having the same potential as the gate electrode 41 is provided.
【0042】このように、ゲート電極41と同電位の導
電体56を設けることにより、従来発生していたバック
チャネルを抑制することができる。As described above, by providing the conductor 56 having the same potential as the gate electrode 41, the back channel which has conventionally occurred can be suppressed.
【0043】そのため、有機EL素子60に本来供給さ
れるべき電流が供給されて発光するので、各表示画素に
おける発光輝度のばらつきが無くなり、表示ムラの発生
しない有機EL表示装置を得ることができる。As a result, since the current that should be supplied to the organic EL element 60 is supplied to emit light, there is no variation in light emission luminance in each display pixel, and an organic EL display device without display unevenness can be obtained.
【0044】また、第2のTFTを第1の実施の形態と
同様にp型チャネルを備えたTFTとすることによりド
レイン電圧に対するドレイン電流のばらつきが少なく有
機EL素子の発光輝度が再現性良く均一にすることがで
き良好な階調表示を得ることができる有機EL表示装置
が得られる。Further, since the second TFT is a TFT having a p-type channel similarly to the first embodiment, the variation of the drain current with respect to the drain voltage is small, and the emission luminance of the organic EL element is uniform with good reproducibility. And an organic EL display device capable of obtaining good gradation display can be obtained.
【0045】なお、上述の各実施の形態においては、能
動層としてp−Si膜を用いたが、微結晶シリコン膜又
は非晶質シリコン膜を用いても良い。Although the p-Si film is used as the active layer in each of the above embodiments, a microcrystalline silicon film or an amorphous silicon film may be used.
【0046】更に、上述の各実施の形態においては、有
機EL表示装置について説明したが、本発明はそれに限
定されるものではなく、発光層が無機材料から成る無機
EL表示装置にも適用が可能であり、同様の効果が得ら
れる。Further, in each of the above-described embodiments, the organic EL display device has been described. However, the present invention is not limited to this, and is applicable to an inorganic EL display device in which the light emitting layer is made of an inorganic material. And the same effect can be obtained.
【0047】[0047]
【発明の効果】本発明のEL表示装置は、高速の書き込
みと保持特性が良い第1のTFTと、電流制御性が良い
第2のTFTとを備えているので、良好な階調表示が可
能なEL表示装置を得ることができる。As described above, the EL display device of the present invention includes the first TFT having good writing and holding characteristics at high speed and the second TFT having good current controllability, so that good gradation display is possible. An EL display device can be obtained.
【図1】本発明のEL表示装置の第1の実施の形態を示
す平面図である。FIG. 1 is a plan view showing a first embodiment of an EL display device of the present invention.
【図2】本発明のEL表示装置の第1の実施の形態を示
す断面図である。FIG. 2 is a sectional view showing a first embodiment of the EL display device of the present invention.
【図3】本発明のEL表示装置に備えられたTFTの特
性図である。FIG. 3 is a characteristic diagram of a TFT provided in the EL display device of the present invention.
【図4】本発明のEL表示装置の第2の実施の形態を示
す平面図である。FIG. 4 is a plan view showing a second embodiment of the EL display device of the present invention.
【図5】本発明のEL表示装置の第2の実施の形態を示
す断面図である。FIG. 5 is a cross-sectional view showing a second embodiment of the EL display device of the present invention.
【図6】EL表示装置の等価回路図である。FIG. 6 is an equivalent circuit diagram of the EL display device.
【図7】従来のEL表示装置の平面図である。FIG. 7 is a plan view of a conventional EL display device.
【図8】従来のEL表示装置の断面図である。FIG. 8 is a sectional view of a conventional EL display device.
11,41 ゲート 13s、43s ソース 13d、43d ドレイン 13c、43c チャネル 13s、43s LDD領域 30 第1のTFT 40 第2のTFT 50 駆動電源 56 導電体 60 有機EL素子 11, 41 Gate 13s, 43s Source 13d, 43d Drain 13c, 43c Channel 13s, 43s LDD region 30 First TFT 40 Second TFT 50 Driving power source 56 Conductor 60 Organic EL device
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H05B 33/26 H01L 29/78 617N Fターム(参考) 3K007 AB17 BA06 CC00 DA01 DB03 EB00 EC03 FA01 GA04 5C058 AA12 AB01 AB06 BA35 5C094 AA04 AA06 AA07 AA09 AA13 AA48 AA54 BA03 BA09 BA12 BA27 CA19 CA24 CA25 DA13 DB04 EA01 EA04 EA07 EA10 FA01 FB12 FB14 FB16 5F110 AA18 AA30 BB20 CC07 CC08 DD02 DD03 DD05 DD13 DD14 EE04 EE28 EE30 EE37 GG02 GG13 GG14 GG15 GG35 HJ18 HL03 NN03 NN23 NN24 NN27 NN44 NN72 QQ19 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H05B 33/26 H01L 29/78 617N F-term (Reference) 3K007 AB17 BA06 CC00 DA01 DB03 EB00 EC03 FA01 GA04 5C058 AA12 AB01 AB06 BA35 5C094 AA04 AA06 AA07 AA09 AA13 AA48 AA54 BA03 BA09 BA12 BA27 CA19 CA24 CA25 DA13 DB04 EA01 EA04 EA07 EA10 FA01 FB12 FB14 FB16 5F110 AA18 AA30 BB20 CC07 CC08 DD02 DD03 DD30 GG13 EE14 GG14 EE14 NN23 NN24 NN27 NN44 NN72 QQ19
Claims (3)
クトロルミネッセンス素子と、非単結晶半導体膜からな
る能動層のドレインがドレイン信号線に、ゲートがゲー
ト信号線にそれぞれ接続された第1の薄膜トランジスタ
と、非単結晶半導体膜からなる能動層のドレインが前記
エレクトロルミネッセンス素子の駆動電源に、前記能動
層のチャネルの下方に設けたゲートが前記第1の薄膜ト
ランジスタのソースにそれぞれ接続された第2の薄膜ト
ランジスタとを備えたエレクトロルミネッセンス表示装
置であって、該第2の薄膜トランジスタの能動層に設け
られたチャネルの上方に該チャネルを覆う導電体を設け
ていることを特徴とするエレクトロルミネッセンス表示
装置。An electroluminescent device having a light emitting layer between an anode and a cathode, and a first electrode in which a drain of an active layer made of a non-single-crystal semiconductor film is connected to a drain signal line and a gate is connected to a gate signal line, respectively. The thin-film transistor and the drain of an active layer made of a non-single-crystal semiconductor film are connected to the drive power supply of the electroluminescent element, and the gate provided below the channel of the active layer is connected to the source of the first thin-film transistor. An electroluminescent display device comprising: a second thin film transistor; and a conductor covering the channel provided above the channel provided in the active layer of the second thin film transistor. .
駆動電源線を前記チャネル上方にまで延在させて設けた
ことを特徴とする請求項1に記載のエレクトロルミネッ
センス表示装置。2. The electroluminescent display device according to claim 1, wherein the conductor is provided with a drive power supply line connected to the drive power supply extending to above the channel.
ャネル上方にまで延在させて設けたことを特徴とする請
求項1に記載のエレクトロルミネッセンス表示装置。3. The electroluminescent display device according to claim 1, wherein the conductor is provided so as to extend the gate signal line above the channel.
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| JP02215899A JP3649927B2 (en) | 1999-01-29 | 1999-01-29 | Electroluminescence display device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP02215899A JP3649927B2 (en) | 1999-01-29 | 1999-01-29 | Electroluminescence display device |
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| US6864508B2 (en) | 2001-07-17 | 2005-03-08 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device |
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-
1999
- 1999-01-29 JP JP02215899A patent/JP3649927B2/en not_active Expired - Lifetime
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