JP2000312322A - Television set - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate the gradation ambiguity due to the characteristic variations of a TFT to assign a uniform intensity level by assigning an intensity level via only the pure digital control and with no addition of analog signal. SOLUTION: The time when the voltage is applied to a liquid crystal is controlled to obtain the visual gradation. An extremely fast switching operation is required for a high gradation display. A such action performance is required, a matrix circuit using a TFT is composed and a CMOS buffer circuit is deformed to be used as a switching element of the matrix circuit unlike the matrix circuit that is used for a conventional active matrix. A protection circuit is placed between a peripheral drive circuit and a pixel and turned on when the excessive voltage is applied the pixel wiring to eliminate the voltage. This protection circuit comprises a doped or non-doped semiconductor material such as silicone or a transparent conductive material such as ITO, etc.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of displaying an image in a liquid crystal electro-optical device using a thin film transistor (hereinafter referred to as a TFT) as a driving switching element, and particularly to a gradation display for obtaining an intermediate color tone or light and shade. It is about the method. The present invention particularly relates to a so-called full digital gradation display for performing gradation display without applying any analog signal to an active element from the outside.

[0002]

2. Description of the Related Art Liquid crystal compositions have different dielectric constants in the horizontal and vertical directions with respect to the molecular axis due to their material properties. Can be easily done. The liquid crystal electro-optical device displays ON / OFF, that is, displays light and dark by controlling the amount of transmitted light or the amount of scattering of light using the anisotropy of the dielectric constant. As liquid crystal materials, TN (twisted nematic) liquid crystal, STN (super
Materials known as "twisted nematic" liquid crystal, ferroelectric liquid crystal, polymer liquid crystal or dispersion type liquid crystal are known. It is known that a liquid crystal does not respond to an external voltage in an infinitely short time, but takes a certain time to respond. The value is specific to each liquid crystal material. In the case of a TN liquid crystal, the value is several tens of msec.
The time is several hundred msec for N liquid crystal, several hundred μsec for ferroelectric liquid crystal, and several tens msec for dispersion type or polymer liquid crystal.

[0003] Among electro-optical devices using liquid crystals, the one that can obtain the best image quality is the one using the active matrix system. In a conventional active matrix type liquid crystal electro-optical device, a thin film transistor (TFT) is used as an active element, an amorphous or polycrystalline semiconductor is used for the TFT, and P
In this case, a TFT of only one of the N-type and the N-type was used. That is, in general, an N-channel TFT
(Referred to as NTFT) is connected in series to the pixel. Then, a signal voltage is applied to the signal lines of the matrix, and when signals are applied from both sides to the TFTs provided at the orthogonal portions of the respective signal lines, the ON / OFF state of the liquid crystal pixels is utilized by utilizing the fact that the TFTs are turned ON. OFF was individually controlled. By controlling the pixels by such a method, a liquid crystal electro-optical device having a high contrast can be realized.

[0004]

However, in such an active matrix system, it is extremely difficult to perform gradation display such as light and dark and color tone. Conventionally, for gray scale display, a method has been studied which utilizes the fact that the light transmittance of a liquid crystal changes depending on the magnitude of an applied voltage. This is, for example, the source of the TFT in the matrix.
By supplying an appropriate voltage from the peripheral circuit between the drains and applying a signal voltage to the gate electrode in that state,
It is intended to apply a voltage of that magnitude to the liquid crystal pixels.

However, in such a method, for example, due to the inhomogeneity of the TFT and the inhomogeneity of the matrix wiring, the voltage actually applied to the liquid crystal pixels differs by at least several% depending on each pixel. Oops. On the other hand, for example, the voltage dependence of the light transmittance of the liquid crystal is extremely non-linear, and the light transmittance changes rapidly at a specific voltage. In some cases it was significantly different. Therefore, in practice, achieving 16 gradations has been the limit.

[0006] As described above, the difficulty of gradation display is extremely disadvantageous in that the liquid crystal display device competes with a conventional general display device such as a cathode ray tube (CRT).

An object of the present invention is to propose a completely new method for realizing a gradation display which has been difficult in the past.

[0008]

[Means for Solving the Problem] As mentioned above, it is possible to control the light transmittance of the liquid crystal by controlling the voltage applied to the liquid crystal in an analog manner. It has been found that gradation can be visually obtained by controlling the time during which voltage is applied to the liquid crystal.

For example, when a TN (twisted nematic) liquid crystal, which is a typical liquid crystal material, is used,
For example, it has been found that the brightness can be changed by applying various pulses shown in FIG. 1 to the liquid crystal pixels. That is, "1" in FIG.
Brightness can be gradually increased in the order of “2”,..., “15”. That is, in the example of FIG. 1, display of 16 gradations is possible. At this time, at "1", a pulse having a length of one unit is applied. In the case of "2", a pulse having a length of 2 units is applied. At “3”, one unit pulse and two unit pulses are applied, and as a result, a pulse having a length of three units is applied. At "4", a pulse having a length of 4 units is applied. At "5", a pulse of 1 unit and 4 units of pulses are applied. At "6", a pulse of 2 units and 4 units of pulses are applied. You. Further, by preparing a pulse having a length of 8 units, a pulse having a maximum length of 15 units can be obtained.

That is, by appropriately combining four types of pulses of 1 unit, 2 units, 4 units, and 8 units, it is possible to display 2 ⁴ = 16 gradations. In addition, 1
By preparing as many pulses as 6 units, 32 units, 64 units, and 128 units,
High gray scale display of 32 gray scales, 64 gray scales, 128 gray scales, and 256 gray scales becomes possible. For example, in order to obtain 256 gradations, eight types of pulses may be prepared.

Further, in the example of FIG. 1, the duration of the voltage applied to the pixel, the first T _1, the following is 2T _1, the following 4T
An example is shown in which are arranged to increase geometric progression manner as that _1, which is for example, as shown in FIG. 3, the first T _1,
8T ₁ , then 2T ₁ , and finally 4T ₁ . By arranging in this manner, the load on the device transmitting data to the display device can be reduced.

In order to carry out the present invention, TN liquid crystal, STN liquid crystal, ferroelectric liquid crystal, and dispersion (polymer) liquid crystal are suitable as the liquid crystal material. Further, the pulse width of one unit slightly varies depending on which liquid crystal material is selected, but in the case of a TN liquid crystal material, 10 nsec or more is suitable.

In order to further implement the present invention, for example, a matrix circuit using TFTs as shown in FIG. 4 may be assembled. The circuit shown in FIG. 4 is different from that used in the conventional active matrix, and is a modification of the CMOS buffer circuit used for the switching element.

FIG. 4 illustrates four modified buffer circuits. Each deformation buffer circuit includes at least two NTFTs and at least two PTFTs.
The number of TFTs may be further increased in case of a defect. In this circuit, first, a set of NTFT and PTFT gate electrodes at the center are connected to a signal line _Xn , and one of the source or drain of the NTFT and PTFT is connected to each other. It is connected to the electrode of _{Zn, m} . This state is the same as that of a normal complementary field effect device (CMOS). This NT
The other source or drain of the FT and PTFT is connected to the source or drain of the second PTFT or NTFT, respectively. Also, this second PT
FT, the other of the source or drain of the NTFT are respectively connected to the signal line Y _m and Y _{m + 1.} Further, the gate electrodes of the second PTFT and NTFT are connected to signal lines Y _{m + 1} and Y _m , respectively. Below,
Signal lines X _1, X _2, a _.. X _N, collectively, or individually X
Line and called, the signal lines Y _1, Y _{2, ..} a Y _M, referred to collectively as, or individually Y line.

Also, in the figure, a capacitor is artificially inserted in parallel with the capacitor of the pixel. The capacitor inserted at this time has a function of suppressing a drop in the voltage of the pixel due to spontaneous discharge of the pixel. Since the falling speed of the voltage of the pixel is determined by the variation of the pixel, in particular, as in the present invention, in the case of performing the gradation display assuming that the voltage applied to the pixel is constant, the image quality is reduced. Invite. However, by inserting the capacitor in parallel with the pixel as described above, the voltage effect due to the variation of the pixel can be significantly suppressed, and high image quality can be obtained.

Further, by incorporating an organic ferroelectric material such as tetrafluoroethylene or polyvinylidene fluoride into a pixel such as a liquid crystal cell, the capacitance of the pixel is increased, and thus the time constant of the discharge of the pixel is increased. , It is also possible to obtain high image quality without making such an artificial capacitor.

Of course, if the discharge of the pixel is sufficiently small, such an artificial capacitor is unnecessary. In particular, the presence of an excessive capacitance takes time for the charging / discharging operation, which is not desirable in practicing the present invention. In order to reduce the discharge of the pixel, for example, the O
It is necessary to increase the FF resistance to reduce the leak current and to sufficiently increase the inter-electrode resistance of a pixel such as a liquid crystal. In particular, for the latter purpose, it is effective to cover the pixel electrode with an insulating material such as silicon nitride, silicon oxide, tantalum oxide, and aluminum oxide.

In such a circuit, ON / OFF of the voltage applied to the pixel can be controlled by controlling the gate voltage and the source / drain voltage of each TFT. In the example of FIG. 4, the matrix is 480
Although it is × 640 dots, only the vicinity of n rows and m columns are shown to avoid complexity. If you expand the same thing up, down, left and right, you will get a complete one. FIG. 2 shows an operation example of this circuit. As shown in FIG. 2, rectangular pulse signals are sequentially applied to the Y line. On the other hand, X-ray
A signal consisting of a plurality of pulses is applied. This pulse train, in a unit of time T _1, which contains 480 information.

In the following, four pixels Zn _{, m} , Zn _{, m + 1} ,
Attention is paid to _{Zn + 1, m} and Zn _{+ 1, m + 1} . These pixels have
Take, for example, Z _{n, m} , where X _n is a positive potential, or using a more general expression, the high potential state (V _H )
, And the and if Y _m be the V _H, the pixel electrode becomes V _H. On the other hand, if _Ym is _VL , no change occurs in the pixel regardless of the state of _Xn . Therefore,
For this four pixels may be noted the signal lines X _n and X _{n + 1,} and Y _m and Y _{m + 1.}

As shown in the figure, the rectangular pulse is applied to the Y _m, consider the case where becomes V _H state. Since attention is now focused on four pixels, attention should be paid to the current state of X _n and X _{n + 1} . At this time, since X _n is V _H and X _{n + 1} is V _L , pixel Zn _{, m} is eventually V _H , pixel Z
_{n + 1, m} becomes _VL . Then, if the Y line is set to _VL earlier than the time when the next signal is applied to the X line, the voltage state of the pixel is maintained by the capacitor of the pixel, so that the pixel Zn _{, m} maintains _VH . Thereafter, until the next Y _m is V _H, basically, the state of each pixel is sustained. Then Y
_A pulse is applied to _{m + 1} . As shown in the figure,
When the X _n is V _L, since X n _{+ 1} is a V _H, the pixel Z _{n, m + 1} is V _L, the pixel Z _{n + 1, m + 1} is V _H. Then, as described above, each state is maintained.

Next, after being previously pulses applied to the Y _m, after time T _1, again, when a pulse is applied to the Y _m, the X _n is V _L, X n _{+ 1} is V _H So the pixel Z
_{The state of n, m} changes to _VL , and the state of pixel Zn _{+ 1, m} changes to _VH . Further, a pulse is applied to Y _{m + 1} . At this time, as shown in FIG, since it is X _n be X _{n + 1} is also V _H, the pixel Z _{n, m + 1} also pixel Z _{n + 1, m + 1} also V _H. At this time, the pixels Zn _{+ 1 and m + 1} continue _VH .

After that, time 2T₁Later, the third pulse
Is Y_mIs applied to Then X_nAlso X_{n + 1}Also V
_HTherefore, the pixel Z_{n, m}Is V_LTo V_HChanges to
Element Z _{n + 1, m}Is V_HWill be continued. Furthermore, Y
_{m + 1}A pulse is applied to. Then X_nAlso X
_{n + 1}Also V_LTherefore, the pixel Z_{n, m + 1}Also pixel Z_{n + 1, m + 1}
Also V_LBecomes

[0023] Then, after a time 4T _1, 4-time pulse is applied to the Y _m. At that time, both X _n and X _{n + 1} are V
_Since it is _L , both the pixel Zn _{, m} and the pixel Zn _{+ 1, m} become _VL . Further, a pulse is applied to Y _{m + 1} , but again,
Since both X _n and X _{n + 1} are _VL , the pixels Z _{n and m + 1} are also pixels Z
_{n + 1 and m + 1} also remain at _VL .

Thus, one cycle is completed. this
During this time, four pulses are applied to each Y line, and each X
3 × 640 = 1920 information signals are applied. Also,
The time of one cycle is 8T₁And T₁For example,
For example, 10 nsec to 10 msec is appropriate. Soshi
Therefore, if attention is paid to each pixel, pixel Z_{n, m}Time T
₁Pulse and 4T₁Pulse is applied and visually 5
T₁The same effect as when the pulse is applied is obtained. You
That is, a brightness of "5" is obtained. Similarly, pixel Z
_{n + 1, m}, Pixel Z_{n, m + 1}, Pixel Z_{n + 1, m + 1}In the end,
Brightness of "2", "6", "3" is obtained.

In the above example, eight gradations can be displayed, but by adding more pulse signals,
Higher gradation is possible. For example, during one cycle, five pulses are further applied to the Y line, and 8 × 640 is applied to each X line.
By applying an information signal of = 5120, a high gradation display of as many as 256 gradations can be achieved.

If a high gradation display is to be performed, as shown in FIG. 2, extremely high-speed switching is required. For example, to achieve a 256 gray level, since video has to be fed more than 30 frames per second, 256T ₁
<30 msec. Therefore, T ₁ <100 μsec. Therefore, when the number of Y lines is 640, a pulse having a width of 150 nsec or less needs to be applied to the Y lines. Since such operation performance is required, it is necessary to use a CMOS buffer circuit, unlike the related art.

In the above description, the counter electrode of the pixel has not been described at all for the sake of easy understanding. Voltage can be changed. For example, the counter electrode of the pixel, by applying an appropriate voltage, the direction of the voltage applied to the pixel material varied V _L and V _H, can also be adapted can take both positive and negative. Such an operation is necessary for a ferroelectric liquid crystal, for example.

Further, in order to make the explanation easy to understand,
The signal zero level and voltage level have been clarified.
It is not necessary to be absolutely zero because it is only a matter of whether or not it is above. Also, since the voltage is a relative physical quantity with reference to the potential at an arbitrary point, in the above example,
It will be clear that the pulses can be of opposite polarity.

Further, in the above example, although the method of line by line scanning, for example, first _{Y 1, Y 3, Y 5} , .. to the scanning and so, then, Y _2, Y _{4 ,} Y _{6, ..} , so-called interlaced scanning is of course also possible.

[0030]

[Embodiment 1] In this embodiment, a wall-mounted television was manufactured using a liquid crystal display device having a circuit configuration as shown in FIG. The TF at that time
T is polycrystalline silicon using laser annealing.

FIG. 5 shows an actual arrangement of electrodes and the like corresponding to this circuit configuration for one pixel. First, a method for manufacturing a liquid crystal panel used in this embodiment will be described with reference to FIGS. In order to carry out the present invention, two NTFTs and two PTFTs are required for one pixel.
Although a total of four TFTs are shown in the figure, for simplicity, the numbers are given to only one of the NTFT and PTFT. FIG.
In (A), a silicon oxide film as a blocking layer 51 is formed on a glass 50 that can withstand a heat treatment at an inexpensive temperature of 700 ° C. or less, for example, about 600 ° C., such as quartz glass, using a magnetron RF (high frequency) sputtering method.
It is made to a thickness of 0 °. The process conditions were a 100% oxygen atmosphere, a film formation temperature of 15 ° C., an output of 400 to 800 W, and a pressure of 0.5 Pa. The film formation rate using quartz or single crystal silicon as a target was 30 to 100 ° / min.

A silicon film 52 was formed thereon by a plasma CVD method. The film formation temperature is from 250 ° C to 35
In this example, the temperature was set to 320 ° C., and monosilane (SiH
₄ ) was used. Not only monosilane (SiH ₄ ) but also disilane (Si ₂
H ₆ ) Alternatively, trisilane (Si ₃ H ₈ ) may be used. These were introduced into the PCVD apparatus at a pressure of 3 Pa, and 13.56 M
The film was formed by applying a high frequency power of Hz. At this time, an appropriate high frequency power is 0.02 to 0.10 W / cm ² , and in this example, 0.055 W / cm ² was used. The flow rate of monosilane (SiH ₄ ) was set to 20 SCCM, and the deposition rate at that time was about 120 ° / min. In order to control the threshold voltage (Vth) of the PTFT and the NTFT to be approximately the same, boron is used for diborane in a concentration of 1 × 10 ¹⁵ to 1 × 10 ¹⁸ cm.
^-3 may be added during film formation. In addition, not only the plasma CVD but also a sputtering method and a low pressure CVD method may be used for forming the silicon layer to be a channel region of the TFT, and the method will be briefly described below.

When the sputtering method is used, the back pressure before the sputtering is set to 1 × 10 ⁻⁵ Pa or less, and single crystal silicon is used as a target in an atmosphere in which hydrogen is mixed with 20 to 80% of argon. For example, argon was 20% and hydrogen was 80%.
The film formation temperature was 150 ° C., the frequency was 13.56 MHz, the sputter output was 400 to 800 W, and the pressure was 0.5 Pa.

In the case of forming by a reduced pressure gas phase method, 450 to 550 ° C. lower by 100 to 200 ° C. than the crystallization temperature, for example,
Disilane (Si ₂ H ₆ ) or trisilane (Si ₃ H ₈ ) was supplied to the CVD apparatus at 30 ° C. to form a film. The reactor pressure is 30 ~
It was set to 300 Pa. The deposition rate was 50-250 ° / min. Suresshuho the PTFT and NTFT - for controlling field voltage (Vth) in substantially the same, boron may be added during deposition as the concentration of ^{1 × 10 15 ~1 × 10 18} cm -3 by using diborane .

The coatings formed by these methods are:
It is preferable that oxygen is 5 × 10 ²¹ cm ⁻³ or less. In order to promote crystallization, the oxygen concentration should be 7 × 10 ¹⁹ cm ⁻³ or less,
Preferably, it is desirable to be 1 × 10 ¹⁹ cm ⁻³ or less,
If the amount is too small, the leakage current in the off state increases due to the backlight, so this concentration was selected. If the oxygen concentration is high, crystallization is difficult, and the laser annealing temperature must be increased or the laser annealing time must be increased. Hydrogen is 4 × 10 ²⁰ cm ⁻³ and silicon 4 × 10 ²²
When compared with cm ^-3 , it was 1 atomic%.

In order to promote crystallization of the source and the drain, the oxygen concentration is set to 7 × 10 ¹⁹ cm ⁻³ or less, preferably 1 × 10 ¹⁹ cm ⁻³ or less,
Oxygen may be added only to the T channel formation region by ion implantation so as to have a concentration of 5 × 10 ^{20 to} 5 × 10 ²¹ cm ⁻³ .
According to the above method, the amorphous silicon film is
The film was formed to have a thickness of 5000 to 5000 Å, and 1000 Å in this embodiment.

Thereafter, the photoresist 53 is masked with a mask P1.
Was used to form a pattern in which only the source / drain regions were opened. A silicon film 54 serving as an n-type active layer was formed thereon by a plasma CVD method. Film formation temperature is 250 ° C
The temperature is set to 320 ° C. in this embodiment, and monosilane (SiH ₄ ) and monosilane-based phosphine (P
H ₃ ) A 3% concentration was used. These were introduced into the PCVD apparatus at a pressure of 5 Pa, and high-frequency power of 13.56 MHz was applied to form a film. At this time, the high frequency power is 0.05 to
0.20 W / cm ² is appropriate, and in this embodiment, 0.1 W / cm ^2.
20 W / cm ² was used.

The specific conductivity of the n-type silicon layer completed by this method was about 2 × 10 ⁻¹ [Ωcm ⁻¹ ]. The film thickness was 50 °. Thereafter, the resist 53 was removed by a lift-off method to form an n-type impurity region 55.

Using the same process, a p-type active layer was formed. The gas introduced at that time used monosilane (SiH ₄ ) and monosilane-based diborane (B ₂ H ₆ ) at a concentration of 5%. These were introduced into a PCVD apparatus at a pressure of 4 Pa, and high-frequency power of 13.56 MHz was applied to form a film.
At this time, the high-frequency power is suitably 0.05~0.20W / cm ^2, in this embodiment using 0.120W / cm ^2. The specific conductivity of the p-type silicon layer obtained by this method was about 5 × 10 ^-2 [Ωcm ^-1 ]. The film thickness was 50 °. Thereafter, a p-type impurity region 59 was formed by using a lift-off method as in the case of the N-type region. Thereafter, the silicon film 52 was removed by etching using the mask P3 to form an N-channel type thin film transistor island region 63 and a P-channel thin film transistor island region 64.

After that, using a XeCl excimer laser, the source / drain / channel regions were laser-annealed, and simultaneously the active layer was laser-doped. At this time, the laser energy has a threshold energy of 130 mJ / cm ^2.
mJ / cm ² is required. However, 220m from the beginning
When energy of J / cm ² or more is irradiated, hydrogen contained in the film is rapidly released, and the film is destroyed. For this purpose, it is necessary to first displace hydrogen and then melt it with low energy. In this embodiment, first 150 m
After purging hydrogen at J / cm ² , 230mJ
The crystallization was carried out at / cm ² .

On this, a silicon oxide film was formed as a gate insulating film to a thickness of 500 to 2000 {for example, 1000}. This was made under the same conditions as those for forming the silicon oxide film as the blocking layer. During the film formation, a small amount of fluorine may be added to fix the sodium ions.

Thereafter, 1 to 5 × 10 ²¹ cm of phosphorus is placed on the upper side.
^-3 silicon film or molybdenum (Mo), tungsten (W), MoSi ₂ or
A multilayer film with WSi ₂ was formed. This was patterned using a fourth photomask P4 to obtain FIG. 6 (D). A gate electrode 66 for NTFT and a gate electrode 67 for PTFT were formed. For example, the channel length is 7 μm, and the gate electrode is 0.2 μm of phosphorus silicon, and 0.3 μm of molybdenum is placed thereon.
It was formed to a thickness of μm. At the same time, as shown in FIG. 7A, the gate wiring and the wiring 68 arranged in parallel with the gate wiring were also patterned.

When aluminum (Al) is used as the gate electrode material, the surface is anodized after patterning with a fourth photomask P4, so that the self-alignment method can be applied. In addition, since the source / drain contact holes can be formed at positions closer to the gate, the characteristics of the TFT can be further improved by reducing the mobility and the threshold voltage.

Thus, a C / TFT can be manufactured without applying a temperature to 400 ° C. or more in all steps. Therefore, it is not necessary to use an expensive substrate such as quartz as a substrate material, and it can be said that the process is very suitable for the large-screen liquid crystal display device of the present invention.

In FIG. 6E, a silicon oxide film was formed on the interlayer insulator 69 by the above-mentioned sputtering method. This silicon oxide film is formed by LPCVD, optical CVD
Or a normal pressure CVD method. For example, 0.2-0.
6 μm thick, and then a fifth photomask P
5 was used to form an electrode window 79. Thereafter, aluminum was further formed on the entire surface to a thickness of 0.3 μm by a sputtering method, and leads 74 and contacts 73 and 75 were formed using a sixth photomask P6. Thus, FIG. 6E and FIG. 7B are obtained. After that, the surface is coated with an organic resin 77 for flattening, for example, a translucent polyimide resin, and a hole is formed again in the seventh photomask P.
7 was performed. Further, ITO (indium tin oxide) was formed on the entire surface by sputtering to a thickness of 0.1 μm, and a pixel electrode 71 was formed using an eighth photomask P8. This ITO is deposited at room temperature to 150 ° C.
Fulfilled by oxygen at 400 ° C. or annealing in air.

Thus, FIGS. 6F and 7C are obtained. FIG. 7D is a cross-sectional view taken along the line AA ′ in FIG. Actually, a counter electrode is provided with a liquid crystal material interposed therebetween, and a capacitance is generated between the counter electrode and the electrode 71 as shown in the figure. At the same time, capacitance also occurs between the wiring 68 and the electrode 71. Then, by keeping the wiring 68 at the same potential as the counter electrode, a circuit in which a capacitor is inserted in parallel with the liquid crystal pixel is formed as shown in FIG. In particular, by arranging as in the present embodiment, the wiring 68 is parallel to the gate wiring 65, so that the parasitic capacitance between the two wirings is small, and therefore, there is an effect of reducing attenuation and delay of a signal transmitted through the gate wiring.

The wiring 68 thus formed is
Can be used as a ground line of a protection circuit provided at the end of each matrix when used with ground. The protection circuit is provided between the peripheral driving circuit and the pixel as shown in FIG. 10 and refers to a circuit as shown in FIGS. 11 and 12. In any case, when an excessive voltage is applied to the wiring of the pixel, it is turned on, and has a function of removing the voltage. These protection circuits are formed using a doped or undoped semiconductor material such as silicon, a transparent conductive material such as ITO, or a normal wiring material. Therefore, it can be formed at the same time when the circuit of the pixel is formed. .

This means that, for example, each of the protection circuits shown in FIG.
/ TFT. Although the TFT is not used in the protection circuit shown in FIG. 12, the diode is constituted by, for example, a PIN junction.
It is obvious that it has a structure such as IN, PIP, NPN or PNP, and can be manufactured by using the manufacturing method shown in this embodiment without need to explain each time.

The electrical characteristics of the TFT thus obtained are PTFT, the mobility is 40 (cm ² / Vs), and Vth is Vth.
Is -5.9 (V), and the mobility is 80 (cm ² / V) for NTFT.
s) and Vth was 5.0 (V).

One substrate for a liquid crystal electro-optical device manufactured according to the above method was obtained. FIG. 5 shows the arrangement of the electrodes and the like of the liquid crystal display device.
Complementary TFT constituting deformation buffer according to the present invention
(C / TFT) is between the signal line Y ₁ and Y _2, and Y between ₂ and Y _3, is provided in parallel to the signal lines X _1, X _2. A matrix configuration using such a C / TFT is provided. By repeating such a structure left and right and up and down, a liquid crystal display device having a large pixel size of 640 × 480 or 1280 × 960 can be obtained. In this embodiment, 19
20 × 400. Thus, a first substrate was obtained.

FIG. 8 shows a method for manufacturing the other substrate. A polyimide resin obtained by mixing a black pigment with polyimide is formed on a glass substrate to a thickness of 1 μm using a spin coating method,
Black stripe 8 using ninth photomask P9
1 was produced. After that, a film of a polyimide resin mixed with a red pigment was formed to a thickness of 1 μm using a spin coating method,
Red filter 8 using tenth photomask P10
3 was produced. Similarly, a green filter 85 and a blue filter 86 were manufactured using the masks P11 and P12. During the production, each filter was fired at 350 ° C. in nitrogen for 60 minutes. After that, the leveling layer 89 was formed using transparent polyimide also by using the spin coating method.

Thereafter, ITO (indium tin oxide) was formed on the entire surface to a thickness of 0.1 μm by sputtering, and a common electrode 90 was formed using a thirteenth photomask P13. This ITO is deposited at room temperature to 150 ° C.
Fulfilled with oxygen at 0-300 ° C. or in air, a second substrate was obtained.

A polyimide precursor was printed on the substrate by an offset method, and baked at 350 ° C. for 1 hour in a non-oxidizing atmosphere, for example, nitrogen. Thereafter, a known rubbing method was used to modify the surface of the polyimide, and at least initially, a means for aligning liquid crystal molecules in a certain direction was provided.

Thereafter, the nematic liquid crystal composition was sandwiched between the first substrate and the second substrate, and the periphery was fixed with an epoxy adhesive. A drive IC having a TAB shape and a PCB having common signals and potential wiring were connected to leads on the substrate, and a polarizing plate was adhered on the outside to obtain a transmissive liquid crystal electro-optical device. This was connected to a rear lighting device in which three cold cathode tubes were arranged, and a tuner for receiving TV radio waves to complete a wall-mounted TV. Compared to a conventional CRT system television, the device has a flat shape, so that it can be installed on a wall or the like. The operation of this liquid crystal television was confirmed by applying signals substantially equivalent to those shown in FIGS. 1 and 2 to the liquid crystal pixels.

Embodiment 2 In this embodiment, a wall-mounted television is manufactured using a liquid crystal display device having a circuit configuration as shown in FIG. 4, and a description thereof will be given. Also T at that time
FT was polycrystalline silicon using laser annealing.

Hereinafter, a method of manufacturing the TFT portion will be described with reference to FIG. In FIG. 9A, an inexpensive material such as quartz glass is 700 ° C. or less, for example, approximately 600 ° C.
Magnetron RF on glass 100 that can withstand heat treatment
(High frequency) A silicon oxide film as the blocking layer 101 is formed to a thickness of 1000 to 3000 ° by using a sputtering method. Process conditions are 100% oxygen atmosphere, film formation temperature 1
The temperature was 5 ° C., the output was 400 to 800 W, and the pressure was 0.5 Pa.
The film formation rate using quartz or single crystal silicon as a target was 30 to 100 ° / min.

A silicon film 102 was formed thereon by a plasma CVD method. Film formation temperature is 250 ° C-3
In this example, the temperature was set to 320 ° C.
iH ₄ ) was used. Not only monosilane (SiH ₄ ), but disilane (S
i ₂ H ₆ ) Alternatively, trisilane (Si ₃ H ₈ ) may be used. These were introduced into the PCVD apparatus at a pressure of 3 Pa, and 13.56
The film was formed by applying a high frequency power of MHz. At this time, an appropriate high frequency power is 0.02 to 0.10 W / cm ² , and in this example, 0.055 W / cm ² was used. The flow rate of monosilane (SiH ₄ ) was set to 20 SCCM, and the deposition rate at that time was about 120 ° / min. In order to control the threshold voltage (Vth) of the PTFT and the NTFT to be substantially the same, boron is used in a concentration of 1 × 10 ¹⁵ to 1 × 10 ¹⁸ using diborane.
It may be added during film formation as a concentration of cm ^-3 . Also TFT
In addition to the plasma CVD, the silicon layer serving as the channel region may be formed by a sputtering method or a low-pressure CVD method. The method will be briefly described below.

In the case of performing the sputtering method, the back pressure before the sputtering was set to 1 × 10 ⁻⁵ Pa or less, single-crystal silicon was used as a target, and an atmosphere in which 20 to 80% of hydrogen was mixed with argon was used. For example, argon was 20% and hydrogen was 80%.
The film formation temperature was 150 ° C., the frequency was 13.56 MHz, the sputter output was 400 to 800 W, and the pressure was 0.5 Pa.

In the case of forming by a reduced pressure gas phase method, 450 to 550 ° C. lower than the crystallization temperature by 100 to 200 ° C.
Disilane (Si ₂ H ₆ ) or trisilane (Si ₃ H ₈ ) was supplied to the CVD apparatus at 30 ° C. to form a film. The reactor pressure is 30 ~
It was set to 300 Pa. The deposition rate was 50-250 ° / min. Suresshuho the PTFT and NTFT - for controlling field voltage (Vth) in substantially the same, boron may be added during deposition as the concentration of ^{1 × 10 15 ~1 × 10 18} cm -3 by using diborane .

The coatings formed by these methods are:
It is preferable that oxygen is 5 × 10 ²¹ cm ⁻³ or less. In order to promote crystallization, the oxygen concentration should be 7 × 10 ¹⁹ cm ⁻³ or less,
Preferably, it is desirable to be 1 × 10 ¹⁹ cm ⁻³ or less,
If the amount is too small, the leakage current in the off state increases due to the backlight, so this concentration was selected. If the oxygen concentration is high, crystallization is difficult, and the laser annealing temperature must be increased or the laser annealing time must be increased. Hydrogen is 4 × 10 ²⁰ cm ⁻³ and silicon 4 × 10 ²²
When compared with cm ^-3 , it was 1 atomic%.

In order to further promote crystallization of the source and the drain, the oxygen concentration is set to 7 × 10 ¹⁹ cm ⁻³ or less, preferably 1 × 10 ¹⁹ cm ⁻³ or less,
Oxygen may be added only to the T channel formation region by ion implantation so as to have a concentration of 5 × 10 ^{20 to} 5 × 10 ²¹ cm ⁻³ .
According to the above method, the amorphous silicon film is
The film was formed to have a thickness of 5000 to 5000 Å, and 1000 Å in this embodiment.

After that, the photoresist 103 is
Should be used as source / drain region of NTFT using 1
A pattern in which only the region was opened was formed. And Regis
Using ion 103 as an ion implantation method with mask 103
Than 2 × 10¹⁴~ 5 × 10 ¹⁶cm^-2, Preferably 2x
10¹⁶cm^-2Only to form the n-type impurity region 104.
Done. After that, the resist 103 was removed.

Similarly, a resist 105 was applied, and using the mask P2, a pattern was formed in which only the regions to be the source / drain regions of the PTFT were opened. Then, using the resist 105 as a mask, the p-type impurity region 106 is formed.
Was formed. As an impurity, boron is used, and also by ion implantation, 2 × 10 ^{14 to} 5 × 10 ¹⁶ cm ⁻² ,
Preferably, an impurity is introduced only by 2 × 10 ¹⁶ cm ⁻² .
Like this. FIG. 9B is obtained.

After that, a thickness of 50 to 3
00 nm, for example, 100 nm silicon oxide film 107
Was formed by the above-mentioned RF sputtering method. And
Using a XeCl excimer laser, the source, drain and channel regions are crystallized by laser annealing.
Activated. At this time, the threshold energy of the laser energy is 130 mJ / cm ² , and 220 mJ / cm ² is required to melt the entire film thickness. However, when an energy of 220 mJ / cm ² or more is irradiated from the beginning, hydrogen contained in the film is rapidly released, and the film is destroyed. For this purpose, it is necessary to first displace hydrogen and then melt it with low energy. In this embodiment, first
After purging hydrogen at 50 mJ / cm ² , 23
Crystallization was performed at 0 mJ / cm ² . Further, after the end of the laser annealing, the silicon oxide film 107 was removed.

Thereafter, an NTFT region 111 and a PTFT region 112 in the shape of an island were formed using the photomask P3. On this, a silicon oxide film 108 was formed as a gate insulating film to a thickness of 500 to 2000 {for example, 1000}. This was made under the same conditions as those for forming the silicon oxide film as the blocking layer. During the film formation, a small amount of fluorine may be added to fix the sodium ions.

Thereafter, 1 to 5 × 10 ²¹ cm of phosphorus is placed on the upper side.
^-3 silicon film or molybdenum (Mo), tungsten (W), MoSi ₂ or
A multilayer film with WSi ₂ was formed. This was patterned using a fourth photomask P4 to obtain FIG. 9D. A gate electrode 109 for NTFT and a gate electrode 110 for PTFT were formed. For example, a channel length is 7 μm, and a gate electrode is formed of 0.2 μm of phosphorus silicon, and a molybdenum is formed thereon with a thickness of 0.3 μm. Although not shown in the figure, a gate wiring and a wiring parallel to the gate wiring were also formed as in the case of the first embodiment.

As a material for the wiring, for example, aluminum (Al) can be used in addition to the above materials. When aluminum is used, after patterning it with the fourth photomask P4 and then anodizing the surface thereof, the self-alignment method can be applied, so that the source / drain contact holes are closer to the gate. Since the TFT can be formed at a position, the characteristics of the TFT can be further improved by reducing the mobility and the threshold voltage.

In FIG. 9E, a silicon oxide film was formed on the interlayer insulator 113 by the above-described sputtering method. This silicon oxide film is formed by LPCVD, optical CVD
Or a normal pressure CVD method. For example, 0.2-0.
6 μm thick, and then a fifth photomask P
5 was used to form a window 117 for an electrode.

Thereafter, aluminum is further formed on the entire surface to a thickness of 0.3 μm by a sputtering method, and leads 116 and contacts 114 and 115 are formed using a sixth photomask P6. Organic resin 119, for example, a translucent polyimide resin,
The electrode drilling was performed again using the seventh photomask P7. Furthermore, ITO (indium tin oxide)
Was formed to a thickness of 0.1 μm by a sputtering method, and a pixel electrode 118 was formed using an eighth photomask P8. This ITO is formed at room temperature to 150 ° C.
Achieved by oxygen in the air or in air.

The electrical characteristics of the obtained TFT are PTFT
And the mobility is 35 (cm ² / Vs), Vth is -5.9 (V),
The mobility of NTFT is 90 (cm ² / Vs) and Vth is 4.8.
(V).

One substrate for a liquid crystal electro-optical device manufactured according to the above method was obtained. The method for fabricating the other substrate is the same as that in the first embodiment, and will not be described.
Thereafter, the nematic liquid crystal composition was sandwiched between the first substrate and the second substrate, and the periphery was fixed with an epoxy adhesive. A drive IC having a TAB shape and a PCB having common signals and potential wiring were connected to leads on the substrate, and a polarizing plate was adhered on the outside to obtain a transmissive liquid crystal electro-optical device. This was connected to a rear lighting device in which three cold cathode tubes were arranged, and a tuner for receiving TV radio waves to complete a wall-mounted TV. Compared to a conventional CRT system television, the device has a flat shape, so that it can be installed on a wall or the like. The operation of this liquid crystal television was confirmed to be capable of displaying 128 gradations by applying signals substantially equivalent to those shown in FIGS. 1 and 2 to the liquid crystal pixels.

[0072]

The present invention is characterized in that digital gray scale display is performed in contrast to the conventional analog gray scale display. As an effect, assuming a liquid crystal electro-optical device having a number of pixels of 640 × 400 dots, for example, it is very difficult to manufacture all the 256,000 TFTs without variation in characteristics. In consideration of mass productivity and yield, 16-gradation display is considered to be the limit. However, as in the present invention, gradation display is performed purely by digital control without adding analog signals at all. By doing so, gray scale display of 256 gray scale display or more is possible. Since it is a complete digital display,
The ambiguity of the gradation due to the variation in the characteristics of the FT was completely eliminated. Therefore, even if the variation in the TFT was slight, a very uniform gradation display was possible. Therefore, while the yield has been extremely low in order to obtain a TFT having a small variation, the yield of the TFT is no longer a problem according to the present invention. Was completed.

For example, 256,0 of 640 × 400 dots
When a normal analog gradation display is performed on a liquid crystal electro-optical device in which 00 sets of TFTs are formed in a 300 mm square,
Since there is about ± 10% variation in TFT characteristics,
Six gradation display was the limit. However, when the digital gradation display according to the present invention is performed, the display is hardly affected by the variation in the characteristics of the TFT elements, so that it is possible to display up to 256 gradations.
A variety of 16 colors can be displayed in subtle colors. In the case of displaying software such as television images, for example, even a “rock” made of the same color has a slightly different color due to its minute dents and the like. If you try to display something close to the colors of nature,
Difficulty is required for 16 gradations. With the gradation display according to the present invention, it is possible to impart these minute color changes.

In the embodiment of the present invention, T using silicon is used.
The explanation has been added focusing on FT.
FT can be used as well. In particular, the electron mobility of single crystal germanium is 3600 cm ² / Vs and the hole mobility is 1800 cm ² / Vs, which is the value of single crystal silicon (1350 cm ² / Vs in electron mobility and 480 c in hole mobility).
m ² / Vs), which is an excellent material for implementing the present invention that requires high-speed operation. In addition, germanium has a lower transition temperature from an amorphous state to a crystalline state than silicon, and is suitable for a low-temperature process. In addition, the nucleation rate during crystal growth is low, and therefore, generally, large crystals are obtained when polycrystals are grown. Thus, germanium has characteristics comparable to those of silicon.

In order to explain the technical idea of the present invention, an electro-optical device using a liquid crystal, particularly a display device has been described as an example. However, in order to apply the idea of the present invention, no display device is required. It is not necessary to use a so-called projection type television, another optical switch, or an optical shutter. Further, it is apparent that the present invention can be applied to electro-optical materials that are not limited to liquid crystals, as long as optical characteristics change due to electric influences such as electric fields and voltages.

[Brief description of the drawings]

FIG. 1 shows an example of a driving waveform according to the present invention.

FIG. 2 shows an example of a driving waveform according to the present invention.

FIG. 3 shows an example of a driving waveform according to the present invention.

FIG. 4 shows an example of a matrix configuration according to the invention.

FIG. 5 shows a planar structure of a device according to an example.

FIG. 6 shows a TFT process according to an embodiment.

FIG. 7 illustrates a TFT process according to an embodiment.

FIG. 8 shows a process of a color filter according to an example.

FIG. 9 shows a TFT process according to an embodiment.

FIG. 10 shows a connection example of a protection circuit in the embodiment.

FIG. 11 shows an example of a protection circuit in the embodiment.

FIG. 12 shows an example of a protection circuit in the embodiment.

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09G 3/36 G02F 1/136 500 (72) Inventor Yasuhiko Takemura 398 Hase, Atsugi-shi, Kanagawa Pref. Energy Research Institute

Claims (10)

[Claims] A first circuit having a thin film transistor formed on the first substrate; a pixel circuit having a thin film transistor formed on the first substrate; a lead electrically connected to the pixel circuit; A protection circuit formed on a first substrate, a planarization film formed on the pixel circuit, an ITO formed on the second substrate, and between the first and second substrates A holding liquid crystal composition, and a TAB-shaped driving IC electrically connected to the lead
A television comprising: a television; wherein the protection circuit includes ITO. 2. A pixel circuit having thin film transistors formed on the first and second substrates having an insulating surface; a pixel circuit having a thin film transistor formed on the first substrate; a lead electrically connected to the pixel circuit; A protection circuit formed on a first substrate, a planarization film formed on the pixel circuit, an ITO formed on the second substrate, and between the first and second substrates A holding liquid crystal composition, and a TAB-shaped driving IC electrically connected to the lead
And a television having the following, wherein the protection circuit includes silicon. A first circuit having an insulating surface, a pixel circuit having a thin film transistor formed on the first substrate, a lead electrically connected to the pixel circuit, A protection circuit formed on a first substrate, a planarization film formed on the pixel circuit, an ITO formed on the second substrate, and between the first and second substrates A holding liquid crystal composition, and a TAB-shaped driving IC electrically connected to the lead
A television comprising: the protection circuit comprising doped silicon. A first circuit having a thin film transistor formed on the first substrate; a pixel circuit having a thin film transistor formed on the first substrate; a lead electrically connected to the pixel circuit; A protection circuit formed on a first substrate, a planarization film formed on the pixel circuit, an ITO formed on the second substrate, and between the first and second substrates A holding liquid crystal composition, and a TAB-shaped driving IC electrically connected to the lead
Wherein the protection circuit has a thin film transistor and ITO, and one of a source and a drain of the thin film transistor is electrically connected to a gate of the thin film transistor. TV set. A first circuit having an insulating surface, a pixel circuit having a thin film transistor formed on the first substrate, a lead electrically connected to the pixel circuit, A protection circuit formed on a first substrate, a planarization film formed on the pixel circuit, an ITO formed on the second substrate, and between the first and second substrates A holding liquid crystal composition, and a TAB-shaped driving IC electrically connected to the lead
And the protection circuit includes an N-channel thin film transistor, a P-channel thin film transistor, and ITO, and one of a source and a drain and a gate of the N-channel thin film transistor are the P-channel thin film transistor. One of a source and a drain of the thin film transistor is electrically connected to a gate, and the other of the source and the drain of the N-channel thin film transistor is electrically connected to the other of the source and the drain of the P-channel thin film transistor Television characterized by the above-mentioned. 6. A first and second substrate having an insulating surface, a pixel circuit having a thin film transistor formed on the first substrate, a lead electrically connected to the pixel circuit, A protection circuit formed on a first substrate, an organic resin film formed on the pixel circuit, an ITO formed on the second substrate, and between the first and second substrates A holding liquid crystal composition, and a TAB-shaped driving IC electrically connected to the lead
A television comprising: a television; wherein the protection circuit includes ITO. 7. A method according to claim 7, wherein the first and second substrates have an insulating surface, a pixel circuit having a thin film transistor formed on the first substrate, a lead electrically connected to the pixel circuit, A protection circuit formed on a first substrate, an organic resin film formed on the pixel circuit, an ITO formed on the second substrate, and between the first and second substrates A holding liquid crystal composition, and a TAB-shaped driving IC electrically connected to the lead
And a television having the following, wherein the protection circuit includes silicon. 8. A first and second substrate having an insulating surface, a pixel circuit having a thin film transistor formed on the first substrate, a lead electrically connected to the pixel circuit, A protection circuit formed on a first substrate, an organic resin film formed on the pixel circuit, an ITO formed on the second substrate, and between the first and second substrates A holding liquid crystal composition, and a TAB-shaped driving IC electrically connected to the lead
And the protection circuit includes doped silicon. 9. A pixel circuit having a thin film transistor formed on the first and second substrates having an insulating surface; a pixel circuit having a thin film transistor formed on the first substrate; a lead electrically connected to the pixel circuit; A protection circuit formed on a first substrate, an organic resin film formed on the pixel circuit, an ITO formed on the second substrate, and between the first and second substrates A holding liquid crystal composition, and a TAB-shaped driving IC electrically connected to the lead
Wherein the protection circuit has a thin film transistor and ITO, and one of a source and a drain of the thin film transistor is electrically connected to a gate of the thin film transistor. TV set. 10. A first and second substrate having an insulating surface, a pixel circuit having a thin film transistor formed on the first substrate, a lead electrically connected to the pixel circuit, A protection circuit formed on a first substrate, an organic resin film formed on the pixel circuit, an ITO formed on the second substrate, and between the first and second substrates A holding liquid crystal composition, and a TAB-shaped driving IC electrically connected to the lead
And the protection circuit includes an N-channel thin film transistor, a P-channel thin film transistor, and ITO, and one of a source or a drain and a gate of the N-channel thin film transistor is the P-channel thin film transistor. One of a source and a drain of the thin film transistor is electrically connected to a gate, and the other of the source and the drain of the N-channel thin film transistor is electrically connected to the other of the source and the drain of the P-channel thin film transistor Television characterized by the above-mentioned.