JP2001085459A - Connection method to connect chip to substrate - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To provide a connection method for connecting a chip capable of performing high-performance and high-reliability connection to a substrate by a simple process. SOLUTION: Before a step of connecting a wiring layer 2 of a substrate 1 and a wiring layer 8 of a chip made of a micro electrode (chip) or the like by a bump 11, an anisotropic conductive material placed around the bump 11 is provided. The film 4 is previously set in a region including a part of the wiring layer 2 of the substrate 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a connection method for connecting a chip to a substrate, and more particularly to a connection method for connecting a chip to a substrate, which can perform a simple process and has a high performance and high reliability. Things.

[0002]

2. Description of the Related Art The present inventors have studied a connection method for connecting a microelectrode to a substrate. The following is a technique studied by the present inventors, and the outline is as follows.

[0003] That is, for example, a microelectrode as an electrode for a living body or an electrode for detecting a nerve potential can be applied when measuring or detecting electricity of a living body or the like. In addition, for example, a method for manufacturing a microelectrode as an electrode for a living body or an electrode for detecting a nerve potential uses a manufacturing process of forming a through electrode and a support base using a silicon (Si) substrate or the like.

At present, there are many types of connection methods for connecting a microelectrode as a chip to a substrate, and any of these connection methods is a microelectrode (chip).
A gold (Au) bump is formed on the side, and a process of connecting the microelectrode and the substrate and then fixing with a resin to ensure the reliability of the connection portion must be used. .

[0005] Incidentally, as the literature describing the above-mentioned microelectrode and its manufacturing technology, for example, 1
"IEEE TRANSACTINS ON BIOMEDICAL ENG" published in 994
INEERING, VOL.41, NO.4, APRIL 1994 "p305-p31
3 is described.

[0006]

However, in the above-described connection method for connecting the microelectrode to the substrate, in the microelectrode having the nerve potential detecting electrode, the chip is made of potassium hydroxide (KOH) solution. Must be etched.

Therefore, tungsten (W) having excellent potassium hydroxide resistance is to be used as a wiring material in a wiring layer in a microelectrode.

As a result, the material of the pad (external electrode) on the microelectrode must be tungsten. However, it is known that it is difficult to form a gold bump directly on a pad made of tungsten by bonding. As a method of forming an Au bump by bonding, a pretreatment such as gold plating or gold deposition on tungsten is required in a wafer process. These processes have the disadvantage of increasing the cost because they lengthen the manufacturing process.

SUMMARY OF THE INVENTION An object of the present invention is to provide a connection method for connecting a chip to a substrate, which can perform a simple process and can perform high-performance and high-reliability connection.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0011]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

The present invention is a connection method for connecting a wiring layer of a substrate and a wiring layer of a chip by bumps, wherein the bumps are made of conductive resin.

[0013]

Embodiments of the present invention will be described below in detail with reference to the drawings. In all the drawings for describing the embodiments, components having the same function are denoted by the same reference numerals, and redundant description will be omitted.

FIGS. 1 to 7 are schematic sectional views showing the process flow of a connection method for connecting a chip to a substrate according to an embodiment of the present invention. The connection method for connecting the chip of the present embodiment to a substrate will be specifically described with reference to FIG.

First, a substrate 1 to be used in the connection method for connecting a chip to a substrate according to the present embodiment is prepared (FIG. 1).
In a substrate applied to the connection method of connecting a chip to a substrate according to the present embodiment, a wiring layer 2 is formed on a surface of a substrate base 1. The wiring layer 2 has, for example, a copper (Cu) layer and gold plating on its surface. The substrate applied to the connection method of connecting the chip to the substrate according to the present embodiment includes a substrate having a wiring layer 2 also formed on the back surface of the substrate base 1 and a wiring layer provided inside the substrate base 1. Various types of substrates, such as those described above, can be used.

Next, a resin such as, for example, an anisotropic conductive film 4 pressure bonding paste is provided in a region including a part of the wiring layer 2 of the substrate (FIG. 2 or FIG. 3).

The method of manufacturing the anisotropic conductive film 4 in a region including a part of the wiring layer 2 of the substrate includes the following.
Is bonding an anisotropic conductive film or bonding a predetermined amount of paste to the surface of the substrate on which the surface is formed.

Thereafter, a micro electrode (chip) having bumps 11 as external electrodes on the substrate (FIG. 4)
After setting the bumps 11 in the anisotropic conductor 4 in a buried state, an operation of electrically connecting the bumps to the wiring layer 2 of the substrate is performed using heat treatment (FIG. 6).

In this case, the microelectrode (chip) (FIG. 4) as the chip of the present embodiment is made of silicon (Si,
A wiring layer 8 made of, for example, a tungsten layer is formed on a surface of a support 10 made of a silicon (silicon) layer with an insulating film 7 interposed therebetween, and an insulating film 9 as a protective film is formed on the surface of the wiring layer 8. A pad (electrode) 6 as an electrode is formed on the wiring layer 8 in the penetrating portion, and a bump 11 is provided on a pad (electrode) formed on a part of the wiring layer 8 on the support base 10. ing. As the bump 11 in the microelectrode (chip) (FIG. 4) of the present embodiment, a bump made of a conductive resin is used.

The method of manufacturing a microelectrode (chip) (FIG. 4) as a chip according to the present embodiment
Substrate (wafer) or SOI for forming silicon
(Silicon on Insulator) After a wiring layer 8 made of, for example, a tungsten layer is formed on a surface of a substrate with an insulating film 7 interposed therebetween, an insulating film 9 as a protective film is formed on the surface of the wiring layer 8. After that, a conductive resin is printed on a pad formed on a part of the wiring layer 8 made of, for example, a tungsten layer by using a screen printing method, and then the conductive resin is cured, thereby performing the operation of hardening the conductive resin. A bump 11 made of a conductive resin is formed on a pad formed on a part of the pad. Thereafter, the substrate on which the microelectrodes (chips) as a plurality of chips (FIG. 4) are formed is cut by using dicing, whereby the microelectrodes (chips) as the plurality of chips (FIG. 4) are cut. ) Is formed.

Next, by using an etching method using a potassium hydroxide solution, the support 10 made of a silicon layer in an unnecessary area is removed to form a microelectrode (chip) (FIG. 4) as a product. Work is performed, and the connection method for connecting the chip to the substrate according to the present embodiment is completed (FIG. 7).

As another aspect of the connection method of connecting the chip of the present embodiment to the substrate, a chip of a semiconductor device other than the microelectrode can be applied as the chip.

As another aspect of the connection method for connecting the chip to the substrate according to the above-described embodiment, as a method for connecting the bumps to the chip, a potting method using a dispenser may be applied in addition to the screen printing method. Can be.

According to the above-described connection method for connecting a chip to a substrate according to the present embodiment, the wiring layer 2 of the substrate and the wiring layer 8 of the chip including microelectrodes (chips) (FIG. 4) are connected by the bumps 11. Before the connecting step, the bump 11
By purchasing a substrate in which the anisotropic conductive film 4 installed in the periphery of the substrate is previously installed in a region including a part of the wiring layer 2 of the substrate, the process can be performed in a simple process, and high performance and high reliability can be achieved. A connection method for connecting a chip that can be connected to the substrate to the substrate.

According to the connection method for connecting a chip to a substrate according to the present embodiment, the bump 1 made of a conductive resin is used.
Micro electrode (chip) by using 1
An electrically conductive bump (protruding electrode) can be formed directly from the electrode part without depending on the material of the electrode (wiring layer, pad as an external electrode) of the chip composed of FIG. Electrical connection with the wiring layer 2 of the substrate using the conductive film 4 can be facilitated.

According to the connection method for connecting a chip to a substrate according to the present embodiment, the bumps 11 can be formed collectively by using a screen printing method or the like, so that the bumps 11 can be formed at low cost.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, according to the connection method of connecting a chip to a substrate according to the present invention, even if the material, width, film thickness, shape and arrangement of the chip and the substrate are variously designed according to the design specifications, the high performance can be obtained. In addition, a highly reliable connection method can be realized.

According to the connection method of connecting a chip to a substrate according to the present invention, the semiconductor device as a chip can be a MOS device.
The present invention can be applied to a semiconductor integrated circuit device having a semiconductor element in which various semiconductor elements such as an FET, a CMOSFET, a bipolar transistor, or a BiMOS or a BiCMOS structure in which a MOSFET and a bipolar transistor are combined are combined.

According to the connection method for connecting a chip to a substrate according to the present invention, the semiconductor device as a chip includes a MOS device.
Logic or DRAM (Dynamic Random Access Memor
y) and various semiconductor integrated circuit devices having a memory system such as an SRAM (Static Random Access Memory).

[0031]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1). According to the connection method of connecting a chip to a substrate according to the present invention, the chip is placed around the bump before the step of connecting the wiring layer of the substrate and the wiring layer of the chip including microelectrodes (chips) by the bump. By purchasing a substrate in which the anisotropic conductor in the state is pre-installed in a region including a part of the wiring layer of the substrate, a chip that can perform simple processes, and has high-performance and high-reliability connection can be obtained. A connection method for connecting to a substrate can be adopted.

(2). According to the connection method of the present invention for connecting a chip to a substrate, the use of bumps made of a conductive resin makes it possible to use microelectrodes (chips) for chip electrodes (wiring layers and external electrodes). Since a conductive bump (protruding electrode) can be formed directly from the electrode portion without depending on the pad) material, it is easy to electrically connect to the wiring layer of the substrate using an anisotropic conductor. can do.

(3). According to the connection method of connecting the chip of the present invention to the substrate, using a screen printing method or the like,
Since bumps can be formed collectively, low-cost bumps can be formed.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of a substrate used in a connection method for connecting a chip to a substrate according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view showing a state in which an anisotropic conductive film is formed on a substrate in a step of a connection method for connecting a chip to a substrate according to an embodiment of the present invention.

FIG. 3 is a schematic cross-sectional view illustrating a state in which a press-contact paste is formed on a substrate in a process of a connection method for connecting a chip to a substrate according to an embodiment of the present invention.

FIG. 4 is a schematic cross-sectional view showing a microelectrode of a connection method for connecting a chip to a substrate according to an embodiment of the present invention.

FIG. 5 is a schematic cross-sectional view showing a state in which a resin bump is formed on the microelectrode chip.

FIG. 6 is a schematic sectional view showing a state where the microelectrode chip and the substrate are connected via a resin bump.

FIG. 7 is a schematic sectional view showing a state in which an unnecessary support of the microelectrode chip is removed by etching.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate base 2 Wiring layer 3 Insulating film 4 Anisotropic conductive film 5 Paste for pressure welding 6 Pad 7 Insulating film 8 Wiring layer 9 Insulating film 10 Support base 11 Bump 12 Electrode for neural potential detection

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hideo Noda 5-2-12-1 Kamimizuhonmachi, Kodaira-shi, Tokyo Inside Hitachi Super SII Systems Co., Ltd. (72) Inventor Tomoyuki Terada Tokyo 5-22-1, Kamimizu Honcho, Kodaira City Hitachi, Ltd. LSI Systems, Inc. (72) Inventor Shinichi Tanabe 5-22-1, Kamizu Honmachi, Kodaira City, Tokyo Hitachi, Ltd. LSI Systems Inc. (72) Inventor Yuki Kunimoto 5-22-1, Josuihonmachi, Kodaira-shi, Tokyo Hitachi, Ltd. Hitachi Ultra LSI Systems Inc. (72) Inventor Oguma Hiroshi 5-22-1, Josuihoncho, Kodaira-shi, Tokyo Inside Hitachi Ultra-SII Systems Co., Ltd. (72) Inventor Masayuki Kikuchi 5-2-2 Josuihoncho, Kodaira-shi, Tokyo No. 2 in Hitachi Super LSI System Co., Ltd. (72) Inventor Seiichi Ichihara 5-2-1, Josuihoncho, Kodaira-shi, Tokyo Hitachi Super LSI System Co., Ltd. (72) Inventor Kenji Sunagawa 3-9-16, Kasugaoka, Ibaraki-shi, Osaka (72) Inventor Takayuki Sato 3-11-31-201, Imamiya, Minoh-shi, Osaka F-term (reference) 5E319 AA03 AB05 BB16 CC61 CD26 GG20 5F044 LL09 QQ03

Claims (4)

[Claims] 1. A connection method for connecting a chip to a substrate, the method comprising connecting a wiring layer of a substrate and a wiring layer of a chip by a bump, wherein the bump is made of a conductive resin. 2. A connection method for connecting a chip to a substrate, wherein the bump is a bump made of a conductive resin. 3. The connection method for connecting a chip to a substrate according to claim 1, wherein the chip is a micro-electrode chip. 4. The connection method for connecting a chip to a substrate according to claim 1, wherein the chip is a chip of a semiconductor device.