JP2001015773A - Optical element carrier and its mounting structure - Google Patents
Optical element carrier and its mounting structureInfo
- Publication number
- JP2001015773A JP2001015773A JP18582199A JP18582199A JP2001015773A JP 2001015773 A JP2001015773 A JP 2001015773A JP 18582199 A JP18582199 A JP 18582199A JP 18582199 A JP18582199 A JP 18582199A JP 2001015773 A JP2001015773 A JP 2001015773A
- Authority
- JP
- Japan
- Prior art keywords
- optical element
- base
- element carrier
- mounting
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Light Receiving Elements (AREA)
Abstract
(57)【要約】
【課題】 面受発光素子等の光素子の実装に適し、量産
性に優れ、小型化が可能で高周波特性に優れた光素子キ
ャリア及びその実装構造を提供すること。
【解決手段】 基台1上に光素子2を配設して成る光素
子キャリアCであって、基台1は、光素子2が配設され
る光素子配設面A1と、光素子配設面A1に対し鈍角を
成し基台1を立設させる際に下面側となる第1傾斜面A
2と、光素子配設面A1と対向する背面A4と、該背面
A4に対し鈍角を成し基台1を立設させる場合に下面側
となる第2傾斜面A3と、光素子配設面A1と背面A4
の間に形成したスルーホールHとを有し、光素子2の駆
動用導体が、光素子配設面A1から第1傾斜面A2に到
る領域と、光素子配設面A1からスルーホールHを通じ
背面A4を経て第2斜面A3に到る領域とに形成されて
いることを特徴とする。
(57) [Problem] To provide an optical element carrier suitable for mounting an optical element such as a surface light emitting / receiving element, excellent in mass productivity, miniaturizable, and excellent in high frequency characteristics, and a mounting structure thereof. An optical element carrier (C) having an optical element (2) disposed on a base (1), wherein the base (1) has an optical element arrangement surface (A1) on which the optical element (2) is disposed, and an optical element arrangement surface (1). A first inclined surface A which is an obtuse angle with respect to the installation surface A1 and is a lower surface side when the base 1 is erected.
2, a rear surface A4 opposed to the optical element mounting surface A1, a second inclined surface A3 which forms an obtuse angle with respect to the rear surface A4 and is a lower surface side when the base 1 is erected, and an optical element mounting surface. A1 and back A4
Between the optical element mounting surface A1 and the first inclined surface A2, and between the optical element mounting surface A1 and the through hole H. And a region extending to the second slope A3 through the back surface A4.
Description
【0001】[0001]
【発明の属する技術分野】本発明は、光ファイバー通信
システムもしくは構内光通信システム(光LAN)に用
いられる光素子キャリア及びその実装構造に関し、特に
光素子として面発光素子または面受光素子を用いたもの
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical element carrier used in an optical fiber communication system or a private optical communication system (optical LAN) and a mounting structure thereof, and more particularly to an optical element using a surface emitting element or a surface light receiving element as an optical element. About.
【0002】[0002]
【従来の技術】近年、CATVや公衆通信の分野におい
て、光ファイバー通信の実用化が始まっている。従来よ
り、高速、高信頼性の光半導体モジュールが同軸型ある
いはDual-inline 型と呼ばれるモジュール構造で実現さ
れており、これらは主に幹線系と呼ばれる領域で既に実
用化されている。2. Description of the Related Art In recent years, practical use of optical fiber communication has started in the field of CATV and public communication. 2. Description of the Related Art Hitherto, high-speed and high-reliability optical semiconductor modules have been realized in a module structure called a coaxial type or a dual-inline type, and these have already been put to practical use mainly in an area called a trunk system.
【0003】これに対し、最近では、Si(シリコン)
基板(またはSiプラットホームとも称される)上で、
光半導体素子とファイバを機械的精度のみで高精度に位
置決め実装する技術を用いた光モジュールが盛んに開発
されている。これらは主にアクセス系と呼ばれる領域で
の実用化が目標とされており、小型化,低背化,低コス
ト化等が要求されている。On the other hand, recently, Si (silicon)
On the substrate (also called Si platform)
2. Description of the Related Art Optical modules using technology for positioning and mounting an optical semiconductor element and a fiber with high accuracy only by mechanical accuracy have been actively developed. These are intended to be put to practical use mainly in an area called an access system, and are required to be reduced in size, height, cost, and the like.
【0004】以下に、従来のフォトダイオードの実装構
造〜について説明する。Hereinafter, a conventional photodiode mounting structure will be described.
【0005】図6にフォトダイオードを実装するため
の基台41を示す。基台41は少なくとも任意の隣合う
2つの面にフォトダイオードのアノードおよびカソード
電極用の電極パッド411,412が形成されており、
各々の電極パッドは面の境界で電気的に導通が確保され
る。FIG. 6 shows a base 41 for mounting a photodiode. The base 41 has electrode pads 411 and 412 for an anode and a cathode of a photodiode formed at least on any two adjacent surfaces.
Each electrode pad is electrically connected at the boundary between the surfaces.
【0006】図7にPIN型のフォトダイオード2が上
記サブマウント41に実装された典型的な例を示す。フ
ォトダイオード2は用途により異なるが、この例では約
500μm角、厚さ約200μm、受光径約200μm
φであり、受光面およびその反対面(裏面)に電極パッ
ド21,22がそれぞれ形成されている。フォトダイオ
ード2は受光面を上に電極パッド411上にAuSn半
田等により接続固定され、裏面電極22と電気的に接続
されている。また、電極パッド412と受光面電極21
とはワイヤボンド31により電気的接続がとられる。FIG. 7 shows a typical example in which a PIN type photodiode 2 is mounted on the submount 41. Although the photodiode 2 varies depending on the application, in this example, it is about 500 μm square, about 200 μm in thickness, and about 200 μm in light receiving diameter.
φ, and electrode pads 21 and 22 are formed on the light receiving surface and the opposite surface (back surface), respectively. The photodiode 2 is connected and fixed with AuSn solder or the like on the electrode pad 411 with the light receiving surface facing upward, and is electrically connected to the back electrode 22. Also, the electrode pad 412 and the light receiving surface electrode 21
Are electrically connected by wire bonds 31.
【0007】図8(a)〜(c)に上記基台41にPI
N型フォトダイオード2を実装後、基台41がSi基板
S上に実装された例を示す。PIN型フォトダイオード
2はその受光面をSi基板Sの主面に対して垂直になる
ように接続される。これにより、Si基板Sの主面に平
行に実装された不図示の光ファイバとフォトダイオード
2とが光接続される。フォトダイオード2への給電用の
配線はフォトダイオード2の実装面と別の面の電極パッ
ドからSi基板Sへワイヤボンディングすることにより
行われる。FIGS. 8 (a) to 8 (c) show that the base 41 has a PI.
An example in which the base 41 is mounted on the Si substrate S after mounting the N-type photodiode 2 is shown. The PIN photodiode 2 is connected so that its light receiving surface is perpendicular to the main surface of the Si substrate S. Thereby, the optical fiber (not shown) mounted in parallel with the main surface of the Si substrate S and the photodiode 2 are optically connected. Wiring for supplying power to the photodiode 2 is performed by wire bonding from the electrode pad on a surface different from the mounting surface of the photodiode 2 to the Si substrate S.
【0008】ここで、基台41は一般的にはアルミナ等
のセラミック体上に、フィラー入りペーストを用い、印
刷により各面ごとに電極パッドがパターン形成される。Here, the base 41 is generally formed by patterning electrode pads on each surface by printing using a paste containing filler on a ceramic body such as alumina.
【0009】また、Si基板上に上記のような基台は
用いずに、直接Si基板上にフォトダイオードを実装す
る方法も提案されている(例えば、特開平8-94887 号公
報を参照)。この提案は、Si基板上の光ファイバ実装
溝に、光ファイバを実装する際に光ファイバ出射端に対
向するように斜面を形成し、その斜面上にフォトダイオ
ードの実装を行うようにしたものである。ここで、フォ
トダイオード下面側の電極は前記斜面に形成された電極
と直接コンタクトさせて行い、フォトダイオード上面側
の電極はワイヤリングにより行う。A method of directly mounting a photodiode on a Si substrate without using the above-described base on the Si substrate has also been proposed (for example, see Japanese Patent Application Laid-Open No. 8-94887). In this proposal, a slope is formed in an optical fiber mounting groove on a Si substrate so as to face an optical fiber output end when mounting an optical fiber, and a photodiode is mounted on the slope. is there. Here, the electrode on the lower surface of the photodiode is brought into direct contact with the electrode formed on the slope, and the electrode on the upper surface of the photodiode is made by wiring.
【0010】また、フォトダイオードの受光面を下側
にしてSi基板に載置し、受光面下部に形成された光路
用溝の一部に形成された全反射面により90゜光路を変
えることで、光ファイバからの出射光を受光面へ導く方
法も提案されている(例えば、特開平9-54228 号公報を
参照)。Further, the photodiode is placed on a Si substrate with the light receiving surface of the photodiode facing down, and the 90 ° optical path is changed by a total reflection surface formed in a part of the optical path groove formed below the light receiving surface. A method has also been proposed in which light emitted from an optical fiber is guided to a light receiving surface (for example, see Japanese Patent Application Laid-Open No. 9-54228).
【0011】[0011]
【発明が解決しようとする課題】しかしながら、上記実
装構造では、基台の電極パッドの形成において、2面
のパターンの相対的な位置合わせ精度が外形の機械精度
に依存するため、精度が悪いという問題があった。すな
わち、電極パッドの最小線幅、パッド間隔は各々70μ
m程度が限界であった。このため、電極の寄生容量が高
くなり、高周波特性に制限を与えたり、基台全体が大型
になるという問題があった。However, in the above mounting structure, the accuracy of relative positioning of the two patterns depends on the mechanical accuracy of the outer shape in the formation of the electrode pads on the base. There was a problem. That is, the minimum line width of the electrode pad and the pad interval are each 70 μm.
m was the limit. For this reason, the parasitic capacitance of the electrode is increased, and there is a problem that the high-frequency characteristics are restricted and the entire base is increased in size.
【0012】また、2面もしくはそれ以上の面へのパタ
ーン形成では、第1面のパターン形成が終了した後、次
のパターンを形成するとき、基台自身を一つずつハンド
リングし整列させる必要があり、著しく生産性が悪いと
いう問題や、サイズが小さくなるほど、その取り扱いが
困難になり、さらに生産性を悪化させる問題があった。
また、従来ではサイズの限界が2mm角程度であって、
さらなる小型化は困難であった。In pattern formation on two or more surfaces, it is necessary to handle and align the bases one by one when forming the next pattern after pattern formation on the first surface is completed. There is a problem that productivity is remarkably poor, and that the smaller the size is, the more difficult it is to handle and the more the productivity is deteriorated.
Conventionally, the size limit is about 2 mm square,
Further miniaturization was difficult.
【0013】以上述べた通り、サイズとコストがトレー
ドオフの関係になっているので、従来では、基台の小型
化、高性能化により、非常にコストが高くなるという問
題があること、及び小型化、高性能化に物理的な限界が
あった。As described above, since there is a trade-off between size and cost, conventionally, there is a problem that the cost is extremely high due to the miniaturization and high performance of the base. There was a physical limit to high performance and high performance.
【0014】また、実装構造では、ワイヤリング面が
同一平面上にないため、工程が著しく煩雑になったり、
Si基板の斜面へ電極をパターン形成する必要があるの
で、工程が複雑化するなどの問題があった。さらに、斜
面の傾斜角の自由度が斜面への電極作製プロセスやワイ
ヤリングの作業性により制限を受けてしまい、フォトダ
イオードの受光感度や実装位置合わせ精度のトレランス
が、光路に対しほぼ垂直に受光した場合と比較して小さ
くなるという問題もあった。In the mounting structure, since the wiring surfaces are not on the same plane, the process becomes extremely complicated,
Since it is necessary to pattern the electrodes on the slope of the Si substrate, there is a problem that the process becomes complicated. Furthermore, the degree of freedom of the inclination angle of the slope is limited by the electrode fabrication process on the slope and the workability of wiring, and the light receiving sensitivity of the photodiode and the tolerance of the mounting alignment accuracy are received almost perpendicular to the optical path. There is also a problem that it becomes smaller than the case.
【0015】また、実装構造によっても、上記実装構
造と同様に溝内への電極プロセスによる工程の複雑化
や、特に受光感度の低下を免れることができない。Also, depending on the mounting structure, as in the above-described mounting structure, it is inevitable that the process of forming an electrode in the groove becomes complicated and that the light receiving sensitivity is reduced.
【0016】そこで本発明は、上記従来の諸問題に鑑み
提案されたものであり、特に面受発光素子等の光素子の
実装に適し、しかも量産性に優れ、小型化が可能で高周
波特性に優れた光素子キャリア及びその実装構造を提供
することを目的とする。Accordingly, the present invention has been proposed in view of the above-mentioned conventional problems, and is particularly suitable for mounting an optical element such as a surface light emitting / receiving element, and has excellent mass productivity, can be reduced in size, and has high frequency characteristics. An object is to provide an excellent optical element carrier and a mounting structure thereof.
【0017】[0017]
【課題を解決するための手段】上記目的を達成するため
に、本発明の光素子キャリアは、基台上に光素子を配設
して成る光素子キャリアであって、基台は、光素子が配
設される光素子配設面と、該光素子配設面に対し鈍角を
成し基台を立設させる際に下面側となる第1傾斜面と、
光素子配設面と対向する背面と、該背面に対し鈍角を成
し基台を立設させる場合に下面側となる第2傾斜面と、
光素子配設面と背面の間に形成したスルーホールとを有
し、光素子の駆動用導体が、光素子配設面から第1傾斜
面に到る領域と、光素子配設面からスルーホールを通じ
背面を経て第2斜面に到る領域に形成されていることを
特徴とする。In order to achieve the above object, an optical element carrier according to the present invention is an optical element carrier having an optical element arranged on a base, wherein the base is an optical element carrier. An optical element disposition surface on which is disposed, a first inclined surface that forms an obtuse angle with respect to the optical element disposition surface and becomes a lower surface side when the base is erected,
A rear surface facing the optical element disposition surface, a second inclined surface that forms an obtuse angle with respect to the rear surface and becomes a lower surface side when the base is erected,
A through hole formed between the optical element mounting surface and the back surface, wherein a driving conductor of the optical element extends from the optical element mounting surface to the first inclined surface; It is characterized in that it is formed in a region extending from the back surface through the hole to the second slope.
【0018】また、本発明の光素子キャリアの実装構造
は、光素子駆動用の2つの導体パターンが形成された基
板上に、上記光素子キャリアを固定するようにした光素
子キャリアの実装構造であって、基板上に2つの導体パ
ターンの各々一部が形成された2つの斜面を有する凹部
を設け、該凹部の2つの斜面に前記光素子キャリアの第
1及び第2斜面を合わせ、光素子の駆動用導体と凹部の
導体パターンとを接続するようにしたことを特徴とす
る。The optical element carrier mounting structure of the present invention is an optical element carrier mounting structure in which the optical element carrier is fixed on a substrate on which two conductor patterns for driving the optical element are formed. A concave portion having two slopes each having a part of each of the two conductor patterns formed on the substrate, and aligning the first and second slopes of the optical element carrier with the two slopes of the concave portion; The driving conductor and the conductor pattern of the concave portion are connected to each other.
【0019】[0019]
【発明の実施の形態】以下、本発明の光素子キャリア及
びその実装構造の実施形態を図面に基づき詳細に説明す
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the optical element carrier and the mounting structure thereof according to the present invention will be described in detail with reference to the drawings.
【0020】図1(a)に、シリコン単結晶等から成る
基板S上に、光導波体である光ファイバ5と、これに光
結合させる面発光素子や面受光素子等の光素子2を設け
た光素子キャリアCとを配設した光モジュールMの平面
図を、図1(b)にそのA−A線断面図を示し、図1
(b)のB部拡大図を図4に示す。In FIG. 1A, an optical fiber 5 as an optical waveguide and an optical element 2 such as a surface light emitting element or a surface light receiving element to be optically coupled thereto are provided on a substrate S made of silicon single crystal or the like. FIG. 1B is a plan view of an optical module M provided with an optical element carrier C, and FIG.
FIG. 4 is an enlarged view of a portion B of FIG.
【0021】ここで、基板S上には、光素子2を駆動す
るための2つの導体パターンである第1電極パターン
3,第2電極パターン4が形成されており、さらに、光
素子キャリアCを搭載させる領域Saに凹部7が基板S
のアルカリ溶液等による異方性エッチングにより精度良
く斜面7a,7bが形成され(基板Sは例えばシリコン
単結晶であれば(100)面等を主面とし、異方性エッ
チングにより形成された凹部の斜面は(111)面等と
なる。)、この2つの斜面7a,7bには、第1電極パ
ターン3,第2電極パターン4の各々一部が形成されて
いる。そして、この凹部7において、光素子2の後記す
る駆動用導体と凹部7の導体パターンとを接続し、光素
子2の駆動を行えるようにしている。Here, the first electrode pattern 3 and the second electrode pattern 4, which are two conductor patterns for driving the optical element 2, are formed on the substrate S. The concave portion 7 is provided on the substrate S in the mounting area Sa.
Slopes 7a and 7b are formed with high precision by anisotropic etching using an alkaline solution or the like (for example, if the substrate S is a silicon single crystal, the main surface is a (100) plane or the like) The slopes are (111) planes and the like.) On the two slopes 7a and 7b, a part of each of the first electrode pattern 3 and the second electrode pattern 4 is formed. In the recess 7, a driving conductor described later of the optical element 2 is connected to a conductor pattern of the recess 7, so that the optical element 2 can be driven.
【0022】光素子キャリアCは、図2及び図3に示す
ように、基台1は、光素子2が配設され平面を成す光素
子配設面A1と、光素子配設面A1に対し鈍角θを成し
基台1を立設させる際に下面側となる第1傾斜面A2
と、光素子配設面A1と対向する背面A4と、背面A4
に対し鈍角θを成し基台1を立設させる場合に下面側と
なる第2傾斜面A3と、光素子配設面A1と背面A4の
間に形成したスルーホールHとを有し、光素子2の駆動
用導体である電極パッド12,13が、光素子配設面A
1から第1傾斜面A2に到る領域に形成されており、ま
た、電極パッド11,15,14が光素子配設面A1か
らスルーホールHを通じ背面A4を経て第2斜面A3に
到る領域に形成されている。なお、基板Sの凹部7に形
成された導体パターンと光素子2の駆動用導体との導通
が良好に行えるのであれば、基台1に形成する駆動用導
体は必ずしも第1斜面A2及び第2斜面A3の全体に形
成する必要はない。As shown in FIG. 2 and FIG. 3, the optical element carrier C has a base 1 on which an optical element 2 is disposed and which forms a flat optical element mounting surface A1 and an optical element mounting surface A1. A first inclined surface A2 that forms an obtuse angle θ and is a lower surface side when the base 1 is erected.
A back surface A4 facing the optical element disposition surface A1, and a back surface A4
And a through hole H formed between the optical element disposing surface A1 and the back surface A4, the second inclined surface A3 being the lower surface side when the base 1 is erected at an obtuse angle θ with respect to The electrode pads 12 and 13 which are the driving conductors of the element 2 are disposed on the optical element arrangement surface
The electrode pad 11 is formed in a region extending from the first to the first inclined surface A2, and the electrode pad 11, 15, 14 extends from the optical element disposing surface A1 through the through hole H to the second inclined surface A3 via the back surface A4. Is formed. If the conductive pattern formed in the recessed portion 7 of the substrate S and the drive conductor of the optical element 2 can be conducted well, the drive conductor formed on the base 1 is not necessarily the first slope A2 and the second slope A2. It is not necessary to form the entire slope A3.
【0023】ここで、鈍角θは100°〜170°とす
る。この理由は、100°より小さいと、電極がベタで
形成されることになり、機械整合が良好にとれない。一
方、170°より大きくなると、電極の形成が困難とな
るからである。Here, the obtuse angle θ is set to 100 ° to 170 °. The reason for this is that if the angle is smaller than 100 °, the electrodes are formed solid, and good mechanical matching cannot be obtained. On the other hand, if it is larger than 170 °, it becomes difficult to form electrodes.
【0024】具体的には11,12の電極パッドは素子
接続用電極パッド、13,14は外部引き出し用電極パ
ッド、15,16は素子接続用電極パッド11と外部引
き出し用電極パッド14のそれぞれ接続用配線パターン
とスルーホール導体である。ここで、説明の便宜上、1
1,16,15,13を第1電極配線、12,13を第
2電極配線という。Specifically, electrode pads 11 and 12 are electrode pads for element connection, 13 and 14 are electrode pads for external lead-out, and 15 and 16 are electrode pads 11 for element connection and electrode pad 14 for external lead-out, respectively. Wiring patterns and through-hole conductors. Here, for convenience of explanation, 1
1, 16, 15, and 13 are called first electrode wirings, and 12, 13 are called second electrode wirings.
【0025】図3に示す光素子キャリアCは、光素子2
としてPIN型のフォトダイオードを実装した例である
が、アバランシェフォトダイオード等の受光素子も使用
可能である。光素子2は電極パッド11に受光面を上に
してその裏面電極22側が接続される。この接続にはA
uSn半田等が用いられる。また、光素子2の受光面側
の電極21と電極パッド12とがボンディングワイヤ3
1により接続される。The optical element carrier C shown in FIG.
However, a light receiving element such as an avalanche photodiode can also be used. The optical element 2 is connected to the electrode pad 11 on the back electrode 22 side with the light receiving surface facing up. A for this connection
uSn solder or the like is used. The electrode 21 on the light receiving surface side of the optical element 2 and the electrode pad 12 are connected to the bonding wire 3.
1 connected.
【0026】次に、光素子キャリアCの各部の特徴的な
形状、材質、寸法の詳細について述べる。上記第1電極
配線は、光素子配設面A1内の電極パッド12から、こ
の面に隣接する第1傾斜面A2上の電極パッド13にか
けて接続される。一方、第2電極配線は、光素子配設面
A1内の電極パッド11から距離L5を隔てた背面A4
に形成された電極パッド15にスルーホール導体16を
介して接続され、背面A4に隣接する第2傾斜面A3上
の電極パッド14に接続される。電極パッド13及び1
4は、それぞれ光素子配設面A1,背面A4と鈍角θを
なす第1傾斜面2,第2傾斜面A3上の全面に形成さ
れ、その幅L2,L3は距離L5に対して小さく、ある
距離を隔てて対向する(L5>L2・sin(π−θ)
+L3・sin(π−θ))。すなわち、第1傾斜面A
2,第2傾斜面A3は、各々、光素子配設面A1,背面
A4の表層の一領域内に含まれており、これら各平面に
おけるプレーナプロセス領域とみなせる。Next, details of the characteristic shape, material, and dimensions of each part of the optical element carrier C will be described. The first electrode wiring is connected from the electrode pad 12 in the optical element mounting surface A1 to the electrode pad 13 on the first inclined surface A2 adjacent to this surface. On the other hand, the second electrode wiring is connected to the back surface A4 at a distance L5 from the electrode pad 11 in the optical element mounting surface A1.
Is connected through a through-hole conductor 16 to the electrode pad 14 on the second inclined surface A3 adjacent to the back surface A4. Electrode pads 13 and 1
4 are formed on the entire surfaces of the first inclined surface 2 and the second inclined surface A3 which form an obtuse angle θ with the optical element disposition surfaces A1 and the back surface A4, respectively, and their widths L2 and L3 are smaller than the distance L5. Opposed at a distance (L5> L2 · sin (π−θ)
+ L3 · sin (π-θ)). That is, the first inclined surface A
2. The second inclined surface A3 is included in one surface layer region of the optical element disposition surface A1 and the back surface A4, and can be regarded as a planar process region on each of these planes.
【0027】これにより、電極の微細パターンの形成は
対向する平面A1,A4に対して行えることから、高精
度プレーナ技術を用いたパターン形成が可能となり、図
5(a)〜(g)に示すとおり、小型で且つ一つの基板
から非常に大量の作製が可能となる。As a result, the fine pattern of the electrode can be formed on the opposing planes A1 and A4, so that the pattern can be formed using the high precision planar technology, as shown in FIGS. 5 (a) to 5 (g). As described above, it is possible to manufacture a very large amount from a single substrate with a small size.
【0028】また、電極パッド13,14の形成は、傾
斜面へ全面ベタで形成できるため、斜面へのパターン形
成に、特に加工精度が要求されることはない。電極パッ
ド12と13,14と15は鈍角で接するため、接続部
での電極層のカバレッジ不足による断線を防止すること
ができる。Further, since the electrode pads 13 and 14 can be formed entirely on the inclined surface, there is no particular need for processing accuracy in pattern formation on the inclined surface. Since the electrode pads 12 and 13 and 14 and 15 are in contact at an obtuse angle, disconnection due to insufficient coverage of the electrode layer at the connection portion can be prevented.
【0029】また、光素子キャリアCと基板Sとの電気
的接続にワイヤリングを不要とすることで、配線の静電
容量の増加やばらつきを極力抑制でき、これにより受光
感度や信頼性に優れた光素子キャリアを提供できる。Further, by eliminating the need for wiring for the electrical connection between the optical element carrier C and the substrate S, an increase or variation in the capacitance of the wiring can be suppressed as much as possible, whereby the light receiving sensitivity and reliability are excellent. An optical element carrier can be provided.
【0030】さらに、L1<L4とすることにより、光
素子キャリアCの転がり方向が制限され、平面A1〜A
4が接地するような方向にのみ回転が抑制されることか
ら実装時の作業性がきわめて良好となる。Further, by setting L1 <L4, the rolling direction of the optical element carrier C is restricted, and the planes A1 to A
Since the rotation is suppressed only in the direction in which the ground 4 is grounded, workability during mounting is extremely good.
【0031】基台1の材質としては、アルミナ,ガラ
ス,窒化アルミ等のセラミックやサファイア,石英等が
好適である。これらの材料は誘電正接が小さいため、高
周波での損失が小さく好ましい。なかでもセラミックは
スルーホールの加工性の点で優れており、本発明に適し
ているといえる。特に、ガラスセラミックは誘電率が最
も低く、光素子キャリア全体の静電容量を下げられるた
め最適である。As the material of the base 1, ceramics such as alumina, glass and aluminum nitride, sapphire, quartz and the like are preferable. Since these materials have a small dielectric loss tangent, loss at high frequencies is small and is preferable. Among them, ceramics are excellent in workability of through holes and can be said to be suitable for the present invention. In particular, glass ceramic is the most suitable since it has the lowest dielectric constant and can reduce the capacitance of the entire optical element carrier.
【0032】また、電極等の導体の材質としては、タン
グステンや銅等が好ましく、電極膜厚は10μm程度と
する。The material of the conductor such as an electrode is preferably tungsten or copper, and the thickness of the electrode is about 10 μm.
【0033】以下、上記光素子キャリアの製造方法の一
例について説明する。Hereinafter, an example of a method for manufacturing the optical element carrier will be described.
【0034】まず、アルミナ,ガラス,バインダー,溶
剤,その他をボールミルで混合し、生と呼ばれる原料の
混合物を形成する。次に、それを搬送ベルト上のドクタ
ーブレードと呼ばれる、細い隙間を通過させることによ
りシート状に加工し、その直後に、赤外線乾燥を行うこ
とによって、図5(a)に示すように、生テープと呼ば
れる、焼結前の基板材20を作製する。First, alumina, glass, a binder, a solvent, and others are mixed in a ball mill to form a raw material mixture called raw. Next, it is processed into a sheet by passing it through a narrow gap called a doctor blade on the conveyor belt, and immediately thereafter, it is subjected to infrared drying to obtain a raw tape as shown in FIG. The substrate material 20 before sintering, called “sintering”, is produced.
【0035】次に、図5(b)に示すように、生テープ
に位置合わせ用の貫通孔20aを打ち抜きで形成し、図
5(c)に示すように、この貫通孔20aに合わせて、
回転式のブレードを用いてU型形状の溝22を多数形成
する。Next, as shown in FIG. 5B, a through hole 20a for positioning is formed in the raw tape by punching, and as shown in FIG. 5C, the through hole 20a is aligned with the through hole 20a.
A large number of U-shaped grooves 22 are formed using a rotary blade.
【0036】その後、図5(d)に示すように、このU
型形状の溝22を含む領域にタングステンメタライズペ
ーストを所望のパターンに印刷し、図5(e)に示すよ
うに、スルーホール24を上記U型形状の溝22を挟ん
で多数形成し、さらに、図5(f)に示すように、この
スルーホール24のメタライズを行う。Thereafter, as shown in FIG.
Tungsten metallized paste is printed in a desired pattern on the region including the mold-shaped groove 22, and as shown in FIG. 5E, a large number of through holes 24 are formed with the U-shaped groove 22 interposed therebetween. As shown in FIG. 5F, metallization of the through hole 24 is performed.
【0037】最後に、図5(g)に示すように、生テー
プを所望の形状に打ち抜いて、焼結し、電極にめっきを
施して、光素子キャリア用基台を完成することができ
る。Finally, as shown in FIG. 5 (g), the raw tape is punched into a desired shape, sintered, and the electrodes are plated to complete the optical element carrier base.
【0038】なお、テープの幅にもよるが、一回の工程
で約10,000個の光素子キャリア用基台を作製することが
可能である。Although it depends on the width of the tape, about 10,000 optical element carrier bases can be manufactured in one process.
【0039】また、焼結前に最終形状に打ち抜きする代
わりに、焼結後に最終形状の切り出しを行うこともでき
る。この場合、セラミック基板上の光素子キャリア1つ
ずつにPIN型フォトダイオード1個のチップ実装と一
カ所のワイヤリングを行い、その各工程を個数分だけ複
数回繰り返し、複数個のフォトダイオードが実装された
基板を形成する。これにより、光素子キャリアへの光素
子実装の生産性が著しく向上させることができる。Instead of punching out the final shape before sintering, the final shape can be cut out after sintering. In this case, one PIN-type photodiode is mounted on a chip on each of the optical element carriers on the ceramic substrate and wiring is performed at one location, and each step is repeated a plurality of times, and a plurality of photodiodes are mounted. The formed substrate is formed. As a result, the productivity of mounting an optical element on an optical element carrier can be significantly improved.
【0040】その後、フォトダイオードが実装された基
板を切断し、複数のフォトダイオード実装済みの光素子
キャリアを取り出し、受光面が地に対し垂直になるよう
に素子を90゜回転させることのできるマウンターを用
いて整列させ、基板Sに実装する。Thereafter, the substrate on which the photodiodes are mounted is cut, a plurality of optical element carriers on which the photodiodes are mounted are taken out, and a mounter capable of rotating the elements by 90 ° so that the light receiving surface is perpendicular to the ground. And mounted on the substrate S.
【0041】[0041]
【実施例】次に、さらに具体的な実施例について説明す
る。Next, more specific examples will be described.
【0042】まず、基台1に、誘電率9.0のアルミナ
セラミックを用いた。基台の外形は図2に示すような形
状で、L1=0.6mm、L2=0.14mm、L3=
0.14mm、L4=0.9mm、L5=0.6mm、
奥行き(L1+L2)は約0.7mmに設計した。First, the base 1 was made of alumina ceramic having a dielectric constant of 9.0. The outer shape of the base is as shown in FIG. 2, where L1 = 0.6 mm, L2 = 0.14 mm, L3 =
0.14 mm, L4 = 0.9 mm, L5 = 0.6 mm,
The depth (L1 + L2) was designed to be about 0.7 mm.
【0043】また、光素子を搭載する電極パッド11は
0.5mm角で、ほぼPIN型フォトダイオード2のサ
イズと同程度である。電極パッド12は電極パッド11
との間隔0.05mm,電極幅0.15mmとした。ス
ルーホール導体16の径は0.2mmφとした。また、
電極層はトータル膜厚約2μmのAuメタライズ膜およ
び電極パッド11の一部にはトータル膜厚2μmのAu
Sn半田を用いた。The size of the electrode pad 11 on which the optical element is mounted is 0.5 mm square, which is almost the same as the size of the PIN photodiode 2. The electrode pad 12 is the electrode pad 11
, And the electrode width was 0.15 mm. The diameter of the through-hole conductor 16 was 0.2 mmφ. Also,
The electrode layer is made of an Au metallized film having a total thickness of about 2 μm and a part of the electrode pad 11 is made of Au having a total thickness of 2 μm.
Sn solder was used.
【0044】光素子キャリアの作製方法は、バインダー
でシート状に成形されたセラミック粉体に電極パターン
とスルーホール電極を転写し、高温で焼結させることに
より、両面に電極パターンが形成された約10cm角の
セラミック基板の中に約10000個の光素子キャリア
用基台を形成した。An optical element carrier is manufactured by transferring an electrode pattern and a through-hole electrode to a ceramic powder formed into a sheet with a binder and sintering at a high temperature to form an electrode pattern on both surfaces. About 10,000 optical element carrier bases were formed in a 10 cm square ceramic substrate.
【0045】次に、セラミック基板上の光素子キャリア
用基台の1つずつにPIN型フォトダイオード1個のチ
ップ実装と、一カ所のワイヤリングを行い、その各工程
を個数分だけ複数回繰り返し、複数個のフォトダイオー
ドが実装された基板を形成した。これにより、光素子キ
ャリア用基台への光素子実装の生産性が著しく向上し
た。Next, one PIN-type photodiode is mounted on each of the optical element carrier bases on the ceramic substrate, and wiring is performed at one location, and each step is repeated a plurality of times by the number of times. A substrate on which a plurality of photodiodes were mounted was formed. As a result, the productivity of mounting the optical element on the optical element carrier base has been significantly improved.
【0046】その後、フォトダイオードが実装された基
板をブレーキング用の溝から切断し、複数のフォトダイ
オード実装済みの光素子キャリアを取り出した。そし
て、受光面が地に対し垂直になるように素子を90゜回
転させることのできるマウンターを用いて整列させ、基
板Sに実装した。Thereafter, the substrate on which the photodiode was mounted was cut from the groove for braking, and a plurality of optical element carriers on which the photodiode was mounted were taken out. Then, the elements were aligned using a mounter capable of rotating the elements by 90 ° so that the light receiving surface was perpendicular to the ground, and mounted on the substrate S.
【0047】基板Sはセラミックインジェクションモー
ルドで作製したことにより、光ファイバと光素子キャリ
ア各実装用の溝の相対的な位置関係を30μm以内の精
度にすることができた。これにより、光ファイバと光素
子との良好な光結合が得られた。Since the substrate S was manufactured by the ceramic injection mold, the relative positional relationship between the optical fiber and the groove for mounting each of the optical element carriers could be set to an accuracy within 30 μm. Thereby, good optical coupling between the optical fiber and the optical element was obtained.
【0048】また、基板S上にフォトダイオードのプリ
アンプを実装した。これにより、光素子キャリアまでの
配線長を約1mmと短くでき、さらに小型の光素子キャ
リアを用いたことにより、フォトダイオードまでの配線
容量(電極パッド11,12間の容量)を0.05pF
以下に抑制できた。Further, a photodiode preamplifier was mounted on the substrate S. As a result, the wiring length to the optical element carrier can be shortened to about 1 mm, and the wiring capacitance to the photodiode (the capacitance between the electrode pads 11 and 12) is reduced to 0.05 pF by using a small optical element carrier.
It could be suppressed below.
【0049】[0049]
【発明の効果】本発明の光素子キャリア及びその実装構
造によれば、以下に示す顕著な効果を奏することができ
る。According to the optical element carrier and its mounting structure of the present invention, the following remarkable effects can be obtained.
【0050】・一枚の平板基板より光素子キャリアを大
量に生産することが可能であり、量産性が極めて良好と
なる。The optical element carrier can be mass-produced from one flat substrate, and the mass productivity is extremely good.
【0051】・一括処理で行うことができ、製造工程途
中でのハンドリング等、作業の煩雑さがない。It can be performed in a batch process, and there is no complicated operation such as handling during the manufacturing process.
【0052】・基板状態もしくは工程終了(ブレーキン
グ)後の整列状態で光素子の実装が可能であり、実装の
作業性が良好となる ・小型化が容易であり、この小型化により光素子キャリ
ア全体の容量が下がることから高速動作に好適である。The optical element can be mounted in the state of the substrate or in the aligned state after the end of the process (braking), and the workability of the mounting is improved. The downsizing is easy, and the downsizing is easy. Since the whole capacity is reduced, it is suitable for high-speed operation.
【0053】・光素子キャリアからのワイヤリングの必
要がないため、電気的には容量を大幅に低減する効果が
あり、さらに高速動作に適している上、実装効率が良好
となる。Since there is no need for wiring from the optical element carrier, there is an effect of greatly reducing the electric capacity, and it is suitable for high-speed operation and the mounting efficiency is improved.
【0054】・光素子の受光面での反射を抑制するため
に用いられる受光面の傾斜配置において、その傾斜角度
を自由度高く設計できるため、低反射でかつ受光感度を
良好にすることができる。In the inclined arrangement of the light receiving surface used for suppressing the reflection on the light receiving surface of the optical element, the inclination angle can be designed to have a high degree of freedom, so that it is possible to achieve low reflection and good light receiving sensitivity. .
【0055】そして、以上の効果により、低コスト、小
型、高周波特性に優れ、さらに量産性が著しく向上した
光素子キャリア及びその実装構造を提供することが可能
になる。With the above-described effects, it is possible to provide an optical element carrier having a low cost, a small size, an excellent high-frequency characteristic and a remarkably improved mass productivity, and a mounting structure thereof.
【図1】本発明に係る光素子キャリアの実装構造(光モ
ジュール)を説明する図であり、(a)は平面図、
(b)は(a)におけるA−A線断面図である。FIG. 1 is a view for explaining a mounting structure (optical module) of an optical element carrier according to the present invention, wherein (a) is a plan view,
(B) is a sectional view taken along line AA in (a).
【図2】本発明に係る光素子キャリア用基台を示す斜視
図である。FIG. 2 is a perspective view showing an optical element carrier base according to the present invention.
【図3】本発明に係る光素子キャリアを示す斜視図であ
る。FIG. 3 is a perspective view showing an optical element carrier according to the present invention.
【図4】図1(b)のB部拡大図である。FIG. 4 is an enlarged view of a portion B in FIG. 1 (b).
【図5】本発明に係る光素子キャリアの製造方法を説明
する図であり、(a)〜(g)はそれぞれ断面図を示
す。FIGS. 5A to 5G are diagrams illustrating a method for manufacturing an optical element carrier according to the present invention, wherein FIGS.
【図6】従来の光素子キャリア用基台を示す斜視図であ
る。FIG. 6 is a perspective view showing a conventional optical element carrier base.
【図7】従来の光素子キャリアを示す斜視図である。FIG. 7 is a perspective view showing a conventional optical element carrier.
【図8】従来の光素子キャリアを基板上に載置した一例
を説明する図であり、(a)は正面側一部断面図、
(b)は平面図、(c)は側面側一部断面図である。8A and 8B are diagrams illustrating an example in which a conventional optical element carrier is mounted on a substrate, wherein FIG.
(B) is a plan view, and (c) is a partial cross-sectional view on a side surface.
1:基台 2:光素子(フォトダイオード) 3:第1電極パターン(第1導体パターン) 4:第2電極パターン(第2導体パターン) 5:光ファイバ(光導波体) 11〜15:電極パッド(駆動用導体) 16:スルーホール導体 21:受光面側電極 22:裏面電極 A1:光素子実装面 A2:第1傾斜面 A3:第2傾斜面 A4:背面 C:光素子キャリア H:スルーホール M:光モジュール S:基板 1: base 2: optical element (photodiode) 3: first electrode pattern (first conductor pattern) 4: second electrode pattern (second conductor pattern) 5: optical fiber (optical waveguide) 11 to 15: electrode Pad (driving conductor) 16: Through-hole conductor 21: Light receiving surface side electrode 22: Back surface electrode A1: Optical element mounting surface A2: First inclined surface A3: Second inclined surface A4: Back surface C: Optical element carrier H: Through Hall M: Optical module S: Substrate
Claims (2)
ャリアであって、前記基台は、光素子が配設される光素
子配設面と、該光素子配設面に対し鈍角を成し前記基台
を立設させる際に下面側となる第1傾斜面と、前記光素
子配設面と対向する背面と、該背面に対し鈍角を成し前
記基台を立設させる場合に下面側となる第2傾斜面と、
前記光素子配設面と前記背面の間に形成したスルーホー
ルとを有し、前記光素子の駆動用導体が、前記光素子配
設面から前記第1傾斜面に到る領域と、前記光素子配設
面から前記スルーホールを通じ前記背面を経て前記第2
斜面に到る領域とに形成されていることを特徴とする光
素子キャリア。1. An optical element carrier comprising an optical element provided on a base, wherein the base has an optical element mounting surface on which the optical element is mounted, and an optical element mounting surface provided on the optical element mounting surface. A first inclined surface that forms an obtuse angle and becomes a lower surface side when the base is erected, a back surface facing the optical element disposition surface, and an obtuse angle with respect to the back surface, and the base is erected. A second inclined surface which is a lower surface side in the case of
An optical element having a through hole formed between the optical element mounting surface and the rear surface, wherein a driving conductor of the optical element extends from the optical element mounting surface to the first inclined surface; From the element mounting surface through the through hole to the second
An optical element carrier formed in a region reaching a slope.
成された基板上に、請求項1に記載の光素子キャリアを
固定するようにした光素子キャリアの実装構造であっ
て、前記基板上に前記2つの導体パターンの各々一部が
形成された2つの斜面を有する凹部を設け、該凹部の2
つの斜面に前記光素子キャリアの第1及び第2斜面を合
わせ、前記光素子の駆動用導体と前記凹部の導体パター
ンとを接続するようにしたことを特徴とする光素子キャ
リアの実装構造。2. The mounting structure of an optical element carrier according to claim 1, wherein the optical element carrier according to claim 1 is fixed on a substrate on which two conductor patterns for driving an optical element are formed. A concave portion having two inclined surfaces on which a part of each of the two conductor patterns is formed, and
A mounting structure for an optical element carrier, wherein the first and second slopes of the optical element carrier are aligned with two slopes, and the driving conductor of the optical element is connected to the conductor pattern of the recess.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18582199A JP3723698B2 (en) | 1999-06-30 | 1999-06-30 | Optical element carrier and its mounting structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18582199A JP3723698B2 (en) | 1999-06-30 | 1999-06-30 | Optical element carrier and its mounting structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001015773A true JP2001015773A (en) | 2001-01-19 |
| JP3723698B2 JP3723698B2 (en) | 2005-12-07 |
Family
ID=16177477
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18582199A Expired - Lifetime JP3723698B2 (en) | 1999-06-30 | 1999-06-30 | Optical element carrier and its mounting structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3723698B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005165165A (en) * | 2003-12-05 | 2005-06-23 | Suzuka Fuji Xerox Co Ltd | Receptacle and method for manufacturing the same |
| JPWO2004082036A1 (en) * | 2003-03-10 | 2006-06-15 | 豊田合成株式会社 | Solid element device and manufacturing method thereof |
| US7497597B2 (en) | 2004-01-19 | 2009-03-03 | Toyoda Gosei Co., Ltd. | Light emitting apparatus |
| US7824937B2 (en) | 2003-03-10 | 2010-11-02 | Toyoda Gosei Co., Ltd. | Solid element device and method for manufacturing the same |
| JP2011114172A (en) * | 2009-11-27 | 2011-06-09 | Kyocera Corp | Substrate for mounting light-emitting element and light-emitting device |
| WO2012008530A1 (en) * | 2010-07-15 | 2012-01-19 | 矢崎総業株式会社 | Optical communication module |
-
1999
- 1999-06-30 JP JP18582199A patent/JP3723698B2/en not_active Expired - Lifetime
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2004082036A1 (en) * | 2003-03-10 | 2006-06-15 | 豊田合成株式会社 | Solid element device and manufacturing method thereof |
| US7824937B2 (en) | 2003-03-10 | 2010-11-02 | Toyoda Gosei Co., Ltd. | Solid element device and method for manufacturing the same |
| US8154047B2 (en) | 2003-03-10 | 2012-04-10 | Toyoda Gosei Co., Ltd. | Solid element device and method for manufacturing the same |
| US8685766B2 (en) | 2003-03-10 | 2014-04-01 | Toyoda Gosei Co., Ltd. | Solid element device and method for manufacturing the same |
| JP2005165165A (en) * | 2003-12-05 | 2005-06-23 | Suzuka Fuji Xerox Co Ltd | Receptacle and method for manufacturing the same |
| US7497597B2 (en) | 2004-01-19 | 2009-03-03 | Toyoda Gosei Co., Ltd. | Light emitting apparatus |
| JP2011114172A (en) * | 2009-11-27 | 2011-06-09 | Kyocera Corp | Substrate for mounting light-emitting element and light-emitting device |
| WO2012008530A1 (en) * | 2010-07-15 | 2012-01-19 | 矢崎総業株式会社 | Optical communication module |
| JP2012023218A (en) * | 2010-07-15 | 2012-02-02 | Yazaki Corp | Optical communication module |
| US8885990B2 (en) | 2010-07-15 | 2014-11-11 | Yazaki Corporation | Optical communication module |
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| Publication number | Publication date |
|---|---|
| JP3723698B2 (en) | 2005-12-07 |
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