JP2001151597A - Method of producing silicon water free from agglomerate of point defects - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of producing a silicon water free from agglomerates of point defects, by which an IG effect is obtained even when the concentration of oxygen is >=1.2×1018 atom/cm3 (former ASTM). SOLUTION: When an area adjacent to an area [I] where interstitial silicon- type defects are predominantly present, belonging to a perfect are [P] free from agglomerates of the point defects, and containing interstitial silicon in a concentration of less than the minimum interstitial silicon concentration capable of forming an interstitial dislocation is defined as [PI] and when an area adjacent to an area [V] where hole-type point defects are predominantly present, belonging to the perfect are [P] mentioned above, and containing vacancy in a concentration of not more than the vacancy concentration capable of forming COP or EPD is defined as [Pv], an ingot constituted of at least either the area [Pv] or the area [PI] and containing oxygen in an amount of >=1.2×1018 atom-cm3 (former ASTM) is pulled up. Thereafter, a wafer cut out from the ingot is heated with a temperature raising rate of 5 to 50 deg.C/min to 900 to 1,200 deg.C from the room temperature under a hydrogen or an argon atmosphere and then kept for 5 to 120 min.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a silicon wafer free of point defect aggregates by the Czochralski method (hereinafter referred to as CZ method). More specifically, intrinsic gettering (hereinafter I
G) A method for manufacturing a silicon wafer for a semiconductor integrated circuit having a source.

[0002]

2. Description of the Related Art In recent years, in the process of manufacturing a semiconductor integrated circuit, an oxidation-induced stacking fault (hereinafter referred to as OSF) is a cause of lowering the yield.
That. ) Nuclei of oxygen precipitates and microcrystalline particles (Crystal Originated Particl
e, hereinafter referred to as COP. ) Or interstitial dislocations (Int
erstitial-type Large Dislocation, hereinafter referred to as LD. ). OSF introduces minute defects serving as nuclei during crystal growth, becomes apparent in a thermal oxidation step or the like when manufacturing a semiconductor device, and causes defects such as an increase in leak current of the manufactured device. Also COP
Are pits caused by crystals that appear on the wafer surface when the mirror-polished silicon wafer is washed with a mixed solution of ammonia and hydrogen peroxide. When this wafer is measured with a particle counter, these pits are also detected as light scattering defects together with the original particles. This C
OP is an electrical characteristic, for example, a time-dependent dielectric breakdown characteristic (Time Dependent dielectric Breakdown, TDD) of an oxide film.
B), oxide film breakdown voltage characteristics (Time Zero Dielectric Breakdo
wn, TZDB) and the like. Also COP
Is present on the wafer surface, a step is generated in a device wiring process, which may cause disconnection. This also causes a leak and the like in the element isolation portion, and lowers the product yield. Furthermore, LD is also called a dislocation cluster,
Alternatively, when a silicon wafer having this defect is immersed in a selective etching solution containing hydrofluoric acid as a main component, a pit is generated, and thus the silicon wafer is also called a dislocation pit. This LD also causes deterioration of electrical characteristics such as leak characteristics and isolation characteristics.

[0003] From the above, OSF, CO, etc. can be obtained from a silicon wafer used for manufacturing a semiconductor integrated circuit.
There is a need to reduce P and LD. A defect-free silicon wafer having no OSF, COP and LD is disclosed in JP-A-11-1393. This defect-free silicon wafer has a perfect region [P] when a perfect region in which no aggregate of vacancy type point defects and no aggregate of interstitial silicon type point defects are present in a silicon single crystal ingot is defined as [P]. P] is a silicon wafer cut from the ingot. The perfect region [P] is located between the region [I] where interstitial silicon type point defects predominantly exist and the region [V] where vacancy type point defects predominantly exist in the silicon single crystal ingot. Intervene. This perfect area [P]
In the silicon wafer made of, the pulling speed of the ingot is V (mm / min), and the temperature gradient in the vertical direction of the ingot near the interface between the silicon melt and the ingot is G.
(° C./mm), V / G (mm ² / min · ° C.) is determined so that the OSF generated in a ring shape during the thermal oxidation treatment disappears at the center of the wafer. .

On the other hand, some semiconductor device manufacturers include:
There is a need for a silicon wafer that has no OSF, COP, and LD, and that has the ability to getter metal contamination generated in the device process. If the wafer does not have sufficient gettering ability, contamination with metal in the device process causes junction leakage, device operation failure due to trap levels due to metal impurities, and the like, thereby lowering product yield. Although the silicon wafer cut from the ingot consisting of the perfect region [P] does not have the OSF, the COP, and the LD, in the heat treatment of the device process, oxygen precipitation does not necessarily occur uniformly in the wafer surface, thereby causing The IG effect may not be sufficiently obtained. The V / G value for producing a silicon wafer composed of the perfect region [P] is proportional to the pulling speed V of the ingot when the temperature gradient G is constant, and the ingot is pulled at a relatively low speed controlled in a narrow range. However, it is not always technically easy to satisfy this requirement, and ingot productivity is not high.

In order to solve this problem, in the defect distribution diagram in which the value of V / G is the vertical axis and the distance D from the center of the crystal to the periphery of the crystal is the horizontal axis, the N region outside the OSF ring (the Of the [P] region of the present invention), the N ₂ (V) region (corresponding to the [P _V ] region of the present invention) with a large amount of oxygen precipitates is pulled up or N ₂ inside and outside the OSF ring including the OSF ring region.
_A method of pulling a silicon single crystal in the ₁ (V) region and the N ₂ (V) region has been proposed (JP-A-11-15799).
6). According to this method, under easy-to-control production conditions,
A silicon wafer having neither a region [I] nor a region [V], an extremely low defect density over the entire crystal surface, and a gettering (IG) ability by oxygen precipitation is manufactured while maintaining high productivity. be able to.

[0006]

However, in the method of manufacturing a silicon single crystal described in Japanese Patent Application Laid-Open No. H11-157996, the growth of OSF nuclei is inhibited when the OSF is thermally oxidized in the state of a silicon wafer. Therefore, the oxygen concentration in the grown crystal was set to 24 ppma (ASTM '79).
Value) [about 1.2 × 10 ¹⁸ atoms / cm ³ (old AST
M)], or the thermal history must be controlled so that the time of passing through the temperature range from 1050 ° C. to 850 ° C. in the grown crystal is 140 minutes or less. was there.

An object of the present invention, the area [P _V] or the region [P _I] one or the oxygen concentration comprised from both of 1.2 × 10 ¹⁸ atoms / cm ³ changes from (old ASTM) or more ingots It is an object of the present invention to provide a method of manufacturing a silicon wafer that can provide an IG effect and does not have any point defect aggregates even with the silicon wafer issued.
Another object of the present invention is to provide a method using the region [OSF] and the region [P _V ].
Oxygen concentration consisting of a mixed region of 1.2 × 10 ¹⁸ atoms
Even if the silicon wafer is cut from an ingot of s / cm ³ (former ASTM) or more, a method for manufacturing a silicon wafer that can obtain a uniform IG effect within the wafer surface and is free from point defect aggregates. To provide. Still another object of the present invention is to provide a method of manufacturing a silicon wafer without requiring oxygen donor killer treatment and free of point defect aggregates.

[0008]

The invention according to claim 1 is
The region where interstitial silicon type point defects predominantly exist in a silicon single crystal ingot is [I], the region where vacancy type point defects predominantly exist is [V], and the interstitial silicon type point defects are Production of a silicon wafer free of point defect aggregates cut out from an ingot consisting of the perfect region [P], where the perfect region where no aggregates and no void type point defect aggregates are present is [P]. It is an improvement of the method. The characteristic configuration is such that a region adjacent to the region [I] and belonging to the perfect region [P] and having a lower interstitial silicon concentration lower than the minimum interstitial silicon concentration capable of forming an interstitial dislocation is referred to as [P _I ], When the region adjacent to the perfect region [P] and having a vacancy concentration below the vacancy concentration capable of forming a COP or FPD is [P _V ], one of the region [P _V ] or the region [P _I ] One or both and the oxygen concentration is 1.2 × 10 ¹⁸ atoms / cm
³ A silicon single crystal ingot of (former ASTM) or higher is pulled up, and a silicon wafer cut from this ingot is heated from room temperature to 900 in a hydrogen or argon gas atmosphere.
Heating up to 1200 ° C at a heating rate of 5-50 ° C / min,
The first stage heat treatment is performed for 5 to 120 minutes.

According to a fourth aspect of the present invention, when an OSF region belonging to the region [V] and generated when a silicon single crystal ingot is subjected to thermal oxidation in a state of a silicon wafer is defined as [OSF], This is an improvement in a method of manufacturing a silicon wafer free of point defect aggregates cut out from an ingot including a perfect region [P] including [OSF]. The characteristic configuration is described in the above area [OSF]
And made from the area [P _V] and the oxygen concentration is 1.2 ×
A silicon single crystal ingot of 10 ¹⁸ atoms / cm ³ (former ASTM) or more is pulled up, and a silicon wafer cut from this ingot is heated to 5 to 50 ° C. from room temperature to 900 to 1200 ° C. in a hydrogen or argon gas atmosphere.
The first stage heat treatment is performed by heating at a heating rate of 1 minute and holding for 5 to 120 minutes.

In the invention according to claim 1 or 4,
The oxygen concentration of ngot is 1.2 × 10 ¹⁸atoms / cm
^Three(Former ASTM) silicon wafers
Area [P_V] Or area [P_I] From either one or both
Or the region [OSF] and the region [P_V]
The silicon wafer cut from this ingot
When the wafer is heat-treated under the above conditions, oxygen outside the wafer
Oxygen precipitate nuclei introduced during crystal growth due to the
OSF nuclei shrink or disappear near the wafer surface,
Denuded zone (Denuded Zo)
ne, hereinafter referred to as a DZ layer. ) Is formed. Also way
C. Oxygen concentration is 1.2 × in the wafer inside from near the surface.
10¹⁸atoms / cm^Three(Old ASTM)
Oxygen precipitates (Bulk Micro Defect,
Hereinafter, it is called BMD. ) Occurs and has an IG effect
Swell.

In the invention according to claim 2 or 5, after the first stage heat treatment according to claim 1 or 4, the silicon wafer is heated from room temperature to 500 to 800 ° C. in a nitrogen or oxidizing atmosphere. 750 to 1100
To a temperature of 10 to 50 ° C./min.
This is a method of performing a second-stage heat treatment for holding for a time. Further, in the invention according to claim 3, after performing the first-stage heat treatment according to claim 1, the silicon wafer is introduced into a furnace at room temperature to 400 to 700 ° C. in a nitrogen or oxidizing atmosphere to 800 ° C.
This is a method in which a second stage heat treatment is performed in which heating is performed at a heating rate of 0.5 to 10 ° C./min to 〜1100 ° C. and maintained for 0.5 to 40 hours. By performing the second-stage heat treatment under the above conditions, the BMD density of the wafer formed by the first-stage heat treatment increases,
The distribution of the BMD density in the wafer surface becomes uniform.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The silicon wafer of the present invention has a C
After the ingot is pulled up from the silicon melt in the hot zone furnace by the Z method with a predetermined pulling speed profile based on Voronkov's theory, the ingot is sliced. Generally, when a silicon single crystal ingot is pulled up from a silicon melt in a hot zone furnace by the CZ method, point defects and agglomerates: Defects). Point defects have two general forms: vacancy type point defects and interstitial silicon type point defects. A vacancy-type point defect is one in which one silicon atom has separated from one of the normal positions in the silicon crystal lattice. Such holes become hole type point defects. On the other hand, if an atom is found at a position (interstitial site) other than the lattice point of the silicon crystal, this becomes an interstitial silicon point defect.

[0013] Point defects are generally introduced at the interface between the silicon melt (molten silicon) and the ingot (solid silicon). However, by continuously pulling up the ingot, the portion that was the contact surface starts to cool down with pulling up. During cooling, vacancy-type point defects or interstitial silicon-type point defects merge with each other by diffusion to form vacancy agglomerates or interstitial agglomerates. Is formed. In other words, the aggregate is a three-dimensional structure generated due to the merging of point defects. Aggregates of vacancy-type point defects are LSTDs (Laser Scattering Tomograms) in addition to the COPs described above.
An agglomerate of interstitial silicon-type point defects includes a defect called an LD, which includes a defect called an aph defect or an FPD (Flow Pattern Defects). FPD stands for Secco etching, a silicon wafer manufactured by slicing an ingot without stirring for 30 minutes.
(K ₂ Cr ₂ O ₇ : 50% HF: pure water = 44 g: 2000 cc: 1000 cc)
Is a source of traces exhibiting a unique flow pattern that appears when etching is performed using a mixed solution of LSTD.
It is a source that has a refractive index different from that of silicon and generates scattered light when a silicon single crystal is irradiated with infrared rays.

[0014] Boronkov's theory states that the number of defects is small and high.
Raising the ingot to grow a pure ingot
V (mm / min), the ingot and silicon melt
The temperature gradient in the ingot near the interface is G (° C / mm)
V / G (mm^Two/ Min / ℃)
It is. In this theory, as shown in FIG.
On the horizontal axis, vacancy-type point defect concentration and interstitial silicon-type point
V / G and point defect density are plotted on the same vertical axis for defect density.
The relationship between vacancy region and interstitial silicon
Explain that the boundaries of the area are determined by V / G
I have. More specifically, when the V / G ratio is above the critical point,
While an ingot having a predominant point defect density is formed, V /
When the G ratio is below the critical point, the interstitial silicon-type point defect concentration is excellent.
A vigorous ingot is formed. In FIG. 1A, [I]
Is mainly dominated by interstitial silicon type point defects.
Region where point defects of recon type exist ((V / G)₁Below)
However, [V] is dominated by vacancy type point defects in the ingot.
In the region where the aggregate of vacancy type point defects exists ((V /
G)_Two[P] is an aggregate of vacancy type point defects and
Aggregates free of interstitial silicon-type point defects
Area ((V / G) ₁~ (V / G)_Two). Area [P]
The region [V] adjacent to the region [V]
SF] ((V / G)_Two~ (V / G)_Three) Exists.

The perfect area [P] is further classified into an area [P _I ] and an area [P _V ]. [P _I ] is V / G
The ratio is from (V / G) ₁ to the critical point,
[P _V ] is a region where the V / G ratio is from the critical point to the above (V / G) ₂ . That is, [P _I ] is a region adjacent to the region [I] and having an interstitial silicon type point defect concentration lower than the lowest interstitial silicon type point defect concentration capable of forming an interstitial dislocation, and [P _V] ] Is a region adjacent to the region [V] and having a vacancy-type point defect concentration lower than the lowest vacancy-type point defect concentration capable of forming an OSF.

[0016] The predetermined pulling speed profile of the invention according to claim 1 or 3 of the present invention is such that when the ingot is pulled up from the silicon melt in the hot zone furnace, the ratio of the pulling speed to the temperature gradient (V / G) is determined by the lattice distance. Preventing the generation of silicon type point defect aggregates (V / G) ₁ or more,
Aggregates of vacancy-type point defects are limited to a region in the center of the ingot where vacancy-type point defects predominantly exist (V / G) ₂
It is determined to be maintained below. Claim 2 of the present application
The predetermined pulling speed profile of the invention according to
Is equal to or higher than the critical point and maintained at (V / G) ₂ or lower. Further, the predetermined pulling speed profile of the invention according to claim 4 of the present application is determined such that V / G is equal to or higher than the critical point and equal to or lower than (V / G) ₃ .

The pulling speed profile is determined by simulating the reference ingot in the axial direction experimentally or by combining these techniques, based on the above-mentioned Boronkov theory by simulation. That is, this determination is made by slicing the ingot sliced in the axial direction in the transverse direction after the simulation, confirming it in a wafer state, and repeating the simulation. For the simulation, a plurality of kinds of pulling speeds are determined within a predetermined range, and a plurality of reference ingots are grown. That is, as shown in FIG. 1E, sectional views of the ingot when the pulling speed is gradually reduced from 1.2 mm / min to 0.4 mm / min to continuously reduce V / G are shown in FIGS. 1B, 1C and 1C. Each is shown in FIG. 1D.
The horizontal axis in each figure is drawn corresponding to the horizontal axis (V / G) in FIG. 1A. FIG. 1B is a conceptual diagram by an X-ray topograph after heat-treating the ingot in an N ₂ atmosphere at 1000 ° C. for 40 hours. In this figure, the region [V], the region [OSF], the region [P _V ], the region [P _I ], and the region [I] appear as the pulling speed decreases. FIG. 1C
Is three ingots immediately after being pulled (as-grown)
It is a defect distribution figure of the crystal at the time of seco etching for 0 minutes. In this figure, COP, F
PD appears, and LD appears in a region corresponding to the above [I]. FIG. 1D further shows that the ingot was placed under a wet O ₂ atmosphere.
FIG. 3 is a crystal defect distribution diagram when heat-treated at 1100 ° C. for 1 hour and then subjected to secco etching for 2 minutes. In this figure, OS
F appears.

In FIG. 2 corresponding to FIG. 1B, silicon wafers W ₁ , W ₂ , W ₃ and W ₄ when the ingot is sliced at four locations are shown in FIGS. 3A, 3B and 3 respectively.
C and FIG. 3D. Wafer W ₁ is the area [OSF] to form an OSF nuclei in the center, the area around it [P _V]
Exists. All wafer W ₂ is is an area [P _V]. Wafer W ₃ being area in the heart [P _V] is, there is a region [P _I] around its periphery. All wafer W ₄ is is an area [P _I]. Aggregates of point defects such as COP and LD may show different values of detection sensitivity and detection lower limit depending on the detection method. Therefore, in this specification,
The meaning of "there is no aggregate of point defects" means that the product of the observation area and the etching allowance is observed as the inspection volume by an optical microscope after subjecting a mirror-finished silicon single crystal to non-stirring seco etching. The lower limit of detection is when one defect of each aggregate of a flow pattern (vacancy type defect) and dislocation cluster (interstitial silicon type point defect) is detected in an inspection volume of 1 × 10 ⁻³ cm ^3. The value (1 × 10 ³ / cm ³ ) means that the number of point defect aggregates is equal to or less than the lower limit of detection.

The silicon wafer of the present invention is any one of the above-mentioned wafers W ₁ , W ₂ , W ₃ and W ₄ and has an initial oxygen concentration of 1.2 × 10 ¹⁸ atoms / cm ³ (former ASTM). It is necessary to be above. For this reason, the ingot before being cut into a silicon wafer has an oxygen concentration of 1.2 × 10 ¹⁸ atoms / cm ³ (former AST
M) or more. This is to IG wafer to the wafer W ₁ to _W-4 to thereby generate a desired density over BMD wafer W ₁ to _W-4 by the first stage heat treatment.

Next, the first-stage heat treatment and the second-stage heat treatment of the silicon wafer will be described. (a) a first stage heat treatment of the first stage heat treatment the wafer W ₁ to _W-4 (claim 4 and claim 1), 900 to 1200 ° C. from room wafers W ₁ to _W-4 in hydrogen or an argon gas atmosphere Up to 5-50 ° C
/ Min and heating for 5 to 120 minutes. The heat treatment atmosphere is made to be a non-oxidizing hydrogen or argon gas atmosphere by shrinking or eliminating oxygen precipitate nuclei or OSF nuclei introduced during crystal growth due to the outward diffusion effect of oxygen in the wafer near the wafer surface, DZ layer (width about 1-5μ)
m). When the heating rate exceeds 50 ° C./min and the holding temperature is less than 900 ° C. or the holding time is less than 5 minutes, oxygen precipitation nuclei introduced during crystal growth due to a low oxygen outward diffusion effect or OSF nucleus does not shrink,
The DZ layer cannot be formed sufficiently in the depth direction on the wafer surface. Also, the BMD density required to exhibit the IG effect inside the wafer cannot be obtained. On the other hand, when the heating rate is 5
When the holding temperature is lower than 1200 ° C. and the holding temperature exceeds 1200 ° C., the thermal durability of the furnace and the board material and the productivity of the heat treatment decrease. The first stage heat treatment is performed from room temperature to 1000 to 1200.
To 10 ° C / min at a heating rate of 10 to 40 ° C / min.
It is preferable to hold for 0 minutes.

(B) Second-stage heat treatment It is preferable to perform the second-stage heat treatment on the wafers W _{1 to} W ₄ that have been subjected to the first-stage heat treatment, because the BMD density increases and the IG effect is further enhanced. The second-stage heat treatment of the wafers W ₁ and W ₂ (claims 5 and 2) is performed by the wafer W ₁
500 and W ₂ from room temperature under a nitrogen or oxidizing atmosphere
Introduced into a furnace at 800 ° C to 10 to 750 to 1100 ° C
It is performed by heating at a heating rate of 〜50 ° C./min and holding for 4 to 48 hours. The reason why the heat treatment atmosphere is a nitrogen or oxidizing atmosphere is to further increase the density of the BMD formed in the first heat treatment. When the rate of temperature rise exceeds 50 ° C./min and the holding temperature is less than 750 ° C. or the holding time is less than 4 hours, it is difficult to sufficiently increase the BMD. On the other hand, if the heating rate is less than 10 ° C./min and the holding temperature exceeds 1100 ° C., or the holding time exceeds 48 hours, the productivity of the heat treatment decreases. In this case, the second-stage heat treatment is preferably performed by introducing into a furnace at room temperature to 600 to 800 ° C., heating from 800 to 1000 ° C. at a heating rate of 10 to 40 ° C./min, and holding for 6 to 40 hours. .

In the second stage heat treatment of the wafers W ₃ and W ₄ (claim 3), after the first stage heat treatment of the wafers W ₃ and W ₄ , the silicon wafer is heated from room temperature to 400 ° C. in a nitrogen or oxidizing atmosphere. ~ 700 ° C in furnace and 800 ~
The heating is performed by heating to 1100 ° C. at a temperature increasing rate of 0.5 to 10 ° C./min and holding for 0.5 to 40 hours. The reason why the heat treatment atmosphere is a nitrogen or oxidizing atmosphere is the same as the above. If the temperature rise rate exceeds 10 ° C./min and the holding temperature is less than 800 ° C. or the holding time is less than 0.5 hour, it becomes difficult to form BMD uniformly in the wafer surface. On the other hand, if the heating rate is less than 0.5 ° C./min,
If the holding temperature exceeds 1100 ° C. or the holding time exceeds 40 hours, the productivity of the heat treatment decreases. In this case, the second stage heat treatment is performed at room temperature to 300 to 60.
Introduced into a furnace at 0 ° C, 1-3 ° C up to 900-1000 ° C
/ Min and preferably maintained for 1 to 12 hours. By performing the first-stage heat treatment, the oxygen donor killer treatment in the wafer process becomes unnecessary.

[0023]

Next, examples of the present invention will be described together with comparative examples. <Example 1> Diameter 6 using a silicon single crystal pulling apparatus
An inch of boron (B) doped p-type silicon ingot was pulled up. This ingot has a straight body length of 600 mm, a crystal orientation of (100), and a resistivity of 1 to 15
Ωcm, oxygen concentration is 1.4 × 10 ¹⁸ atoms / cm ³
(Old ASTM). Ingot is V when pulling
While reducing / G of 0.24mm ² / min ° C. 0.18 mm ² / minute ° C. until continuously grown two under the same conditions.
One of the ingots cuts the center of the ingot in the pulling direction as shown in FIG. 2 and checks the position of each area.
A silicon wafer was cut out from another one corresponding to the position of each region to obtain a sample. Wafer as a sample in this example has a region [OSF] in the center, a wafer W ₁ shown in FIGS. 2 and 3A with the region [P _V] around it. This wafer W cut out from an ingot and mirror-polished
₁ was heated from room temperature to 1200 ° C. in a hydrogen atmosphere at a rate of 10 ° C./min, and a first-stage heat treatment was performed for 60 minutes.

[0024] <Example 2> was heated at a heating rate of 10 ° C. / min to 1200 ° C. from room temperature wafer W ₁ was cut polished from the same ingot as in Example 1 under a hydrogen atmosphere,
After the first stage heat treatment for holding 60 minutes, the wafer W ₁ is heated at a heating rate of 1000 ° C. up to 10 ° C. / min was introduced into the furnace of 800 ° C. from room temperature under a nitrogen atmosphere, 2
A second-stage heat treatment for 4 hours was performed.

[0025] <Comparative Example 1> A wafer W ₁ was cut polished from the same ingot as in Example 1, comparing the wafer W ₁ to the first stage heat treatment be not performed the second stage heat treatment Example 1
And

[0026] <Comparative Example 2> A wafer W ₁ was cut polished from the same ingot as in Example 1, without first stage heat treatment, the wafer W ₁ Been only the second-stage heat treatment in Example 2 Comparative Example 2 was set.

<Comparative Evaluation 1> The wafers of Example 1 and Comparative Example 1 were each heated at 1200 ° C. for 60 minutes in a humid oxygen atmosphere, subjected to OSF revealing heat treatment, and then subjected to seco etching for 2 minutes. As a result, as shown in FIG. 4, in the wafer of Comparative Example 1, OSF became apparent at the center thereof, whereas in the wafer of Example 1, 20 μm from the surface.
Was OSF-free over the entire depth. Further, the wafers of Examples 1 and 2 and Comparative Examples 1 and 2 were cleaved, respectively, and the wafer surface was selectively etched with a Wright etchant. The center of the wafer at a depth of 100 μm from the wafer surface was observed by an optical microscope. The BMD volume density of the entire surface of the wafer from the portion to the peripheral portion of the wafer was measured. These results are shown in FIG. The horizontal axis in the right end view of FIG. 5 indicates the area from the center of the wafer (0 mm) to the peripheral area of the wafer (± 75 mm), and the vertical axis indicates the BMD volume density.

As is apparent from FIG. 5, the BMD of the wafer of Comparative Example 1 was lower than the lower detection limit (1 × 10 ⁶ / cm ³ ). In the wafer of Example 1, a BMD volume density of 2 × 10 ⁷ pieces / cm ³ or more, preferably about 10 ⁸ pieces / cm ^3, which is considered to have an IG effect over the entire surface of the wafer, was detected. Further, in the wafer of Example 2, the BM of 10 ¹⁰ / cm ^3, which is two orders of magnitude larger than the whole wafer,
D was detected, indicating that a higher IG effect was obtained. In the wafer of Comparative Example 2, as in Example 2, a BMD volume density of about 10 ¹⁰ / cm ³ was detected over the entire surface of the wafer, but when this wafer was treated in an oxidizing atmosphere, OSF became apparent. Further, when the width of the DZ layer on each surface of the wafers of Examples 1 and 2 and Comparative Example 2 was measured, they were 5 μm, 5 μm and 0.5 μm or less, respectively. The DZ layer on the surface of the wafer of Comparative Example 1 was not detectable.

Example 3 A silicon wafer was cut out from the ingot pulled up in Example 1 and used as a sample. Wafer as a sample in this example has an area [P _V] in the center, a wafer W ₃ shown in FIGS. 2 and 3C have areas [P _I] around its periphery. The wafer W ₃ cut out from the ingot and polished to a mirror surface was heated from room temperature to 12 under a hydrogen atmosphere.
The first stage heat treatment was performed by heating to 00 ° C. at a rate of 10 ° C./min and holding for 60 minutes.

<Embodiment 4> A wafer W ₃ cut from the same ingot as in Embodiment 1 and mirror-polished is heated from room temperature to 1200 ° C. in a hydrogen atmosphere at a rate of 10 ° C./min.
After the first stage heat treatment for holding 60 minutes, the wafer W ₃ was heated at a heating rate of 1000 ° C. up to 10 ° C. / min was introduced into the furnace of 800 ° C. from room temperature under a nitrogen atmosphere, 2
A second-stage heat treatment for 4 hours was performed.

Example 5 A wafer W ₃ cut out from the same ingot as in Example 1 and mirror-polished was heated in a hydrogen atmosphere from room temperature to 1200 ° C. at a rate of 10 ° C./min.
After the first stage heat treatment for holding 60 minutes, the wafer W ₃ was heated at a heating rate of room temperature from 1 ° C. / minute to 1000 ° C. is introduced into the furnace of 500 ° C. under a nitrogen atmosphere, for 4 hours The holding second stage heat treatment was performed.

[0032] <Comparative Example 3> Example 1 and a wafer W ₃ was cut polished from the same ingot, the wafer W ₃ Comparative Example 3 in which the first stage heat treatment be not performed second step heat treatment
And A wafer W ₃ was cut polished from the same ingot as <Comparative Example 4> Example 1, without first stage heat treatment, compared wafer W ₃ Been only the second-stage heat treatment in Example 4 Example 2 And

<Comparative Evaluation 2> Examples 3, 4, 5 and Comparative
Each of the wafers of Examples 3 and 4 was the same as in Comparative Evaluation 1 above.
Wafer at a depth of 100 μm from the wafer surface
BMD of whole wafer from center to wafer periphery
The volume density was measured. These results are shown in FIG. FIG.
The horizontal axis in the right end figure of
To the periphery (± 75mm), vertical axis is BMD
Represents the volume density. As is clear from FIG.
No BMD was detected from the wafer. Example
In the wafer of No. 3, the area [P_IEquivalent to
BMD volume density of 10 parts⁸Pieces / cm^ThreeWas below
For the region [P _V] Of the part corresponding to
The BMD volume density is about 10 which is said to have an IG effect.⁹Pieces/
cm ^ThreeMet. In the wafer of Example 4, the wafer
BMDs that are two orders of magnitude larger than this are detected at the periphery and center.
Was. In the wafer of Example 5, over the entire surface of the wafer
About 10¹¹Pieces / cm^ThreeBMD volume density was detected. This
Therefore, in the wafer of Example 4, the center and the actual
In the wafer of Example 5, the example
It was found that the IG effect was higher than that of 3. In addition, the comparative example
In the wafer of No. 4, the BMD volume density was detected in the same manner as in Example 4.
The BMD density distribution in this case was
Poor uniformity in the direction. Further, in Examples 3, 4 and 5,
The width of the DZ layer on each surface of the wafer was measured.
In each case, it was 5 μm. The way of Comparative Example 3
The DZ layer on the surface of c was undetectable, and
The DZ layer is 0.5 μm or less at the center of the wafer and
I could not go out.

Example 6 A silicon wafer was cut out from the ingot pulled up in Example 1 and used as a sample. Wafer as a sample in this example, all of which are wafer W ₄ shown in FIGS. 2 and 3D is an area [P _I]. After the wafer W ₄ which is cut polished from ingots were heated at a heating rate of 10 ° C. / min to 1200 ° C. from room temperature under a hydrogen atmosphere, was first stage heat treatment for holding 60 minutes, the wafer W ₄ A second stage heat treatment was performed in a nitrogen atmosphere in a furnace from room temperature to 800 ° C., heating to 1000 ° C. at a rate of 10 ° C./min, and holding for 24 hours.

[0035] <Example 7> heated at a heating rate of 10 ° C. / min to 1200 ° C. from room temperature wafer W ₄ which is cut polished from the same ingot as in Example 1 under a hydrogen atmosphere,
After the first stage heat treatment for holding 60 minutes, the wafer W ₄ was heated at a heating rate of room temperature from 1 ° C. / minute to 1000 ° C. is introduced into the furnace of 500 ° C. under a nitrogen atmosphere, for 4 hours The holding second stage heat treatment was performed.

[0036] <Comparative Example 5> A wafer W ₄ which is cut polished from the same ingot as in Example 1, comparing the wafer W ₄ where the first-stage heat treatment be not performed second step heat treatment Example 5
And A wafer W ₄ which is cut polished from the same ingot as <Comparative Example 6> Example 1, without first stage heat treatment, compared wafer W ₄ Been only the second-stage heat treatment in Example 6 Example 6 And

[0037] <Comparative Example 7> A wafer W ₄ which is cut polished from the same ingot as in Example 1, without first stage heat treatment, the wafer W ₄ Been only the second-stage heat treatment in Example 7 Comparative Example 7 was set.

<Comparative Evaluation 3> The wafers of Examples 6 and 7 and Comparative Examples 5, 6 and 7 were processed in the same manner as in Comparative Evaluation 1 above, from the wafer surface to the wafer peripheral portion at a depth of 100 μm from the wafer surface. BM of the whole surface
The D volume density was measured. These results are shown in FIG. The horizontal axis in the right end view of FIG. 7 represents the area from the center of the wafer (0 mm) to the periphery of the wafer (± 75 mm), and the vertical axis is BM.
D represents the volume density. As is clear from FIG.
No BMD was detected from each of the wafers Nos. 6 and 6. In the wafer of the sixth embodiment, I
The BMD volume density was 2 × 10 ⁷ particles / cm ³ , which was considered to have a G effect. In the wafer of example 7 than this 3 orders of magnitude greater 10 ¹⁰ / cm ³ units of BMD volume density is detected over the entire wafer surface, it was found that higher IG effect can be obtained. In addition, in the wafer of Comparative Example 7, 10 ⁹
A BMD volume density of the order of ³ pieces / cm ³ was detected, but when heat treatment was performed in an oxidizing atmosphere, OSF became apparent. Further, when the width of the DZ layer on each surface of the wafers of Examples 6 and 7 was measured, each was 5 μm. The DZ layer on each surface of the wafers of Comparative Examples 5 and 6 was undetectable, and the DZ layer of Comparative Example 7 was 0.5 μm at the center of the wafer.
m or less, no detection was possible at the outer peripheral portion.

[0039]

As described above, according to the invention of claim 1 of the present application, it is composed of one or both of the region [P _V ] and the region [P _I ] and has an oxygen concentration of 1.2 × 10 4. ¹⁸ a
A silicon wafer having a density of not less than toms / cm ³ (former ASTM) is heated from room temperature to 90 in a hydrogen or argon gas atmosphere.
By performing a first-stage heat treatment at a heating rate of 5 to 50 ° C./min from 0 to 1200 ° C. and holding for 5 to 60 minutes, in addition to the absence of point defect aggregates, Oxygen concentration of 24 ppma (ASTM '79 value)
[About 1.2 × 10 ¹⁸ atoms / cm ³ (old ASTM)
The IG effect can be obtained even if it is not suppressed below. According to the invention of claim 4 of the present application, the oxygen concentration of the mixed region of the region [OSF] and the region [P _V ] is 1.2 × 10
^A silicon wafer of ¹⁸ atoms / cm ³ (former ASTM) or higher is heated from room temperature to 900 to 1200 ° C. at a heating rate of 5 to 50 ° C./min in a hydrogen or argon gas atmosphere, and held for 5 to 60 minutes. By performing the one-step heat treatment, in addition to the absence of point defect aggregates, the oxygen concentration in the grown crystal was reduced to 24 ppma (ASTM '79 value).
[About 1.2 × 10 ¹⁸ atoms / cm ³ (old ASTM)
Even if it is not suppressed to less than
The G effect is obtained. Particularly, even in a region where a conventional OSF is formed, a silicon wafer having an IG capability can be manufactured with high productivity because it is free of OSF. By performing the first-stage heat treatment according to claim 1 or 4 of the present application, the oxygen donor killer treatment conventionally performed becomes unnecessary. Further, by performing the second-stage heat treatment according to claim 2, 3, or 5, There is an advantage that a wafer having a higher IG effect can be obtained.

[Brief description of the drawings]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 A: Based on Voronkov's theory, when the V / G ratio is above the critical point, a vacancy-rich ingot is formed and the V / G
The figure which shows that an interstitial silicon-rich ingot is formed when a ratio is below a critical point. B: Conceptual diagram by X-ray topograph after heat treatment of the ingot in an N ₂ atmosphere at 1000 ° C. for 40 hours. C Defect distribution diagram of the crystal when the ingot immediately after pulling (as-grown state) is subjected to secco etching. D is a crystal defect distribution diagram when the ingot is heat-treated in a humid O ₂ atmosphere and then seco-etched. The figure which shows the change situation of the pulling speed of E ingot.

FIG. 2 is a diagram corresponding to FIG. 1B.

Figure 3 is a plan view of the wafer according to W ₁ A Figure 2. B Plan view of a wafer corresponding to W ₂ in FIG. C Plan view of the wafer corresponding to W ₃ in FIG. D Plan view of a wafer corresponding to W ₄ in FIG.

FIG. 4 shows a heat treatment method and OSF manifestation processing result of each wafer W ₁ of Example 1 and Comparative Example 1.

FIG. 5 shows wafers W of Examples 1 and 2 and Comparative Examples 1 and 2.
Shows the occurrence of BMD in _one of the heat treatment method and the wafer W _1.

FIG. 6 is a diagram showing a heat treatment method for each wafer W ₃ of Examples 3, 4, 5 and Comparative Examples 3 and 4, and a state of occurrence of BMD in each wafer W ₃ .

7 is a diagram showing the occurrence of BMD in the heat treatment method and the wafer W ₄ of each wafer W ₄ of Examples 6, 7 and Comparative Examples 5, 6 and 7.

────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] July 26, 2000 (2007.2
6)

[Procedure amendment 1]

[Document name to be amended] Drawing

[Correction target item name] Fig. 6

[Correction method] Change

[Correction contents]

FIG. 6 ────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] September 4, 2000 (200.9.4)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0032

[Correction method] Change

[Correction contents]

[0032] <Comparative Example 3> Example 1 and a wafer W ₃ was cut polished from the same ingot, the wafer W ₃ Comparative Example 3 in which the first stage heat treatment be not performed second step heat treatment
And A wafer W ₃ was cut polished from the same ingot as <Comparative Example 4> Example 1, without first stage heat treatment, compared wafer W ₃ Been only the second-stage heat treatment in Example 4 Example 4 And

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hideo Tanaka 1-297 Kitabukurocho, Omiya City, Saitama Prefecture Inside the Silicon Research Center, Mitsubishi Materials Corporation (72) Inventor Yuji Nakata 1-297 Kitabukurocho, Omiya City, Saitama Mitsubishi Material Co., Ltd. Silicon Research Center F term (reference) 4G077 AA02 AB01 AB02 CF10 FE12 4M106 AA01 AA13 CB03 CB19 CB20 CB30 DH55 DH56 DJ18 DJ20 DJ38 5F053 AA12 AA44 DD01 FF04 GG01 PP03 RR03

Claims (5)

[Claims] A region where interstitial silicon type point defects predominantly exist in a silicon single crystal ingot is [I], a region where vacancy type point defects predominantly exist is [V], When a perfect region in which no aggregate of silicon-type point defects and no aggregate of void-type point defects are present is defined as [P], the aggregate of point defects cut out from the ingot including the perfect region [P] is In the method for manufacturing a silicon wafer that does not exist, a region adjacent to the region [I] and belonging to the perfect region [P] and having a lower interstitial silicon concentration lower than a minimum interstitial silicon concentration capable of forming an interstitial dislocation is referred to as [P _I ]. When a region adjacent to the region [V] and belonging to the perfect region [P] and having a vacancy concentration below the vacancy concentration capable of forming COP or FPD is [P _V ], the region [P _V ] or the region [P _I ] Nozomi One or both of them, and the oxygen concentration is 1.2 × 10 ¹⁸ atoms /
A silicon single crystal ingot having a size of at least cm ³ (former ASTM) is pulled up, and a silicon wafer cut from the ingot is heated from room temperature to 900 to 1200 in a hydrogen or argon gas atmosphere.
To a temperature of 5 to 50 ° C./min.
A method for producing a silicon wafer free of point defect aggregates, comprising performing a first-stage heat treatment for one minute. 2. After the silicon wafer cut out from a silicon single crystal ingot consisting region [P _V] and heat-treated first stage, a furnace of 500 to 800 ° C. from room temperature the silicon wafer in a nitrogen or oxidizing atmosphere Introduce into 75
2. A second-stage heat treatment in which heating is performed at a heating rate of 10 to 50 ° C./min to 0 to 1100 ° C. and holding for 4 to 48 hours.
The method for producing a silicon wafer according to the above. 3. An area [P _I ] or an area [P _I ] and an area [P
_V ] after the first stage heat treatment of a silicon wafer cut from a silicon single crystal ingot comprising a mixed region of the mixed region described above, the silicon wafer is introduced into a furnace at room temperature to 400 to 700 ° C. in a nitrogen or oxidizing atmosphere. 800-1100
At a heating rate of 0.5 to 10 ° C./min.
2. The method for manufacturing a silicon wafer according to claim 1, wherein a second stage heat treatment is performed for a period of from 40 to 40 hours. 4. A region where interstitial silicon type point defects are predominantly present in a silicon single crystal ingot is [I], a region where vacancy type point defects are predominantly present is [V], A perfect region in which no aggregates of inter-silicon type point defects and no aggregates of vacancy type point defects exist is [P],
When an OSF region belonging to the region [V] and generated when the ingot is thermally oxidized in a silicon wafer state is defined as [OSF], an ingot including a perfect region [P] including the region [OSF] A method for producing a silicon wafer free of point defect agglomerates cut out of silicon, comprising: a minimum interstitial silicon concentration adjacent to the region [I] and belonging to the perfect region [P] and capable of forming interstitial dislocations When a region less than [P _I ] is defined as [P _I ], and a region adjacent to the region [V] and belonging to the perfect region [P] and having a vacancy concentration or less capable of forming a COP or FPD is defined as [P _V ], It is composed of a mixed region of the region [OSF] and the region [P _V ] and has an oxygen concentration of 1.2 × 10 ¹⁸ atoms / cm.
³ Pull up a silicon single crystal ingot of (former ASTM) or higher, and remove a silicon wafer cut from the ingot from room temperature to 900 to 1200 under a hydrogen or argon gas atmosphere.
To a temperature of 5 to 50 ° C./min.
A method for producing a silicon wafer free of point defect aggregates, comprising performing a first-stage heat treatment for one minute. 5. A silicon wafer cut from a silicon single crystal ingot comprising a mixed region of a region [OSF] and a region [P _V ] is subjected to a first-stage heat treatment, and the silicon wafer is subjected to a nitrogen or oxidizing atmosphere. From room temperature to 500 ~
Introduced into a furnace at 800 ° C to 10 to 750 to 1100 ° C
5. The method for producing a silicon wafer according to claim 4, wherein the second-stage heat treatment is performed by heating at a heating rate of 50 to 50 [deg.] C./min and holding for 4 to 48 hours.