JP2001185730A - Thin film transistor and method of manufacturing the same - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To prevent an excessive leakage current from flowing even when a drain voltage is increased. SOLUTION: By irradiating an excimer laser at a low energy density, a formed intrinsic amorphous silicon thin film 21 is microcrystallized to form an intrinsic microcrystalline silicon thin film 22. Next, using the photoresist pattern 23 as a mask, an n-type impurity is added to the source region formation region 22b and the drain region formation region 22c of the intrinsic microcrystalline silicon thin film 22.
To a high concentration. Next, heat treatment is performed. Then, the source region formation region 22b and the drain region formation region 2
In 2c, the implanted n-type impurity is activated,
Although the resistance value is reduced, recrystallization does not proceed and the microcrystalline silicon thin film remains as it is because the n-type impurity is implanted at a high concentration. On the other hand, the channel region forming region 24a
In, recrystallization proceeds to form an intrinsic polysilicon thin film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a thin film transistor and a method for manufacturing the same.

[0002]

2. Description of the Related Art For example, in an active matrix type liquid crystal display device, a thin film transistor is used as a switching element of each pixel. FIG. 4 shows a cross-sectional view of an example of such a conventional thin film transistor.
This thin film transistor has a glass substrate 1. A base insulating film 2 is provided on the upper surface of the glass substrate 1.
A semiconductor thin film 3 is provided at a predetermined location on the upper surface of the base insulating film 2. A central portion of the semiconductor thin film 3 is a channel region 3a made of an intrinsic polysilicon thin film, and both sides are a source region 3b and a drain region 3c made of an n-type polysilicon thin film.

[0006] A gate insulating film 4 is provided on the upper surface of the base insulating film 2 including the semiconductor thin film 3. Channel region 3a
A gate electrode 5 is provided on the upper surface of the gate insulating film 4 above. An interlayer insulating film 6 is provided on the upper surface of the gate insulating film 4 including the gate electrode 5. Source region 3b
On the upper surface of the upper interlayer insulating film 6, a source electrode 7 is provided so as to be connected to the source region 3b via a contact hole 8 formed in the interlayer insulating film 6 and the gate insulating film 4. On the upper surface of the interlayer insulating film 6 on the drain region 3c, a drain electrode 9 is provided so as to be connected to the drain region 3c via a contact hole 10 formed in the interlayer insulating film 6 and the gate insulating film 4.

Next, a part of a method for manufacturing the thin film transistor will be described with reference to FIG. First, FIG.
As shown in FIG. 1A, a base insulating film 2 and an intrinsic amorphous silicon thin film 11 are continuously formed on the upper surface of a glass substrate 1. Next, the intrinsic amorphous silicon thin film 11 is polycrystallized by excimer laser irradiation to form an intrinsic polysilicon thin film 12.

Next, as shown in FIG. 5B, a photoresist pattern 13 is formed at a predetermined position on the upper surface of the intrinsic polysilicon thin film 12. Next, n-type impurities are implanted into the source region formation region 12b and the drain region formation region 12c of the intrinsic polysilicon thin film 12 using the photoresist pattern 13 as a mask. Next, the photoresist pattern 13 is peeled off.

Next, as shown in FIG. 5C, the implanted n-type impurity is activated by excimer laser irradiation. Next, when unnecessary portions of the intrinsic polysilicon thin film 12 are removed by device area processing, as shown in FIG. 4, a source region 3b composed of an n-type polysilicon thin film is formed on both sides of a channel region 3a composed of the intrinsic polysilicon thin film. And a semiconductor thin film 3 having a drain region 3c.

By the way, in the thin film transistor having such a structure, Vd-Id (drain current) characteristics when a drain voltage Vd is applied to the drain electrode 9 with the gate electrode 5 and the source electrode 7 grounded are shown in FIG. As shown. As is apparent from this figure, when the drain voltage Vd is increased, an excessive leak current flows between the source region 3b and the drain region 3c.

This phenomenon will be described.
In this case, the electric field in the vicinity of the drain region 3c is higher than that in the vicinity of the source region 3b.
Electron-hole pairs are generated in the vicinity. Of the generated electron-hole pairs, electrons flow into the drain region 3c, but the holes cannot cross the potential barrier existing at the boundary between the channel region 3a and the source region 3b, and stay at the bottom of the channel region 3a. I do. As a result, the threshold voltage decreases, and the drain current Id increases. Further, when the number of holes staying at the bottom of the channel region 3a increases, the junction between the channel region 3a and the drain region 3c breaks down, and the drain current Id further increases.

[0009]

As described above, the conventional thin film transistor has a problem that an excessive leak current flows between the source region 3b and the drain region 3c as the drain voltage Vd is increased. Was. An object of the present invention is to prevent an excessive leakage current from flowing even when the drain voltage is increased.

[0010]

According to a first aspect of the present invention, there is provided a thin film transistor provided with a source region and a drain region made of a microcrystalline silicon thin film on both sides of a channel region made of a polysilicon thin film. Claim 4
The method of manufacturing a thin film transistor according to the invention described in the above, wherein the channel region forming region of the formed amorphous silicon thin film is processed to be a polysilicon thin film, and the source region forming region and the drain region forming region of the amorphous silicon thin film are formed. Is processed into a microcrystalline silicon thin film.

According to the present invention, the source region and the drain region on both sides of the channel region formed of the polysilicon thin film are formed of the microcrystalline silicon thin film, that is, the source region and the drain region are formed with the mobility gap of the channel region. Is formed of microcrystalline silicon smaller than the polysilicon that forms, so that holes of the electron-hole pairs generated near the drain region of the channel region do not flow into the source region and stay at the bottom of the channel region. As a result, it is possible to prevent an excessive leak current from flowing even if the drain voltage is increased.

[0012]

FIG. 1 is a sectional view of a thin film transistor according to an embodiment of the present invention. This thin film transistor has basically the same structure as the conventional case shown in FIG. Therefore, in FIG. 1, the same reference numerals are given to the same names as those in FIG. 4, and the description thereof will be omitted as appropriate. This thin film transistor is different from the conventional case shown in FIG. 4 in that the source region 3b and the drain region 3c are formed of a microcrystalline silicon thin film.

Next, a part of an example of a method of manufacturing the thin film transistor will be described with reference to FIG. First,
As shown in FIG. 2A, a base insulating film 2 and an intrinsic amorphous silicon thin film 21 are continuously formed on the upper surface of a glass substrate 1. Next, the intrinsic amorphous silicon thin film 21 is microcrystallized by irradiating an excimer laser at a low energy density to form an intrinsic microcrystalline silicon thin film 22.

Next, as shown in FIG. 2B, a photoresist pattern 23 is formed at a predetermined position on the upper surface of the intrinsic microcrystalline silicon thin film 22. Next, n-type impurities are implanted at a high concentration into the source region formation region 22b and the drain region formation region 22c of the intrinsic microcrystalline silicon thin film 22 using the photoresist pattern 23 as a mask. That is, as an example, 1% -B ₂ H ₆ (PH ₃ ) / H ₂ is injected as a seed gas at about 1 × 10 16 / cm ² . The implantation amount of this n-type impurity is the same as the conventional case shown in FIG.
5 times / cm ² ). Next, the photoresist pattern 23 is peeled off.

Next, as shown in FIG. 2C, a heat treatment is performed in a nitrogen atmosphere at a temperature of about 350 ° C. for about 2 hours. Then, in the source region formation region 22b and the drain region formation region 22c, the implanted n-type impurities are activated and the resistance value is reduced, but the recrystallization is caused by the high concentration of the n-type impurities. Does not proceed, that is, the crystal quality does not recover while being damaged by the high-concentration implantation of the n-type impurity, and remains as a microcrystalline silicon thin film.

On the other hand, in regions other than the source region forming region 22b and the drain region forming region 22c, recrystallization proceeds to form an intrinsic polysilicon thin film 24. Therefore, the channel region forming region 24a becomes an intrinsic polysilicon thin film. Next, when unnecessary portions of the intrinsic polysilicon thin film 24 are removed by device area processing, FIG.
As shown in FIG. 5, a semiconductor thin film 3 having a source region 3b and a drain region 3c formed of an n-type microcrystalline silicon thin film on both sides of a channel region 3a formed of an intrinsic polysilicon thin film is formed.

As described above, in the thin film transistor of this embodiment, the source region 3b and the drain region 3c on both sides of the channel region 3a made of a polysilicon thin film.
Is formed by an n-type microcrystalline silicon thin film,
In other words, since the source region 3b and the drain region 3c are formed of n-type microcrystalline silicon having a mobility gap smaller than that of the polysilicon forming the channel region 3a, the positive electrons generated near the drain region 3c of the channel region 3a. It is possible to prevent holes in the hole pairs from flowing into the source region 3b and staying at the bottom of the channel region 3a. As a result, as shown in FIG. 3, it is possible to prevent an excessive leakage current from flowing even if the drain voltage Vd is increased.

The present invention can also be applied to a p-type thin film transistor, a bottom gate type thin film transistor, and the like.

[0019]

As described above, according to the present invention, the source region and the drain region are formed of microcrystalline silicon whose mobility gap is smaller than the polysilicon forming the channel region. Of the electron-hole pairs generated near the drain region, holes can be prevented from flowing into the source region and staying at the bottom of the channel region. As a result, excessive leakage current does not flow even when the drain voltage is increased. You can do so.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a thin film transistor according to an embodiment of the present invention.

FIGS. 2A to 2C are cross-sectional views illustrating a part of the manufacturing process of the thin film transistor shown in FIG.

FIG. 3 is a Vd-Id characteristic diagram of the thin film transistor shown in FIG.

FIG. 4 is a cross-sectional view of an example of a conventional thin film transistor.

5A to 5C are cross-sectional views illustrating a part of the manufacturing process of the thin film transistor illustrated in FIG. 4;

6 is a Vd-Id characteristic diagram of the thin film transistor shown in FIG.

[Explanation of symbols]

 Reference Signs List 3 semiconductor thin film 3a channel region 3b source region 3c drain region 4 gate insulating film 5 gate electrode 7 source electrode 9 drain electrode 21 intrinsic amorphous silicon thin film 22 intrinsic microcrystalline silicon thin film 23 photoresist pattern 24 intrinsic polysilicon thin film

Claims (7)

[Claims] 1. A thin film transistor comprising a source region and a drain region made of a microcrystalline silicon thin film provided on both sides of a channel region made of a polysilicon thin film. 2. The thin film transistor according to claim 1, wherein said source region and said drain region are formed of a microcrystalline silicon thin film into which impurities are implanted at a high concentration. 3. The invention according to claim 1, wherein said source region and said drain region are each composed of 2 × 1 n-type impurities.
A thin film transistor comprising a microcrystalline silicon thin film implanted at about 0 to the 15th power / cm ² . 4. A channel region forming region of the formed amorphous silicon thin film is processed so as to become a polysilicon thin film, and a source region forming region and a drain region forming region of the amorphous silicon thin film become a microcrystalline silicon thin film. A method for manufacturing a thin film transistor, characterized by processing as described above. 5. A microcrystalline silicon thin film is formed by microcrystallizing the formed amorphous silicon thin film, and a source region forming region and a drain region forming region of the microcrystalline silicon thin film are recrystallized by a heat treatment in a later step. Is implanted to such an extent that the process does not proceed, and the channel region forming region of the microcrystalline silicon thin film is recrystallized into a polysilicon thin film by heat treatment. The source region forming region and the drain region of the microcrystalline silicon thin film A method for manufacturing a thin film transistor, wherein a formation region is left as a microcrystalline silicon thin film. 6. The invention according to claim 5, wherein the impurity is 1% -B ₂ H ₆ (PH ₃ ) / H ₂ as a seed gas.
A method for producing a thin film transistor, wherein the implantation is performed at about × 10 16 / cm ² . 7. The method according to claim 6, wherein the heat treatment is performed in a nitrogen atmosphere at a temperature of about 350 ° C. for about 2 hours.