JP2001103029A - Digital broadcasting receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow a ground wave digital television broadcasting receiver to decode a TMCC signal with high accuracy, even in its small circuit scale. SOLUTION: A ground wave digital television broadcasting receiver extracts several valid bits from among the bits of an I signal and a Q signal, which constitute the carrier of the TMCC signal and subsequently performs DBPSK demodulation of the several valid bits. In the case the I signal and the Q signal are positive, the ground wave digital television broadcasting receiver performs retrieval in order of an MSB, first specifies a bit having '1' and then extracts three bits with this bit as a center.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital broadcast receiver, and more particularly, to a transmission multiplex control (TMC).
C: Transmission and Multiplexing Configuration Con
Controlled Orthogonal Frequency Division Multiplexing (OFDM)
The present invention relates to a receiver for terrestrial digital television broadcasting of a thogonal frequency division multiplexing (multiplexing) system.

[0002]

2. Description of the Related Art The Telecommunications Technology Council, May 2, 1999
On April 4, a report on the digital terrestrial television broadcasting system was submitted to the Ministry of Posts and Telecommunications. A summary of the report can be found on the website of the Ministry of Posts and Telecommunications (http://www.mpt.go.jp/pressrelease/japanese/h
ousou / 990524j701.html (as of August 20, 1999).

According to this broadcasting method, the modulation method is OF
MPEG-2 is adopted as a DM method, an information source coding method such as video and audio, and a multiplexing method. A transmitter based on this broadcasting system consists of an encoding unit that converts analog signals such as video and audio into digital signals and compresses them, a multiplexing unit that combines multiple pieces of compressed information, and information errors that occur during transmission. , And a modulator for efficiently transmitting information. On the other hand, the receiver is configured to perform the reverse process.

According to this broadcasting system, each frame is composed of 20 frames.
It consists of four symbols. Each symbol contains thousands of carriers. The transmission bandwidth composed of the large number of carriers is divided into 13 segments, and the 13 segments are divided into a maximum of three layers. As a carrier modulation method,
Differential Quadrat (DQPSK)
ure Phase Shift Keying, 4-phase phase modulation (QPSK;
Quadrature Phase Shift Keying, 16 Quadrature Amplitude Modulatio
n), 64 quadrature amplitude modulation (64QAM; 64 Quadrature A)
mplitude modulation), and any modulation scheme can be designated for each layer. Therefore, carriers in each layer are modulated by a specified modulation method according to data signals such as video and audio.

[0005] In addition to such a carrier for a data signal, a carrier for a TMCC signal is inserted to specify parameters such as a carrier modulation scheme, a convolutional coding rate, and a time interleave length which are currently transmitted. You. The TMCC signal is composed of 204 bits corresponding to the number of symbols. The carrier for this TMCC signal is a differential two-phase modulation (DBPSK; Differentially) according to the TMCC signal.
al Binary Phase ShiftKeying). T
Since the carrier of the MCC signal has a higher level than the carrier of the data signal and is modulated by the DBPSK method, it is general to decode the TMCC signal using only the upper few bits out of a plurality of bits indicating the carrier level. Would be a target.

[0006]

However, since a DBPSK demodulation circuit for the upper several bits is required,
The problem that a circuit scale becomes large arises. On the other hand, when the TMCC signal is decoded by using only a few higher-order bits to reduce the circuit size, decoding is performed when the level of the carrier of the TMCC signal is reduced due to amplitude distortion or phase distortion during transmission. There is a problem that accuracy is deteriorated. That is, there is a so-called trade-off relationship between the circuit scale and the decoding accuracy, such that the decoding scale is increased when the decoding accuracy is increased, and the decoding accuracy is decreased when the decoding scale is reduced.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to provide a digital broadcast receiver capable of obtaining a TMCC signal with high accuracy even with a small circuit scale.

[0008]

According to the digital broadcasting receiver of the present invention, a carrier of a data signal is transmitted along with a carrier of a transmission multiplex control signal modulated by the DBPSK method.
A digital broadcast receiver for receiving a digital broadcast modulated by a DM system, comprising: an OFDM demodulator, an effective bit extractor, a DBPSK demodulator, and a data signal demodulator. The OFDM demodulator demodulates the carrier of the data signal and the transmission multiplex control signal by the OFDM method. The effective bit extracting means is configured to select, from among the bits indicating the carrier of the transmission multiplex control signal output from the OFDM demodulating means, a bit closest to the most significant bit and having a value different from the value of the most significant bit, and And extract the bits. The DBPSK demodulating means demodulates the bits output from the effective bit extracting means by the DBPSK method to obtain a transmission multiplex control signal. The data signal demodulation means is DBPS
Based on the transmission multiplex control signal output from the K demodulation unit, the data signal carrier output from the OFDM demodulation unit is demodulated to obtain a data signal.

In this digital broadcast receiver, a bit having a value closest to the most significant bit and having a value different from the value of the most significant bit among the bits indicating the carrier of the transmission multiplex control signal and a bit immediately above the bit are described. Since a transmission multiplex control signal is obtained by extracting and demodulating the extracted bits, the circuit scale required for the DBPSK demodulation means is reduced, and a transmission multiplex control signal can be obtained with high accuracy.

[0010] Preferably, the valid bit extracting means further includes one of bits having a value different from the value of the most significant bit.
Extract the next lower bit.

Accordingly, a transmission multiplex control signal can be obtained with higher accuracy. Preferably, the valid bit extracting means includes a code determining means, a bit searching means, and a bit extracting means. The code determining means determines the code of the carrier of the transmission multiplex control signal. As a result of the discrimination by the sign discriminating means, when the sign is positive, the bit searching means searches the bits in order from the most significant bit to specify the position of the first bit having "1", and when the sign is negative, the bit is most significant. The bits are searched in order from the upper bit to specify the position of the first bit having “0”. The bit extracting means extracts the bit at the position specified by the bit searching means and the bit immediately above it.

Therefore, the circuit scale required for the DBPSK demodulation means is reduced, and a transmission multiplex control signal can be obtained with high accuracy.

[0013] More preferably, the bit extracting means further extracts a bit immediately below the bit at the specified position.

Accordingly, a transmission multiplex control signal can be obtained with higher accuracy.

[0015]

Embodiments of the present invention will be described below in detail with reference to the drawings. In the drawings, the same or corresponding portions have the same reference characters allotted, and description thereof will not be repeated.

Referring to FIG. 1, a terrestrial digital television broadcast receiver according to an embodiment of the present invention includes a tuner 12 for selecting a desired channel from digital broadcasts received by an antenna 10, and the selected channel. OFDM demodulation circuit 14 for demodulating a channel signal by the OFDM method
A TMCC decoding circuit 16 for decoding a TMCC signal included in the demodulated signal; a detection circuit 18 for detecting a signal demodulated by the OFDM demodulation circuit 14 based on the composite TMCC signal; And a time / frequency deinterleave circuit 20 for deinterleaving the signals by frequency and frequency, and an error correction circuit 22 for performing error correction on the deinterleaved signal.

The OFDM demodulation circuit 14 separates a signal from the tuner 12 into an I (in-phase) signal and a Q (quadrature) signal, and converts an analog signal output from the quadrature demodulation circuit 141 into a digital signal. A /
A D converter 142, a narrow band AFC (automatic frequency control) circuit 143 for synchronous detection of a signal output from the A / D converter 142, and an FFT circuit for fast Fourier transforming the signal output from the narrow band AFC circuit 143 144 and FFT
And a wideband AFC circuit 145 for synchronously detecting the signal output from the circuit 144 again. The details of the OFDM demodulation method are disclosed in Japanese Patent Application No. 10-238885 which is a prior application of the present applicant.

FIG. 2 shows the structure of the signal after the fast Fourier transform. As shown in FIG. 2, this signal includes thousands of carriers having different frequencies. These carriers include carriers for data signals, carriers for TMCC signals, carriers for pilot signals, carriers for null signals, and the like. The carrier for the data signal is divided into 13 segments, and these 13 segments are divided into a maximum of three layers. The carrier for the data signal is modulated according to the data signal by a modulation method designated for each layer. The carrier for the TMCC signal is modulated according to the TMCC signal by the DBPSK method.

Each frame is composed of 204 symbols. Each symbol has a pulse indicating a data start position, and a plurality of TMCC signals are inserted at predetermined positions based on this position. However, a plurality of TMCC signals in the same symbol all have the same information. In each symbol, a plurality of pilot signals are also inserted at predetermined positions. Null signals are inserted on both sides in each symbol.

The narrow-band AFC circuit 143 before the fast Fourier transform shown in FIG. 1 eliminates such a frequency shift within the carrier interval. The wideband AFC circuit 145 after the fast Fourier transform shown in FIG. 1 further eliminates such a frequency shift in the unit of a carrier interval based on a pilot signal. These two AFC circuits 14
3, 145 operate, and the frequency shift is completely eliminated. The data start pulse described above is generated by the wideband AFC circuit 145.

As described above, if the shift within the carrier interval is eliminated by the OFDM demodulation and the shift in the unit of the carrier interval is eliminated, the carrier for the TMCC signal is at a predetermined position based on the position of the data start pulse.
The TMCC signal can be decoded by demodulating the carrier for the TMCC signal at the same position between the symbols by the DBPSK method.

Here, the DBPSK modulation / demodulation will be briefly described. The TMCC signal consists of 204 bits, which is the same as the number of symbols in one frame. According to the DBPSK modulation, each bit of the TMCC signal is encoded as a phase difference of a carrier between a corresponding symbol and a symbol immediately before the symbol. More specifically, “0” is encoded as a phase difference of 0 degrees, and “1” is encoded as a phase difference of 180 degrees. In practice, the level of the I signal of the carrier is changed as shown on the constellation of FIG.
When the bit of "0" is encoded, if the I signal in the previous symbol is negative, the I signal in the symbol corresponding to that bit is also negative. On the other hand, when the bit of “1” is encoded, if the I signal in the immediately preceding symbol is negative, the I signal in the symbol corresponding to that bit is positive. In any case, the Q signal is always “0”.

When the levels of the I signal and the Q signal are represented by, for example, 12 bits using two's complement, the I signal having the maximum positive level is [011111111111], and the I signal having the maximum negative level is [100000000000]
Becomes The Q signal is always [000000000000]. Here, the most significant bit (MSB) is a sign bit.

The demodulation by the DBPSK system performs the reverse process. Referring to FIG. 4, TMCC decoding circuit 16
Are a valid bit extracting circuit 161 for extracting valid upper bits of a TMCC signal carrier, a DBPSK demodulating circuit 162 for demodulating a signal output from the valid bit extracting circuit 161 by a DBPSK method, and a DBPSK demodulating circuit 1.
A synchronization detection / protection circuit 163 for detecting and protecting a synchronization word from the TMCC signal output from
Majority decision circuit 164 for majority deciding each bit of the TMCC signal output from PSK demodulation circuit 162 within the same symbol
And an SDSC (difference cyclic) decoding circuit 165 for performing error correction on the TMCC signal output from the majority circuit 164
And a TMCC signal acquisition circuit 166 for acquiring the error-corrected TMCC signal output from the SDSC decoding circuit 165.
And a timing adjustment circuit 167 for synchronizing and outputting various control signals including frame pulses, I and Q data signals, and TMCC signals.

The feature of the present invention resides in that an effective bit extracting circuit 161 is provided, and the other circuits 162 to 167
A general decoding process of the MCC signal is performed.

The DBPSK demodulation circuit 162 converts the carrier of the TMCC signal at the same position in each symbol into the DBP
Demodulate by SK method. More specifically, the phase of the carrier in the current symbol is compared with the phase of the carrier in the immediately preceding symbol. If the phase difference is 0 degree, it is set to “0”, and if the phase difference is 180 degrees, it is set to “1”. ". For example, as shown in FIG. 3, if the current I signal is negative and the immediately preceding I signal is also negative, the phase difference is 0 degree, so that the bit of the TMCC signal corresponding to the current symbol is set to “0”. And demodulate. On the other hand, if the current I signal is positive and the previous I signal is negative, the phase difference is 180 degrees, so that the bit of the TMCC signal corresponding to the current symbol is demodulated to "1".

The majority decision circuit 164 compares the demodulated bits in each symbol and determines “0” or “1” by majority decision. Since there are a plurality of carriers of the TMCC signal having the same information in each symbol, even if any carrier has phase distortion, the TMCC is determined by majority decision.
The CC signal can be decoded as before.

The synchronization word detection / protection circuit 163 sequentially stores the bits of the TMCC signal for 16 consecutive symbols in the shift register. When a new bit is input to the shift register, the oldest bit is output from the shift register. Thus, one of the TMCC signals is
A 6-bit synchronization word pattern is detected. As described above, each frame is composed of 204 symbols.
A synchronization word pattern predetermined on the transmission side for specifying the first symbol of each frame is the first symbol of the TMCC signal.
To the 16th bit. Therefore, the detected 16-bit synchronization word pattern is compared with a predetermined synchronization word pattern, and if they match, the leading symbol in the frame can be specified. Although such a 16-bit synchronization word exists in each frame unit, [00
11010111101110], [1100101000010001], [00110101
1110110] is inverted for each frame. Therefore, once a predetermined synchronization word pattern is found, it is checked whether the pattern appears periodically in frame units. As described above, the TMCC signal is reproduced by determining the corresponding bit of the TMCC signal by majority decision for each symbol and specifying the first symbol of each frame, and this is decoded by the SDSC decoding circuit 165 in units of error-correction-coded blocks. Give to.

The SDSC decoding circuit 165 corrects the error of the TMCC signal output from the majority circuit 164. Here, the majority decision circuit 164 to the SDSC decoding circuit 1
Since the TMCC signal is given to each bit at 65,
The SDSC decoding circuit 165 performs error correction by hard decision. Alternatively, the sum of the TMCC signals in each symbol may be directly provided to the SDSC decoding circuit 165.
In this case, the SDSC decoding circuit 165 performs error correction by soft decision.

In the TMCC signal acquisition circuit 166, the SDS
TMCC after error correction output from C decoding circuit 165
Get the signal. If the error cannot be corrected due to the influence of noise or the like, the TMCC signal in the previous state is given to the timing adjustment circuit 167.

As described above, the TMCC signal is DBPSK
Ideally, the phase of the TMCC signal is 0 degree or 180 degrees because the modulation and demodulation are performed by the method. However, in practice, it slightly deviates from 0 or 180 degrees due to distortion during transmission.

As shown on the constellation of FIG. 5, when the carrier of a TMCC signal having a phase of 0 degree ideally undergoes amplitude distortion and phase distortion, its phase slightly deviates from 0 degree and its amplitude becomes smaller. Is slightly smaller. As shown in FIG. 6, when there is no amplitude distortion and no phase distortion, the I signal has a positive predetermined value [011100000000],
The signal has a value of 0 [000000000000]. On the other hand, when subjected to amplitude distortion and phase distortion, the I signal has a value slightly smaller than the positive predetermined value, and the Q signal has a value slightly larger than the zero value.

As shown in the constellation of FIG. 7, when a carrier of a TMCC signal having a phase of 180 degrees ideally receives amplitude distortion and phase distortion, its phase slightly deviates from 180 degrees and Its amplitude will be slightly smaller. As shown in FIG. 8, when there is no distortion,
The I signal has a negative predetermined value [100011111111], and the Q signal has a zero value [000000000000]. On the other hand, when distorted, the I signal has a value slightly smaller than the negative predetermined value and the Q signal has a value slightly larger than the zero value.

Therefore, in the DBPSK demodulation circuit 162, the phase difference between the carrier of the TMCC signal in the current symbol and the carrier of the TMCC signal in the immediately preceding symbol is actually close to 0 ° or 180 °. "0" if close
Or “1”. Therefore, if the upper few bits of the I signal and the Q signal are detected, it is possible to sufficiently determine whether it is “0” or “1”.

In general, a method is conceivable in which the upper 6 bits are always used so that the TMCC signal can be correctly decoded even if the phase distortion and the amplitude distortion are somewhat large. Increasing the number of bits used for decoding increases the decoding accuracy.
The circuit scale of the SK demodulation circuit 162 increases. Since there are N TMCC signals in the same symbol, N DBPSK demodulation circuits 162 are required correspondingly. Therefore, if the number of bits used for decoding is increased, N times that
The circuit scale of the BPSK demodulation circuit 162 increases. Further, in order to store the TMCC signal in the immediately preceding symbol, a storage capacity N times the number of bits used for decoding is required.

If the number of bits used for decoding is reduced, the circuit scale can be reduced, but the decoding accuracy decreases,
When relatively large phase distortion and amplitude distortion are received, the TMCC signal cannot be accurately decoded.

In order to solve such a problem, if a high-level carrier is selected and demodulated from the N TMCC signal carriers, a DBPSK demodulation circuit having a small circuit size and high decoding accuracy is realized. be able to. However, in this method, even if the level is high due to distortion, it is determined to be a reliable carrier of the TMCC signal.

Therefore, in the embodiment of the present invention, TMC
The effective bit extracting circuit 161 is designed to accurately decode the TMCC signal even when the carrier of the C signal is subjected to phase distortion and amplitude distortion and the level is lowered.
Is provided. In this effective bit extraction circuit 161, T
Several valid bits are extracted from all bits indicating the carrier of the MCC signal. More specifically, three bits are extracted centering on the bit closest to the MSB and having a value different from the value of the MSB.

Referring to FIG. 9, valid bit extraction circuit 16
1 is a code discrimination circuit 1611 for discriminating the sign of the I signal and the Q signal, and the MSB when the I signal or the Q signal is positive.
And a bit search circuit 1612 for searching the bits in order from the first bit to specify the position of the first bit having "1", and searching the bits in order from the MSB when the I signal or the Q signal is negative, and A bit search circuit 1613 for specifying the bit position of
And a bit extracting circuit 1614 for extracting 3 bits centering on the bit specified by 613.

In the case of the I signal and the Q signal shown in FIGS. 5 and 6, the MSBs of the I signal and the Q signal are both "0". to decide. In this case, the bit search circuit 1612 searches the bits of the I signal and the Q signal in order from the MSB to the least significant bit (LSB), and specifies the position of the bit having "1" at the beginning. When there is no distortion, it is 1 more than the MSB of the I signal.
Identify the next lower bit, and if there is distortion, MS of the I signal
Identify the four bits below B and at the same time
Identify the five bits below SB. When there is no distortion, the bit extracting circuit 1614 extracts the specified bit, the bit (MSB) one bit higher than the specified bit, and the bit lower than the specified bit. If there is distortion, the positions of the two specified bits are compared, and three bits are extracted centering on the higher-order bit. In this example, the bit specified in the I signal is higher in the order, so that for both the I signal and the Q signal, the bit four bits lower than the MSB, the bit one bit higher than the MSB, and the bit one bit lower than the MSB. Is extracted.

On the other hand, in the case of the distorted I signal and Q signal shown in FIG. 7 and FIG.
Since B is both "1", the sign determination circuit 1611 determines that both the I signal and the Q signal are negative. In this case, the bit search circuit 1613 searches the bits of the I signal and the Q signal in order from the MSB to the LSB,
First, the position of a bit having "0" is specified.
In this example, for the I signal, four bits below the MSB are specified, and for the Q signal, five bits below the MSB are specified. The bit extracting circuit 1614 compares the positions of the two specified bits and extracts 3 bits centering on the higher-order bit. In this example I
Since the bit specified in the signal is higher, the bits four bits lower than the MSB, one bit higher than the MSB, and one bit lower than the MSB are extracted for both the I signal and the Q signal. .

The 3-bit I signal and 3-bit Q signal extracted as described above are supplied to the DBPSK demodulation circuit 162. In the DBPSK demodulation, only the phase represented by the ratio between the I signal and the Q signal is effective regardless of the absolute value of the amplitude. Therefore, demodulation can be sufficiently performed with these 3-bit signals.

According to the TMCC decoding circuit 16 configured as described above, a TMCC signal can be decoded with high accuracy even with a small circuit scale.

After the decoding of the TMCC signal, the detection circuit 18 carries out the carrier of the data signal outputted from the OFDM demodulation circuit 14 based on the TMCC signal outputted from the TMCC decoding circuit 16 (excluding the carrier of the TMCC signal and the pilot signal). Is demodulated. More specifically, the modulation method assigned to the carrier of the data signal for each layer is TM
Identify based on the CC signal. QPSK modulation, 16QA
For a carrier that has been M-modulated or 64QAM-modulated, equalization of amplitude and phase is performed using a pilot signal. In addition, differential demodulation is performed between symbols for a carrier that has been DQPSK modulated. With differential demodulation,
It becomes a signal of the QPSK system in which the amplitude and the phase are equalized.

The time / frequency deinterleave circuit 20 rearranges carriers in the time direction, that is, between symbols, and rearranges carriers in the frequency direction, that is, within symbols.

The error correction circuit 22 performs error correction by Vidabi decoding and Reed-Solomon decoding. Thereby, a data stream compliant with MPEG-2 can be obtained.

As described above, according to this embodiment, T
Valid 3 out of bits representing the carrier of the MCC signal
Since the effective bit extraction circuit 161 that extracts only bits is provided, the TMCC signal can be accurately decoded even with a small circuit scale.

In the above-described embodiment, a bit having a value different from the value of the MSB is specified, and three bits are extracted centering on the specified bit, but at least the specified bit and a bit above the specified bit are extracted. , The accuracy decreases slightly, but the TMCC signal can be decoded with a smaller circuit scale. Conversely, if the lower bits are extracted in addition to the three bits centered on the specified bit, the circuit scale is slightly increased, but the TMCC signal can be decoded with higher accuracy.

The embodiments disclosed this time are to be considered in all respects as illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

[0050]

According to the present invention, since several effective bits are extracted from the bits representing the carrier of the transmission multiplex control signal, the transmission multiplex control signal can be obtained with high accuracy even with a small circuit scale.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a front-end configuration of a terrestrial digital television broadcast receiver according to an embodiment of the present invention.

FIG. 2 is a diagram showing a signal configuration after fast Fourier transform in the terrestrial digital television broadcast receiver shown in FIG.

FIG. 3 is a diagram for explaining DBPSK modulation and demodulation.

FIG. 4 is a block diagram illustrating a configuration of a TMCC decoding circuit in FIG. 1;

FIG. 5 is a constellation diagram showing positive carriers of a TMCC signal.

FIG. 6 is a diagram showing bits of an I signal and a Q signal constituting a carrier of the TMCC signal shown in FIG. 5;

FIG. 7 is a constellation diagram showing negative carriers of a TMCC signal.

FIG. 8 is a diagram showing bits of an I signal and a Q signal constituting a carrier of the TMCC signal shown in FIG. 7;

FIG. 9 is a block diagram illustrating a configuration of a valid bit extraction circuit in FIG. 4;

[Explanation of symbols]

14 OFDM demodulation circuit, 16 TMCC decoding circuit, 1
61 effective bit extraction circuit, 162 DBPSK demodulation circuit, 1611 code discrimination circuit, 1612, 1613 bit search circuit, 1614 bit extraction circuit.

Claims (4)

[Claims] 1. A carrier of a data signal together with a carrier of a transmission multiplex control signal modulated by a DBPSK method is OFD
A digital broadcast receiver for receiving a digital broadcast modulated in the M system, comprising: an OFDM demodulator for demodulating a carrier of the data signal and the transmission multiplex control signal in an OFDM system; and an output from the OFDM demodulator. Effective bit extracting means for extracting, from the bits indicating the carrier of the transmission multiplex control signal, a bit having a value closest to the most significant bit and having a value different from the value of the most significant bit and a bit immediately above the bit, The bit output from the effective bit extracting means is DBP
DBPSK which obtains transmission multiplex control signal by demodulation by SK method
A digital broadcast comprising: a demodulation unit; and a data signal demodulation unit that demodulates a carrier of a data signal output from the OFDM demodulation unit based on a transmission multiplex control signal output from the DBPSK demodulation unit to obtain a data signal. Receiving machine. 2. The digital broadcast receiver according to claim 1, wherein said valid bit extracting means further extracts a bit immediately below a bit having a value different from a value of said most significant bit. 3. The valid bit extracting means includes: code discriminating means for discriminating a code of a carrier of the transmission multiplex control signal; and as a result of the discrimination by the sign discriminating means, when the sign is positive, in order from the most significant bit A bit for searching for a bit to specify the position of the first bit having "1", and when the sign is negative, searching for the bit in order from the most significant bit to specify the position of the first bit having "0" The digital broadcast receiver according to claim 1, further comprising: a search unit; and a bit extracting unit that extracts a bit at a position specified by the bit search unit and a bit immediately above the bit. 4. The digital broadcast receiver according to claim 3, wherein said bit extracting means further extracts one bit below the bit at the specified position.