JP2002026327A - How to make splits - Google Patents
How to make splitsInfo
- Publication number
- JP2002026327A JP2002026327A JP2000199981A JP2000199981A JP2002026327A JP 2002026327 A JP2002026327 A JP 2002026327A JP 2000199981 A JP2000199981 A JP 2000199981A JP 2000199981 A JP2000199981 A JP 2000199981A JP 2002026327 A JP2002026327 A JP 2002026327A
- Authority
- JP
- Japan
- Prior art keywords
- divided
- substrate
- release layer
- semiconductor element
- light
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 238000000034 method Methods 0.000 claims abstract description 33
- 239000004065 semiconductor Substances 0.000 claims abstract description 22
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 8
- 239000001257 hydrogen Substances 0.000 claims abstract description 8
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 7
- 239000010409 thin film Substances 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 230000001747 exhibiting effect Effects 0.000 claims 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 6
- 229910004298 SiO 2 Inorganic materials 0.000 abstract description 6
- 239000011521 glass Substances 0.000 abstract description 3
- 238000000926 separation method Methods 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 30
- 239000010408 film Substances 0.000 description 26
- 230000010355 oscillation Effects 0.000 description 7
- 239000007789 gas Substances 0.000 description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 239000011229 interlayer Substances 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 230000002950 deficient Effects 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 150000004678 hydrides Chemical class 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Landscapes
- Thin Film Transistor (AREA)
Abstract
(57)【要約】
【課題】多数の微小物を容易に得ることのできる分割方
法を提供する。
【解決手段】ガラス製の基板１上に、剥離層２として、
水素を８原子％含有する非晶質シリコン膜を形成する。
この剥離層２の上に、分割対象物３として、ＳｉＯ2 膜
３１と半導体素子層３２を形成する。その上にレジスト
パターン４を形成して、分割対象物３をドライエッチン
グする。これにより、基板１上に、剥離層２を介して分
割体３０が固定されている状態とする。次に、基板１側
からエキシマレーザ光を照射することにより、剥離層２
から分割体３０が剥離される。
(57) Abstract: Provided is a dividing method capable of easily obtaining a large number of minute objects. A release layer (2) is formed on a glass substrate (1).
An amorphous silicon film containing 8 atomic% of hydrogen is formed.
An SiO 2 film 31 and a semiconductor element layer 32 are formed on the separation layer 2 as the objects 3 to be divided. A resist pattern 4 is formed thereon, and the target 3 is dry-etched. Thus, the divided body 30 is fixed on the substrate 1 via the release layer 2. Next, an excimer laser beam is irradiated from the substrate 1 side, so that the release layer 2 is exposed.
The divided body 30 is peeled off from.
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、多数の微小物を容
易に得るために好適な、分割体の作製方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a divided body suitable for easily obtaining a large number of minute objects.
【０００２】[0002]
【従来の技術】有機ＥＬ素子を画素として備える有機Ｅ
Ｌ表示体は、高輝度で自発光であること、直流低電圧駆
動が可能であること、応答性が高速であること、固体有
機膜による発光であることから、表示性能に優れている
とともに、薄型化、軽量化、低消費電力化が可能である
ため、将来的に液晶表示体に代わるものとして期待され
ている。2. Description of the Related Art Organic EL devices having organic EL elements as pixels
The L display body is self-luminous with high brightness, can be driven at a low voltage with direct current, has a high response speed, and emits light by a solid organic film. Since it can be made thinner, lighter, and lower in power consumption, it is expected to replace liquid crystal displays in the future.
【０００３】特に、駆動方式がアクティブマトリックス
方式であるアクティブマトリックス型有機ＥＬ表示体
は、画素毎に駆動用のトランジスタを備えているため、
高輝度での高精細化が可能であり、多階調化や表示体の
大型化に対応できる。このトランジスタとしては、透明
で大面積の基板上に有機ＥＬ表示体を形成するために、
ガラス基板に形成可能な、低温多結晶シリコン膜を活性
層とする薄膜トランジスタを使用することが提案されて
いる。In particular, an active matrix type organic EL display in which the driving system is an active matrix system has a driving transistor for each pixel.
It is possible to achieve high definition with high luminance, and it is possible to cope with an increase in the number of gradations and the size of a display body. As this transistor, in order to form an organic EL display on a transparent and large-area substrate,
It has been proposed to use a thin film transistor that can be formed on a glass substrate and has a low-temperature polycrystalline silicon film as an active layer.
【０００４】[0004]
【発明が解決しようとする課題】上述のように、アクテ
ィブマトリックス型有機ＥＬ表示体では、各画素毎に薄
膜トランジスタを形成する必要があるが、これを表示体
基板に直接形成すると、画素数の増加に伴って、性能不
良の薄膜トランジスタが形成される可能性が高くなる。As described above, in the active matrix type organic EL display, it is necessary to form a thin film transistor for each pixel. However, when this is formed directly on the display substrate, the number of pixels increases. Accordingly, there is a high possibility that a thin film transistor having poor performance will be formed.
【０００５】これに対して、各画素用の薄膜トランジス
タを、表示用基板とは別の基板上に多数個並列に形成
し、これを分割して各分割体のトランジスタ性能を検査
し、良品のみを表示体用基板の各画素位置に配置すれ
ば、表示体用基板上に性能不良の薄膜トランジスタが形
成されないようにすることができる。この場合には、多
数の微小物を容易に得ることのできる分割方法が必要と
なる。On the other hand, a plurality of thin film transistors for each pixel are formed in parallel on a substrate different from the display substrate, and the thin film transistors are divided and the transistor performance of each divided body is inspected. By disposing the thin film transistors at the respective pixel positions on the display substrate, it is possible to prevent the formation of a thin-film transistor having poor performance on the display substrate. In this case, a dividing method that can easily obtain a large number of minute objects is required.
【０００６】本発明は、多数の微小物を容易に得ること
のできる分割方法を提供することを課題とする。An object of the present invention is to provide a dividing method capable of easily obtaining a large number of minute objects.
【０００７】[0007]
【課題を解決するための手段】上記課題を解決するため
に、本発明は、基板上に分割対象物を、光が照射される
ことで剥離作用を発揮する材料からなる剥離層を介して
存在させ、この分割対象物を分割した後に剥離層に光を
照射することにより、分割体を基板から剥離することを
特徴とする分割体の作製方法を提供する。In order to solve the above-mentioned problems, the present invention is directed to a method in which an object to be divided is provided on a substrate via a release layer made of a material which exerts a release effect when irradiated with light. A method for manufacturing a divided body is characterized in that the divided object is separated from the substrate by irradiating the separation layer with light after dividing the object to be divided.
【０００８】この方法において、剥離層をなす材料とし
ては、水素を含有する非晶質シリコンを用い、照射光の
光源としては、高効率で高出力の紫外線光源であるエキ
シマレーザを用いることが好ましい。水素の含有率は２
原子％以上２０原子％以下であることが好ましい。エキ
シマレーザとしては、Ａｒ2 （発振波長１２６ｎｍ）、
Ｋｒ2 （発振波長１４７ｎｍ）、Ｘｅ2 （発振波長１７
２ｎｍ）等の希ガスエキシマレーザや、ＡｒＦ（発振波
長１９３ｎｍ）、ＫｒＦ（発振波長２４８ｎｍ）、Ｘｅ
Ｃｌ（発振波長３０８ｎｍ）等の希ガスハイドライドエ
キシマレーザが挙げられる。本発明の方法では、これら
のうちＸｅＣｌエキシマレーザを用いることが好まし
い。In this method, it is preferable that amorphous silicon containing hydrogen is used as a material forming the peeling layer, and an excimer laser which is a high-efficiency and high-output ultraviolet light source is used as a light source of irradiation light. . Hydrogen content is 2
It is preferable that the content be at least 20 atomic%. As an excimer laser, Ar 2 (oscillation wavelength 126 nm),
Kr 2 (oscillation wavelength 147 nm), Xe 2 (oscillation wavelength 17
Rare gas excimer laser such as 2 nm), ArF (oscillation wavelength 193 nm), KrF (oscillation wavelength 248 nm), Xe
A rare gas hydride excimer laser such as Cl (oscillation wavelength: 308 nm) is exemplified. In the method of the present invention, it is preferable to use a XeCl excimer laser among them.
【０００９】水素を含有する非晶質シリコンからなる剥
離層にエキシマレーザ等の高効率で高出力の光が照射さ
れると、この剥離層から水素が放出されて剥離層内の圧
力が高くなる。したがって、基板上で分割対象物を分割
した後に、この剥離層にエキシマレーザ等の光を照射す
ることにより、剥離層の層内、剥離層と基板との界面、
および剥離層と分割対象物との界面の少なくとも何れか
の位置で、分割体が基板から剥離される。When a highly efficient and high-output light such as an excimer laser is irradiated on a release layer made of amorphous silicon containing hydrogen, hydrogen is released from the release layer and the pressure in the release layer increases. . Therefore, after dividing the object to be divided on the substrate, by irradiating this release layer with light such as an excimer laser, the inside of the release layer, the interface between the release layer and the substrate,
The divided body is peeled from the substrate at at least any position of the interface between the peeling layer and the object to be divided.
【００１０】分割対象物の照射光透過率が低い場合に
は、照射光を透過させる材料からなる基板を用い、この
基板側から光照射を行うことが好ましい。本発明の方法
は、分割対象物が、半導体素子が複数個並列に形成され
ている半導体素子層を有する場合（すなわち、分割対象
物は半導体素子層を有し、この半導体素子層の面内に複
数個の半導体素子が形成されている場合）に、好適に適
用される。前記半導体素子としては、例えば、表示体
（有機ＥＬ表示体、液晶表示体等）の各画素用の薄膜ト
ランジスタが挙げられる。[0010] When the irradiation light transmittance of the object to be divided is low, it is preferable to use a substrate made of a material that transmits the irradiation light and to perform light irradiation from the substrate side. In the method of the present invention, when the object to be divided has a semiconductor element layer in which a plurality of semiconductor elements are formed in parallel (that is, the object to be divided has a semiconductor element layer, and In the case where a plurality of semiconductor elements are formed). Examples of the semiconductor element include a thin film transistor for each pixel of a display (organic EL display, liquid crystal display, etc.).
【００１１】[0011]
【発明の実施の形態】以下、本発明の実施形態について
説明する。図１および２は、本発明の一実施形態に相当
する方法を説明する図である。この実施形態の方法で
は、先ず、図１（ａ）に示すように、ガラス製の基板１
上に、剥離層２として、水素を８原子％含有する非晶質
シリコン膜を、低圧ＣＶＤ法により厚さ１２０ｎｍで形
成した。このシリコン膜は、Ｓｉ2 Ｈ6 ガスを原料ガス
として用い、雰囲気温度４２５℃の条件で形成した。Embodiments of the present invention will be described below. 1 and 2 are diagrams illustrating a method according to an embodiment of the present invention. In the method of this embodiment, first, as shown in FIG.
An amorphous silicon film containing 8 atomic% of hydrogen was formed thereon as a release layer 2 by a low-pressure CVD method to a thickness of 120 nm. This silicon film was formed at a temperature of 425 ° C. using Si 2 H 6 gas as a source gas.
【００１２】この剥離層２の上に、分割対象物３とし
て、ＳｉＯ2 膜３１と半導体素子層３２を順次形成し
た。ＳｉＯ2 膜３１は、ＥＣＲ（電子サイクロトロン共
鳴）−ＣＶＤ法により、ＳｉＨ4 とＯ2 の混合ガスを原
料ガスとして用い、雰囲気温度１００℃の条件で、厚さ
２００ｎｍに形成した。半導体素子層３２には、有機Ｅ
Ｌ表示体の各画素用の薄膜トランジスタが、多数個並列
に、しかも半導体素子層３２の面内で前後左右に整然と
並んだ配置で形成されている。この半導体素子層３２
は、図２（ａ）〜（ｄ）に示す各工程により、以下の方
法で形成した。An SiO 2 film 31 and a semiconductor element layer 32 were sequentially formed on the peeling layer 2 as the object 3 to be divided. The SiO 2 film 31 was formed to a thickness of 200 nm by ECR (Electron Cyclotron Resonance) -CVD using a mixed gas of SiH 4 and O 2 as a source gas at an ambient temperature of 100 ° C. The semiconductor element layer 32 includes organic E
A large number of thin film transistors for each pixel of the L display are formed in parallel, and are arranged in an orderly manner in front, rear, left and right in the plane of the semiconductor element layer 32. This semiconductor element layer 32
Was formed by the following method by the steps shown in FIGS. 2 (a) to 2 (d).
【００１３】先ず、ＳｉＯ2 膜３１の上に、Ｓｉ2 Ｈ6
を用いた低圧ＣＶＤ法により、アモルファスシリコンを
成膜する。次に、エキシマレーザー等によるレーザー照
射法によって、このアモルファスシリコンを再結晶化さ
せて、多結晶シリコン膜１２とする。図２（ａ）はこの
状態を示す。次に、この多結晶シリコン膜１２をパター
ニングした後、ゲート絶縁膜用の絶縁膜１３を成膜し、
さらにその上に成膜およびパターニングによってゲート
電極１４を形成する。図２（ｂ）はこの状態を示す。First, Si 2 H 6 is deposited on the SiO 2 film 31.
Amorphous silicon is formed by a low-pressure CVD method using. Next, the amorphous silicon is recrystallized by a laser irradiation method using an excimer laser or the like to form a polycrystalline silicon film 12. FIG. 2A shows this state. Next, after patterning the polycrystalline silicon film 12, an insulating film 13 for a gate insulating film is formed,
Further, a gate electrode 14 is formed thereon by film formation and patterning. FIG. 2B shows this state.
【００１４】次に、リンやボロンなどの不純物を、ゲー
ト電極１４を用いて自己整合的に多結晶シリコン膜１２
に打ち込む。これにより、ゲート電極１４の両側にソー
ス・ドレイン領域１５を形成し、ＣＭＯＳＦＥＴを形成
する。次に、第１層間絶縁膜１６を成膜し、この絶縁膜
にコンタクトホールを開けた後、ソース・ドレイン電極
１７を成膜およびパターニングによって形成する。図２
（ｃ）はこの状態を示す。次に、図２（ｄ）に示すよう
に、第２層間絶縁膜１８を成膜して、半導体素子層３２
の表面を平らにする。Next, impurities such as phosphorus and boron are self-aligned with the polycrystalline silicon film 12 using the gate electrode 14.
Type in. As a result, source / drain regions 15 are formed on both sides of the gate electrode 14, and a CMOSFET is formed. Next, a first interlayer insulating film 16 is formed, and after forming a contact hole in the insulating film, a source / drain electrode 17 is formed by film formation and patterning. FIG.
(C) shows this state. Next, as shown in FIG. 2D, a second interlayer insulating film 18 is formed, and the semiconductor element layer 32 is formed.
Flatten the surface.
【００１５】このようにして形成された半導体素子層３
２の上にレジスト膜を形成した後、フォトリソグラフィ
でこのレジスト膜に格子状の分割線パターンを転写する
ことにより、レジストパターン４を形成した。図１
（ａ）はこの状態を示す。なお、この分割線パターン
は、半導体素子層３２における、各画素用の薄膜トラン
ジスタの境界線に対応させたパターンである。The semiconductor element layer 3 thus formed
After a resist film was formed on the resist film 2, a resist pattern 4 was formed by transferring a grid-like dividing line pattern to the resist film by photolithography. Figure 1
(A) shows this state. The dividing line pattern is a pattern corresponding to the boundary of the thin film transistor for each pixel in the semiconductor element layer 32.
【００１６】次に、この状態で分割対象物３をドライエ
ッチングすることにより、レジストパターン４の分割線
４１に沿って分割対象物３を分割する。その結果、図１
（ｂ）に示すように、基板１の上に剥離層２を介して分
割体３０が固定されている状態となる。次に、図１
（ｃ）に示すように、この状態の基板１を、液体の入っ
た容器５の上方に、分割体３０側を下側に向けて置き、
基板１の上方に配置したＸｅＣｌエキシマレーザ発振装
置から、基板１の全面に向けてＸｅＣｌエキシマレーザ
６を照射した。照射条件は、エネルギー密度１６０ｍＪ
／ｃｍ2 、照射時間２０ｎｓｅｃとした。これにより、
剥離層２から水素が放出されて剥離層２内の圧力が高く
なり、剥離層２が破壊されて分割体３０が剥離される。
その結果、図１（ｄ）に示すように、液体の入った容器
５内に分割体３０が回収される。Next, in this state, the target object 3 is dry-etched to divide the target object 3 along the division line 41 of the resist pattern 4. As a result, FIG.
As shown in (b), the divided body 30 is fixed on the substrate 1 via the release layer 2. Next, FIG.
As shown in (c), the substrate 1 in this state is placed above the container 5 containing the liquid, with the divided body 30 facing downward.
The XeCl excimer laser 6 was irradiated onto the entire surface of the substrate 1 from a XeCl excimer laser oscillation device arranged above the substrate 1. Irradiation condition is energy density 160mJ
/ Cm 2 and an irradiation time of 20 nsec. This allows
Hydrogen is released from the release layer 2 and the pressure in the release layer 2 increases, so that the release layer 2 is broken and the divided body 30 is released.
As a result, as shown in FIG. 1D, the divided bodies 30 are collected in the container 5 containing the liquid.
【００１７】以上のように、この方法によれば、多数の
微小な分割体３０を容易に得ることができる。また、こ
の実施形態では、得られた分割体３０が、ＳｉＯ2 膜３
１上に、有機ＥＬ表示体の各画素用の薄膜トランジスタ
とその電極が形成された単位ブロックであるため、この
単位ブロックのトランジスタ性能を検査し、良品のみを
表示体用基板の各画素位置に配置すれば、表示体用基板
上に性能不良の薄膜トランジスタが形成されないように
することができる。As described above, according to this method, a large number of minute divided bodies 30 can be easily obtained. In this embodiment, the obtained divided body 30 is made of the SiO 2 film 3
1 is a unit block in which a thin film transistor for each pixel of the organic EL display and its electrodes are formed, so that the transistor performance of this unit block is inspected and only non-defective products are arranged at each pixel position of the display substrate. By doing so, it is possible to prevent a thin-film transistor having poor performance from being formed on the display substrate.
【００１８】さらに、この分割体は、例えば以下の方法
で基板に配置することができる。第１の方法としては、
基板の分割体を配置する各位置に、分割体の形状に合わ
せた形状の凹部を設け、液体中でこの凹部に分割体を嵌
め込む方法が挙げられる。第２の方法としては、厚さ方
向に貫通する穴を基板の分割体を配置する各位置に設
け、基板の一方の面側の圧力を他方の面側の圧力より高
くするか前記穴に流体を通して、基板の一方の面の前記
穴の位置に分割体を導く方法が挙げられる。第３の方法
としては、基板の分割体を配置する各位置にクーロン引
力で分割体を導いて配置する方法が挙げられる。Further, the divided body can be arranged on the substrate by, for example, the following method. As a first method,
There is a method in which a concave portion having a shape corresponding to the shape of the divided body is provided at each position where the divided body of the substrate is arranged, and the divided body is fitted into the concave portion in the liquid. As a second method, a hole penetrating in the thickness direction is provided at each position where the divided body of the substrate is arranged, and the pressure on one surface side of the substrate is made higher than the pressure on the other surface side or the fluid is supplied to the hole. Through which the divided body is guided to the position of the hole on one surface of the substrate. As a third method, there is a method in which the divided body is guided and arranged at each position where the divided body of the substrate is arranged by Coulomb attraction.
【００１９】なお、この実施形態では、フォトリソグラ
フィとエッチングを行うことにより分割対象物を分割し
ているが、レーザや電子線を用いて、分割対象物を直接
切断してもよい。また、この実施形態では、分割対象物
が、半導体素子が多数個並列にしかも面内で前後左右に
整然と並んだ配置で形成されている半導体素子層を有す
るものであるため、分割対象物を格子状の分割線で分割
している。しかし、分割対象物を構成する半導体素子層
の面内での複数個の半導体素子の配置は、前後左右に整
然と並んだ配置に限定されない。そして、分割線はこの
配置に応じて適宜設定される。In this embodiment, the object to be divided is divided by performing photolithography and etching. However, the object to be divided may be directly cut using a laser or an electron beam. Further, in this embodiment, since the object to be divided has a semiconductor element layer in which a large number of semiconductor elements are arranged in parallel and arranged in order in the front, rear, left and right, the object to be divided is a grid. It is divided by a shape-like dividing line. However, the arrangement of the plurality of semiconductor elements in the plane of the semiconductor element layer forming the object to be divided is not limited to an arrangement arranged in order in front, rear, left and right. Then, the dividing line is appropriately set according to this arrangement.
【００２０】また、本発明の方法において、分割対象物
は特に限定されず、ガラス板等であってもよい。また、
本発明の方法は、板状部材や膜状部材から多数の微小物
を切り出す方法として好適であり、半導体素子以外で
も、液晶のスペーサやマイクロレンズ等を作製する方法
として好適である。In the method of the present invention, the object to be divided is not particularly limited, and may be a glass plate or the like. Also,
The method of the present invention is suitable as a method for cutting out a large number of minute objects from a plate-like member or a film-like member, and is also suitable as a method for producing a liquid crystal spacer, a microlens, or the like, in addition to a semiconductor element.
【００２１】[0021]
【発明の効果】以上説明したように、本発明の方法によ
れば、多数の微小物を容易に得ることができる。また、
本発明の方法により、表示体の各画素用の薄膜トランジ
スタが形成された単位ブロックを得ることによって、こ
の単位ブロックのトランジスタ性能を検査し、良品のみ
を表示体用基板の各画素位置に配置すれば、表示体用基
板上に性能不良の薄膜トランジスタが形成されないよう
にすることができる。As described above, according to the method of the present invention, a large number of minute objects can be easily obtained. Also,
According to the method of the present invention, by obtaining a unit block in which a thin film transistor for each pixel of the display body is formed, the transistor performance of this unit block is inspected, and only a non-defective product is disposed at each pixel position of the display body substrate. Further, it is possible to prevent a thin-film transistor having poor performance from being formed on the display substrate.
【図１】本発明の一実施形態に相当する方法を説明する
図である。FIG. 1 is a diagram illustrating a method corresponding to an embodiment of the present invention.
【図２】本発明の一実施形態に相当する方法を説明する
図である。FIG. 2 is a diagram illustrating a method corresponding to an embodiment of the present invention.
１ 基板 ２ 剥離層 ３ 分割対象物 ４ レジストパーターン ５ 液体を入れた容器 ６ エキシマレーザ光 １２ 多結晶シリコン膜 １３ 絶縁膜 １４ ゲート電極 １５ ソース・ドレイン領域 １６ 第１層間絶縁膜 １７ ソース・ドレイン電極 １８ 第２層間絶縁膜 ３０ 分割体 ３１ ＳｉＯ2 膜 ３２ 半導体素子層 ４１ 分割線REFERENCE SIGNS LIST 1 substrate 2 release layer 3 object to be divided 4 resist pattern 5 container containing liquid 6 excimer laser beam 12 polycrystalline silicon film 13 insulating film 14 gate electrode 15 source / drain region 16 first interlayer insulating film 17 source / drain electrode 18 Second interlayer insulating film 30 Divided body 31 SiO 2 film 32 Semiconductor element layer 41 Dividing line
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｈ０１Ｌ 29/78 ６１３Ａ ６２６Ｃ (72)発明者 井上 聡 長野県諏訪市大和３丁目３番５号 セイコ ーエプソン株式会社内 Ｆターム(参考） 5F110 AA26 BB01 BB04 CC02 GG02 GG13 GG47 HJ01 NN03 PP03 QQ11 QQ16 QQ19 ──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 7 Identification Symbol FI Theme Court ゛ (Reference) H01L 29/78 613A 626C (72) Inventor Satoshi Inoue 3-5-3 Yamato, Suwa-shi, Nagano Pref. Seiko Epson Corporation Company F term (reference) 5F110 AA26 BB01 BB04 CC02 GG02 GG13 GG47 HJ01 NN03 PP03 QQ11 QQ16 QQ19
Claims (5)
ことで剥離作用を発揮する材料からなる剥離層を介して
存在させ、この分割対象物を分割した後に剥離層に光を
照射することにより、分割体を基板から剥離することを
特徴とする分割体の作製方法。1. An object to be divided is present on a substrate via a release layer made of a material exhibiting a peeling action when irradiated with light, and after the object to be divided is divided, the release layer is irradiated with light. Thereby separating the divided body from the substrate.
り、基板側から光照射を行う請求項１記載の分割体の作
製方法。2. The method according to claim 1, wherein the substrate is made of a material that transmits irradiation light, and the substrate is irradiated with light.
質シリコンであり、照射光はエキシマレーザ光である請
求項１または２記載の分割体の作製方法。3. The method for manufacturing a divided body according to claim 1, wherein the material forming the release layer is amorphous silicon containing hydrogen, and the irradiation light is excimer laser light.
形成されている半導体素子層を有する請求項１乃至３の
いずれか１項に記載の分割体の作製方法。4. The method according to claim 1, wherein the object to be divided has a semiconductor element layer in which a plurality of semiconductor elements are formed in parallel.
膜トランジスタである請求項４記載の分割体の作製方
法。5. The method according to claim 4, wherein the semiconductor element is a thin film transistor for each pixel of a display.
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004096018A (en) * | 2002-09-03 | 2004-03-25 | Seiko Epson Corp | Circuit board manufacturing method, electro-optical device, and electronic apparatus |
| JP2005051117A (en) * | 2003-07-30 | 2005-02-24 | Oki Data Corp | Manufacturing method of semiconductor device |
| JP2005197611A (en) * | 2004-01-09 | 2005-07-21 | Sony Corp | Micro function element, manufacturing method thereof, circuit board, manufacturing method thereof, electronic application device, and manufacturing method thereof |
| JP2006156468A (en) * | 2004-11-25 | 2006-06-15 | Matsushita Electric Ind Co Ltd | Semiconductor laser device manufacturing method and manufacturing apparatus therefor |
| WO2006123825A1 (en) * | 2005-05-20 | 2006-11-23 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
| JP2007012031A (en) * | 2005-05-31 | 2007-01-18 | Semiconductor Energy Lab Co Ltd | Method for manufacturing antenna and method for manufacturing semiconductor device |
| US8357598B2 (en) | 2005-05-31 | 2013-01-22 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing antenna and method for manufacturing semiconductor device |
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| JPH10125929A (en) * | 1996-08-27 | 1998-05-15 | Seiko Epson Corp | Peeling method |
| JPH1124106A (en) * | 1997-07-03 | 1999-01-29 | Seiko Epson Corp | Liquid crystal panel substrate, liquid crystal panel, and methods of manufacturing the same |
| JPH11142878A (en) * | 1997-11-12 | 1999-05-28 | Sharp Corp | Method of forming transistor array panel for display |
| JP2001007340A (en) * | 1999-06-25 | 2001-01-12 | Toshiba Corp | Active matrix substrate and its manufacturing method, element forming substrate, intermediate transfer substrate |
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| JPH10125929A (en) * | 1996-08-27 | 1998-05-15 | Seiko Epson Corp | Peeling method |
| JPH1124106A (en) * | 1997-07-03 | 1999-01-29 | Seiko Epson Corp | Liquid crystal panel substrate, liquid crystal panel, and methods of manufacturing the same |
| JPH11142878A (en) * | 1997-11-12 | 1999-05-28 | Sharp Corp | Method of forming transistor array panel for display |
| JP2001007340A (en) * | 1999-06-25 | 2001-01-12 | Toshiba Corp | Active matrix substrate and its manufacturing method, element forming substrate, intermediate transfer substrate |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004096018A (en) * | 2002-09-03 | 2004-03-25 | Seiko Epson Corp | Circuit board manufacturing method, electro-optical device, and electronic apparatus |
| JP2005051117A (en) * | 2003-07-30 | 2005-02-24 | Oki Data Corp | Manufacturing method of semiconductor device |
| JP2005197611A (en) * | 2004-01-09 | 2005-07-21 | Sony Corp | Micro function element, manufacturing method thereof, circuit board, manufacturing method thereof, electronic application device, and manufacturing method thereof |
| JP2006156468A (en) * | 2004-11-25 | 2006-06-15 | Matsushita Electric Ind Co Ltd | Semiconductor laser device manufacturing method and manufacturing apparatus therefor |
| US7700392B2 (en) | 2004-11-25 | 2010-04-20 | Panasonic Corporation | Manufacturing method of semiconductor laser devices and manufacturing apparatus of the same |
| WO2006123825A1 (en) * | 2005-05-20 | 2006-11-23 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
| US7820526B2 (en) | 2005-05-20 | 2010-10-26 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
| US7989317B2 (en) | 2005-05-20 | 2011-08-02 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
| JP2007012031A (en) * | 2005-05-31 | 2007-01-18 | Semiconductor Energy Lab Co Ltd | Method for manufacturing antenna and method for manufacturing semiconductor device |
| US8357598B2 (en) | 2005-05-31 | 2013-01-22 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing antenna and method for manufacturing semiconductor device |
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