JP2002140051A - Liquid crystal display device, its driving method and driving method for portable information device using the display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device which is capable of reducing the power consumption during a still picture display and to provide a portable information device using the display device. SOLUTION: In the liquid crystal display device which conducts image displaying by receiving n-bit (where n is a natural number) digital signals, n storage circuits are incorporated for every pixel. N-bit digital signals stored in the n storage circuits are converted into corresponding analog signals by a D/A converter formed for every pixel and inputted into liquid crystal elements. Thus, when a still image is to be displayed, stored digital signals are repeatedly used once the signals are written into the storage circuits. During the above operations, operations of source signal line driving circuits and other drivings are stopped to reduce the power consumption of the liquid crystal display device.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor display device (hereinafter, referred to as a display device), and more particularly to an active matrix display device having a thin film transistor formed on an insulator. In particular, the present invention relates to an active matrix liquid crystal display device using a digital signal as a video signal. Further, the present invention relates to a portable information device using the display device. In particular, the present invention relates to a mobile information device such as a mobile phone, a PDA, a mobile personal computer, a mobile navigation system, and an electronic book using an active matrix liquid crystal display device.

[0002]

2. Description of the Related Art In recent years, display devices in which a semiconductor thin film is formed on an insulator, particularly on a glass substrate, particularly active matrix display devices using thin film transistors (hereinafter, referred to as TFTs) have become increasingly popular. . An active matrix display device using TFTs has hundreds of thousands to millions of TFTs arranged in a matrix, and displays an image by controlling the charge of each pixel.

As a more recent technology, in addition to a pixel TFT constituting a pixel, a technology relating to a polysilicon TFT in which a driving circuit is simultaneously formed using a TFT in a peripheral portion of a pixel portion has been developed. And contributes greatly to lower power consumption. Along with this, a liquid crystal display device has become an indispensable device in a display section of a mobile device, etc., in which the application field has been remarkably expanding in recent years.

FIG. 13 is a schematic diagram of a general digital liquid crystal display device. A pixel portion 1308 is provided at the center. A source signal line driver circuit 1301 for controlling a source signal line is provided above the pixel portion. The source signal line driver circuit 1301 includes a shift register circuit 1303, a first latch circuit 1304, a second latch circuit 1305, a D / A conversion circuit (D / A converter)
1306, an analog switch 1307, and the like. Gate signal line driving circuits 1302 for controlling gate signal lines are provided on the left and right sides of the pixel portion. FIG.
In 3, the gate signal line drive circuits 1302 are arranged on both left and right sides of the pixel portion, but may be arranged on one side. However, it is desirable to dispose them on both sides in terms of drive efficiency and drive reliability.

The source signal line driving circuit 1301 has a configuration as shown in FIG. The drive circuit shown as an example in FIG. 14 has a horizontal resolution of 1024 pixels,
A source signal line driving circuit corresponding to a 3-bit digital gradation signal, which includes a shift register circuit (SR) 1401, a first latch circuit (LAT1) 1402, a second latch circuit (LAT2) 1403, and a D / A conversion circuit (D / A) 1
404 and the like. Although not shown in FIG. 14, a buffer circuit, a level shifter circuit, and the like may be provided as necessary.

The operation will be briefly described with reference to FIGS. 13 and 14. First, the shift register circuit 1303
A clock signal (S-CL)
K, S-CLKb) and start pulse (S-SP)
Are input and pulses are sequentially output. Subsequently, those pulses are supplied to the first latch circuit 1304 (LA in FIG. 14).
T1) and the first latch circuit 13
The digital signal (Digital Data) input to the input device 04 is held. Here, D1 is the most significant bit (MS
B: Most Significant Bit, D3 is the least significant bit (L
SB: Least Significant Bit). When the holding of the digital signal for one horizontal cycle is completed in the first latch circuit 1304, the first latch circuit 1304
The digital signal held in 304 is simultaneously transferred to a second latch circuit 1305 (denoted as LAT2 in FIG. 14) in accordance with the input of a latch signal (Latch Pulse).

Thereafter, the shift register circuit 1303 is again activated.
Operates to start holding digital signals for the next horizontal cycle. At the same time, the digital signal held by the second latch circuit 1305 is converted to an analog signal by a D / A converter 1306 (denoted as D / A in FIG. 14). This analog signal is written to the pixel via the source signal line. By repeating this operation, an image is displayed.

A portable information terminal device using the above-mentioned conventional liquid crystal display device will be described.

A portable information terminal will be described as an example of a portable information device. FIG. 34 shows a block diagram of a conventional portable information terminal. In a portable information terminal, it is required that a user derive required information as needed. The information is first stored in a storage device (DRAM 150) in the portable information terminal.
9, a flash memory 1510), a memory card 1503 inserted into a portable information terminal, a device connected to an external device via an external interface port 1505 to obtain information, and the like. is there. This information is stored in the pen input tablet 1
CP based on the user's instruction
The processing is performed by U1506, and the liquid crystal display device 1513 performs display.

[0010] Specifically, a pen input doublet 1501
The input signal is detected by the detection circuit 1502 and input to the doublet interface 1518. This input signal is sent to the doublet interface 15
18 and input to the video signal input circuit 1507 and the like. The CPU 1506 processes necessary data, converts the data into image data based on the image format stored in the VRAM 1511, and outputs the data to the LCD controller 1.
Send it to 512. Here, the LCD controller 1512
Generates a signal for driving the liquid crystal display device 1513, drives the display device, and performs display.

A portable telephone will be described as an example of a portable information device. FIG. 35 shows a block diagram of a conventional mobile phone.
The mobile phone includes a transmission / reception circuit 1615 for transmitting and receiving radio waves, a voice processing circuit 1602 for performing voice processing on a received signal, a speaker 1614, a microphone 1608, a keyboard 1601 for inputting data, and a keyboard for processing a signal input from the keyboard 1601. Interface 161
8 and the like.

[0012] Based on a user's instruction input from a keyboard, a device stored in a storage device (DRAM 1609, flash memory 1610, etc.), a device stored in a memory card 1603 inserted into a mobile phone, an external interface Information and the like obtained by connecting to an external device via the port 1605 are stored in the CPU 1606.
, And the liquid crystal display device 1613 performs display.

More specifically, a signal input from a keyboard 1601 is processed by a keyboard interface 1618 and input to a video signal processing circuit 1607 and the like. The necessary data is processed by the CPU 1606, and
The image data is converted into image data based on the image format stored in the RAM
Send to Here, the LCD controller 1612 generates a signal for driving the liquid crystal display device 1613, drives the display device, and performs display.

FIG. 26 shows an example of the structure of the transmission / reception circuit 1615.

The transmitting / receiving circuit 1615 includes an antenna 266
2, filters 2663, 2667, 2668, 267
2, 2676, switch 2664, amplifier 2665, 2
666, 2677, the first frequency conversion circuit 2669, the second
A frequency conversion circuit 2673, a frequency conversion circuit 2671, oscillation circuits 2670 and 2684, an orthogonal converter 2675, a data demodulation circuit 2678, and a data modulation circuit 2679 are included.

[0016]

In a general active matrix type liquid crystal display device, the screen display is updated about 60 times per second in order to smoothly display a moving image. That is, it is necessary to supply a digital signal for each frame, and to perform writing to the pixel each time.
Even if the video is a still image, the same signal must be continuously supplied for each frame, so that an external circuit, a drive circuit, and the like need to continuously repeat the same digital signal.

There is a method in which a digital signal of a still image is once written in an external storage circuit, and thereafter, a digital signal is supplied from the external storage circuit to the liquid crystal display device for each frame. It is still necessary that the storage circuit and the drive circuit continue to operate.

In a conventional portable information device, when an incorporated display device displays an image, even if the image is a still image, the same video data is transmitted for 6 seconds per second.
Each time, the data was continuously sent to the display device. That is, FIG.
The portions surrounded by broken lines (the video signal processing circuit 1507 in the CPU 1506, the VRAM 1511, the LCD controller 1512, the source signal line driving circuit and the gate signal line driving circuit of the liquid crystal display device 1513, the pen input doublet 1501, the detection circuit 1502, and the doublet). The interface 1518) continued to operate as long as the image was displayed. In FIG. 35, a portion surrounded by a broken line (the video signal processing circuit 1607 in the CPU 1606, V
The RAM 1611, the LCD controller 1612, the source signal line driver circuit and the gate signal line driver circuit of the liquid crystal display device 1613, the keyboard 1601, and the keyboard interface 1618) continue to operate as long as an image is displayed.

Here, in a passive matrix type display device having a small number of pixels, there is a type in which a storage circuit is built in a driver IC or a controller of the display device and the VRAM is stopped. In a display device using such a large number of pixels, it is impractical to have a memory circuit in a driver or a controller from the viewpoint of chip size. Therefore, in the conventional portable information device, many circuits must continue to operate even when a still image is displayed, which hinders a reduction in power consumption.

In mobile devices, low power consumption is greatly desired. Furthermore, in this mobile device, even though it is mostly used in the still image mode, the driving circuit continues to operate even when the still image is displayed as described above. This is a drag on power consumption.

The present invention has been made in view of the above-described problems, and has as its object to reduce power consumption of a driving circuit and the like when a still image is displayed.

[0022]

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention uses the following means.

A plurality of storage circuits are stored in a pixel, and a digital signal is stored for each pixel. In the case of a still image, once the writing is performed, the information written to the pixels thereafter is the same. Therefore, the signal stored in the storage circuit can be read out by reading the signal stored in the storage circuit without inputting the signal for each frame. Can be displayed continuously. That is, when a still image is displayed, the source signal line driving circuit, the image signal processing circuit, and the like can be stopped after the signal processing operation for at least one frame has been performed. It is possible to greatly reduce consumption.

Hereinafter, the configuration of the liquid crystal display device of the present invention and a portable information device using the same will be described.

According to the present invention, there is provided a liquid crystal display device having a pixel, wherein the pixel has a plurality of storage circuits and a D / A converter.

According to the present invention, in the liquid crystal display device having a pixel, the pixel has n (n is a natural number of 2 or more).
A liquid crystal display device comprising: a plurality of storage circuits; and a D / A converter that converts digital signals stored in the n storage circuits into analog signals.

According to the present invention, in a liquid crystal display device having a pixel, the pixel having a liquid crystal element, and an analog signal being input to the liquid crystal element, the pixel has n (n is a natural number of 2 or more). A liquid crystal display device comprising: a plurality of storage circuits; and a D / A converter that converts digital signals stored in the n storage circuits into the analog signals.

According to the present invention, in a liquid crystal display device having pixels, the pixels are stored in n × m (n and m are natural numbers of 2 or more) storage circuits and the n × m storage circuits. And a D / A converter for converting the n-bit digital signal into an analog signal.

According to the present invention, in the driving method of the liquid crystal display device having the pixel, the pixel has n × m (n and m
Has two or more natural numbers) storage circuits, and a D / A converter that converts n-bit digital signals stored in the n × m storage circuits into analog signals. A liquid crystal display device characterized by storing digital signals for m frames is provided.

The liquid crystal display device may have a source signal line, wherein the storage circuit and the D / A converter are arranged so as to overlap the source signal line.

A liquid crystal display device having a gate signal line, wherein the storage circuit and the D / A converter are arranged so as to overlap the gate signal line.

According to the present invention, in a liquid crystal display device having a pixel, wherein the pixel has a liquid crystal element, the pixel has a source signal line, n (n is a natural number of 2 or more) gate signal lines, n TFTs, n storage circuits, and D
/ A converter, wherein the gate electrodes of the n TFTs are respectively connected to one of the n gate signal lines, and one of a source region and a drain region is connected to the source signal line. Connected to each other, and each of the other terminals is connected to one input terminal of the n storage circuits, and the output terminals of the n storage circuits are respectively connected to input terminals of the D / A converter; An output terminal of the D / A converter is connected to a liquid crystal element, thereby providing a liquid crystal display device.

According to the present invention, in a liquid crystal display device having a pixel, wherein the pixel has a liquid crystal element, the pixel has n (n is a natural number of 2 or more) source signal lines, a gate signal line, n TFTs, n storage circuits, and D
/ A converter, wherein the gate electrodes of the n TFTs are connected to the gate signal lines, and one of the source region and the drain region is connected to one of the n source signal lines, respectively. Connected, and the other,
The output terminals of the n storage circuits are respectively connected to one input terminal of the n storage circuits,
Connected to the input terminal of the D / A converter,
An output terminal of the A converter is connected to the liquid crystal element, so that a liquid crystal display device is provided.

A source signal line driving circuit, the source signal line driving circuit comprising: a shift register; a first latch circuit for holding an n-bit digital signal by a sampling pulse from the shift register; A second latch circuit to which the n-bit digital signal held by the latch circuit is transferred, and a source signal which sequentially selects the n-bit digital signal transferred to the second latch circuit bit by bit. A liquid crystal display device having a switch for inputting to a line may be provided.

A source signal line driving circuit, the source signal line driving circuit comprising: a shift register; a first latch circuit for holding a 1-bit digital signal by a sampling pulse from the shift register; And a second latch circuit to which the one-bit digital signal held in the latch circuit is transferred.

A source signal line driving circuit, wherein the source signal line driving circuit includes a shift register and a first latch circuit for holding an n-bit digital signal by a sampling pulse from the shift register. A characteristic liquid crystal display device may be used.

A source signal line driving circuit, the source signal line driving circuit comprising: a shift register; a first latch circuit for holding an n-bit digital signal by a sampling pulse from the shift register; The n-bit digital signal held in the latch circuit
The liquid crystal display device may include n switches for inputting the source signal lines.

The storage circuit is a static type memory (S
The liquid crystal display device may be a RAM, a ferroelectric memory (FRAM), or a dynamic memory (DRAM).

The liquid crystal display device may be characterized in that the storage circuit is formed on a glass substrate, a plastic substrate, a stainless steel substrate, or a single crystal wafer.

A television, a personal computer, a portable terminal, a video camera or a head mounted display characterized by using the liquid crystal display device may be used.

According to the present invention, in a driving method of a liquid crystal display device having a plurality of pixels arranged in a matrix, each of the plurality of pixels includes a plurality of storage circuits,
/ A converter, wherein data of the plurality of storage circuits included in pixels of a specific row or pixels of a specific column among the plurality of pixels is rewritten. Is done.

According to the present invention, in a method for driving a liquid crystal display device having a plurality of pixels and a source signal line driving circuit for inputting a video signal to the plurality of pixels, each of the plurality of pixels includes a plurality of storage circuits. , A D / A converter, and stopping the operation of the source signal line driving circuit when displaying a still image.

The storage circuit is a static type memory (S
RAM), a ferroelectric memory (FRAM), or a dynamic memory (DRAM).

The storage circuit may be formed on a glass substrate, a plastic substrate, a stainless steel substrate, or a single crystal wafer.

A television, a personal computer, a portable terminal, a video camera, or a head-mounted display, wherein the liquid crystal display device of the driving method is used.

According to the present invention, a liquid crystal display device and a CPU
Wherein the liquid crystal display device includes, in a pixel, a plurality of storage circuits, a D / A converter, and a drive circuit that outputs a signal to the plurality of storage circuits. The CPU includes a first circuit that controls the drive circuit and a second circuit that controls a signal input to the portable information device. When the liquid crystal display device displays a still image, There is provided a driving method of a portable information device, wherein the first circuit is stopped.

According to the present invention, a liquid crystal display device and a VRA
M, the liquid crystal display device has a plurality of storage circuits and a D / A converter in a pixel, and the liquid crystal display device displays a still image when the liquid crystal display device displays a still image. A method for driving a portable information device is provided, wherein the operation of reading data from a VRAM is stopped.

According to the present invention, in a driving method of a portable information device having a liquid crystal display device, the liquid crystal display device includes:
A cell having a plurality of storage circuits and a D / A converter in a pixel, wherein a source signal line driver circuit of the liquid crystal display device is stopped when the liquid crystal display device displays a still image. A method for driving an information device is provided.

The driving method of a portable information device may be characterized in that a read operation is performed once in one frame period in the plurality of storage circuits.

According to the present invention, in a driving method of a portable information device having a liquid crystal display device, the liquid crystal display device has a plurality of pixels arranged in a matrix, and each of the plurality of pixels has a plurality of storage circuits and , A D / A converter, and wherein the liquid crystal display device rewrites data of the plurality of storage circuits included in a pixel in a specific row or a pixel in a specific column among the plurality of pixels. A method for driving a portable information device is provided.

[0051] The portable information device may be a portable telephone, a personal computer, a navigation system, a PDA or an electronic book.

[0052]

FIG. 2 shows the configuration of a source signal line drive circuit and some pixels in a display device using pixels having a memory circuit. This circuit has 3
The shift register circuit (SR) 201 and the first latch circuit (LA)
T1) 202, a second latch circuit (LAT2) 203,
Bit signal selection switch (SW) 204, pixel (Pix
el) 205. Reference numeral 210 denotes a signal supplied directly from the gate signal line driving circuit or the outside, and will be described later together with a description of a pixel.

FIG. 1 shows the circuit configuration of the pixel 205 in FIG. 2 in detail. This pixel corresponds to a 3-bit digital gradation signal, and includes a liquid crystal element (LC), a storage capacitor (Cs), and a storage circuit (105 to 10).
7) and D / A (D / A converter: 111). 101 is a source signal line, 102 to 104 are gate signal lines for writing, and 108 to 110 are TFs for writing.
T.

Although a specific example of the D / A converter 111 will be described in the embodiment, the D / A converter may be configured using a method other than that described in the embodiment.

FIG. 3 is a timing chart for the display device of the present invention shown in FIG. The display device is intended for a 3-bit digital gradation signal, VGA. The driving method will be described with reference to FIGS. In addition,
1 to 3 are used as they are (the figure numbers are omitted).

Referring to FIGS. 2 and 3A and 3B, FIG.
In FIG. 3A, each frame period will be described as α, β, γ. First, the circuit operation in the section α will be described.

As in the case of the conventional digital driving circuit, a clock signal (S-
CLK, S-CLKb) and start pulse (S-S
P) is input, and sampling pulses are sequentially output. Subsequently, the sampling pulse is supplied to the first latch circuit 2
02 (LAT1), and holds the digital signal (Digital Data) also input to the first latch circuit 202. This period is referred to as a dot data sampling period in this specification. The dot data sampling period for one horizontal period is each period indicated by 1 to 480 in FIG. Digital signal is 3
D1 is the MSB (Most Significant Bi
t) and D3 are LSB (Least Significant Bit).
When the holding of the digital signal for one horizontal cycle is completed in the first latch circuit 202, the digital signal held by the first latch circuit 202 is input to the latch signal (Latch Pulse) during the retrace period. , Are simultaneously transferred to the second latch circuit 203 (LAT2).

Subsequently, in accordance with the sampling pulse output from the shift register circuit 201 again, a digital signal holding operation for the next horizontal cycle is performed.

On the other hand, the digital signal transferred to the second latch circuit 203 is written to a storage circuit arranged in a pixel. As shown in FIG. 3B, the dot data sampling period of the next row is divided into I, II, and III, and
The digital signal held in the latch circuit is output to the source signal line. At this time, the bit signal selection switch 2
In step 04, each bit signal is sequentially output to the source signal line.

In the period I, the write gate signal line 10
2, a pulse is input, the TFT 108 is turned on, and a digital signal is written to the storage circuit 105. Then, the period
In II, a pulse is input to the write gate signal line 103, the TFT 109 is turned on, and a digital signal is written to the storage circuit 106. Finally, in a period III, a pulse is input to the write gate signal line 104 and the TFT 1
10 conducts, and a digital signal is written to the storage circuit 107.

Thus, the processing of the digital signal for one horizontal period is completed. The period in FIG. 3B is a period indicated by an asterisk in FIG. 3A. By performing the above operation up to the final stage, a digital signal for one frame is written in the storage circuit 105.

The written digital signal is D / A 11
The signal is converted into an analog signal by 1 and input to a liquid crystal element. The transmittance of the liquid crystal element changes according to the analog signal, and a gray scale is expressed. Here, since there are three bits, eight levels of luminance from 0 to 7 can be obtained.

The above operation is repeated to continuously display the image. Here, when displaying a still image,
After the digital signals are once stored in the storage circuits 105 to 107 in the first operation, the digital signals stored in the storage circuits 105 to 107 may be repeatedly read in each frame period.

The digital signal stored in the storage circuit is repeatedly read out for each frame period, and the D / A 11
The operation of converting into an analog signal in 1 may be controlled using a DAC controller.

Alternatively, each output of the storage circuit is input to the D / A 111 via a reading TFT (not shown). By operating the read TFT on / off, the digital signal stored in the storage circuit may be repeatedly read for each frame period.

At this time, the operation of inputting a signal to a read gate signal line (not shown) to which the gate electrode of the read TFT is connected is performed using a read gate signal line drive circuit (not shown). Do.

Therefore, the driving of the source signal line driving circuit can be stopped during the period in which the still image is displayed.

Further, writing of a digital signal to the storage circuit or reading of a digital signal from the storage circuit can be performed for each gate signal line. That is, the source signal line drive circuit is operated only for a short period,
A display method such as rewriting only a part of the screen can be adopted.

In this case, it is desirable to use a decoder as the gate signal line driving circuit. When a decoder is used, the circuit disclosed in JP-A-8-101669 may be used, and FIG. 23 shows an example. It is also possible to partially rewrite the source signal line driver circuit using a decoder.

Further, in the present embodiment, three storage circuits are provided in one pixel and a function of storing a 3-bit digital signal for one frame is provided.
The number of storage circuits is not limited to this number. For example, n (n is 2
In order to store digital signals of the above (natural number) bits for m (m is a natural number of 2 or more) frames, it is sufficient that one pixel has n × m storage circuits.

According to the above method, by storing a digital signal using the storage circuit mounted in the pixel,
When displaying a still image, the digital signal stored in the storage circuit in each frame period is used repeatedly. by this,
Still image display can be continuously performed without driving an external circuit, a source signal line driving circuit, and the like. Therefore, it is possible to greatly contribute to lower power consumption of the liquid crystal display device.

As for the source signal line driving circuit,
Due to the problem of the arrangement of the latch circuit and the like that increases with the number of bits, it is not always necessary to integrally form the circuit on the insulator, and a part or all of the circuit may be externally provided.

Further, in the source signal line driving circuit shown in this embodiment, a latch circuit corresponding to the number of bits is arranged, but it is also possible to arrange and operate only one bit. In this case, the digital signal from the upper bit to the lower bit may be input to the latch circuit in series.

FIG. 24 shows a configuration of a portable information device of the present invention using the liquid crystal display device having the above-described configuration. In the case of displaying a still image, display is performed by storing a video signal in a storage circuit inside a pixel of the display device 2413 and recalling the stored video signal. Therefore, the video signal processing circuit 2407 and the VRAM (Video
RAM) 2411 and the source signal line driver circuit in the display device 2413 can be stopped.

The contents will be specifically described below. If input from the pen input tablet 2401 is not performed for a certain period of time, or if a signal input to change the image display from the external interface port 2405 is not performed for a certain period of time, the CPU 2406
Is determined to be the still image mode. CPU240
6 makes such a determination, the CPU 2406 performs the following operation. LCD controller 241
Then, the source signal line driver circuit of the display device 2413 is stopped via 2. Specifically, the operation of the source signal line driver circuit can be stopped by stopping the supply of the start pulse, the clock signal, and the video data signal to the source signal line driver circuit. At this time, without stopping the gate signal line driving circuit, a signal is supplied and an operation of repeatedly reading data from the memory circuit is performed.

Since the gate signal line driving circuit is generally driven at a frequency of 1/100 or less as compared with the source signal line driving circuit, there is no problem in power consumption even if the operation is not stopped. Of course, in the case of using a liquid crystal material that does not cause a problem in liquid crystal image quality, for example, a burn-in phenomenon, the gate signal line driving circuit may be stopped.
With such an operation, the display device 2413 performs display by stopping only the gate signal line driver circuit or the signal line driver circuits of both the source signal line driver circuit and the gate signal line driver circuit.

Next, the CPU 2406
Internal video signal processing circuit 2407 and VRAM 24
11 is stopped. As described above, the display device 2413
Does display with the video data stored in the internal storage circuit, there is no need to input new video data to the display device. Therefore, the video signal processing circuit 2407 that generates and processes video data, the VRAM 2411, and the like need not be operating. By the above, CPU2
406 internal power reduction, VRAM 2411 power reduction,
Power reduction of the source signal line driving circuit is achieved.

When an input is made to the pen input tablet 2401 and a video signal is inputted, an instruction to change the display content is issued from the detection circuit 2402 of the pen input tablet to the CPU 2406 via the doublet interface 2418. The CPU 2406 operates the VRAM 2411 and the video signal processing circuit 2407 which have been stopped. Then, via the LCD controller 2412,
A start pulse, a clock signal, and video data can be supplied to a source line signal driver circuit of the display device 2413, and a new video signal can be written to a pixel.

As described above, in FIG. 24, the portion surrounded by the broken line (the gate signal line driving circuit, the LCD controller 241)
2, pen input doublet 2401, detection circuit 2402,
If the doublet interface 2418) operates, the portable information terminal can continue to display a still image.

FIG. 25 shows an example of a portable telephone using the present invention. The operation is substantially the same as that of the portable information terminal shown in FIG. The difference from the portable information terminal is that, in the portable telephone, the input is performed by the keyboard 2501 and controlled by the CPU 2506 via the keyboard interface 2518, and the external data is transmitted through the communication system of the telephone company. After being input to the antenna and amplified by the transmission / reception circuit 2515, it is controlled by the CPU 2506. When displaying a still image, like a personal digital assistant,
The video signal processing circuit 2507, the VRAM 2511, the source signal line driver circuit, and the like can be stopped.

As described above, in FIG. 25, the portion surrounded by the broken line (the gate signal line driving circuit, the LCD controller 251)
2. If the keyboard 2501 and the keyboard interface 2518) operate, the mobile phone can continue to display a still image.

[0082]

Embodiments of the present invention will be described below.

[Embodiment 1] In this embodiment, a pixel in the circuit shown in the embodiment is specifically formed using a transistor or the like, and the operation thereof will be described.

FIG. 8 is similar to the pixel shown in FIG. 1, and is an example in which the D / A 111 is actually constituted by a circuit. In the figure, the same reference numerals as in FIG. 1 denote the same parts as those in FIG. Storage circuit 105-
The writing TFTs 108 to 110 are provided in each of the memory cells 107, and a memory circuit selection signal line (writing gate signal line) 1
02 to 104 are controlled.

FIG. 4 shows an example of the storage circuit. A portion indicated by a dotted frame 450 is a storage circuit (in FIG. 8,
Reference numeral 451 denotes a writing TFT (portion indicated by 108 to 110 in FIG. 8). The storage circuit 450 shown here includes a static RAM (SRAM) using a flip-flop.
M) is used, but the storage circuit is not limited to this configuration.

In this embodiment, the driving of the circuit shown in FIG.
The driving can be performed according to the timing chart shown in FIG. 3 in the embodiment. The circuit operation will be described with reference to FIGS. 3 and 8 in addition to the actual driving method of the memory circuit selection unit. 3 and 8 are used as they are (the figure numbers are omitted).

Referring to FIGS. 3A and 3B. FIG. 3 (A)
In the following description, each frame period will be described as α, β, and γ. First, the circuit operation in the section α will be described.

The driving method from the shift register circuit to the second latch circuit is the same as that shown in the embodiment, and will be followed.

In the period I, the write gate signal line 10
2, a pulse is input, the TFT 108 is turned on, and a digital signal is written to the storage circuit 105. Then, the period
In II, a pulse is input to the write gate signal line 103, the TFT 109 is turned on, and a digital signal is written to the storage circuit 106. Finally, in a period III, a pulse is input to the write gate signal line 104 and the TFT 1
10 conducts, and a digital signal is written to the storage circuit 107.

Thus, the processing of the digital signal for one horizontal period is completed. The period in FIG. 3B is a period indicated by an asterisk in FIG. 3A. By performing the above operation up to the final stage, digital signals for one frame are written to the storage circuits 105 to 107.

The written digital signal is the D / A 11
The signal is converted into an analog signal by 1 and input to a liquid crystal element. The transmittance of the liquid crystal element changes according to the analog signal, and expresses a gradation. Here, since there are three bits, eight levels of luminance from 0 to 7 can be obtained.

As described above, display for one frame period is performed. On the other hand, on the drive circuit side, digital signal processing in the next frame period is simultaneously performed.

[0093] By repeating the above procedure, an image is displayed.

In the case of displaying a still image, when the writing of the digital signal of a certain frame to the storage circuit is completed, the source signal line driving circuit is stopped and the signal written in the same storage circuit is output. , Read and displayed in each frame.

At this time, although not shown in FIG.
The output of each storage circuit of each pixel is input to the D / A via the read TFT, and the read TFT is
, The signal of the storage circuit can be repeatedly read every frame period. As a circuit for operating the reading TFT, a circuit having a known configuration can be used freely.

Further, a signal input to the storage circuit is always input to the D / A circuit, and a corresponding analog signal is output to the liquid crystal element to display a still image. In this case, the pixel continues to display at the same luminance until the writing TFT is selected and information is newly written to the storage circuit. In this driving method, the above-described read TFT and the like are not required.

According to such a method, power consumption during display of a still image can be greatly reduced.

[Embodiment 2] In this embodiment, an example will be described in which writing to a storage circuit in a pixel portion is performed in a dot-sequential manner so that a second latch circuit of a source signal line driving circuit is omitted.

FIG. 5 shows a configuration of a source signal line drive circuit and some pixels in a liquid crystal display device using pixels having a memory circuit. This circuit corresponds to a 3-bit digital gradation signal, and includes a shift register circuit (SR) 501 and a latch circuit (LAT1) 50.
2. It has a pixel (Pixel) 503. 510 is a signal directly supplied from a gate signal line driving circuit or the like,
It will be described later together with the description of the pixel.

FIG. 6 is a detailed diagram of the circuit configuration of the pixel 503 shown in FIG. Similar to the first embodiment, it corresponds to a 3-bit digital gradation signal, and includes a liquid crystal element (LC), a storage capacitor (Cs), a storage circuit (605 to 607), and a D / D
A (D / A converter: 611) and the like. 60
Reference numeral 1 denotes a first bit (MSB) signal source signal line;
Denotes a source signal line for a second bit signal, 603 denotes a source signal line for a third bit (LSB) signal, 604 denotes a gate signal line for writing, and 608 to 610 denote TFTs for writing.

FIG. 7 is a timing chart for driving the circuit shown in this embodiment. This will be described with reference to FIGS.

The operations from the shift register circuit 501 to the latch circuit (LAT1) 502 are performed in the same manner as in the embodiment and the first embodiment. As shown in FIG. 7B, immediately after the completion of the first-stage latch operation, writing of the pixel into the storage circuit is started. Write gate signal line 60
4, a pulse is input to the write TFTs 608-61.
0 is turned on, and writing to the storage circuit is enabled. The digital signal for each bit held in the latch circuit 502 is simultaneously written via three source signal lines 601 to 603.

When the digital signal held in the latch circuit in the first stage is written to the storage circuit, the digital signal is held in the latch circuit in the next stage in accordance with the subsequent sampling pulse. In this way,
Writing to the storage circuit is sequentially performed.

The above operation is repeated until the last stage, and one horizontal period ends.

Note that the period shown in FIG.
In (A), it corresponds to the period indicated by **.

The same operation is performed for all the horizontal periods 1 to 480.

Thus, the display period of the first frame is completed. In the section β, the processing of the digital signal in the next frame is performed.

An image is displayed by repeating the above procedure. Note that when displaying a still image, when writing of a digital signal of a certain frame to the storage circuit is completed, the source signal line driving circuit is stopped, and the signal written to the same storage circuit is output every frame. Read and display. With such a method, power consumption during the display of a still image can be significantly reduced. Furthermore, the number of latch circuits can be halved as compared with the circuit shown in the embodiment, and it is possible to contribute to downsizing of the entire device by saving space in circuit arrangement.

[Embodiment 3] In this embodiment, Embodiment 2
An example of a liquid crystal display device using a method of writing data to a memory circuit in a pixel by line-sequential driving by applying the circuit configuration of a liquid crystal display device in which the second latch circuit is omitted, which is described in FIG.

FIG. 17 shows a circuit configuration example of a source signal line driving circuit of the liquid crystal display device shown in this embodiment. This circuit corresponds to a 3-bit digital gradation signal, and includes a shift register circuit 1701, a latch circuit 170
2, a switch circuit 1703 and a pixel 1704. 1
Reference numeral 710 is a signal supplied directly from the gate signal line driving circuit or externally. Since the circuit configuration of the pixel may be the same as that of the second embodiment, FIG. 6 is referred to as it is.

FIG. 18 is a timing chart for driving the circuit shown in this embodiment. This will be described with reference to FIGS. 6, 17 and 18.

The operation from when the sampling pulse is output from the shift register circuit 1701 until the latch circuit 1702 holds the digital signal in accordance with the sampling pulse is the same as in the first and second embodiments. In this embodiment, since the switch circuit 1703 is provided between the latch circuit 1702 and the storage circuit in the pixel 1704, even if the holding of the digital signal in the latch circuit is completed, writing to the storage circuit is immediately performed. Does not start. Until the end of the dot data sampling period, the switch circuit 1
Reference numeral 703 remains closed, during which the latch circuit keeps holding the digital signal.

As shown in FIG. 18B, when the holding of the digital signal for one horizontal period is completed, a latch signal (Latch Pulse) is input during the retrace period, and the switch circuits 1703 are simultaneously opened. The digital signal held by the latch circuit 1702 is simultaneously written to the storage circuit in the pixel 1704. The operation in the pixel 1704 relating to the writing operation at this time, and the pixel 1704 relating to the reading operation at the time of display in the next frame period
The operation inside is the same as that of the second embodiment, and the description is omitted here.

The period shown in FIG. 18B corresponds to the period shown in FIG.
Is the period indicated by ***.

According to the above-described method, line-sequential write driving can be easily performed even in the source signal line driving circuit in which the second latch circuit is omitted.

[Embodiment 4] This embodiment shows an example in which a D / A converter using a method of selecting a plurality of gradation voltage lines is used. FIG. 8 shows a circuit diagram thereof.

When processing a 3-bit digital signal,
There are eight gradation voltage lines, each of which is connected to a switch TFT. The output of the storage circuit selectively drives those switch TFTs via a decoder. The switch may use a transmission gate.

In FIG. 8, the storage circuits 105 to 1
The output from each of 07 is composed of a signal stored in the storage circuit and an inverted signal of the signal.

This embodiment can be implemented by freely combining with Embodiments 1 to 3.

[Embodiment 5] In this embodiment, an example will be described in which a structure different from the D / A converter shown in FIG. 8 in Embodiment 4 is used. FIG. 9 shows a circuit diagram thereof.

In the fourth embodiment, the gray scale voltage line is selected in the same manner as shown in FIG. 8, but in FIG. 8, the number of elements is large and the area occupied by the elements in the pixel is large.
For this reason, in FIG. 9, the switches are connected in series, and the number of elements is reduced by also serving as a decoder and a switch. The switch may use a transmission gate.

Note that, in FIG.
The output from each of 07 is composed of a signal stored in the storage circuit and an inverted signal of the signal.

This embodiment can be implemented by freely combining with Embodiments 1 to 3.

[Embodiment 6] This embodiment shows an example in which a structure different from the D / A converter shown in FIGS. 8 and 9 in Embodiments 4 and 5 is used. FIG. 20 shows a circuit diagram thereof.

In the D / A converters shown in FIGS. 8 and 9, since the gray scale voltage lines are used, wiring is required for the number of gray scales, which is not suitable for increasing the number of gray scales. For this reason, in FIG. 20, the reference voltage is divided by a combination of the capacitors C1 to C3 to generate a gradation voltage. In such a capacity division method, since a gray scale is created by the ratio of the capacitors C1 to C3, various gray scales can be expressed.

A D / A converter of such a capacity division system is described in AMLCD99 Digest of Technical Papers, p.

This embodiment can be implemented by freely combining with Embodiments 1 to 3.

[Embodiment 7] In this embodiment, an example in which the D / A converter having a structure different from the D / A converter shown in FIGS. 8, 9 and 20 in Embodiments 4, 5, and 6 is used. Is shown. FIG. 21 shows a circuit diagram thereof.

FIG. 21 shows a further simplified version of the D / A converter of FIG. 20 shown in the sixth embodiment. Of the two electrodes of each of the capacitors C1 to C3, the electrode that is not connected to the liquid crystal element has a _VL
And at the time of non-reset, it is connected to either V _H or V _L , but the connection can be constituted only by a switch. The switch may use a transmission gate.

In FIG. 21, the storage circuits 105 to 105
The output from each of 107 is constituted by the signal stored in the storage circuit and the inverted signal of the signal.

This embodiment can be implemented by freely combining with Embodiments 1 to 3.

[Embodiment 8] As shown in FIG. 22, only one bit of the latch circuit of the source signal line drive circuit is provided. Where the first bit data, the second bit data,
By inputting the data to the source signal line driving circuit in the order of the third bit data, the same effect as the source signal line driving circuit of the first embodiment can be obtained.

In this method, a circuit for sequentially exchanging data is necessary outside, but the size of the source signal line driving circuit can be reduced.

[Embodiment 9] In this embodiment, a pixel portion of a display device of the present invention and a driving circuit portion provided around the pixel portion (source signal line side driving circuit, gate signal line side driving circuit, pixel selection signal line side A method for manufacturing TFTs of the driving circuit simultaneously will be described. However, for the sake of simplicity, a CMOS circuit, which is a basic unit for the drive circuit unit, is illustrated.

First, as shown in FIG. 10A, oxidation is performed on a substrate 5001 made of glass such as barium borosilicate glass represented by Corning # 7059 glass or # 1737 glass or aluminoborosilicate glass. A base film 5002 made of an insulating film such as a silicon film, a silicon nitride film, or a silicon oxynitride film is formed.
For example, a plasma CVD method SiH _4, NH _3, N ₂ silicon oxynitride film 5002a made from O 10 to 2
00 [nm] (preferably 50 to 100 [nm]) is formed, similarly SiH _4, N ₂ O hydrogenated silicon oxynitride film 5002b made from 50 to 200 [nm] (preferably 100
１５０150 [nm]). Although the base film 5002 has a two-layer structure in this embodiment, the base film 5002 may have a single-layer structure or a structure in which two or more insulating films are stacked.

Each of the island-shaped semiconductor layers 5003 to 5006 is formed of a crystalline semiconductor film formed by using a semiconductor film having an amorphous structure by a laser crystallization method or a known thermal crystallization method.
The thickness of the island-shaped semiconductor layers 5003 to 5006 is 25 to 8
It is formed with a thickness of 0 [nm] (preferably 30 to 60 [nm]). The material of the crystalline semiconductor film is not limited, but is preferably formed of silicon or a silicon germanium (SiGe) alloy.

In order to form a crystalline semiconductor film by a laser crystallization method, a pulse oscillation type or continuous emission type excimer laser, a YAG laser, or a YVO ₄ laser is used.
In the case of using these lasers, it is preferable to use a method in which laser light emitted from a laser oscillator is linearly condensed by an optical system and irradiated on a semiconductor film. The crystallization conditions are appropriately selected by the practitioner. When an excimer laser is used, the pulse oscillation frequency is 30 [Hz], and the laser energy density is 100 to 400 [mJ / cm ² ] (typically, 2
00 to 300 [mJ / cm ² ]). When a YAG laser is used, the second harmonic is used, the pulse oscillation frequency is set to 1 to 10 [kHz], and the laser energy density is set to 30.
0 to 600 [mJ / cm ² ] (typically 350 to 500 [mJ / c]
m ² ]). And a width of 100 to 1000 [μm],
For example, a laser beam condensed linearly at 400 [μm] is irradiated over the entire surface of the substrate, and the superposition rate (overlap rate) of the linear laser beam at this time is set to 80 to 98 [%].

Next, island-like semiconductor layers 5003 to 5006
Is formed to cover the gate insulating film 5007. The gate insulating film 5007 is formed by a plasma CVD method or a sputtering method.
It is formed of an insulating film containing silicon with a thickness of 40 to 150 [nm]. In this embodiment, a silicon oxynitride film is formed with a thickness of 120 [nm]. Needless to say, the gate insulating film is not limited to such a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure. For example, when a silicon oxide film is used, TEOS (Tetraethyl Orthosilicat
e) and O ₂ were mixed, the reaction pressure was 40 [Pa], and the substrate temperature was 30.
It can be formed by discharging at a high frequency (13.56 [MHz]) and a power density of 0.5 to 0.8 [W / cm ² ] at 0 to 400 [° C.]. The silicon oxide film thus manufactured can obtain favorable characteristics as a gate insulating film by subsequent thermal annealing at 400 to 500 [° C.].

[0139] Then, a first conductive film 5008 and a second conductive film 5009 for forming a gate electrode are formed over the gate insulating film 5007. In this embodiment, the first conductive film 5008 is formed of Ta to a thickness of 50 to 100 [nm],
A second conductive film 5009 is formed with W to a thickness of 100 to 300 [nm].

The Ta film is formed by a sputtering method by sputtering a Ta target with Ar. in this case,
When an appropriate amount of Xe or Kr is added to Ar, the internal stress of the Ta film can be relaxed and the film can be prevented from peeling. Also, α
The phase Ta film has a resistivity of about 20 [μΩcm] and can be used as a gate electrode, but the β phase Ta film has a resistivity of about 180 [μΩcm] and is not suitable for a gate electrode. . In order to form an α-phase Ta film, tantalum nitride having a crystal structure close to the Ta α-phase is formed on a Ta base with a thickness of about 10 to 50 [nm]. Can be easily obtained.

When a W film is formed, it is formed by a sputtering method using W as a target. Alternatively, it can be formed by a thermal CVD method using tungsten hexafluoride (WF ₆ ). In any case, it is necessary to lower the resistance in order to use it as a gate electrode.
[μΩcm] or less is desirable. The resistivity of the W film can be reduced by enlarging the crystal grains. However, when there are many impurity elements such as oxygen in W, the crystallization is inhibited and the resistance is increased. From this, in the case of using the sputtering method, a W target having a purity of 99.9999 [%] is used, and a W film is formed by giving sufficient consideration so as not to mix impurities from the gas phase during film formation. Resistivity 9-20
[μΩcm] can be realized.

In this embodiment, the first conductive film 500
8 was Ta, and the second conductive film 5009 was W. However, there is no particular limitation, and any of Ta, W, Ti, Mo, Al, and Cu was used.
Alternatively, it may be formed of an element selected from the above, or an alloy material or a compound material containing the element as a main component. Also,
A semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. As a desirable example of a combination other than this embodiment, a combination in which the first conductive film 5008 is formed of tantalum nitride (TaN) and the second conductive film 5009 is W,
008 is formed of tantalum nitride (TaN), and the second conductive film 5009 is made of Al.
08 is made of tantalum nitride (TaN), and the second conductive film 5009 is made of Cu.

Next, a mask 5010 made of a resist is formed, and a first etching process for forming electrodes and wirings is performed. In this embodiment, ICP (Inductively Coupled)
d Plasma: Inductively coupled plasma) etching method,
CF ₄ and Cl ₂ are mixed as an etching gas, and RF (13.56 [MH]) of 500 [W] is applied to the coil-type electrode at a pressure of 1 [Pa].
z]) Power is supplied to generate plasma. 100 [W] RF (13.56 [MH] also on the substrate side (sample stage)
z]) Apply power and apply a substantially negative self-bias voltage. When CF ₄ and Cl ₂ are mixed, the W film and Ta
The film is etched to the same extent.

Under the above-mentioned etching conditions, the shape of the resist mask is made appropriate, so that the edges of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. Become. The angle of the tapered portion is 15 to 45 °. In order to perform etching without leaving a residue on the gate insulating film, the etching time may be increased by about 10 to 20%. Since the selectivity of the silicon oxynitride film to the W film is 2 to 4 (typically 3), the exposed surface of the silicon oxynitride film is etched by about 20 to 50 [nm] by over-etching. become. Thus, by the first etching process, the first conductive layer and the second conductive layer
Conductive layers 5011 to 5016 (first conductive layer 50
11a to 5016a and second conductive layers 5011b to 501
6b) is formed. At this time, in the gate insulating film 5007, a region which is not covered with the first shape conductive layers 5011 to 5016 is etched to a thickness of about 20 to 50 [nm] to form a thinned region. (FIG. 10B)

Then, a first doping process is performed to add an impurity element imparting n-type. The doping may be performed by an ion doping method or an ion implantation method. The condition of the ion doping method is that the dose is 1 × 10 ^{13 to} 5 × 10
¹⁴ [atoms / cm ² ] and an acceleration voltage of 60 to 100 [keV]. An element belonging to Group 15 of the periodic table, typically phosphorus (P) or arsenic (As) is used as the impurity element imparting the N-type. Here, phosphorus (P) is used. In this case, the conductive layers 5011 to 5016 serve as a mask for the impurity element imparting n-type, and the first impurity region 50 is self-aligned.
17 to 5020 are formed. First impurity region 501
For 7 to 5020, 1 × 10 ²⁰ to 1 × 10 ²¹ [atoms / cm ³ ]
Is added in the concentration range of n.
(FIG. 10B)

Next, as shown in FIG. 10C, a second etching process is performed without removing the resist mask. Using CF ₄ , Cl ₂ and O _{2 as an} etching gas,
The film is selectively etched. At this time, the second shape conductive layers 5021 to 5026 are formed by the second etching process.
(First conductive layers 5021a to 5026a and second conductive layers 5021b to 5026b) are formed. At this time, in the gate insulating film 5007, the second shape conductive layer 50 is formed.
The area not covered by 21 to 5026 is further 20 to 50 [n
m] to form a thinned region.

The etching reaction of the W film or the Ta film by the mixed gas of CF ₄ and Cl ₂ can be inferred from the generated radical or ion species and the vapor pressure of the reaction product. When comparing the vapor pressures of the fluorides of W and Ta with the chlorides, the fluoride of W, WF _6, is extremely high, and the other WCl ₅ , TaF ₅ , and TaCl ₅ are comparable. Therefore, with the mixed gas of CF ₄ and Cl ₂ , both the W film and the Ta film are etched. However, when an appropriate amount of O ₂ is added to this mixed gas, CF ₄ and O ₂ react to form CO and F, and a large amount of F radicals or F ions are generated. As a result, the etching rate of the W film having a high fluoride vapor pressure increases. On the other hand, in Ta, the increase in the etching rate is relatively small even if F increases. Further, since Ta is more easily oxidized than W, the surface of Ta is oxidized by adding O ₂ . Since the oxide of Ta does not react with fluorine or chlorine,
Further, the etching rate of the Ta film decreases. Therefore, W
It is possible to make a difference in the etching rate between the film and the Ta film, and it is possible to make the etching rate of the W film larger than that of the Ta film.

Then, as shown in FIG. 11A, a second doping process is performed. In this case, the dose is lower than that of the first doping process, and n is set as a condition of a high acceleration voltage.
Doping with an impurity element for giving a mold. For example, the acceleration voltage is set to 70 to 120 [keV], and 1 × 10 ¹³ [atoms / cm]
² ], a new impurity region is formed inside the first impurity region formed in the island-shaped semiconductor layer in FIG. The doping is performed in the second shape conductive layer 5021.
To 5026 are used as masks for the impurity elements, and the semiconductor layers in regions below the first conductive layers 5021a to 5026a are also doped so that the impurity elements are added. Thus, second impurity regions 5027 to 5031 are formed. The second impurity regions 5027 to 5031
The concentration of phosphorus (P) added to the first conductive layer 502
It has a gradual concentration gradient according to the thickness of the tapered portion of 1a to 5026a. Note that the first conductive layer 5021a
In the semiconductor layer overlapping the tapered portion of 5026a to 5026a,
Although the impurity concentration slightly decreases from the end of the tapered portion of the first conductive layers 5021a to 5026a toward the inside, the impurity concentration is substantially the same.

Subsequently, a third etching process is performed as shown in FIG. This is performed using a reactive ion etching method (RIE method) using CHF ₆ as an etching gas. By the third etching treatment, the first conductive layer 502
By partially etching the tapered portions 1a to 5026a, a region where the first conductive layer overlaps with the semiconductor layer is reduced. By the third etching process, the third shape conductive layers 5032 to 5037 (first conductive layers 5032a to 5032) are formed.
37a and second conductive layers 5032b to 5037b). At this time, in the gate insulating film 5007, a region which is not covered with the third shape conductive layers 5032 to 5037 is further etched by about 20 to 50 [nm] to form a thinned region.

As a result of the third etching process, second impurity regions 5027 to 5031 overlap second impurity regions 5032a to 5037a in second impurity regions 5027 to 5031.
27a to 5031a and third impurity regions 5027b to 5031 between the first impurity region and the second impurity region.
b is formed.

Then, as shown in FIG.
The island-shaped semiconductor layer 5004 forming the channel type TFT has
Fourth impurity region 5039 of a conductivity type opposite to the conductivity type of 1
To 5044 are formed. Third shape conductive layer 5033b
Is used as a mask for impurity elements,
An impurity region is formed. At this time, the n-channel TFT
Island-shaped semiconductor layers 5003 and 5005 forming a storage capacitor
The part 5006 and the wiring part 5034 are
The whole surface is covered with 38. Impurity regions 5039-50
44 has different concentrations of phosphorus
But diborane (B _TwoH₆) Formed by ion doping method
The impurity concentration is 2 × 10
²⁰~ 2 × 10^{twenty one}[atoms / cm^Three].

Through the above steps, impurity regions are formed in the respective island-like semiconductor layers. Third overlapping with the island-shaped semiconductor layer
Shape conductive layers 5032, 5033, 5035, 503
6 functions as a gate electrode. 5034 functions as an island-shaped source signal line. 5037 functions as a capacitance wiring.

After removing the resist mask 5038, a step of activating the impurity element added to each island-shaped semiconductor layer is performed for the purpose of controlling the conductivity type. This step is performed by a thermal annealing method using a furnace annealing furnace.
In addition, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied. In the thermal annealing method, the oxygen concentration is 400 to 700 in a nitrogen atmosphere of 1 [ppm] or less, preferably 0.1 [ppm] or less.
In this embodiment, the heat treatment is performed at 500 ° C. for 4 hours.
However, when the wiring material used for the third shape conductive layers 5032 to 5037 is weak to heat, activation is performed after forming an interlayer insulating film (mainly containing silicon) to protect the wiring and the like. It is preferred to do so.

Further, a heat treatment is performed at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% of hydrogen to hydrogenate the island-like semiconductor layer. In this step, dangling bonds in the semiconductor layer are terminated by thermally excited hydrogen. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.

Next, as the first interlayer insulating film 5045, a silicon oxynitride film is formed with a thickness of 100 to 200 [nm]. A second interlayer insulating film 5046 made of an organic insulating material is formed thereon. Next, an etching step for forming a contact hole is performed.

Then, a source wiring 504 for forming a contact with a source region of the island-shaped semiconductor layer in the driver circuit portion.
7, 5048, a drain wiring 5049 for forming a contact with the drain region is formed. In the pixel portion, a connection electrode 5050 and pixel electrodes 5051 and 5052 are formed (FIG. 12A). With this connection electrode 5050, the source signal line 5034 is electrically connected to the pixel TFT. Note that the pixel electrode 5052 and the storage capacitor are of an adjacent pixel.

As described above, the n-channel TFT,
a driving circuit portion having a p-channel TFT and a pixel TF
T and a pixel portion having a storage capacitor can be formed over the same substrate. In this specification, such a substrate is called an active matrix substrate.

The ends of the pixel electrodes are arranged so as to overlap the source signal lines and the gate signal lines so that the gap between the pixel electrodes can be shielded from light without using a black matrix.

According to the steps shown in this embodiment, the number of photomasks required for manufacturing the active matrix substrate is five (the island-like semiconductor layer pattern, the first wiring pattern (the source signal line, the gate signal line, Capacitor wiring), p-channel region mask pattern, contact hole pattern, second
It can be a wiring pattern (including a pixel electrode and a connection electrode). As a result, the process can be shortened, which can contribute to a reduction in manufacturing cost and an improvement in yield.

Subsequently, after obtaining the active matrix substrate in the state of FIG. 12A, an alignment film 5053 is formed on the active matrix substrate and a rubbing process is performed in FIG.

On the other hand, a counter substrate 5054 is prepared. The color filter layers 5055 to 505 are provided on the opposite substrate 5054.
7. An overcoat layer 5058 is formed. The color filter layer is a red color filter layer 5 above the TFT.
055 and a blue color filter layer 5056 are formed so as to overlap each other and also serve as a light-shielding film. At least TFT
In addition, since it is necessary to shield light between the connection electrode and the pixel electrode, it is preferable that a red color filter and a blue color filter are arranged so as to overlap each other so as to shield those positions.

A spacer is formed by overlapping a red color filter layer 5055, a blue color filter layer 5056, and a green color filter layer 5057 in accordance with the connection electrode 5050. The color filter of each color is a mixture of acrylic resin and pigment, and is 1-3 [μm]
Formed with a thickness of This can be formed in a predetermined pattern using a photosensitive material and a mask. The height of the spacer is 1 to 4 [μ] in thickness of the overcoat layer 5058.
m], 2 to 7 μm, preferably 4 to
The height can form a gap when the active matrix substrate and the opposing substrate are bonded to each other. The overcoat layer 5058 is formed using a photocurable or thermosetting organic resin material, and for example, polyimide or an acrylic resin is used.

The arrangement of the spacers may be determined arbitrarily. For example, as shown in FIG. 12B, the spacers may be arranged on the counter substrate 5054 so as to be aligned with the connection electrodes. Alternatively, the spacer may be arranged on the counter substrate 5054 so as to be aligned with the TFT of the driving circuit portion. The spacer may be disposed over the entire surface of the drive circuit portion, or may be disposed so as to cover the source wiring and the drain wiring.

After forming the overcoat layer 5058,
A counter electrode 5059 is formed by patterning, and an alignment film 506 is formed.
After forming 0, a rubbing process is performed.

Then, the active matrix substrate on which the pixel portion and the drive circuit portion are formed and the opposing substrate are sealed with a sealant 50.
Attach at 62. A filler is mixed in the sealant 5062, and the two substrates are bonded to each other at a uniform interval by the filler and the spacer. Thereafter, a liquid crystal material 5061 is injected between the two substrates, and completely sealed with a sealing agent (not shown). Liquid crystal material 506
For 1, a known liquid crystal material may be used. Thus, the active matrix liquid crystal display device shown in FIG. 12B is completed.

The TFT in the active matrix type liquid crystal display device manufactured by the above process has a top gate structure, but has a bottom gate structure.
This embodiment can be easily applied to TFTs having other structures.

In this embodiment, a glass substrate is used. However, the present invention is not limited to a glass substrate but may be implemented by using a substrate other than a glass substrate, such as a plastic substrate, a stainless steel substrate, or a single crystal wafer. Is possible.

This embodiment can be implemented by freely combining with Embodiments 1 to 8.

[Embodiment 10] Since the liquid crystal display device of the present invention has a plurality of storage circuits in its pixel portion, the number of elements constituting one pixel is larger than that of a normal pixel. Therefore,
In the case of a transmissive liquid crystal display device, the luminance may be insufficient due to a decrease in the aperture ratio. Therefore, the present invention is preferably applied to a reflective liquid crystal display device. In this embodiment,
An example of a manufacturing process will be described.

According to the ninth embodiment, an active matrix substrate (similar to FIG. 12A) shown in FIG. 19A is manufactured. Subsequently, after forming a resin film as the third interlayer insulating film 5201, a contact hole is opened in the pixel electrode portion, and a reflective electrode 5202 is formed. As the reflective electrode 5202, it is preferable to use a material having excellent reflectivity, such as a film mainly containing Al or Ag, or a stacked film thereof.

On the other hand, a counter substrate 5054 is prepared. In this embodiment, a counter electrode 520 is provided on the counter substrate 5054.
5 is formed by patterning. Counter electrode 5205
Is formed as a transparent conductive film. As a transparent conductive film,
A material formed of a compound of indium oxide and tin oxide (called ITO) or a compound of indium oxide and zinc oxide can be used.

Although not shown, a color filter layer is formed when a color liquid crystal display device is manufactured. At this time, it is preferable that adjacent color filter layers of different colors are formed so as to be overlapped with each other so as to also serve as a light shielding film in the TFT portion.

Thereafter, alignment films 5203 and 5204 are formed on the active matrix substrate and the opposing substrate.
A rubbing process is performed.

Then, the active matrix substrate on which the pixel portion and the drive circuit portion are formed and the opposing substrate are sealed with a sealant 52.
Attach at 06. A filler is mixed in the sealant 5206, and the two substrates are bonded at a uniform interval by the filler and the spacer. Thereafter, a liquid crystal material 5207 is injected between the two substrates, and completely sealed with a sealant (not shown). Liquid crystal material 520
For 7, a known liquid crystal material may be used. Thus, the reflection type liquid crystal display device shown in FIG. 19B is completed.

In this embodiment, not only a glass substrate but also a substrate other than a glass substrate such as a plastic substrate, a stainless steel substrate and a single crystal wafer can be used.

Further, the present invention can be easily applied to a case of manufacturing a transflective display device in which half of the pixel is a reflective electrode and the other half is a transparent electrode.

This embodiment can be implemented by freely combining with Embodiments 1 to 8.

[Embodiment 11] In this embodiment, an example of manufacturing a liquid crystal display device of the present invention will be described with reference to FIGS.

FIG. 27A is a top view of a liquid crystal display device formed by sealing liquid crystal between a TFT substrate and a counter substrate. FIG. 27B is a top view of FIG. 27A is a cross-sectional view taken along the line AA ′ of FIG.
13 is a sectional view taken along line BB ′ of FIG.

[0180] A sealant 4009 is provided so as to surround the pixel portion 4002 provided over the TFT substrate 4001, the source signal line driver circuit 4003, and the first and second gate signal line driver circuits 4004a and 4004b. I have. A pixel portion 4002, a source signal line driver circuit 4003,
A counter substrate 4008 is provided over the first and second gate signal line driver circuits 4004a and 4004b. A liquid crystal 4210 is filled in a space surrounded by the TFT substrate 4001, the sealant 4009, and the counter substrate 4008.

The pixel portion 4002 provided over the TFT substrate 4001, the source signal line driver circuit 4003, and the first and second gate signal line driver circuits 4004a and 4004b have a plurality of TFTs. . In FIG. 27B, typically, a driving TFT included in the source signal line driver circuit 4003 formed over the base film 4010 (here, an n-channel TFT and a p-channel TFT are illustrated).
4201 and a pixel TFT (TFT controlling a voltage applied to a pixel electrode) 4202 included in the pixel portion 4002 are illustrated.

In this embodiment, a p-channel TFT and an n-channel TFT manufactured by a known method are used for the driving TFT 4201, and a p-channel TFT manufactured by a known method is used for the pixel TFT 4202. . The pixel portion 4002 is provided with a storage capacitor (not shown) electrically connected to a gate electrode of the pixel TFT 4202.

Driving TFT 4201 and Pixel TFT 420
2, an interlayer insulating film (planarization film) 4301 is formed,
A pixel electrode 4203 electrically connected to the drain of the pixel TFT 4202 is formed thereon.

An opposing electrode 4205 is provided on the opposing substrate 4008.
Are formed. Although not illustrated in FIG. 27B, a color filter and a polarizing plate are provided as appropriate. A predetermined voltage is applied to the counter electrode 4205.

As described above, a liquid crystal cell including the pixel electrode 4203, the liquid crystal 4210, and the counter electrode 4205 is formed.

Reference numeral 4005 denotes a lead wiring,
002, a source signal line driver circuit 4003, a first gate signal line driver circuit 4004a, a second gate signal line driver circuit 4004b, and an external power supply. The lead wiring 4005a is formed of a sealing material 4009 and a TFT substrate 400.
1 and is electrically connected to an FPC wiring 4301 included in the FPC 4006 via an anisotropic conductive film 4300.

As the opposite substrate 4008, a glass material, a metal material (typically, a stainless steel material), a ceramic material, and a plastic material (including a plastic film) can be used. As a plastic material, FRP (Fi
Berglass-Reinforced Plast
ics) plate, PVF (polyvinyl fluoride) film, mylar film, polyester film or acrylic resin film. Further, a sheet having a structure in which an aluminum foil is sandwiched between PVF films or mylar films can also be used.

However, when the direction of light emission from the pixel electrode is directed toward the cover material, the cover material must be transparent. In that case, a transparent material such as a glass plate, a plastic plate, a polyester film or an acrylic film is used.

As shown in FIG. 27C, the pixel electrode 42
Simultaneously with the formation of 03, a conductive film 4203a is formed so as to be in contact with the lead wiring 4005a.

The anisotropic conductive film 4300 has a conductive filler 4300a. TFT substrate 400
1 and the FPC 4006 are thermocompression-bonded, so that the conductive film 4203a on the TFT substrate 4001 and the FPC wiring 4301 on the FPC 4006 become conductive filler 4300a.
Electrically connected by

This embodiment can be implemented by freely combining with Embodiments 1 to 10.

[Embodiment 12] This embodiment shows an example in which a transmission type liquid crystal display device is used as the liquid crystal display device of the present invention.

If the design rule is set to 1 μm and the pixel pitch is set to about 100 ppi, the memory circuit and the D / A converter inside the pixel can be arranged below the source signal line, and the aperture ratio decreases. Can be solved. Thus, the present invention can be applied not only to a reflection type liquid crystal display device but also to a transmission type liquid crystal display device.

FIG. 30 schematically shows a top view of a pixel of the transmission type liquid crystal display device having the above configuration.

Reference numeral 3301 denotes a pixel; 3302 to 3304, storage circuits; 3305, a D / A converter (described as D / A in the figure); 3306, a pixel electrode; and 3307, a source signal line. Note that the counter electrode, the color filter, the storage capacitor, and the like are not shown. Here, the storage circuits 3302 to 330
4 and the D / A converter 3305 are connected to the source signal line 33.
07 is overlapped.

Although not shown, the source signal line 33
07, these memory circuits 3302 to 3304 and the D / A converter 3305 overlap with the gate signal line.
Etc. can also be arranged.

[Thirteenth Embodiment] In the pixel portion of the liquid crystal display device of the present invention shown in the first to twelfth embodiments, the storage circuit is a static memory (Static RAM: SRAM).
However, the storage circuit is not limited to the SRAM. The memory circuit applicable to the pixel portion of the liquid crystal display device of the present invention includes a dynamic memory (Dynamic memory).
RAM: DRAM).

Further, although not particularly shown, a ferroelectric memory (Ferroelectric RAM:
The pixel portion of the liquid crystal display device of the present invention can be configured using FRAM). FRAM is SRAM or DRA
It is a non-volatile memory having a writing speed equivalent to that of M, and the power consumption of the liquid crystal display device of the present invention can be further reduced by utilizing features such as a low writing voltage. In addition, the configuration is possible by using a flash memory or the like.

This embodiment can be implemented by freely combining with Embodiments 1 to 12.

[Embodiment 14] An active matrix liquid crystal display device using a drive circuit manufactured by applying the present invention has various uses. Example 1 In this example, a semiconductor device including a display device using a driver circuit manufactured according to the present invention will be described.

Examples of such a display device include a portable information terminal (electronic notebook, mobile computer, mobile phone, etc.), a video camera, a digital camera, a personal computer, a television, and the like. Examples of these are shown in FIGS.

FIG. 15A shows a cellular phone,
01, audio output unit 2602, audio input unit 2603, display unit 2604, operation switch 2605, antenna 2606
It is composed of The present invention can be applied to the display portion 2604.

FIG. 15B shows a video camera, which includes a main body 2611, a display portion 2612, an audio input portion 2613, operation switches 2614, a battery 2615, and an image receiving portion 261.
Consists of six. The present invention can be applied to the display portion 2612.

FIG. 15C shows a mobile computer or a portable information terminal.
22, an image receiving unit 2623, operation switches 2624, and a display unit 2625. The present invention can be applied to the display portion 2625.

FIG. 15D shows a head-mounted display, which includes a main body 2631, a display portion 2632, and an arm portion 2.
633. The present invention can be applied to the display portion 2632.

FIG. 15E shows a television set having a main body 264.
1, speaker 2642, display portion 2643, receiving device 2
644, an amplification device 2645, and the like. The present invention can be applied to the display portion 2643.

FIG. 15F shows a portable book, which has a main body 26.
51, a display unit 2652, a storage medium 2653, an operation switch 2654, and an antenna 2655, and are composed of a mini disc (MD) and a DVD (Digital Ver.).
It displays the data stored in the satellite disc) and the data received by the antenna. The present invention can be applied to the display portion 2652.

FIG. 16A shows a personal computer, which includes a main body 2201, an image input section 2202, and a display section 22.
03, a keyboard 2204. The present invention can be applied to the display portion 2203.

FIG. 16B shows a player using a recording medium on which a program is recorded. The player includes a main body 2211, a display section 2212, a speaker section 2213, a recording medium 2214,
It is composed of an operation switch 2215. This apparatus uses a DVD (Digital Versat) as a recording medium.
ile Disc), a CD or the like, it is possible to perform music appreciation, movie appreciation, games, and the Internet. The present invention can be applied to the display portion 2212.

FIG. 16C shows a digital camera, which comprises a main body 2221, a display section 2222, an eyepiece 2223, operation switches 2224, and an image receiving section (not shown).
The present invention can be applied to the display portion 2222.

FIG. 16D shows a one-eye head mounted display, which comprises a display portion 2231 and a band portion 2232. The present invention can be applied to the display portion 2231.

[Embodiment 15] In this embodiment, an external view of a portable information terminal of the present invention will be described. FIG. 31 shows a portable information terminal having the structure of the present invention, where 2701 is a display panel and 2702 is an operation panel. The display panel 2701 and the operation panel 2702 are connected to each other by a connection portion 270.
3 are connected. The surface of the connection portion 2703 on which the display portion 2704 of the display panel 2701 is provided and the operation key 2706 of the operation panel 2702
Can be arbitrarily changed.

[0213] The display panel 2701 has a display portion 2704. The portable information terminal shown in FIG. 31 has a function as a telephone, the display panel 2701 has an audio output unit 2705, and audio is output from the audio output unit 270.
5 is output. The display portion 2704 uses the liquid crystal display device of the present invention.

The aspect ratio of the display portion 2704 is 16:
9, 4: 3, etc. can be arbitrarily selected. Display 2
The size of 704 is desirably about 1 inch to 4.5 inches diagonally.

The operation panel 2702 has an operation key 270
6, a power switch 2707 and a voice input unit 2708. Although the operation key 2706 and the power switch 2707 are provided separately in FIG. 31, a configuration in which the power switch 2707 is included in the operation key 2706 may be employed.
In the voice input unit 2708, voice is input.

In FIG. 31, the display panel 2701 has the audio output unit 2705 and the operation panel 2702 has the audio input unit 2708, but this embodiment is not limited to this configuration. The display panel 2701 is a voice input unit 27
08, and the operation panel 2702 is
5 may be provided. Further, both the audio output unit 2705 and the audio input unit 2708 may be provided on the display panel 2701, or the audio output unit 2705 and the audio input unit 2708 may be provided.
708 may be provided on the operation panel 2702.

FIG. 32 shows an example in which the operation key 2706 of the portable information terminal shown in FIG. 31 is operated with the index finger. FIG. 33 shows an example in which the operation key 2706 of the portable information terminal shown in FIG. 31 is operated with the thumb. Note that the operation keys 2706 are provided on the operation panel 2702.
May be provided on the side surface. The operation can be performed with only one index finger or one thumb.

[Embodiment 16] In this embodiment, an electronic apparatus to which the portable information device of the present invention is applied will be described with reference to FIGS.
9 will be described.

There is a personal computer as a portable information device of the present invention. FIG. 28A illustrates a personal computer, which includes a main body 2801, an image input portion 2802, a display portion 2803, a keyboard 2804, and the like. Display unit 28
As 03, the use of a liquid crystal display device having a memory circuit for each pixel can realize low power consumption of a personal computer.

[0220] There is a navigation device as a portable information device of the present invention. FIG. 28B illustrates a navigation device, which includes a main body 2811, a display portion 2812, and a speaker portion 281.
3, a storage medium 2814, an operation switch 2815, and the like. By using a liquid crystal display device having a memory circuit for each pixel as the display portion 2812, low power consumption of the navigation device can be realized.

An electronic book is a portable information device of the present invention. FIG. 28C illustrates an electronic book, which includes a main body 2851, a display portion 2852, a storage medium 2853, and operation switches 285.
4. Mini disk (MD) including antenna 2855
And DVD (DigitalVersatile Dis)
The data stored in c) and the data received by the antenna are displayed. By using a liquid crystal display device having a memory circuit for each pixel as the display portion 2852, power consumption of the electronic book can be reduced.

A portable information device of the present invention includes a portable telephone. FIG. 29A illustrates a mobile phone, which includes a display panel 29.
01, operation panel 2902, connection unit 2903, display unit 2904, audio output unit 2905, operation keys 2906, power switch 2907, audio input unit 2908, antenna 2
909, CCD light receiving section 2910, external input port 291
1 and so on. By using a liquid crystal display device having a memory circuit for each pixel as the display portion 2904, low power consumption of the mobile phone can be realized.

There is a PDA as a portable information device of the present invention. FIG. 29B shows a PDA, which includes a display portion and a pen input doublet 3004, operation keys 3006, a power switch 3007, an external input port 3011, and an input pen 301.
2 etc. are included. By using a liquid crystal display device having a memory circuit for each pixel as the display portion 3004, low power consumption of the PDA can be realized.

[Embodiment 17] In this embodiment, in a liquid crystal display device having a pixel having the same configuration as that shown in FIG. 20, it is held in a storage circuit of each pixel and input to a D / A converter. A case where the operation of converting a signal into a corresponding analog signal is controlled using a DAC controller (not shown) will be described with reference to FIG.

In this embodiment, the operation of converting the signal held in the storage circuit of each pixel and input to the D / A converter into a corresponding analog signal and outputting the signal from the D / A converter is stored in the memory. This operation will be referred to as a circuit read operation.

In FIG. 37, the pixel is a writing TF
T108 to 110, storage circuits 105 to 107, a source signal line 101, and a write gate signal line 102 to 1
04, a D / A converter 400, a liquid crystal element LC,
And a storage capacitor Cs.

One of the source and drain regions of the writing TFTs 108 to 110 is connected to the source signal line 10.
1 and the other one is a storage circuit 105-
107 inputs. T for writing
The gate electrodes of the FTs 108 to 110 are connected to the write gate signal lines 102 to 104, respectively. Outputs of the storage circuits 105 to 107 are connected to inputs in1 to in3 of the D / A converter 400, respectively. The output out of the D / A converter 400 is connected to one electrode of the liquid crystal element LC and the storage capacitor Cs.

The D / A converter 400 includes NAND circuits 441 to 443 and inverters 444 to 446 and 46.
1, switches 447a to 449a, switches 447b to
449b, a switch 460, capacitors C1 to C3, a reset signal line 452, a low-voltage gradation power line 453, a high-voltage gradation power line 454, and an intermediate-voltage gradation power line 455.

The operation up to the storage of the digital signal in the storage circuits 105 to 107 is described in the embodiment mode and the first embodiment.
Since the operation is the same as that shown in FIG.

The operation of D / A converter 400 will be described below.

The switch 460 is turned on by the signal res input to the reset signal line 452, and the potentials of the capacitors C1 to C3 connected to the out terminals are
It is fixed to the potential V _M of the intermediate pressure side gradation power line 455. Further, the potential of the high-voltage gradation power supply line 454 is set equal to the potential _VL of the low-voltage gradation power supply line 453. At this time, even if a digital signal is input to in1 to in3, no signal is written to the capacitors C1 to C3.

Thereafter, the signal r on the reset signal line 452
es changes, the switch 460 is turned off, and the capacitance C
The fixing of the potentials on the out terminal side of 1 to C3 is released. Then, the potential of the high voltage side gray scale power supply line 454 is changed to the potential V _L values different V _H of the low voltage side gray scale power supply line 453. At this time, according to the signals input to the terminals in1 to in3, the NAND
The outputs of the circuits 441 to 443 change, and the switches 447 to
In each of 449, one of the two switches is turned on, and the potential V _H of the high-voltage side gray scale power supply line or the potential of the low-voltage side gray scale power supply line _VL becomes the capacitance C1 to C3.
Are applied to the electrodes.

Here, the values of the capacitors C1 to C3 are set corresponding to each bit. For example, C1: C2:
C3 is set to be 1: 2: 4.

The potential applied to the out terminals of the capacitors C1 to C3 is changed by the voltage applied to the capacitors C1 to C3, and the output potential is changed. In other words, the input in1 to in
An analog signal corresponding to the digital signal of No. 3 is output from the out terminal.

The signal res input to the reset signal line 452 and the potential of the high-side gradation power supply line 454
By controlling with the C controller, the output of the analog signal with respect to the input digital signal from the D / A converter 400 can be controlled.

After the digital signal is once written in the storage circuit of the pixel, the above operation is repeated using a DAC controller, and the operation of reading out the digital signal held in the storage circuit is repeated to display a still image. be able to.

At this time, the operations of the source signal line driver circuit and the gate signal line driver circuit can be stopped.

In FIG. 37, a pixel having a configuration in which three memory circuits are arranged has been described as an example, but the present invention is not limited to this. In general, the present invention can be applied to a liquid crystal display device having pixels in which n (n is a natural number of 2 or more) memory circuits are arranged in each pixel.

As the DAC controller, a circuit having a known configuration can be used freely.

[Embodiment 18] In this embodiment, an example of a structure of a pixel of the present invention will be described with reference to FIG.

In FIG. 36, the same portions as those in FIG. 1 are denoted by the same reference numerals, and description thereof is omitted.

In FIG. 36, storage circuits 105 to 107
Are input to the D / A 111 via the reading TFTs 121 to 123, respectively. Here, the gate electrodes of the reading TFTs 121 to 123 are connected to the reading gate signal line 124.

In the pixel having the configuration shown in FIG. 36, the operation of writing a signal to each of the storage circuits 105 to 107 is the same as that of the embodiment and the example, and the description is omitted here.

When displaying a still image, the storage circuit 105
After the digital signals are stored in the memory circuits 10 to 107, the read TFTs 121 to 123 are turned on by inputting a signal to the read gate signal line 124.
The digital signals held at 5 to 107 are input to the D / A 111. Here, when each pixel has a reading TFT as in this embodiment, inputting the digital signal held in the storage circuits 105 to 107 to the D / A 111 is referred to as a signal reading operation of the storage circuit. I do.

Turning on / off of the reading TFTs 121 to 123
A still image can be displayed by switching off and repeating the read operation.

Here, the read operation is performed by selecting a read gate signal line. The read gate signal line 124 can be driven by using a read gate signal line driving circuit.

This read gate signal line drive circuit comprises:
A known gate signal line driving circuit or the like can be used freely.

In FIG. 36, a pixel having a configuration in which three memory circuits are arranged has been described as an example, but the present invention is not limited to this. In general, the present invention can be applied to a liquid crystal display device having pixels in which n (n is a natural number of 2 or more) memory circuits are arranged in each pixel.

[Embodiment 19] In this embodiment, the structure of a pixel of a liquid crystal display device of the present invention is shown in FIG.

In FIG. 38, the same portions as those in FIG. 1 are denoted by the same reference numerals, and description thereof is omitted.

Storage circuits 141a to 143a and storage circuits 141b to 143b are arranged for each pixel.

The selection switch 151 is a writing TFT.
The connection between the storage circuit 108 and the storage circuit 141a or the storage circuit 141b is selected. The selection switch 152 is used for writing T
FT109 and storage circuit 142a or storage circuit 142b
Choose a connection with. The selection switch 153 is connected to the writing TFT 110 and the storage circuit 143 a or the storage circuit 14.
Select the connection with 3b.

The selection switch 154 selects the connection between the D / A 111 and the storage circuit 141a or 141b. The selection switch 155 selects the connection between the D / A 111 and the storage circuit 142a or 142b.
The selection switch 156 is connected to the D / A 111 and the storage circuit 143.
a or the connection with the storage circuit 143b is selected.

The storage circuits 141a to 141a are selected by the selection switches 151 to 153 and the selection switches 154 to 156.
3a and a storage circuit 141.
It is possible to select whether to store a digital signal in b to 143b. Further, a case where a digital signal is input to the D / A 111 from the storage circuits 141a to 143a and a case where the digital signal is input to the D / A 111 from the storage circuits 141b to 143b.
1 can be selected.

In each pixel, the operation of inputting a digital signal to each selected storage circuit and the operation of reading the digital signal held in each selected storage circuit are the same as those in the embodiment mode and the first embodiment. Description is omitted because there is.

The pixel stores a 3-bit digital signal for one frame period using the storage circuits 141a to 143a, and uses the storage circuits 141b to 143b to store 3-bit digital signals for a frame period different from the frame period. The minute signal can be stored.

FIG. 38 shows a circuit for storing a 3-bit digital signal for two frames, but this embodiment is not limited to this. In general, the present invention can be applied to a liquid crystal display device having pixels capable of storing n (n is a natural number of 2 or more) digital signals for m (m is a natural number of 2 or more) frames.

[0258]

By storing digital signals using a plurality of storage circuits arranged inside each pixel, the digital signals stored in the storage circuits are repeated in each frame period when a still image is displayed. Used. Thus, the source signal line driving circuit can be stopped when a still image is displayed continuously. Therefore, it is possible to greatly contribute to lower power consumption of the entire liquid crystal display device.

In a portable information device incorporating a liquid crystal display device, circuits such as a video signal processing circuit for processing signals input to the liquid crystal display device are also stopped when a still image is displayed continuously. This greatly contributes to lower power consumption of the portable information device.

[0260]

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a pixel of the present invention having a plurality of storage circuits therein.

FIG. 2 is a diagram illustrating a circuit configuration of a source signal line driver circuit for performing display using a pixel of the present invention.

FIG. 3 is a timing chart for performing display using a pixel of the present invention.

FIG. 4 is a detailed circuit diagram of a storage circuit.

FIG. 5 is a diagram illustrating a circuit configuration of a source signal line driver circuit without a second latch circuit.

6 is a circuit diagram of a pixel of the present invention driven by the source signal line driving circuit of FIG.

FIG. 7 is a diagram showing a timing chart for performing display using the circuits shown in FIGS. 5 and 6;

FIG. 8 is a diagram showing a configuration of a D / A converter of the liquid crystal display device of the present invention.

FIG. 9 is a diagram showing a configuration of a D / A converter of the liquid crystal display device of the present invention.

FIG. 10 is a diagram illustrating an example of a manufacturing process of a liquid crystal display device having a pixel of the present invention.

FIG. 11 is a diagram illustrating an example of a manufacturing process of a liquid crystal display device having a pixel of the present invention.

FIG. 12 illustrates an example of a manufacturing process of a liquid crystal display device having a pixel of the present invention.

FIG. 13 is a diagram schematically showing the overall circuit configuration of a conventional liquid crystal display device.

FIG. 14 is a diagram showing a circuit configuration of a source signal line driving circuit of a conventional liquid crystal display device.

FIG. 15 illustrates an electronic device to which a display device including a pixel of the present invention can be applied.

FIG. 16 illustrates an electronic device to which a display device including a pixel of the present invention can be applied.

FIG. 17 illustrates a circuit configuration of a source signal line driver circuit without a second latch circuit.

18 is a diagram showing a timing chart for performing display using the circuit shown in FIG. 17;

FIG. 19 is a diagram illustrating an example of a manufacturing process of a reflective liquid crystal display device.

FIG. 20 is a diagram showing a configuration of a D / A converter of the liquid crystal display device of the present invention.

FIG. 21 is a diagram showing a configuration of a D / A converter of the liquid crystal display device of the present invention.

FIG. 22 illustrates a circuit configuration of a source signal line driver circuit including a latch circuit for one-bit processing.

FIG. 23 illustrates a gate signal line driver circuit using a decoder.

FIG. 24 is a block diagram of a portable information terminal using the present invention.

FIG. 25 is a block diagram of a mobile phone using the present invention.

FIG. 26 is a block diagram of a transmission / reception unit of a mobile phone.

27A and 27B are a top view and a cross-sectional view of a liquid crystal display device of a portable information device according to the present invention.

FIG. 28 is a diagram showing an application example of the portable information device of the present invention.

FIG. 29 is a diagram showing an application example of the portable information device of the present invention.

FIG. 30 is a top view of a pixel of the liquid crystal display device of the portable information device of the present invention.

FIG. 31 is a diagram showing an example of a portable information terminal of the present invention.

FIG. 32 illustrates an example of a portable information terminal according to the present invention.

FIG. 33 is a diagram showing an example of a portable information terminal of the present invention.

FIG. 34 is a block diagram of a conventional portable information terminal.

FIG. 35 is a block diagram of a conventional mobile phone.

FIG. 36 is a diagram illustrating a configuration of a pixel of a liquid crystal display device of the present invention.

FIG. 37 illustrates a structure of a pixel of a liquid crystal display device of the present invention.

FIG. 38 is a diagram showing a configuration of a pixel of a liquid crystal display device of the present invention.

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Claims (27)

[Claims] 1. A liquid crystal display device having pixels, wherein each pixel has a plurality of storage circuits and a D / A converter. 2. A liquid crystal display device having pixels, wherein the pixels convert n (n is a natural number of 2 or more) storage circuits and convert digital signals stored in the n storage circuits into analog signals. A liquid crystal display device comprising a D / A converter. 3. A liquid crystal display device having a pixel, wherein the pixel has a liquid crystal element, and an analog signal is input to the liquid crystal element, wherein the pixel has n (n is a natural number of 2 or more) pixels. A liquid crystal display device comprising: a storage circuit; and a D / A converter that converts a digital signal stored in the n storage circuits into the analog signal. 4. A liquid crystal display device having pixels, wherein said pixels are composed of n × m (n and m are natural numbers of 2 or more) storage circuits and n × m storage circuits stored in said n × m storage circuits.
D / which converts a digital signal for bits into an analog signal
A liquid crystal display device comprising an A converter. 5. A driving method of a liquid crystal display device having pixels, wherein the pixels are stored in n × m (n and m are natural numbers of 2 or more) storage circuits and in the n × m storage circuits. Done n
D / which converts a digital signal for bits into an analog signal
A liquid crystal display device comprising: an A converter; wherein the pixel stores digital signals for m frames. 6. The semiconductor device according to claim 1, further comprising a source signal line, wherein the storage circuit and the D / A converter are arranged so as to overlap with the source signal line. Liquid crystal display device with features. 7. The semiconductor device according to claim 1, further comprising a gate signal line, wherein the storage circuit and the D / A converter are arranged so as to overlap with the gate signal line. Liquid crystal display device with features. 8. A liquid crystal display device including a pixel, wherein the pixel includes a liquid crystal element, wherein the pixel includes a source signal line, n (n is a natural number of 2 or more) gate signal lines, and n pixels , N storage circuits, and a D / A converter, wherein the gate electrodes of the n TFTs are respectively connected to one of the n gate signal lines, and the source region And one of the drain regions is connected to the source signal line, and the other is connected to one input terminal of each of the n storage circuits. The output terminals of the n storage circuits are respectively D / A
A liquid crystal display device connected to an input terminal of a converter, and an output terminal of the D / A converter is connected to a liquid crystal element. 9. A liquid crystal display device including a pixel, wherein the pixel includes a liquid crystal element, wherein the pixel includes n (n is a natural number of 2 or more) source signal lines, a gate signal line, and n pixels. , N storage circuits, and a D / A converter. The gate electrodes of the n TFTs are connected to the gate signal line, and one of a source region and a drain region is the n region. One of the source signal lines is connected to a respective one of the n storage circuits, and the other is connected to a respective one of the input terminals of the n storage circuits. D / A
The liquid crystal display device is connected to an input terminal of a converter, and an output terminal of the D / A converter is connected to the liquid crystal element. 10. The circuit according to claim 8, further comprising a source signal line driving circuit, wherein the source signal line driving circuit holds a shift register and an n-bit digital signal by a sampling pulse from the shift register. A latch circuit, a second latch circuit to which the n-bit digital signal held by the first latch circuit is transferred, and a 1-bit digital signal transferred to the second latch circuit.
A switch for sequentially selecting bits by bit and inputting the selected signals to the source signal line. 11. The circuit according to claim 8, further comprising a source signal line driving circuit, wherein the source signal line driving circuit holds a 1-bit digital signal by a shift register and a sampling pulse from the shift register. A liquid crystal display device comprising: a latch circuit; and a second latch circuit to which the one-bit digital signal held in the first latch circuit is transferred. 12. The semiconductor device according to claim 9, further comprising a source signal line drive circuit, wherein the source signal line drive circuit holds a shift register and an n-bit digital signal by a sampling pulse from the shift register. A liquid crystal display device comprising a latch circuit. 13. The circuit according to claim 9, further comprising a source signal line driving circuit, wherein the source signal line driving circuit holds a shift register and an n-bit digital signal by a sampling pulse from the shift register. A liquid crystal display device comprising: a latch circuit; and n switches for inputting n-bit digital signals held in the first latch circuit to the n source signal lines. 14. The memory according to claim 1, wherein the storage circuit is a static memory (SRAM), a ferroelectric memory (FRAM), or a dynamic memory (DRAM). Liquid crystal display device. 15. The storage circuit according to claim 1, wherein the storage circuit is provided on a glass substrate, a plastic substrate,
A liquid crystal display device formed on a stainless steel substrate or a single crystal wafer. 16. A television, a personal computer, a mobile terminal, a video camera, or a head-mounted display according to claim 1, wherein the liquid crystal display device is used. 17. A driving method of a liquid crystal display device having a plurality of pixels arranged in a matrix, wherein each of the plurality of pixels includes a plurality of storage circuits and a D / A
A driving method for a liquid crystal display device, comprising: a converter; and rewriting data in the plurality of storage circuits included in a pixel in a specific row or a pixel in a specific column among the plurality of pixels. 18. A method for driving a liquid crystal display device having a plurality of pixels and a source signal line drive circuit for inputting a video signal to the plurality of pixels, wherein each of the plurality of pixels includes a plurality of storage circuits, / A
A method of driving a liquid crystal display device, comprising: a converter; and stopping the operation of the source signal line driving circuit when displaying a still image. 19. The liquid crystal display device according to claim 17, wherein said storage circuit is a static memory (SRAM), a ferroelectric memory (FRAM), or a dynamic memory (DRAM). Drive method. 20. The storage circuit according to claim 17, wherein the storage circuit is provided on a glass substrate, a plastic substrate,
A method for driving a liquid crystal display device, wherein the method is formed on a stainless steel substrate or a single crystal wafer. 21. A television, a personal computer, a portable terminal, a video camera, or a head-mounted display according to any one of claims 17 to 20, wherein the liquid crystal display device of the driving method is used. 22. A driving method of a portable information device having a liquid crystal display device and a CPU, wherein the liquid crystal display device includes a plurality of storage circuits in a pixel,
/ A converter, and a drive circuit that outputs signals to the plurality of storage circuits, wherein the CPU controls a first circuit that controls the drive circuit;
A second circuit for controlling a signal input to the portable information device, wherein the first circuit is stopped when the liquid crystal display device displays a still image. Drive method. 23. A driving method of a portable information device having a liquid crystal display device and a VRAM, wherein the liquid crystal display device includes a plurality of storage circuits in a pixel,
/ A converter, and when the liquid crystal display device displays a still image, the VRA
A method for driving a portable information device, comprising: stopping an operation of reading M data. 24. A driving method of a portable information device having a liquid crystal display device, wherein the liquid crystal display device includes a plurality of storage circuits,
/ A converter, wherein the source signal line driving circuit of the liquid crystal display device is stopped when the liquid crystal display device displays a still image. 25. The driving method of a portable information device according to claim 22, wherein the plurality of storage circuits perform a read operation once in one frame period. 26. A method for driving a portable information device having a liquid crystal display device, wherein the liquid crystal display device has a plurality of pixels arranged in a matrix, each of the plurality of pixels having a plurality of storage circuits, / A
A portable information device, wherein the liquid crystal display device rewrites data of the plurality of storage circuits included in pixels in a specific row or pixels in a specific column among the plurality of pixels. Drive method. 27. The portable information device according to claim 22, wherein the portable information device is a mobile phone, a personal computer, a navigation system, a PDA, or an electronic book. Method.