JP2002108477A - Method for initializing device composed of plural units provided with the same type cpu - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method capable of preventing part damage from taking place when the program of a different unit is written mistakenly and carried out and the like in a device composed of a plurality of units equipped with the same type CPU. SOLUTION: This method is used for the device that includes the CPU in which at least a memory area and the addresses of a part of an I/O area are configured in the same manner and the plurality of units equipped with an electric circuit board for control where its program can be written from the outside. The electric circuit board for control has an ID number storing part for storing an ID number allocated differently from the other board in a read port to which rewriting can not be made from the CPU. The ID number stored in the ID number storing part is read for performing the program and compared with an ID in the program held by the fore mentioned program, and when the ID number coincides with the ID, the port for sensor, an actuator, etc., as its object is subjected to initialization processing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for initializing an apparatus composed of a plurality of units having the same type of CPU and having the same machine language to be executed. The present invention relates to a method for initializing an apparatus including a plurality of units having the same type of CPU, which prevents an erroneous program from being written to a memory and executed.

[0002]

2. Description of the Related Art In general, when a program is downloaded by communication, the ID of the download destination is checked at the time of downloading, and if there is any inconvenience, the program is not downloaded. Also, when downloading a program of a plurality of CPUs using one communication port, the location where the program is to be downloaded is usually determined based on information on which CPU program is to be downloaded.

Conventionally, a one-chip CPU having a built-in flash memory for storing a program and a RAM for storing data has been used.
In the case of a PU, generally, external data can be unconditionally written to a flash memory. In the case of such a one-chip CPU, for example, the outside and the board of the one-chip CPU are connected via a communication adapter or the like, and the program is downloaded from the outside and written into the flash memory. At present, it is not taken into account when it has been lost.

[0004]

As described above, in the case of a one-chip CPU, there is a danger that an erroneous program may be downloaded from the outside at the time of initial writing of a program into a built-in memory or subsequent writing (at the time of updating). There is. In particular, in the case of a device composed of a plurality of units having the same type of CPU (CPUs executing the same machine language), there is a risk of downloading a program for another unit. In this case, when a program for another unit is executed, the operation is performed at a timing different from that of the normal unit, so that the I / O
Peripheral components connected to the port may be destroyed. Troubles associated with the execution of such an erroneous program may be caused, for example, when writing a program in a one-chip CPU mounted on a certain unit, such as downloading a program for a different board from the outside as described above. This occurs when a program is downloaded or when a ROM in which an incorrect program is recorded is inserted. In the case of an apparatus composed of a plurality of units each having the same type CPU in each unit, the corresponding program is executed without runaway because the memory arrangement is the same.
Since the configuration of / O is different, the driving parts are driven at different timings, and there is a problem that the device is destroyed. Conventionally, no countermeasures have been taken to prevent damage to devices due to execution of an erroneous program, such as executing a program of another unit by mistake.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an apparatus composed of a plurality of units having the same type of CPU when an erroneous program is written to each unit and executed. In particular, it is an object of the present invention to provide a method capable of preventing components from being destroyed when a program of another unit is written and executed by mistake.

[0006]

SUMMARY OF THE INVENTION The present invention relates to a method of initializing a device comprising a plurality of units having the same type of CPU, and an object of the present invention is to provide at least a memory area and a part of an I / O area. Is used for an apparatus including a plurality of units each including a CPU having the same address and having a control electric circuit board capable of writing the program from the outside. The electric circuit board has an ID number storage unit for storing an ID number assigned to a read port that cannot be rewritten from the CPU differently from other boards, and stores the ID number when executing the program. Reading the ID number stored in the section, comparing the ID number with the ID number in the program of the program,
This is achieved by executing port initialization processing for sensors and actuators when they match.

The ID number storage section is located in a memory space of the CPU and in a region of a download control program for controlling a rewriting process of the program;
The ID number storage unit is in an I / O space of the CPU; the ID number storage unit is in a memory space of an area that cannot be directly accessed by the CPU; a read address of the ID number storage unit is a memory space of the CPU; And comparing the ID number in the area of the download control program for controlling the rewriting process of the program with the ID number in the area of the downloaded program;
In the memory space of U or in an external rewritable memory space, respectively.

[0008] Further, the ID number storage unit may be a CPU.
Memory space and I / O space of the CPU,
The ID number stored in the memory space and the I / O
Comparing the ID number in the space with the ID number in the newly written program and not executing the program when it is determined that an incompatible program has been loaded; using the read port The ID number storage section is read out, and the ID number storage section is provided not on the circuit board on which the CPU is mounted but on the unit main body side;

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention is applied to an apparatus composed of a plurality of units having the same type of CPU and having the same machine language to be executed. More specifically, CPUs each requiring a program, a so-called "central processor unit" or What is called a "microcomputer", especially what is called a "one-chip microcomputer" or a "one-chip CPU" including a memory and a peripheral circuit (hereinafter, referred to as a "one-chip CPU" and a single-chip CPU or simply a CPU) The present invention is applied to an apparatus composed of a plurality of units provided with a board (control electric circuit board) on which the CPU is mounted, and an apparatus in which the CPU of each unit is the same. A plurality of units each including a circuit board having the same memory area of the CPU and a different I / O (input / output) configuration are provided, and the writing of the program in the CPU is performed by rewriting the program memory by the communication data or by the ROM. It is suitably applied to those made by replacing

In the above-described apparatus, the present invention provides:
For example, an ID number storage unit storing a code for board recognition (hereinafter referred to as “ID number”) is provided on the board of each unit, and when executing a program in the CPU of the unit, the ID number storage unit is used. The ID information is read from the unit and compared with the ID information in the program. Only when it is determined that the program is a program for the unit, the port is initialized for sensors / actuators, and the port is initialized. Otherwise, by not performing the port initialization processing, it is possible to prevent troubles such as destruction of components due to execution of an incorrect program from occurring.

The port initialization control as described above is performed by downloading (after downloading by communication from a host, after rewriting the flash memory by writing the program read from the IC memory card) or by replacing the replaced RO.
M is performed by a program started by the program M, and verification of the program based on the ID information is performed by the above-described program or hardware such as a comparator.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. The same type C as described above
A banknote deposit machine will be described as an example of an apparatus including a plurality of units each including a PU.

FIG. 1 shows an external configuration of a banknote deposit machine to which the present invention is applied, and FIG. 2 is a block diagram showing an internal configuration thereof. The banknote deposit machine 10 in this example receives a banknote inserted into an inlet 10a provided on the front surface of the housing, and feeds the banknote into the housing by a feeding unit 11a to control the entire control unit (transport unit) 16.
The paper is conveyed to the discriminating unit 12a by the conveying means in a, the deposited banknote is identified by the discriminating unit 12a, and the amount of money is fixed, and stored in the temporary holding unit 14a. The banknotes stored in the temporary storage unit 14a are stored in the collection unit 15a by receiving a payment confirmation instruction (an instruction from a host computer). Further, when a return instruction is given, the banknotes are transported from the temporary holding unit 14a to the payout unit 13a, and the banknotes are collectively returned from the return port 10b in a stacked state.

The banknote deposit machine 10 comprises a plurality of units by blocking the above-described processing mechanism, and each unit is provided with a control CPU. FIG. 3 shows an example of the configuration of each unit.
It is composed of a plurality of units 11 to 17 having a control unit composed of a board or the like on which a one-chip CPU is mounted, and in terms of unit names, a payout unit (payment payout unit)
11, recognition unit (identification unit) 12, payout unit 1
3, a temporary holding unit 14, a safe unit 15, an overall control unit (overall control unit, transport unit) 16, and a power supply unit 17 including a switching power supply and the like.

Here, the same CPU is used (for example, an HD of a 16-bit one-chip microcomputer using an H8 / 300H CPU manufactured by Hitachi, Ltd. as a core).
64F3048) will be described as an example. The corresponding CPU has built-in memory, flash memory, R
AM, interrupt controller, timer counter, SCI
(Serial communication interface), PIO (parallel input / output interface) and AD converter.

Since the banknote deposit machine 10 employs the same CPU, the program area, the I / O space, and the memory area are inevitably common to each unit. Therefore, if the program is downloaded incorrectly, the program can be executed because the program code can be understood and executed by the CPU on any board, but the I / O port (P
Since the sensor and the actuator connected before the IO) are different, there is no serious problem in switching the input and the output, but when the actuators are switched, the drive timing becomes random and a problem occurs. . FIG. 4 is an example of the internal structure of the banknote deposit machine and the arrangement of the sensors / actuators, and reference numerals "P ..." indicate sensors, and reference numerals "M ..." and "S ..." indicate actuators. When the comrades are switched, for example, the bill storage motor “MG1” keeps rotating, the transport motor “MM1” keeps rotating, or the solenoids “SDM1” and “SDM”
There is a problem that the 2 "switching position is random.

The temporary holding unit 14 and the feeding unit 11 will be described as examples. 5 and 6 show a configuration example of the temporary holding unit 14 and the feeding unit 11 respectively.
Is shown in a block diagram. A peripheral device as shown in the figure is connected to an I / O port of a control electric circuit board mounted on each unit, and a communication cable (in this example, It is connected to the overall control unit 16 via an RS-232C interface) 45.

FIGS. 7 and 8 show examples of the configuration of a port table for storing the connection status of each port, setting values, and the like.
FIG. 7 shows the port table PT4 of the temporary holding unit 14,
FIG. 8 shows the port table PT1 of the feeding unit 11, respectively. In these configurations as shown in FIGS. 5 to 8, the “memory map” of the one-chip CPU is common to each unit, but the use form of the I / O port differs depending on the unit. For example, while bit D2 at address FFFC2H of port 1 of the payout unit shown in FIG. 8 is set to "output mode", bit D2 at the same address of temporary hold unit is set to "input mode". If the program of the payout unit 11 is loaded into the temporary holding unit 14, the output is set to the port whose periphery is an input, so that the outputs collide with each other and may be broken depending on the circuit. there is a possibility.

In order to avoid such troubles as destruction of the circuit, in this embodiment, the port address is set to the common I / O
A read port that cannot be rewritten by the CPU in the / O port is a dedicated port for board recognition (hereinafter, referred to as a “board recognition port”), and at least a board recognition code (for example, a board (book) In the example, the unit, the CPU, and the board have a configuration in which an ID number storage unit storing ID information including an ID number that specifies a one-to-one correspondence) is provided. It verifies the correctness of the program based on the code inside. In the examples of FIGS. 7 and 8, I / O port 1 and I / O port 5 are used as board recognition ports, and bits D0 to D3, I / O
Bits D6 to D7 in O port 1 are used as a read address of ID information.

Hereinafter, a method of verifying the validity of a program and a method of initializing an I / O port according to the present invention will be described.

FIGS. 9A and 9B show the structure of a flash memory built in the CPU. The user program area of the flash memory 1 has a flash memory rewriting program (hereinafter referred to as a write program or rewrite). Area (hereinafter, referred to as "IPL unit") 1A for storing a basic program such as a program, and a write area (hereinafter, referred to as "program unit") 1B for storing a user program (middle / application program).
It is composed of On the board of the CPU, a RAM 5 including a boot program area, a user program transfer area, and a reserve area, and a mask R storing a program to be transferred by hardware in the RAM at the time of booting.
OM6 is provided. At the time of initial writing, IPL unit 1
When writing the entire program A and the program section 1B and updating the program, the program is written and updated in the area (program section 1B, IPL section 1A, or both) containing the program to be changed. In the present invention, as shown in FIG. 9B, ID information is set in the program of the program section 1B and in the rewrite program of the IPL section 1A, respectively, and is compared with ID information in an ID number storage section described later. By doing so, the legitimacy of the program is checked.

Rewriting and erasing of the flash memory 1 can be performed by setting the operation mode of the CPU to a predetermined mode (a boot mode or a user program mode in this example). FIG. 10 shows an example in which the user program mode is set to rewrite a program.
Will be described along the flowchart of FIG. A rewriting mode and various operation procedures for various substrates mounted on each unit of the banknote deposit machine will be described later. Here, an execution procedure of a user program when rewriting the flash memory will be described.

When rewriting the flash memory,
First, the operation mode of the CPU is set to the user program mode. The operation mode is set by the mode terminal of the CPU (step S1). When the CPU is started by reset in this state (step S2), the write program on the flash memory is transferred to the inside of the RAM of the CPU (step S3), and the write program is executed. Note that the IPL section in the flash memory is
The reason why the program is shifted to M and executed is that if the write mode of the flash memory is set, the program cannot be read (step S4). Then, the rewriting of the flash memory is executed by the writing program. The transfer source of the program to be rewritten is an external recording medium such as a communication medium or a memory card, and the writing program downloads the program from the outside or transfers the program from the external recording medium to rewrite the flash memory.

When a program is written, the mode of the CPU is set to a write mode by a write command, and a write area (program section) is erased by an erase command.
U and transfer it to the write area of the CPU. At this time, when the area (IPL section 1A) in which the basic program such as the writing program is stored is also changed, for example, the basic program is transferred to the program section 1B and the IPL section 1A is transferred.
After erasing the basic program of the program section 1B,
The data is written into the PL unit 1A, and then the program unit 1B is written (step S5). In this method, the IPL unit 1A also
Rewriting of the program section 1B also depends on the original IPL program, but can be rewritten. In this case, since the program of the IPL unit is designed by the user, the program I
D. Version check is possible.

After the rewriting of the flash memory is completed, the user program of the program section is started. In the present invention, the program is verified at this point (step S6). If the boot mode is set, after the reset is released, a pre-installed boot program is started, and after a predetermined initialization process is performed, external program data can be received.
The processing after step S4 (rewriting processing of all areas) is executed. In this boot mode, data is sequentially written to the flash memory without checking the received data.

Hereinafter, the process of verifying the validity of the program and the process of initializing the I / O port in step S6 will be described in detail with reference to the flow chart of FIG. The following processing is incorporated in the program of the program section 1B.

In the program started after the rewriting of the flash memory, first, the mode of the board recognition port (ID reading port) is initialized (input mode, output mode, and output location are set to the initial values) (step). S11),
The contents stored in the ID number storage section are read via the board recognition port. The address of the board recognition port is set to the same address for all the boards.
In the example of FIG. 8, the address FFFC is
Bits D6 and D7 at address 2H (H is a code indicating hexadecimal notation: the same applies hereinafter) and lower 4 bits D0 at address FFFCAH
To D3, and a board identification code consisting of a total of 6 bits is read. In this example, the board recognition code stored in the ID number storage unit is an ID number that specifies each board (each one-chip CPU). For example, in the case of a bill feeding unit, “06H” is a temporary holding unit. Then "03
H ”(step S12).

Here, the installation location of the ID number storage unit and the verification mode of the program will be described. FIG. 12 (A)
FIG. 3 is a conceptual diagram showing an example of a location where an ID number storage unit exists. An IPL unit (in a rewrite program area for a download control program created by a user) 1A in a memory space of the flash memory 1 has an ID number storage unit 2 This is an example in which is provided. In this case, the content 2a of the memory address in the ID number storage unit 2 is read and compared with ID information (program type code) 1b set at a specific address in the program written in the program unit 1B. Verify the legitimacy of the program. FIG.
(B) is an example in which an ID number storage unit 2 is provided in an I / O space (external memory or the like). In this case, the ID information 2a read out from the ID number storage unit 2 through the board
I in each program of the PL unit 1A and the program unit 1B
Verification is performed by comparing with the D information 1a and 1b. FIG.
(C) shows an example in which a memory space in an area that cannot be directly accessed by the one-chip CPU, for example, a memory space in an area where reading and writing methods are different from normal, is provided. 4 shows an example in which the ID number storage unit 2 is provided on the external recording medium 2A via the external recording medium 4a. In this case, as the external recording medium 2A, it is preferable to use, for example, a "one-time ROM" or "EEPROM", which can be written only once and thereafter becomes read-only. Note that the external storage unit connected to the I / O port may not be provided outside the board, but may be provided on the board.

FIG. 12D shows an example in which the ID number storage unit 2 is provided in both the memory space and the I / O space. In this case, in the next step S13, the contents 2a 'stored in the ID number storage unit 2 in the memory space and the I / O
Content 2a ″ stored in ID number storage unit of O space
And the program type code 1b in the program are compared and verified. Although the comparison process is performed by software in this example, the comparison process may be performed by hardware (comparator). Further, FIG.
As shown in (E), the ID number storage unit 2 may be provided outside the board of each unit, and the ID number may be read out via the connector cable 5 or the like.

When the ID number storage unit 2 is provided in a memory space or an external rewritable memory space, it is desirable to store version information of the program together with the ID number. Step S1 described below
In the processes of S3 and S14, the version number information stored at the specific address in the program is compared with the version number information in the ID number storage unit. Is executed so that the program is not executed when an incompatible program is loaded.

Next, the processing after step S13 will be described. Subsequent to reading the contents of the ID number storage unit in step S12, the program type code (ID number, version information) in the program written in the flash memory is read. This program type code is stored at a fixed address in the program, and when there are a plurality of programs, all the program type codes in each program are read (step S13). And I
The contents stored in the D number storage unit are compared with all the program type codes, and it is verified whether or not all the programs can operate on the current board. In this example, when all ID numbers and version information match, it is determined that operation is possible (steps S14 and S15). If it is determined that all the programs can operate on the current board, initialization processing of I / O ports for sensors / actuators is executed (step 16), and normal processing is continued.

The subsequent processing is the same as the conventional processing. For example, the reset operation of the device connected to the port,
The operation is confirmed by checking each sensor and the like, and if there is no abnormality, a standby state is set (step 17). In step S16, if any one of the program type codes is different from the board recognition code, that is, if it is determined that the current board cannot operate, the initialization processing of the I / O ports of the sensors / actuators is not performed. Next, predetermined error processing such as displaying an error on the external computer side via the error processing unit of the overall control unit is performed (step 18), and the program is stopped (step 19). Note that the processing of steps S11 to S19 is also performed at the time of operation confirmation other than at the time of program rewriting. For example, in the case of a banknote deposit machine, when the banknote deposit machine is powered on, the above processing is executed in accordance with the operation mode of the selected CPU.

Next, a description will be given of a form of rewriting various substrates mounted on each unit of the banknote deposit machine and a specific operation procedure.

Rewriting modes for various substrates are roughly classified into the following modes (a) and (b). (A) Mode of downloading and rewriting by communication from an external computer This mode is a mode of downloading and rewriting the relevant program by communication from an external computer (in this example, PC: personal computer). At the time when the mounting and assembly of the above are completed. That is, in this mode (a), the initial program writing to the flash memory is performed, and the program writing to be performed later is normally performed in the following mode (b). In the mode (a), the PC and the board are connected to a communication medium (for example, RS-2).
32C cable) and connect one-to-one by communication,
The selection menu of the CPU to be rewritten is displayed on the PC side,
The program of the IPL unit and the program unit of the selected CPU is read from a recording medium such as a floppy (registered trademark) disk, downloaded from the PC to the banknote deposit machine side, and written on the substrate alone. In this case, the program may be connected to the main body control board, transferred to another board via the main body control board, and written into the flash memory of each board.

(B) A form in which a memory card is loaded on a substrate and rewritten In this form, a corresponding program is read from a memory card by a CPU.
It is possible to rewrite the IPL part by transferring it to the memory of the PC, and it is possible to rewrite the IPL part. (B-1) Rewriting of Main Body Control Board In the case of the main body control board mounted on the overall control unit 16 of the main body, the memory card 1 is loaded on the main body control board, and the flash memory of the CPU of the main body control board is rewritten. . (B-2) Rewriting of various boards other than the main control board For the boards other than the main board, a memory card is loaded on the main control board and downloaded from the main control board to various boards. For example, a board is selected by a panel operation of the banknote deposit machine, and the data of the memory card (IP
(L part or program part) is transferred to the memory of the corresponding CPU and rewritten.

Next, in the form of the above (a), that is, by downloading from the external computer by communication and
The program for U is rewritten (hereinafter referred to as a first rewriting mode) and the mode (b), that is, an external recording medium (a memory card in this example) which can be loaded on the board is used as a control board of the overall control unit. In the form of rewriting the program of each CPU by loading the CPU (hereinafter, referred to as a second rewriting form), the entire flow will be described by showing a specific example of an operation procedure at the time of rewriting. Hereinafter, a case where the present invention is applied to a money handling system will be described as an example.

FIG. 13 shows an example of the structure of a money handling system, which is applied to, for example, a teller's machine used at a teller of a bank. In this money handling system, the banknote deposit machine 10 and the banknote dispensing machine 20 are provided in a housing of the banknote handling machine, and a door that is opened and closed by a door opening / closing interlock switch is provided on the front of the housing. . The bill receiving machine 10, the bill dispensing machine 20, and the coin processing machine 30,
Each is connected to a host PC (external computer) 40 via a communication cable 45, and a CRT is connected to the host PC 40.
Peripheral devices such as 41, a keyboard 42, a printer 43, and a communication I / F device 44 are connected.

In such a configuration, a program rewriting procedure in the first rewriting mode will be described with reference to the flow chart of FIG. Here, the work procedure immediately after the mounting and assembling of the board in the factory will be described, taking the banknote deposit machine 10 as an example among the apparatuses.

First, as shown in FIG.
And each of the control boards (one of 10A to 16A) is connected via the communication adapter 45a to set the boot mode (step S21), and then power on the connected control board (step S22). Next, C on the upper PC 40 side
The CPU to be rewritten is selected from the program selection menu displayed on the RT 41 as shown in FIG.
When a CPU to be rewritten, that is, a program is selected (step S23), the host PC 40 reads the program from a storage medium such as an FD, displays the program name and version number (version) on the CRT 41, and then executes the program The program is transferred from the host PC 40 to the memory of the CPU by the rewriting procedure, and the memory (IPL
(Program section) and program section (step S2).
4).

Then, the board whose writing to the flash memory is completed is mounted on the relevant unit of the banknote deposit machine 10 (steps S25 and S26), and the operation is confirmed. In this operation check, the operation of the peripheral device connected to the unit is checked. Before that, the above-described validity verification processing and I / O port initialization processing are executed. That is, an ID number (and version information) in each program of the IPL unit and the program unit of the flash memory 1,
The ID number (and version information) in the ID number storage unit 2 is collated, and if the ID number is determined to be valid, the above-described I / O
An operation check is performed following the initialization processing of the O port. Then, if the operation check is OK, the process is terminated and a standby state is set (step S27).

Next, a program rewriting procedure in the second rewriting mode will be described with reference to the flow chart of FIG.

In the second rewriting mode, an external recording medium on which a program such as a memory card is recorded is stored in the main control board 16A.
In this embodiment, the program of each CPU is transferred from an external recording medium from the main control board 16A and the program of each CPU is rewritten. Hereinafter, a case where a memory card that can be mounted on the board is used will be described as an example. .

FIG. 18 shows a memory map of a memory card in which a program of each CPU is recorded, and the program is arranged corresponding to each unit of the banknote deposit machine. In this example, the memory card 3 includes
Main body (overall control unit) 1 of banknote deposit machine 10
6, a payout unit 11, a recycle (temporary hold) unit 14, a collection (safe) unit 15, and a payout unit 13 are stored in the order of CPU programs. , Version information) are recorded.

First, the memory card 3 into which the programs of the respective CPUs are written as described above is inserted into the socket of the control board of the banknote deposit machine main body and mounted (step S3).
1, S32), the power of the banknote deposit machine main body is turned on (step S33). Next, the operation panel of the banknote deposit machine 10 is operated to select the rewritten target unit (CPU) (step S34). The CPU of the overall control unit 16 displays the name of the selected program to be rewritten and its version number (version) to prompt confirmation (step S3).
5). If the confirmation is OK, the program is transferred from the memory card to the memory of the CPU by the above-described program rewriting procedure, the old program is erased, and the new program is written in the memory (the IPL unit or the program unit).

At this time, the boards other than the main board are downloaded to the flash memories in the CPUs of the various boards under the control of the CPU of the main control board (step S36). Then, after the rewriting of the flash memory is completed, the above-described validity verification processing is executed (step S37), and if normal, the I / O port initialization processing for the sensors / actuators is executed (step S38). The operation of the peripheral device is confirmed (step S39). If it is normal, the power of the banknote deposit machine body is turned off, the memory card is removed (S40, S41), and the program writing operation ends. If the rewritten program is erroneous in step S37, an error message is displayed. The cause (error of memory card content, improper loading of the board, etc.) is pursued based on the displayed content, and the result is determined. If the countermeasure has been taken, the process is executed again from step S31. Note that the same flow as described above is performed when writing a rewrite program (IPL unit) stored in the IPL unit 1A of the flash memory.

In the above-described embodiment, a bill receiving machine has been described as an example. However, the present invention can be applied to a device including a plurality of units having the same type CPU. Although the flash memory has been described as an example, when a conventional ROM is used without using a rewritable flash memory, the ID in the user program and the ID of the external boat are used.
By looking at the match with
Even when the OM is inserted, it can be dealt with without causing damage to the parts.

[0047]

As described above, according to the present invention,
In a device equipped with a plurality of units equipped with the same type of CPU with the same machine language to be executed, when the program of each unit is rewritten, especially when the program is mistakenly rewritten by the program of another unit Since the error is detected before the execution of the program and initialization of the mode setting of the I / O port is not performed, damage to the device can be prevented. Further, if an external storage unit connected to the I / O port is provided outside the board and the ID number storage unit retains the ID setting regardless of the replacement of the board, the board may be replaced. Even if the user forgets to change the program, it is possible to prevent the unit from being damaged.

[Brief description of the drawings]

FIG. 1 is a perspective view showing an example of an external configuration of a banknote deposit machine to which the present invention is applied.

FIG. 2 is a block diagram showing an example of an internal configuration of the banknote deposit machine.

FIG. 3 is a block diagram illustrating an example of a unit configuration of the banknote deposit machine.

FIG. 4 is a structural diagram showing an example of the internal structure of the banknote deposit machine and the arrangement of sensors / actuators.

FIG. 5 is a block diagram illustrating a configuration example of a temporary holding unit.

FIG. 6 is a block diagram illustrating a configuration example of a feeding unit.

FIG. 7 is a diagram illustrating a configuration example of a port table of a temporary holding unit;

FIG. 8 is a diagram illustrating a configuration example of a port table of a feeding unit.

FIG. 9 is a diagram showing a configuration of a flash memory built in a CPU.

FIG. 10 is a flowchart illustrating an execution procedure at the time of rewriting the flash memory.

FIG. 11 is a flowchart for explaining a program validity verification process and an I / O port initialization process according to the present invention.

FIG. 12 is a schematic diagram showing an installation location of an ID number storage unit according to the present invention.

FIG. 13 is a block diagram illustrating an example of a configuration of a money handling system to which the present invention has been applied.

FIG. 14 is a flowchart for explaining a program rewriting procedure in the first rewriting mode according to the present invention.

FIG. 15 is a schematic diagram showing a connection form between a host PC and a main body control board on the bill dispensing machine side.

FIG. 16 is a diagram illustrating an example of a rewriting target selection screen.

FIG. 17 is a flowchart for explaining a program rewriting procedure in a second rewriting mode according to the present invention.

FIG. 18 is a diagram showing a memory map of the memory card according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Flash memory 1A IPL part 1a ID information 1B Program part 1b ID information 2 ID number storage part 2A External recording medium 2a ID information 2a 'ID information 2a "ID information 3 Memory card 4 Board recognition port 4a Serial communication port 5 RAM 6 Mask ROM 10 Banknote deposit machine 10a Inlet 10b Return port 11 Feeding unit 11a Feeding unit 12 Recognition unit 12a Identification unit 13 Payout unit 13a Payout unit 14 Temporary holding unit 14a Temporary holding unit 15 Safe unit 15a Collection unit 16 Overall control unit (overall) 16A main body control board 17 power supply unit 20 banknote dispenser 30 banknote processor 40 host PC 41 CRT 42 keyboard 43 printer 44 communication I / F device 45 communication cable 45a communication adapter PT1 Port table of the port table PT4 temporary holding unit of the outgoing unit

Claims (8)

[Claims] 1. At least a memory area and a part of I / O
The apparatus is used in an apparatus including a plurality of units each including a CPU having a region having the same address and having a control electric circuit board capable of writing the program from outside, and The electric circuit board for use has an ID number storage unit for storing an ID number assigned differently from other boards to a read port that cannot be rewritten from the CPU. The ID number stored in the storage unit is read out, the ID number is compared with the ID number in the program of the program, and when the ID numbers match, port initialization processing for sensors and actuators is performed. A method for initializing a device comprising a plurality of units having the same type CPU. 2. The CPU according to claim 1, wherein the ID number storage unit is located in a memory space of the CPU and in a region of a download control program for controlling a rewriting process of the program. Initialization method for a device composed of a plurality of units. 3. The method according to claim 1, wherein the ID number storage unit stores an I / O number of the CPU.
2. The isomorph C according to claim 1, wherein the isoform C is located in an O space.
A method for initializing an apparatus composed of a plurality of units having a PU. 4. The method according to claim 1, wherein the ID number storage unit is located in a memory space of an area that cannot be directly accessed from the CPU. 5. An ID number in a download control program area for controlling a rewriting process of the program when a read address of the ID number storage section is in a memory space of the CPU, and an ID in a downloaded program area. 2. The method for initializing an apparatus comprising a plurality of units having the same type of CPU according to claim 1, wherein the apparatus is adapted to compare numbers. 6. The apparatus according to claim 1, wherein the read address of the ID number storage unit is in a memory space of the CPU or in an external rewritable memory space. Method. 7. When the ID number storage unit is located in a memory space of the CPU and an I / O space of the CPU, an ID number stored in the memory space and an ID number located in the I / O space are stored. A plurality of identical type CPUs according to claim 1, wherein the program is not executed when it is determined that an incompatible program has been loaded by comparing the ID number in the newly written program with the ID number. A method for initializing a device consisting of units. 8. An apparatus for reading the ID number storage section using the read port, wherein the ID number storage section is provided not on a circuit board on which the CPU is mounted but on a unit body side. A method for initializing an apparatus comprising a plurality of units, comprising the same type CPU according to claim 1.