JP2002111750A - Optical transceiver and optical transmitter - Google Patents

Abstract

(57) [Problem] To provide a differential signal phase difference correction circuit capable of correcting a phase difference of a differential signal generated in a transmission line at an input stage of an optical transceiver. A differential signal transmitting means for transmitting a positive-phase signal and a negative-phase signal output from a previous-stage circuit to a next-stage circuit using a positive-phase signal transmission line and a negative-phase signal transmission line, The signal transmission means includes a differential signal phase difference correction circuit for correcting a phase difference between the positive phase signal and the negative phase signal. Further, the differential signal phase difference correction circuit has independent flip-flops in each of a positive-phase signal input section and a negative-phase signal input section of the next-stage circuit, and outputs the two flip-flops to a data signal input from the outside. It operates with a clock signal synchronized with. The re-timing of the positive-phase signal and the negative-phase signal input from the previous-stage circuit to the next-stage circuit via the transmission line by each of the flip-flops allows the normal-phase signal and the negative-phase signal to be Correct the phase difference.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical transceiver mainly used for optical fiber communication, and more particularly to an optical transceiver having a differential signal phase difference correction circuit.

[0002]

2. Description of the Related Art With the advance of advanced information technology, the amount of information communication has rapidly increased, and information contents have been diversified, such as telephones, faxes, data, images, and the like. I have. However, an existing communication network mainly using a metallic cable cannot sufficiently cope with a large amount and a variety of information communication needs. Therefore, a high-speed broadband communication network using an optical fiber cable is being constructed. In optical fiber communications, transmission speeds of tens of Mbps in the early 1980s have already been reduced to 10G.
It has been put to practical use as a high-speed system of bps. from now on,
In order to cope with a further increase in the amount of information communication, the transmission speed has been increased, and accordingly, the optical transceiver, which is a main component of the optical fiber communication network, has also been increased in speed.

Also, with the increase in transmission speed, it is difficult to output a large signal amplitude in each circuit inside the optical transceiver, and in order to effectively use the small signal amplitude, a normal phase signal and a negative phase signal are output. Differential transmission using both signals is common.

Here, an optical transmitter will be described as an example. FIG.
FIG. 2 is a block diagram showing a configuration of a conventional optical transmitter. FIG.
, 1 is DATA, CLOC inputted from outside
IC that receives a K signal and outputs a differential signal, 2 is IC1
A positive-phase signal transmission line for transmitting a positive-phase signal among the differential output signals of the IC 3, a negative-phase signal transmission line for transmitting a negative-phase signal among the differential output signals of the IC1, and a differential signal line 4 for transmitting a differential signal from the IC1. An IC for receiving and generating a desired output waveform, 5 is an electric / optical converter for converting an electric signal from the IC 4 to an optical signal, 6 is a controller for controlling the electric / optical converter 5, and 7 is an optical transmitter A power supply unit for providing a desired power supply to the device inside the device, 8 is an optical fiber, 9 is an external DATA signal, and 10 is an external C signal.
LOCK signal.

FIG. 8 is a diagram showing the timing of the differential output signal of the IC 1 in FIG. 7 and the input signal of the IC 4 after transmitting the positive-phase signal transmission line 2 and the negative-phase signal transmission line 3. Numeral 11 denotes a normal-phase output signal of the IC1, 12 denotes a negative-phase output signal of the IC1, 13 denotes a normal-phase signal after being transmitted on the normal-phase signal transmission line 2, and 14 denotes a negative-phase signal after transmitted by the negative-phase signal transmission line 3. A signal 15 is a phase difference between the transmitted positive-phase signal 13 and the transmitted negative-phase signal 14 generated by the difference between the positive-phase signal transmission path 2 and the negative-phase signal transmission path 3.

Next, the operation will be described. DATA signal 9 and CLOCK signal 1 input to the optical transmitter from outside
0 is received by the first stage IC1, and the positive-phase signal 1 is received as a differential signal.
1. Output the negative-phase signal 12. The positive-phase signal 11 and the negative-phase signal 12 are transmitted to the IC 4 at the next stage through the positive-phase signal transmission path 2 and the negative-phase signal transmission path 3, respectively. The IC 4 receives the differential signal and outputs a desired output waveform to the next-stage electrical / optical converter 5, and an optical signal from the electrical / optical converter 5 is output from the optical fiber 8.

Here, the phase difference between the differential signal output of the IC 1 and the input of the IC 4 after transmitting the positive-phase signal transmission line 2 and the negative-phase signal transmission line 3 will be described. At the output of IC1, no phase difference occurs between the normal phase signal 11 and the negative phase signal 12. However, if the electrical lengths of the positive-phase signal transmission line 2 and the negative-phase signal transmission line 3 are different, the positive-phase signal 13 after transmission,
A phase difference 15 occurs between the positive-phase signal and the negative-phase signal as in the negative-phase signal 14 after transmission.

In an optical transceiver using a signal with a high transmission rate, generally, a positive-phase signal transmission path 2 and a negative-phase signal transmission path 3
Is used microstrip line or coaxial line,
By making the lengths of the positive-phase signal transmission path 2 and the negative-phase signal transmission path 3 as uniform as possible, it is considered that the phase difference 15 between the transmitted normal-phase signal 13 and the transmitted negative-phase signal 14 does not occur. The positive-phase signal transmission line 2 and the negative-phase signal transmission line 3
In order to eliminate the phase difference 15 between the positive-phase signal 13 and the negative-phase signal 14 after passing through, it is necessary to make the electrical lengths of the positive-phase signal transmission path 2 and the negative-phase signal transmission path 3 equal. The wiring of the positive-phase signal transmission path 2 and the wiring of the negative-phase signal transmission path 3 are symmetrical.

[0009]

In the prior art, the lengths of the positive-phase signal transmission line 2 and the negative-phase signal transmission line 3 are made equal to each other so that the positive-phase signal 13 after transmission and the negative-phase signal 14 after transmission. In order to suppress the phase difference 15 with respect to the above, it is necessary to consider a wiring in which the positive-phase signal transmission line 2 and the negative-phase signal transmission line 3 are symmetrical as described above, and design an optical transceiver. In this case, restrictions on component arrangement are increased. In addition, when the transmission signal speed becomes high, even if the difference in length between the positive-phase signal transmission line 2 and the negative-phase signal transmission line 3 is small, a large phase difference occurs, and the next stage receiving a differential signal having a phase difference Since the phase difference cannot be corrected by the circuit, there is a problem that the output waveform distortion and the like are deteriorated and the signal quality is deteriorated.

The present invention has been made to solve the above-described problems, and has as its object to provide an optical transceiver capable of correcting a phase difference of a differential signal generated in a transmission line at an input stage. I do.

[0011]

An optical transceiver according to the present invention uses a transmission line for a positive-phase signal and a transmission line for a negative-phase signal to transmit a positive-phase signal and a negative-phase signal output from a previous-stage circuit to the next stage. An optical transceiver including a differential signal transmission unit for transmitting a signal to a circuit, wherein the differential signal transmission unit includes a differential signal phase difference correction circuit that corrects a phase difference between the positive phase signal and the negative phase signal. It is characterized by having.

Further, the differential signal phase difference correction circuit has independent flip-flops at each of a positive-phase signal input section and a negative-phase signal input section of the next-stage circuit, and inputs the two flip-flops from outside. Operating with the same clock signal synchronized with the data signal to be transmitted, and re-timing the positive-phase signal and the negative-phase signal input from the previous-stage circuit to the next-stage circuit via the transmission line by the flip-flops. Thus, the phase difference between the positive-phase signal and the negative-phase signal is corrected.

The differential signal phase difference correction circuit includes an exclusive OR circuit for detecting a phase difference between a positive phase signal and a negative phase signal output from the previous stage circuit, and an inverse OR circuit for detecting a phase difference between the positive phase signal and the previous stage circuit output. A changeover switch for switching the phase signal to one of a system not passing through each of the flip-flops and a system passing through each of the flip-flops and outputting the same to the next stage circuit; and an output signal of the exclusive OR circuit A control unit that detects the presence or absence of a phase difference from the system that does not pass through the flip-flop if there is no phase difference, and controls the changeover switch to the system that passes through the flip-flop if there is a phase difference, The two flip-flops use the output signal of the exclusive OR circuit as a sampling clock to generate a signal of the positive phase signal and the negative phase signal. It is characterized in that to correct the phase difference.

The differential signal phase difference correction circuit compares a phase difference between the positive-phase signal and the negative-phase signal of a preceding-stage circuit output section, and outputs a signal corresponding to the phase difference. A control circuit that outputs a control signal corresponding to an output signal of the phase comparator, and a control circuit that is provided in a next-stage circuit output section of one of a positive-phase signal transmission path and a negative-phase signal transmission path, and And a gate circuit that changes the number of connection stages based on the control signal to change the amount of phase delay.

Further, the input signal of the phase comparator is a signal after the output of the gate circuit is used as an input signal.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 is a configuration diagram showing an input section of an IC having a built-in differential signal phase correction circuit of an optical transceiver according to Embodiment 1 of the present invention. In the figure, 16 is a flip-flop for a positive-phase signal, 17 is a flip-flop for a negative-phase signal, 18 is a differential amplifier circuit, and 19 is an input section by the flip-flop 16 for a positive-phase signal and the flip-flop 17 for a negative-phase signal. The configured differential signal phase correction circuit built-in IC, 20 is an input normal signal, 21 is an input negative signal, 22 is an output of the normal signal flip-flop 16, and 23 is an output of the negative signal flip-flop 17. is there. In FIG. 1, the same reference numerals as those in the conventional example shown in FIG. 7 are the same or the same, and the description is omitted.

FIG. 2 is a timing chart for explaining the operation of the differential signal phase correction circuit according to the first embodiment of the present invention.

Next, the operation will be described. Positive phase signal 2 transmitted through positive phase signal transmission path 2 and negative phase signal transmission path 3
The zero-phase signal 21 and the negative-phase signal 21 are input to the normal-phase signal flip-flop 16 and the negative-phase signal flip-flop 17 in the IC 19, respectively. The positive-phase signal flip-flop 16 and the negative-phase signal flip-flop 17 operate so that the input positive-phase signal 20 and negative-phase signal 21 are retimed at the rising edge of the same CLOCK signal 10 input from the outside. . As a result, the positive-phase signal flip-flop 16 and the negative-phase signal flip-flop 17 output the positive-phase signal flip-flop output 22 and the negative-phase signal flip-flop output 23 whose phase difference has been corrected. Is input to the differential amplifier 18.

By operating as described above, the phase difference between the positive-phase signal 20 and the negative-phase signal 21 generated by the transmission-line length difference between the positive-phase transmission line 2 and the negative-phase transmission line 3 is provided in the input stage. The correction is made by the positive-phase signal flip-flop 16 and the negative-phase signal flip-flop 17. This makes it possible to alleviate the condition of component arrangement due to the restriction that the positive-phase transmission line 2 and the negative-phase transmission line 3 are made equal in length, and to reduce the size of the device. In addition, it is possible to prevent signal quality deterioration such as waveform distortion caused by a phase difference.

In the first embodiment according to the present invention, the logic of the signal is fixed for convenience of explanation, but the same effect can be obtained by inverting the logic.

Embodiment 2 FIG. FIG. 3 is a configuration diagram showing an input section of an IC having a built-in differential signal phase correction circuit of an optical transceiver according to Embodiment 2 of the present invention. In the figure, 24
Is an exclusive OR circuit for detecting the phase difference between the positive phase signal 20 and the negative phase signal 21, and 25 is an exclusive OR circuit.
The output of the circuit 24 and 26 are the in-phase signal flip-flop 1
Reference numeral 27 denotes an output of the negative-phase signal flip-flop 17, and reference numeral 28 denotes an exclusive OR circuit output 25. The output of the negative-phase signal flip-flop 17 is determined by the presence or absence of a phase difference between the positive-phase signal 20 and the negative-phase signal 21. A control unit for controlling the switching of the input system to 18; 29, a switching signal output from the control unit 28; 30, a switch for switching the system based on the switching signal 29; 31, a normal-phase signal flip-flop 16; Flip-flop 17, exclusive OR
This is an IC with a built-in differential signal phase correction circuit in which an input unit is configured by a circuit 24, a control unit 28, and a changeover switch 30.

FIG. 4 is a timing chart for explaining the operation of the differential signal phase correction circuit according to the second embodiment of the present invention.

Next, the operation will be described. The positive-phase signal 20 and the negative-phase signal 21 transmitted through the positive-phase signal transmission line 2 and the negative-phase signal transmission line 3 are respectively divided into three. , One is input to the exclusive OR circuit 24, and one is input to the changeover switch 30.

The exclusive OR circuit 24 compares the phases of the normal phase signal 20 and the negative phase signal 21 and outputs an output signal 25 corresponding to the phase difference. Exclusive O
The output 25 of the R circuit is divided into two. One is used as a CLOCK signal of the flip-flop 16 for the positive-phase signal and the flip-flop 17 for the negative-phase signal, and the other is input to the control unit 28. The control unit 28 monitors the output signal 25 and, when there is a phase difference between the positive-phase signal 20 and the negative-phase signal 21, sets the changeover switch 30 to the normal-phase signal flip-flop 16 and the negative-phase signal flip-flop. 17
The system is switched to the system connected to
When there is no phase difference between the two, the control is performed so that the changeover switch 30 is switched to a system not connected to the normal-phase signal flip-flop 16 and the negative-phase signal flip-flop 17.

As described above, when there is no phase difference between the positive-phase signal 20 and the negative-phase signal 21, the selector switch 30 is connected to the normal-phase signal flip-flop 16 and the negative-phase signal flip-flop 17. In this case, the normal phase signal 20 and the negative phase signal 2 shown in FIG.
The operation when 1 has a phase difference will be described.

The output signal 25 of the exclusive OR circuit 24 is used as a CLOCK signal of the normal-phase signal flip-flop 16 and the negative-phase signal flip-flop 17, and the normal-phase signal flip-flop 16 and the negative-phase signal The flip-flop 17 samples the input signal at the rising edge of the CLOCK signal. Thus, the positive-phase signal flip-flop output 26 and the negative-phase signal flip-flop output 27 are in a state where the phase difference is corrected.

By operating as described above, the phase difference between the positive-phase signal 20 and the negative-phase signal 21 generated by the transmission-line length difference between the positive-phase transmission line 2 and the negative-phase transmission line 3 is provided in the input stage. The correction is made by the positive-phase signal flip-flop 16 and the negative-phase signal flip-flop 17. This makes it possible to alleviate the condition of component arrangement due to the restriction that the positive-phase transmission line 2 and the negative-phase transmission line 3 are made equal in length, and to reduce the size of the device. In addition, it is possible to prevent signal quality deterioration such as waveform distortion caused by a phase difference. Further, it is possible to correct the phase difference between the positive-phase signal 20 and the negative-phase signal 21 without requiring the input of a CLOCK signal from the outside.

In the second embodiment according to the present invention, the logic of the signal is fixed for convenience of explanation, but the same effect can be obtained by inverting the logic.

Embodiment 3 FIG. 5 is a configuration diagram of an input section of an IC incorporating a differential signal phase correction circuit according to Embodiment 3 of the present invention. In the figure, 32 is a phase comparator, 3
3 is a control circuit for outputting a desired control signal from the output signal of the phase comparator 32, 34 is a gate circuit for changing the number of connection stages by a signal from the control circuit 33 to change the transmission delay amount, 35 is a phase comparator 32, This is an IC with a built-in differential signal phase correction circuit in which an input unit is configured by the control circuit 33 and the gate circuit 34.

Next, the operation will be described. Normal phase signal 2
0 is divided into two, and one is input to the differential amplifier circuit 18 of the next stage,
The other is input to the phase comparator 32. Similarly, the inverted phase signal 21 is also divided into two, one of which is input to the gate circuit 34 and the other is input to the phase comparator 32. The output of the gate circuit 34 is input to the differential amplifier 18 at the subsequent stage. The phase comparator 32 outputs an output signal corresponding to the phase difference between the input positive-phase signal 20 and negative-phase signal 21 to the control circuit 33. The control circuit 33 changes the number of connection stages of the gate circuit 34 according to the input signal so as to obtain a desired delay amount. This makes it possible to correct the phase difference between the differential signals input to the differential amplifier circuit 18.

By operating as described above, it is possible to alleviate the condition of parts arrangement due to the restriction that the positive-phase transmission line 2 and the negative-phase transmission line 3 are made equal in length, and to reduce the size of the device. . In addition, it is possible to prevent signal quality deterioration such as waveform distortion caused by a phase difference. Further, it is possible to correct the phase difference between the positive-phase signal 20 and the negative-phase signal 21 without requiring the input of a CLOCK signal from the outside.

In the third embodiment according to the present invention, although a gate circuit for adjusting the phase is provided on the negative phase signal side, the same effect can be obtained by putting it on the positive phase signal side.

Embodiment 4 FIG. 6 is a configuration diagram of an input section of an IC incorporating a differential signal phase correction circuit according to Embodiment 4 of the present invention. In the figure, 36 is a gate circuit 34
, 37 is a phase comparator 32, a control circuit 3
3. An IC with a built-in differential signal phase correction circuit in which the input section is constituted by the gate circuit 34.

Next, the operation will be described. Normal phase signal 2
0 is divided into two and one is input to the differential amplifier circuit 18 of the next stage, and the other is input to the phase comparator 32. The negative phase signal 21 is input to a gate circuit 34 for correcting the amount of phase delay. The output of the gate circuit 34 is divided into two, one of which is input to the differential amplifier circuit 18 and the other is input to the phase comparator 32. The phase comparator 32 compares the phase of the input positive-phase signal 20 with the output of the gate circuit 36, and outputs an output signal corresponding to the phase difference to the control circuit 33. The control circuit 33 changes the number of connection stages of the gate circuit 34 according to the input signal so as to obtain a desired delay amount. This makes it possible to correct the phase difference between the differential signals input to the differential amplifier circuit 18.

By operating as described above, it is possible to alleviate the condition of parts arrangement due to the restriction that the positive-phase transmission line 2 and the negative-phase transmission line 3 have the same length, and to reduce the size of the apparatus. . In addition, it is possible to prevent signal quality deterioration such as waveform distortion caused by a phase difference. Further, it is possible to correct the phase difference between the positive-phase signal 20 and the negative-phase signal 21 without requiring the input of a CLOCK signal from the outside. Further, by comparing the phase difference between the gate circuit output signal 36, which is the input signal of the differential amplifier circuit 18 at the subsequent stage, and the positive-phase signal 20, a more stable phase difference control than in the third embodiment according to the present invention can be achieved. It becomes possible.

In the fourth embodiment of the present invention, a gate circuit for adjusting the phase is provided on the negative phase signal side, but the same effect can be obtained by providing the same on the positive phase signal side.

[0037]

As described above, according to the present invention, by providing the optical transceiver with the differential signal phase difference correction circuit,
Since it is no longer necessary to make the positive-phase transmission line and the negative-phase transmission line equal in length, the conditions for arranging components are relaxed, and the device can be downsized.

The differential signal phase difference correction circuit of the optical transceiver is
The phase difference between the positive-phase signal and the negative-phase signal generated by the transmission path length difference between the positive-phase transmission line and the negative-phase transmission line is corrected by the positive-phase signal flip-flop and the negative-phase signal flip-flop provided at the input stage. In addition, it is possible to prevent signal quality deterioration such as waveform distortion caused by a phase difference.

The differential signal phase difference correction circuit of the optical transceiver is
An exclusive OR circuit for detecting the phase difference between the positive-phase signal and the negative-phase signal output from the previous-stage circuit, and by using this output signal as a sampling clock for the two flip-flops, The phase difference between the normal phase signal and the negative phase signal can be corrected without requiring the input of the CLOCK signal.

The differential signal phase difference correction circuit of the optical transceiver is
With the provision of the phase comparator, the control circuit, and the gate circuit, it is possible to correct the phase difference between the positive-phase signal and the negative-phase signal generated by the transmission path length difference between the positive-phase transmission line and the negative-phase transmission line. it can.

Since the signal after the output of the gate circuit is detected by the phase comparator and the phase is adjusted, the phase control with excellent stability can be performed.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an input unit of an IC having a built-in differential signal phase difference correction circuit according to a first embodiment of the present invention;

FIG. 2 is a timing chart for explaining an operation of the differential signal phase difference correction circuit according to the first embodiment of the present invention.

FIG. 3 is a configuration diagram of an input unit of an IC having a built-in differential signal phase difference correction circuit according to Embodiment 2 of the present invention;

FIG. 4 is a timing chart for explaining the operation of the differential signal phase difference correction circuit according to Embodiment 2 of the present invention.

FIG. 5 is a configuration diagram of an input section of an IC incorporating a differential signal phase difference correction circuit according to a third embodiment of the present invention.

FIG. 6 is a configuration diagram of an input section of an IC incorporating a differential signal phase difference correction circuit according to a fourth embodiment of the present invention.

FIG. 7 is a configuration diagram of a conventional optical transmitter.

FIG. 8 is a timing chart for explaining a state of occurrence of a phase difference at the time of conventional differential signal transmission.

[Explanation of symbols]

1 IC, 2 normal phase signal transmission path, 3 reverse phase signal transmission path,
4 IC, 5 electrical / optical converter, 6 controller, 7 power supply, 8 optical fiber, 9 DATA signal, 10 CL
OCK signal, 11 IC1 positive phase output signal, 12 IC
1 negative phase output signal, 13 normal phase signal after transmission, 14 negative phase signal after transmission, 15 phase difference, 16 normal phase signal flip-flop, 17 reverse phase signal flip-flop, 18
Differential amplifier circuit, 19 Differential signal phase correction circuit built-in I
C, 20 input normal phase signal, 21 input negative phase signal, 22 normal phase signal flip-flop output, 23 negative phase signal flip-flop output, 24 exclusive OR circuit,
25 Exclusive OR circuit output, 26 Normal-phase signal flip-flop output, 27 Reverse-phase signal flip-flop output, 28 control unit, 29 switching signal, 30
Selector switch, 31 I with built-in differential signal phase correction circuit
C, 32 phase comparator, 33 control circuit, 34 gate circuit, 35 IC with built-in differential signal phase correction circuit, 36 gate circuit output, 37 IC with built-in differential signal phase correction circuit.

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[Procedure amendment]

[Submission date] August 7, 2001 (2001.8.7)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Name of invention

[Correction method] Change

[Correction contents]

Patent application title: Optical transceiver and optical transmitter

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name] 0001

[Correction method] Change

[Correction contents]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical transceiver and an optical transmitter mainly used for optical fiber communication, and more particularly to an optical transceiver and an optical transmitter having a differential signal phase difference correction circuit. is there.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0010

[Correction method] Change

[Correction contents]

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an optical transceiver and an optical transmitter capable of correcting a phase difference of a differential signal generated in a transmission line at an input stage. > To provide.

[Procedure amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0014

[Correction method] Change

[Correction contents]

The differential signal phase difference correction circuit compares a phase difference between the positive-phase signal and the negative-phase signal of a preceding-stage circuit output section, and outputs a signal corresponding to the phase difference. A control circuit that outputs a control signal corresponding to an output signal of the phase comparator, and a control circuit that is provided in a next-stage circuit output section of one of a positive-phase signal transmission path and a negative-phase signal transmission path, and A gate circuit for changing the amount of phase delay based on the control signal.

[Procedure amendment 6]

[Document name to be amended] Statement

[Correction target item name] 0015

[Correction method] Change

[Correction contents]

Further, the input signal of the phase comparator is a signal after the output of the gate circuit is used as an input signal. The optical transmitter according to the present invention has a positive phase signal.
Circuit using the signal transmission line and the reverse-phase signal transmission line
Differential for transmitting the output positive-phase signal and negative-phase signal to the next stage circuit
In the optical transmitter having the signal transmission means, the differential signal
In the transmission means, the phase difference between the in-phase signal and the
It is characterized by having a differential signal phase difference correction circuit to correct
Is what you do. Further, the differential signal phase difference correction circuit
Are the positive-phase signal input section and the negative-phase signal input of the next-stage circuit.
Each section has an independent flip-flop,
Data signal input externally from two flip-flops
Operating with the same clock signal synchronized with
Input from the previous circuit to the next circuit via
The normal-phase signal and the negative-phase signal are each
The re-timing at the
It is characterized by correcting the phase difference with the phase signal.
You. In addition, the differential signal phase difference correction circuit
An output detector that detects the phase difference between the positive and negative phase signals of force.
A passive OR circuit and an inverse of the positive-phase signal output from the preceding circuit
A phase signal that does not pass through each of the flip-flops,
Any of the above systems via the flip-flops
Switch to switch to the next stage and output to the next stage circuit, and
There is a phase difference from the output signal of the exclusive OR circuit.
If no phase difference is detected, the flip-flop is
If there is a phase difference in the system that does not pass through,
A control unit for controlling the changeover switch to the system via
And the two flip-flops include
Sampling the output signal of the exclusive OR circuit.
The positive phase signal and the negative phase signal
It is characterized by correcting the phase difference with the signal.
You. In addition, the differential signal phase difference correction circuit
Compare the phase difference between the positive-phase signal and the negative-phase signal of the power section
A phase comparator for outputting a signal corresponding to the phase difference;
Control that outputs a control signal according to the output signal of the phase comparator
Circuit and either positive-phase signal transmission path or negative-phase signal transmission path
Is provided at one of the next-stage circuit output sections, and
Change the number of connection stages based on the control signal to change the amount of phase delay.
And a gate circuit for
is there. Further, the input signal of the phase comparator is
The signal after the output of the gate circuit is used as the input signal.
Things.

[Procedure amendment 7]

[Document name to be amended] Statement

[Correction target item name] 0037

[Correction method] Change

[Correction contents]

[0037]

As described above, according to the present invention, by providing the optical transmitter / receiver and the optical transmitter with the differential signal phase difference correction circuit, the positive-phase transmission line and the negative-phase transmission line can be made equal in length. Therefore, the conditions for arranging components are relaxed, and the device can be downsized.

[Procedure amendment 8]

[Document name to be amended] Statement

[Correction target item name] 0038

[Correction method] Change

[Correction contents]

The differential signal phase difference correction circuit has an input stage provided with a phase difference between a positive phase signal and a negative phase signal generated by a transmission path length difference between the positive phase transmission line and the negative phase transmission line. Correction can be performed by the normal-phase signal flip-flop and the negative-phase signal flip-flop, and signal quality deterioration such as waveform distortion caused by a phase difference can be prevented.

[Procedure amendment 9]

[Document name to be amended] Statement

[Correction target item name] 0039

[Correction method] Change

[Correction contents]

The differential signal phase difference correction circuit has an exclusive OR circuit for detecting a phase difference between a positive phase signal and a negative phase signal output from the preceding circuit, and outputs the output signal to the two flip-flops. By using the clock signal as the sampling clock of the loop, it is possible to correct the phase difference between the positive-phase signal and the negative-phase signal without requiring an external input of the CLOCK signal.

[Procedure amendment 10]

[Document name to be amended] Statement

[Correction target item name] 0040

[Correction method] Change

[Correction contents]

Further , since the differential signal phase difference correction circuit includes the phase comparator, the control circuit, and the gate circuit, the differential signal phase difference correction circuit generates a positive signal generated by a transmission path length difference between the positive phase transmission line and the negative phase transmission line. The phase difference between the phase signal and the opposite phase signal can be corrected.

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Claims (5)

[Claims] 1. An optical system comprising: a differential signal transmission means for transmitting a positive-phase signal and a negative-phase signal output from a previous-stage circuit to a next-stage circuit using a positive-phase signal transmission line and a negative-phase signal transmission line. An optical transceiver, wherein the differential signal transmission means includes a differential signal phase difference correction circuit for correcting a phase difference between the positive phase signal and the negative phase signal. 2. The optical transceiver according to claim 1, wherein the differential signal phase difference correction circuit has an independent flip-flop for each of a positive-phase signal input section and a negative-phase signal input section of the next-stage circuit. Then, the two flip-flops are operated by the same clock signal synchronized with a data signal input from the outside, and the positive-phase signal input from the previous-stage circuit to the next-stage circuit via the transmission line and An optical transceiver which corrects a phase difference between the positive-phase signal and the negative-phase signal by retiming the negative-phase signal with each of the flip-flops. 3. The optical transceiver according to claim 2, wherein the differential signal phase difference correction circuit includes an exclusive OR circuit that detects a phase difference between a positive-phase signal and a negative-phase signal output from a previous-stage circuit. A switch for switching the normal-phase signal and the negative-phase signal output from the preceding-stage circuit to one of a system that does not pass through each of the flip-flops and a system that passes through each of the flip-flops and outputs the same to the next-stage circuit. Detecting the presence or absence of a phase difference from the output signal of the exclusive OR circuit, and, if there is no phase difference, to a system that does not pass through the flip-flop, and if there is a phase difference, to a system that passes through the flip-flop. And a control unit that controls an output of the exclusive OR circuit. The two flip-flops use an output signal of the exclusive OR circuit as a sampling clock. Ri optical transceiver and correcting the phase difference between the positive phase signal and the opposite phase signal. 4. The optical transceiver according to claim 1, wherein the differential signal phase difference correction circuit compares a phase difference between the positive-phase signal and the negative-phase signal of a preceding-stage circuit output unit, and A phase comparator that outputs a signal corresponding to the phase comparator, a control circuit that outputs a control signal that corresponds to the output signal of the phase comparator, and a next-stage circuit of one of a positive-phase signal transmission path and a negative-phase signal transmission path An optical transmitter / receiver, comprising: a gate circuit provided in the output unit, the number of connection stages being changed based on a control signal of the control circuit to change a phase delay amount. 5. The optical transceiver according to claim 4, wherein an input signal of the phase comparator is a signal output from the gate circuit as an input signal.