JP2002231734A - Substrate unit, semiconductor element, method of mounting semiconductor element, and method of manufacturing the same - Google Patents

Abstract

[PROBLEMS] To arrange and fix a plurality of electronic components such as semiconductor chips on a wiring board via a thermosetting adhesive,
Depending on the state of the adhesive protruding around the semiconductor chip, displacement occurs due to contraction of the adhesive during the thermosetting process, causing problems such as a decrease in positional accuracy and breakage of components. From A facing lower surface width _{W LE D} of the LED array 1 arranged on the wiring substrate 11, a predetermined amount broadly the die bonding resin 13 is applied onto the wiring board 11, the long side 1a of the LED array 1 and 1b Fillets 13 equal to each other
a and 13b are formed. Also, in the arrangement direction, the space between the adjacent LED arrays 1 is filled with the die bond resin 13 so that displacement in the same direction can be suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a board unit in which electronic components such as semiconductor elements are mounted and fixed on a wiring board.
And a method for mounting and manufacturing a semiconductor element.

[0002]

2. Description of the Related Art Conventionally, in this field, a mounting method for mounting an electronic component such as a semiconductor chip as a semiconductor element on a wiring board is described in VLSI packaging technology (lower), pages 17 to 22 (Nikkei BP). As described in
A method of die bonding using a thermosetting adhesive resin is generally used.

FIGS. 14A to 14E are front process diagrams schematically showing the steps of such a conventional method in sequence.
FIGS. 5 (a) to 5 (e) are plan views corresponding to FIGS. 14 (a) to 14 (e).

First, as shown in each figure, a die bonding resin 53 as a thermosetting adhesive is applied to a predetermined position of a wiring board 51 on which a semiconductor chip 50 is mounted by a dispense method.
It is applied by a stamping method, a screen printing method or the like.

[0005] Next, the wiring board 51 is
The semiconductor chip 50 to be mounted on the device is sucked out of a storage means (not shown) and taken out, and as shown in FIGS. Next, it is aligned with the wiring board 51 by using a processing technique by an image recognition means (not shown), and a predetermined amount of pressure is applied by the collet 52 during suction as shown in FIGS. 14 (b) and 15 (b). While being mounted on the wiring board 51 via the die bond resin 53.

Next, each of (c) of FIG. 14 and FIG.
As shown in (d), this mounting operation is sequentially repeated, and the semiconductor chip 50 is mounted on the wiring substrate 51 at a desired mounting position where the die bond resin 53 is applied. FIG. 14 (e)
FIG. 15E shows the mounting state of the semiconductor chip 50 thus mounted. Thereafter, as shown in FIG. 16, the wiring board 51 on which the semiconductor chip 50 is mounted is placed in a heating means 54 such as an oven furnace or a reflow furnace shown by a dotted line and heated to heat the die bonding resin 53 of the thermosetting adhesive. After curing, the substrate unit 55 in which the semiconductor chip 50 is fixed to the wiring substrate 51 is completed.

[0007]

However, in such a conventional mounting method of the semiconductor chip 50, as shown in FIG. 17, a die bonding resin 5 previously applied onto a wiring board is used.
When the application area of No. 3, the supply amount thereof, and the mounting position of the semiconductor chip 50 vary, when the semiconductor chip 50 is mounted and the die bond resin 53 is heated and cured, the semiconductor chip 5
The balance of the heat shrink force of the die bond resin that protrudes around 0 and forms a fillet is lost.

In this case, the semiconductor chip 50 is fixed at a position shifted from the mounting position when the die bond resin 53 solidifies. FIGS. 17A and 17B schematically show the types of the positional shift. In the case of FIG. 17A vertically displaced from the center line 56 of the mounting position, in the case of FIG.
The case of FIG. 3C shifted in the center line direction is conceivable. In a more extreme case, the die bond resin 53 may protrude largely on one side of the semiconductor chip 50 and no fillet is formed on the other side as shown in FIG.

In particular, when arranging semiconductor chips close to each other with high precision, such as an LED image bar or an image sensor, this shift can cause a reduction in resolution or damage to the semiconductor chip, and can be ignored. There was a problem that it disappeared.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device, a semiconductor device mounting method, and a method of manufacturing the same, which can prevent a semiconductor chip from being displaced and can mount a semiconductor chip with high accuracy. To provide.

[0011]

According to a first aspect of the present invention, there is provided a substrate unit in which a plurality of semiconductor elements are linearly arranged on a wiring substrate via a thermosetting adhesive. A uniform fillet is formed on both side surfaces parallel to the arrangement direction by the thermosetting adhesive, and the semiconductor element is fixed on the wiring board.

The method of mounting a semiconductor element according to claim 2 is a method of mounting a semiconductor element in which a plurality of semiconductor elements are linearly arranged on a wiring board via a thermosetting adhesive. On the opposing lower surface facing the wiring board,
The length in the arrangement direction is L _LED , the width in the width direction perpendicular to the arrangement direction is W _LED , and the fillet of the thermosetting adhesive is formed on both side surfaces of the semiconductor element parallel to the arrangement direction. The assumed width in the width direction is F, the relative positional error between the thermosetting adhesive applied to the wiring board and the semiconductor element is D, and the thermosetting adhesive is further provided on the wiring board. When the length of the application area to which the adhesive is applied is L in the arrangement direction and the width in the width direction is W, a plurality of application areas in the arrangement direction satisfying L ≦ L _LED W ≧ (W _LED + 2F + 2D) A first step of applying the thermosetting adhesive to form the plurality of semiconductors such that a center line of the application region in the arrangement direction substantially coincides with a center line of the opposed lower surface in the arrangement direction. A device is mounted on each of the application areas. And a third step of transferring the wiring board on which the semiconductor element is mounted into an overheating furnace and curing and fixing the thermosetting adhesive.

According to a third aspect of the present invention, in the mounting method of the second aspect, the thermosetting adhesive is applied to a substantially constant thickness. The mounting method of a semiconductor element according to claim 4, wherein each of the fillets formed on the semiconductor elements adjacent to each other of the plurality of semiconductor elements arranged on the wiring board in the mounting method according to claim 2 or 3. The thickness of the thermosetting adhesive applied to the application area is set so that the thermosetting adhesives do not contact each other. According to a fifth aspect of the present invention, there is provided a semiconductor device.
A semiconductor element used in the method of mounting a semiconductor element according to the above, wherein the length of the semiconductor element in the arrangement direction is Ls, and the thermosetting adhesive formed between the semiconductor elements arranged adjacent to each other. The width of each fillet in the arrangement direction is F
b, the length L _LED of the facing lower surface in the arrangement direction
And Ls is set to Ls ≧ L _LED + 2Fb to form a truncated pyramid.

According to a sixth aspect of the present invention, the substrate unit is a substrate unit in which a plurality of semiconductor elements are linearly arranged on a wiring board via a thermosetting adhesive, and both sides of the semiconductor elements parallel to the arrangement direction. On the surface of the wiring board, fillet is formed by forming the same fillet with the thermosetting adhesive, and the thermosetting adhesive is filled in an air space formed between the adjacent semiconductor elements. It is fixed on top.

The method of mounting a semiconductor element according to claim 7, is a method of mounting a semiconductor element in which a plurality of semiconductor elements are linearly arranged on a wiring board via a thermosetting adhesive. On the opposing lower surface facing the wiring board,
The width in the width direction orthogonal to the arrangement direction is W _LED , the assumed width in the width direction of the fillet of the thermosetting adhesive formed on both side surfaces of the semiconductor element parallel to the arrangement direction is F, The relative positional accuracy error between the thermosetting adhesive applied to the wiring board and the semiconductor element is D, and the thermosetting adhesive extends on the wiring board with a uniform thickness in the arrangement direction. A first step of applying the thermosetting adhesive such that W ≧ (W _LED + 2F + 2D), where W is the width in the width direction of the application region formed by applying the curable adhesive; and A second step of mounting the plurality of semiconductor elements in the application area such that a center line of the application area in the arrangement direction substantially coincides with a center line of the opposed lower surface in the arrangement direction; and Overheating the wiring board with Transferred within, and characterized by applying a third step of curing sticking the thermosetting adhesive.

According to an eighth aspect of the present invention, in the mounting method of the seventh aspect, in the step of mounting the semiconductor element on the thermosetting adhesive, the semiconductor element is sandwiched between opposing side surfaces of the adjacent semiconductor elements. And the total volume of the outflow of the thermosetting adhesive extruded into the air space part by the mounting method of the semiconductor element by mounting the respective semiconductor elements so as to be substantially the same. The thickness of the application area is set.

According to a ninth aspect of the present invention, there is provided a semiconductor element used in the method of mounting a semiconductor element according to the eighth aspect, wherein at least an outer peripheral portion of an upper surface of each semiconductor element opposite to the opposing lower surface is provided. A step-shaped notch groove is formed in a portion facing each other when being arranged in a manner as described above.
A semiconductor device according to a tenth aspect is characterized in that, in the semiconductor according to the ninth aspect, the bottom end of the cutout groove is the outermost shape of the semiconductor element. A method for manufacturing a semiconductor device according to claim 11, wherein the plurality of semiconductor devices before being separated are formed on a semiconductor wafer by arranging them in a grid pattern, Forming a grid-like groove step on each boundary portion of the semiconductor element by etching;
It is characterized in that the semiconductor elements are individually separated by cutting along the groove steps with a disk-shaped cutter narrower than the width of the groove steps.

According to a twelfth aspect of the present invention, in the method of mounting a semiconductor element according to the seventh aspect, in the step of mounting the semiconductor element on the thermosetting adhesive, the positional accuracy error D Due to the variation, the volume of the air space formed between the opposing side surfaces of the adjacent semiconductor elements is minimized, and the thermosetting adhesive extruded into the air space by mounting each semiconductor element. The thickness of the application region is set so that the total volume of the outflow is substantially the same.

A semiconductor element according to a thirteenth aspect is a semiconductor element applied to the method for mounting a semiconductor element according to the twelfth aspect, wherein each of the semiconductor elements is provided on both side surfaces along the width direction of the semiconductor element so as to be perpendicular to the opposite lower surface. And a step having a flat portion continuous from the opposed lower surface is provided. A method of manufacturing a semiconductor device according to claim 14, wherein in the method of manufacturing a semiconductor device according to claim 13, a plurality of the semiconductor elements before being separated are arranged on a semiconductor wafer in a grid pattern. A lattice-shaped groove step is formed on each boundary portion of the element by etching or a disk-shaped cutter, and from the back side of the surface of the semiconductor wafer where the lattice-shaped groove step is formed,
A cutting groove wider than the width of the groove step portion is formed by a disk-shaped cutter at a position facing the groove step portion, and scribed along the groove step portion and the cutting groove to separate the semiconductor elements individually. It is characterized by doing.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 is a schematic configuration diagram showing a schematic configuration of an LED array according to a first embodiment of the present invention. FIG. 1 (a) is a plan view thereof, and FIG. 1 (b) is an instruction line shown in the plan view. 100 are cross-sectional views of the cross section including 100 viewed from the direction of arrow A.

The LED array 1 as a semiconductor element is formed as follows. The base material 2 is a wafer,
Compound semiconductors such as gallium arsenide (hereinafter GaAs)
Gallium / arsenic / phosphorus (hereinafter GaAs)
P)). Then, as shown in FIG.
An insulating layer 3 having an opening 3a formed in a grid pattern is formed by photolithography.

Next, a p-type impurity such as zinc is diffused into the base material 2 through the opening 3a by a vapor phase diffusion method or the like to form a p-type semiconductor diffusion portion 4 serving as a light emitting portion. In the diffusion part,
An electrode pad 5 having a part thereof and an ohmic contact is formed in a linear array of a material such as aluminum, for example, and a current is individually supplied to the LEDs 6 constituting the individual light emitting units.

On the lower surface 2a of the upper surface of the substrate 2 on which the diffusion portion 4 is formed, a common electrode 7 having an ohmic contact with the substrate 2 is formed of a gold-based material.
The current supplied to each LED 6 of the array 1 is sucked out collectively. The four side surfaces of the LED array 1 are each cut obliquely by an inclined diamond blade, and the common electrode 7 is formed in a truncated pyramid shape having a small bottom surface.

FIGS. 2A and 2B are partial configuration diagrams of a first embodiment of a board unit formed by the mounting method according to the present invention. FIG. 2A is a front view, and FIG. 2B is a side view. Shown respectively. As shown in FIG. 2A, the board unit 10 includes a plurality of LED arrays 1 linearly arranged on a wiring board 11 in a linear manner, and a common electrode 7 formed on the bottom surface of each LED array 1. And a conductive pattern (not shown) formed on the wiring board 11 are electrically connected and fixed via a conductive die bond resin 13 as a thermosetting adhesive. And the electrode pad 5 of the LED array 1
And an output pad (not shown) of the driving IC are electrically connected to each other by a metal wire (not shown).
Is supplied with a current to emit light.

It should be noted that the L attached to the wiring board 11 is
Assuming the X axis (FIG. 2A) in a direction parallel to the indicating line 100 of the ED array 1, the Y axis (FIG. 2A) in a direction parallel to the LED array mounting surface 11a of the wiring board 11 and orthogonal to the X axis. 2
(B)) is assumed.

FIG. 3 shows the application shape of the die bond resin 13 applied to the wiring substrate 11 by screen printing when the above-mentioned substrate unit 10 is formed.
2 shows a front view thereof, and FIG. 2 (b) shows a plan view thereof. FIG. 4 shows that the die bond resin 13 having this coating shape is LE-coated.
FIGS. 4A and 4B are mounting diagrams showing a state when the D array 1 is mounted, wherein FIG. 4A is a front view and FIG. 4B is a plan view.

The die bond resin 13 used here is:
It is a paste-like material mainly composed of a thermosetting adhesive resin represented by an epoxy resin, and is applied in advance to a portion of the wiring board 11 where the LED array 1 is to be mounted, and the LED array 1 is mounted. This mounting method is described in, for example, FIG.
It is assumed that the method using the collet 52 disclosed in the description of 4 is adopted, and the detailed description thereof is omitted.

In this mounting process, when the LED array 1 is pressed onto the wiring board 11 with the die bond resin 13 interposed therebetween, the lower surface of the common electrode 7 corresponding to the opposing lower surface pushes the die bond resin 13 and the LED array 1 is pressed. The die-bonding resin 13 flows out and forms inclined portions (hereinafter referred to as fillets) 13a and 13b (FIG. 2B) which are built up.

The fillet 13 thus formed
The application shape of the die bond resin 13 applied on the wiring board 11 so that “a” has a desired shape will be described.
Each long side surface 1a inclined parallel to the X axis of the LED array 1,
1b (FIG. 2 (b)), fillets 13a, 13b formed at the lower part of the LED array 1 pass through the center of the LED array 1, and
Consideration is made so as to be formed substantially plane-symmetrical (hereinafter referred to as “equal”) with respect to the center plane 101 parallel to the −Z plane. For this reason, the length in the X-axis direction of the opposing lower surface of the LED array 1 opposing the wiring substrate 11 via the die bond resin 13 (hereinafter, referred to as “the length”)
The opposing lower surface length hereinafter) and _{L LED,} its Y-axis direction of the width (hereinafter referred to as the opposing lower surface width) and _{W L ED.}

Then, an assumed widthwise fillet 1 is provided.
The assumed widths of 3a and 13b are F, and a positional accuracy error relative to the die bond resin 13 when the LED array 1 is mounted on the die bond resin 13 applied on the wiring board 11 (accordingly, the accuracy of the application area) (Including error) is D, the length L in the X-axis direction and the width W in the Y-axis direction of the application region of the die bond resin 13 applied on the wiring substrate 11 shown in FIG. They are formed so that L ≦ L _LED and W ≧ W _LED + 2F + 2D, respectively.

As shown in FIG. 3, when the die bond 13 is applied on the wiring substrate 11 by the screen printing method, the thickness T of the die bond resin 13 depends on the roughness of the mesh of the printing plate or the emulsion thickness. It can be controlled and the application area can be defined by a print pattern. Therefore, the die bond resin 13 having the above-described dimensions (W × L) and the predetermined thickness T can be applied to a desired region on the wiring substrate 11.

FIG. 3 shows the die bond resin 13 coated on the wiring board 11 at a predetermined interval around a reference line 102 along the X axis, and the size of each coated area is (W × L). 4 shows an application example.

The width W of each application region of the die bond resin 13
Are the long side surfaces 1a and 1b of the LED array 1 as described above.
Forming widths W _A , W of fillets formed in
_B and the relative accuracy error D in the die bond 13 application step and the LED array 1 and mounting step. For this reason, even if the LED array 1 is mounted on the wiring board 11 including an error, the error is caused by the accuracy error D
In the following cases, the conditions for forming the fillets 13a and 13b are the same, and the shapes of the fillets 13a and 13b are equal to each other as shown in FIG.

FIG. 7 shows the wiring board 1 according to the method described above.
FIG. 3 is a configuration diagram showing an LED array having three types of shapes mounted thereon and fillets 13a and 13b formed on long sides thereof.

FIG. 3A shows an LE having a truncated pyramid shape.
D shows the case of an array 1, the fillet 13a formed on the long sides 1a, 1b, each width _W A of 13b, _{W B} are each becomes assumed width F comparable, are uniformly formed with each other.

FIG. 3B shows a rectangular parallelepiped L.
FIG. 3C shows the case of the LED array 17 whose cross-sectional shape is a parallelogram. As described above, even when the LED array has various shapes, the die bonding resin 13 based on the width W _LED of the lower surface in the Y-axis direction of the lower surface facing the wiring board 11 via the die bonding resin 13. Width W of the coating area
Is set, and the mounting position is defined on the basis of the opposing lower surface of each LED array, so that each of the long side surfaces 16a, 16b, and 17a, regardless of the shape of the LED array.
The shape of the pair of fillets formed in 17b can be formed equally to each other.

Further, as shown in FIG. 2 (b), to the opposing lower surface length _{L L ED} truncated pyramid shaped LED array 1, the X-axis direction of the upper surface of the top length is the length and Ls, LED When the assumed width of the fillet 13c formed below each of the short side surfaces 1c and 1d inclined along the Y axis of the array 1 is Fb, by setting the upper surface length Ls as Ls ≧ L _LED + 2Fb, Since the die bonding resin flowing out around the arranged LED array 1 does not come into contact with the adhesive flowing out from the adjacent LED array 1, it does not come into contact with the die bonding resin flowing out from the adjacent LED array 1. , Can eliminate mutual effects.

FIG. 5 further shows a die bonding resin 15 applied to the wiring substrate 11 by stamping instead of screen printing when the above-mentioned substrate unit 10 is formed.
3A shows a front view, and FIG. 3B shows a plan view thereof. FIGS. 6A and 6B are mounting diagrams showing a state in which the LED array 1 is mounted on the die bond resin 15 having the coating shape. FIG. 6A is a front view thereof, and FIG. 6B is a plan view thereof. Show.

In this coating method, since the center portion tends to rise due to the viscosity of the die bond resin 15, the present embodiment employs a band-shaped transfer pattern in which a thickness distribution is unlikely to occur, and each of the transfer patterns arranged in the X-axis direction. For each LED array 1,
The thickness T is controlled by transferring the die bond resin 15 so that a predetermined number of strips 15d are allocated. Further, the application area can be defined by the transfer pattern, but the accuracy is lower than the screen printing method due to the influence of the transfer resin thickness. Therefore, the size of the transfer pattern is set in consideration of the shape and thickness after transfer, for example, by setting the position accuracy error D to a relatively large value, and the desired die bond resin 15 is applied to the wiring board 11.

As described above, according to the mounting method of the first embodiment, the fillet shapes formed on the pair of long side surfaces of the LED array are equal to each other. The balance of the thermal shrinkage is maintained, and it is possible to prevent the displacement due to the curing of the die bond resin at least in the width direction (Y-axis direction).

When a plurality of truncated pyramid-shaped LED arrays are arranged in the arrangement direction (X-axis direction), the upper surface length Ls is set in consideration of an assumed width Fb of a fillet formed in the same direction. The fillets formed on adjacent LED arrays can be prevented from contacting each other.

Embodiment 2 FIG. 8 is a schematic diagram for explaining a schematic configuration of the second embodiment of the board unit formed by the mounting method according to the present invention, and FIG.
Indicates the application shape of the die bond resin 21, and FIG.
FIG. 3C shows the flow state of the die bond resin 21 when the LED array 1 used in the first embodiment is mounted on the application area, and FIG.
The flow state of the die bond resin 21 when the array 22 is mounted is shown.

FIG. 10 shows the application shape of the die bond resin 21 applied to the wiring board 11 in the mounting method according to the second embodiment, and FIG.
FIG. 1B shows a plan view thereof. The width W in the Y-axis direction of the coating shape shown in the figure is set by W ≧ W _LED + 2F + 2D. In the above formula, the facing lower surface width W _LED , the assumed width F of the fillet, and the positional accuracy error D
Are the variables defined in the first embodiment, respectively.
Since it is only applied to the ED array 22 (FIG. 8C),
Here, the description is omitted.

On the other hand, the length L _{SUM of the} coating shape in the X-axis direction
(FIG. 10B) shows the LED arrays 22 arranged in the same direction.
, And its thickness is set to be uniform at T2 and set to satisfy the conditions described later. The LED array is mounted on the die bond resin 21 applied as described above. This mounting method is described in, for example, FIG.
The method using the collet 52 disclosed in the above description is adopted, and the detailed description thereof is omitted.

FIG. 8B shows the L value employed in the first embodiment.
The case where the ED array 1 is arranged on the wiring board 11 via the die bond resin 21 having the above-described shape is shown. As shown in the figure, between the truncated pyramid-shaped LED arrays 1 adjacent in the arrangement direction (X-axis direction), opposing short side surfaces 1c,
An air space 18 having a triangular cross section is formed by 1d.
In addition, the opposing short side surfaces 1c and 1d between adjacent LED arrays are referred to as opposing side surfaces.

The thickness T2 of the application region of the die bond resin 21 is determined by the amount (volume) of the die bond resin extruded into the space 18 when the LED array 1 is mounted at a predetermined accurate position. The volume is set to substantially match the volume of the airspace section 18.

For this reason, if the shape accuracy of the LED array 1 and the positional accuracy at the time of mounting the LED array 1 are accurate, the extruded die bond resin will fit in the air space 18, as shown in FIG. If the mounting position in the X-axis direction shifts or if the inclination angles of the short side surfaces 1c and 1d vary, the airspace 1
8, the die bond resin 21 reaches the light-emitting surface, covers the light-emitting portion, and causes a decrease in the light amount, as shown in FIG.

This phenomenon is more remarkable in the LED array 1 in which the light-emitting surface is the truncated pyramid-shaped bottom surface, and the air-space portion 18 becomes narrower as it goes upward. Appears in

In this embodiment, in order to solve this problem, as shown in FIG. 8C, a notch groove 22f is formed in the periphery of the upper surface 22e of the LED array 22. Hereinafter, a method of forming the LED array 22 having the cutout grooves 22f will be described with reference to FIG. FIG. 9A is a plan view of the wafer 23, and as shown in FIG.
The diagonal lines along the outer periphery of the uncut LED array 22 arranged in a grid pattern are etched to form groove step portions 23a.
Is provided. As shown in the schematic front views 9 (b) and 9 (c), the groove step 23a is inclined at a predetermined angle with respect to the perpendicular direction along the dicing position 23b indicated by a dotted line in the groove step 23a, and has a disk shape. 2 by a diamond blade 24 as a cutter having a cutting width smaller than the width of
Disconnect from the direction. As a result, as shown in FIG. 8C, the inclined long side surfaces 22a and 22b and the inclined short side surface 22
LED array 2 having c, 22d, and cutout groove 22f
2 is formed separately.

In this case, as is apparent from the figure, the notch groove 2 serving as a boundary between the notch groove 22f and the short side surfaces 22c and 22d.
The bottom end 22g of 2f is the outermost portion of the LED array 22 in the XY plane.

FIG. 11 shows the thus formed LE.
10A shows a configuration of a board unit 20 in which the D array 22 is arranged on the wiring board 11 via the die bond resin 21 applied in the shape shown in FIG.
The front view is shown, and FIG. 2B is a plan view thereof. FIG. 8C is a schematic configuration diagram in which the substrate unit 20 thus formed is compared with FIGS. 8A and 8B, except that the cutout groove 22f is formed. The configuration is exactly the same as the virtual board unit shown in FIG.

In this case, for the same reason as described above with reference to FIG. 8B, when the volume of the air space 25 changes, as shown in FIG. Although it rises and reaches a pair of notch grooves 22f facing each other, it does not overflow from these notch grooves 22f and cover the light emitting portion formed on 22e on the upper surface thereof.

In the substrate unit 20, the die bond resin is easily filled by the capillary effect at the height of the notch groove 22f. However, in the storage groove part 20a formed by the pair of notch grooves 22f facing each other, the space between the LED arrays 22 is reduced. Since the interval rapidly increases, the die bond resin that has reached the storage groove portion 20a is less likely to be filled due to its surface tension. For this reason, it becomes more difficult for excess die bond resin to overflow from the storage groove portion 20a.

In addition, since the die bond resin is filled between the light emitting surfaces of the LED array 22 approaching very close to each other, this serves as a cushion, and the contact between the LED arrays due to the heat shrinkage of the die bond resin can be prevented. .

As described above, according to the substrate unit of the second embodiment, since the application region of the die bond resin is formed continuously in the X-axis direction, the application operation becomes easy. In addition, when the die-bonding resin is cured by heating, the balance of the heat shrinkage in the width direction (Y-axis direction) of the fillet is maintained evenly, and the die-bonding resin between the LED arrays 22 approached also in the X-axis direction. It functions as a cushion and can prevent contact between the LED arrays due to thermal contraction of the die bond resin.

Embodiment 3 FIG. 12 is a schematic diagram for explaining a schematic configuration of a substrate unit formed by the mounting method according to the third embodiment of the present invention, and FIG. 12A shows an application shape of a die bond resin 31; FIG. 3B shows the LE used in the first embodiment in this application area.
FIG. 3C shows a flow state of the die bond resin 31 when the D array 1 is mounted, and FIG.
The flow state of the die bond resin when the array 32 is mounted is shown.

In this embodiment, the application shape of the die bond 31 applied to the wiring substrate 11 shown in FIG. 12A is exactly the same as the application shape shown in FIG.
That is, the width W of the coating shape in the Y-axis direction shown in the figure is set by W ≧ W _LED + 2F + 2D. In the above formula, the facing lower surface width W _LED , the assumed width F of the fillet, and the positional accuracy error D
Are the variables defined in the first embodiment, respectively.
Since it is only applied to the ED array 32 (FIG. 12C), the description is omitted here.

On the other hand, the length L _{SUM of the} coating shape in the X-axis direction
(FIG. 10B) shows the LED array 32 arranged in the same direction.
, And its thickness is set to be uniform at T3 and set so as to satisfy the conditions described later. The LED array is mounted on the die bond resin 31 applied as described above. This mounting method is described in, for example, FIG.
The method using the collet 52 disclosed in the above description is adopted, and the detailed description thereof is omitted.

FIG. 12B shows a case where the LED array 1 employed in the first embodiment is replaced with a die bond resin 31 having the above-described shape.
2 shows a case in which the components are arranged on the wiring board 11 via a line.
As shown in FIG. 1, opposing short side surfaces 1 are provided between LED arrays 1 having a truncated pyramid shape adjacent in the arrangement direction (X-axis direction).
An airspace 18 having a triangular cross section is formed by c and 1d.

The thickness T3 of the application region of the die bond resin 31 is set to a value when the volume is minimized due to a shift in the mounting position of the LED array 1 in the X-axis direction or a variation in the inclination angles of the short side surfaces 1c and 1d. The volume (volume) of the die bond resin extruded into the air space when the LED array 1 is mounted is set so as not to exceed the volume of the air space 18.

For this reason, unlike the case of the second embodiment, the surplus die bonding resin does not reach the light emitting surface of the LED array, but in the LED array 1 of the first embodiment, FIG. As shown in the figure, in the part where the volume of the airspace part 18 is large, the filling height of the die bond resin is located at a place where the upper area of the filling part is wider away from the light emitting surface, so that when the die bond resin is cured, The amount of shrinkage increases, and the light-emitting surface ends come into contact during the curing process, causing cracks and chips.

In the present embodiment, in order to solve this problem, the LED array 32 forms a notch groove 32f around the upper surface 32e as shown in FIG. 32c and 32d have opposite lower surfaces 32h.
And a step 32i having a plane portion j perpendicular to the vertical direction. Hereinafter, a method of forming the LED array 32 will be described.
This will be described with reference to FIG.

FIG. 13 (a) is a plan view of the wafer 33. As shown in FIG. 13, the hatched portion along the outer periphery of the LED array 32 before cutting, which is arranged on the wafer 33 in a grid pattern, is shown. Groove step 3 by etching or disk-shaped cutter
3a is provided. Then, as shown in the schematic front view 13 (b), the wafer 33 is cut from below the wafer 33 by a disk-shaped diamond blade 34, and is cut at a predetermined depth along the separation line 33c of the groove step 33a. A slightly wider cutting groove 33b is formed.

In order to cut and separate along the separation lines 33c to form individual LED arrays 32, FIG.
The cut portion 33d indicated by oblique lines is further cut and separated by a diamond blade having a width matching the same shape. Alternatively, after being cut to some extent along the separation line 33c, a mechanical bending stress is applied to the wafer 33 by a compression tool 34 having a band-shaped projection 34a abutting on the separation line 33c, as shown in FIG. The LED array 32 is separately formed by scribe separation.

FIG. 12C shows the structure of a board unit 30 formed by arranging the LED arrays 32 thus formed on the wiring board 11 via the die bond resin 31. In this case, as is apparent from the figure, the bottom end 32g of the notch separating the notch 32f and the step 32i of the short side surfaces 32c and 32d is positioned at the X-axis of the LED array 32.
The outermost portion on the Y plane.

In this substrate unit 30, the notch grooves 32f
The configuration is exactly the same as that of the virtual substrate unit shown in FIG. 12B except for the stepped portion 32i having the flat surface 32j formed on the short side portions 32c and 32d.

In this case, for the same reason as described with reference to FIG. 12B, when the volume of the air space 35 fluctuates, as shown in FIG. However, since the upper area is constant in each of the empty areas regardless of the filling height, the difference in the upper area between the empty areas is also constant and can be kept small.

On the other hand, the amount of heat shrinkage in the X-axis direction during the curing process of the die bond resin 31 filled in the voids 35 occurs in proportion to the width of the voids 35. Irrespective of the variation of the LED arrays, it is possible to prevent the light emitting units of the adjacent LED arrays from coming into contact with each other.

For the above reason, the heat shrinkage of the die bond resin filled between the adjacent LED arrays acts to automatically correct the variation in the interval between the adjacent LED arrays.

As described above, according to the substrate unit of the third embodiment, since the application region of the die bond resin is formed continuously in the X-axis direction, the application operation becomes easy. In addition, when the die-bonding resin is cured by heating, the balance of the heat shrinkage in the width direction (Y-axis direction) of the fillet is kept even, and the die-bonding resin between the LED arrays 22 approached also in the X-axis direction. Due to the heat shrinkage, it is possible to automatically correct the variation in the interval between the adjacent LED arrays.

In the claims and the description of the embodiments, the terms “upper” and “lower” are used, but these are only for convenience and are not absolute in the state where each member is arranged. The positional relationship is not limited.

[0072]

According to the substrate unit of the first aspect, when the thermosetting adhesive is heated and cured, the balance of the heat shrinkage of the fillet is kept uniform, and at least in the width direction,
It is possible to prevent misalignment due to curing of the adhesive.

According to the mounting method of the second or third aspect, uniform fillets can be formed on both side surfaces parallel to the arrangement direction of the semiconductor elements, and the same effect as the first aspect can be obtained.

According to the mounting method of the present invention, even when the semiconductor elements are arranged in a straight line, the fillets formed on the adjacent semiconductor elements do not contact each other. The displacement in the same direction due to the action can be prevented.

According to the semiconductor device of the fifth aspect, the thermosetting adhesive flowing out around the arranged semiconductor elements does not come into contact with the adhesive flowing out from the adjacent semiconductor elements. Can be excluded.

According to the substrate unit of the sixth aspect, when the thermosetting adhesive is heated and cured, the thermosetting adhesive between the adjacent semiconductor elements serves as a cushion, and the semiconductor is formed by heat shrinkage of the adhesive. Contact between elements can be prevented.

According to the mounting method of the seventh aspect, the same effect as that of the second aspect is obtained, and the application area of the thermosetting adhesive is formed continuously in the arrangement direction, so that the application operation is easy. Becomes

According to the mounting method of the eighth aspect and the semiconductor element of the ninth aspect, the same effect as that of the sixth aspect can be obtained.
The thermosetting adhesive overflowing on the upper surface of the semiconductor element can be contained in the groove.

According to the manufacturing method of the eleventh aspect, it is possible to form the stepped notch groove in the semiconductor element only by adding a relatively easy step.

According to the mounting method of the twelfth aspect and the semiconductor element of the thirteenth aspect, even if the mounting position of the semiconductor element varies, it is possible to prevent the thermosetting adhesive from overflowing onto the upper surface of the semiconductor element, and furthermore, it is possible to further reduce the heat. When the curable adhesive is cured by heating, it is possible to automatically correct variations in the distance between adjacent semiconductor elements.

According to the manufacturing method of the fourteenth aspect, the semiconductor device of the thirteenth aspect can be manufactured without adding a special step.

[Brief description of the drawings]

FIGS. 1A and 1B are schematic configuration diagrams of an LED array according to a first embodiment of the present invention, in which FIG. 1A is a plan view thereof, and FIG. 1B is a cross section including an indicator line 100 shown in the plan view. A
It is sectional drawing seen from the direction.

FIGS. 2A and 2B are partial configuration diagrams of a first embodiment of a board unit formed by a mounting method according to the present invention, wherein FIG. 2A is a front view and FIG. 2B is a side view.

3A and 3B show an application shape of a die bond resin applied to a wiring substrate by a screen printing method. FIG. 3A is a front view thereof, and FIG. 3B is a plan view thereof.

FIG. 4 is a mounting view showing a state in which an LED array is mounted on a die bond resin applied by a screen printing method. FIG. 4A is a front view thereof, and FIG. 4B is a plan view thereof. Shown respectively.

FIGS. 5A and 5B show an application shape of a die bond resin applied to a wiring substrate by a stamping method. FIG. 5A is a front view thereof, and FIG. 5B is a plan view thereof.

FIG. 6 is a mounting view showing a state in which an LED array is mounted on a die bond resin applied by a stamping method. FIG. 6 (a) is a front view thereof, and FIG. 6 (b) is a plan view thereof. Show.

FIG. 7 shows three types of LEs mounted on a wiring board.
FIG. 4 is a configuration diagram showing a state of frets formed on a long side surface of a D array and each LED array.

8A and 8B are schematic views of a board unit formed by the mounting method according to the second embodiment of the present invention, in which FIG. 8A shows a die bond resin application shape, and FIG. 8B shows an LED array used in the first embodiment. The flow state of the die bond resin when the LED array is mounted is shown, and (c) shows the flow state of the die bond resin when the LED array according to the second embodiment is mounted.

FIG. 9A is a plan view of a wafer on which an LED array before cutting is arranged, and FIGS. 9B and 9C are schematic front views of the wafer showing a cutting method.

10A and 10B show the application shape of a die bond resin applied to a wiring board in the mounting method according to the second embodiment. FIG. 10A is a front view thereof, and FIG. 10B is a plan view thereof. Show.

11A and 11B show a configuration of a board unit formed by arranging on a wiring board via a die bond resin applied in the shape of FIG. 10, FIG. 11A is a front view thereof, and FIG. The plan views are respectively shown.

12A and 12B are schematic views of a substrate unit formed by the mounting method according to the third embodiment of the present invention, in which FIG. 12A illustrates a die-bonded resin application shape, and FIG. 12B illustrates an LED array used in the first embodiment. The flow state of the die bond resin when it is mounted is shown, and (c) shows the flow state of the die bond resin when the LED array according to the third embodiment is mounted.

FIG. 13 shows an example of an LE shown in Embodiment 3 by cutting a wafer.
It is a figure for explaining the manufacturing method which manufactures D array, (a) is a top view of the wafer which arranged LED array before cutting, and (b) and (c) are the outlines of the wafer which show the cutting method. It is a front view.

FIGS. 14A to 14E are front process diagrams schematically illustrating the steps of a conventional mounting method in sequence.

FIGS. 15 (a) to (e) are FIGS.
It is a top view corresponding to (e).

FIG. 16 is a manufacturing explanatory view showing a state in which the wiring board on which the semiconductor chip is mounted is placed in an oven furnace indicated by a dotted line.

FIG. 17 is a diagram for explaining a positional shift that occurs when mounting is performed by a conventional method.

[Explanation of symbols]

1 LED array, 1a, 1b long side surface, 1c, 1
d Short side surface, 2 base material, 2a lower surface, 3 insulating layer, 3a opening, 4 diffusion portion, 5 electrode pad, 6 LED, 7 common electrode, 10 substrate unit, 11 wiring substrate, 11a LED array mounting surface, 13 Die bond resin, 13a, 13b fillet, 15 die bond resin, 15d strip,
16, 17 LED array, 18 airspace, 20
Substrate unit, 20a stepped portion, 21 die bond resin, 22 LED array, 22a, 22b long side surface, 22c, 22d short side surface, 22e top surface, 22
f Notch groove, 22g bottom edge, 23 wafers,
23a groove step, 23b dicing position, 25
Air space part, 30 substrate unit, 31 die bond resin, 32 LED array, 32c, 32d short side surface part, 32e upper surface, 32f notch groove, 32g bottom end, 32h opposed lower surface, 33 wafer, 33a
Groove step, 33b cutting groove, 33c separation line,
33d cutting part, 34 compression tool, 34a projection, 35 airspace part, 50 end conductor chip, 51
Wiring board, 52 collet, 53 die bond resin, 54 heating means, 55 substrate unit.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Susumu Ozawa One share at 550 Higashi-Asakawa-cho, Hachioji-shi, Tokyo Inside the digital imaging company (72) Inventor Satoru Yamada One share at 550 Higashi-Asakawa-cho, Hachioji-shi, Tokyo 5F041 AA37 AA41 CA35 CA38 CA64 CA77 CA83 CB22 DA02 DA07 DA13 DA20 5F047 AA17 BA23 BA33 BB13 BB16 CA08

Claims (14)

[Claims] 1. A substrate unit in which a plurality of semiconductor elements are linearly arranged on a wiring substrate via a thermosetting adhesive, wherein the thermosetting adhesive is provided on both side surfaces of the semiconductor elements parallel to the arrangement direction. A substrate unit, wherein uniform fillets are formed by an agent, and the semiconductor element is fixed on the wiring substrate. 2. A method of mounting a semiconductor element, wherein a plurality of semiconductor elements are linearly arranged on a wiring substrate via a thermosetting adhesive, wherein the arrangement is performed on a lower surface of the semiconductor element facing the wiring substrate. The length in the direction is L _LED , the width in the width direction orthogonal to the arrangement direction is W _LED , and the width of the fillet of the thermosetting adhesive formed on both side surfaces of the semiconductor element parallel to the arrangement direction. The assumed width in the direction is F, the relative positional accuracy error between the thermosetting adhesive applied to the wiring board and the semiconductor element is D, and the thermosetting adhesive is further provided on the wiring board. When the length in the arrangement direction of the application region to which is applied is L and the width in the width direction is W, a plurality of application regions in which L ≦ L _LED W ≧ (W _LED + 2F + 2D) are formed in the arrangement direction. Thermosetting A first step of applying an adhesive, and applying the plurality of semiconductor elements to each of the application regions so that a center line of the application region in the arrangement direction substantially coincides with a center line of the opposed lower surface in the arrangement direction. And a third step of transferring the wiring board having the semiconductor element mounted therein to a superheating furnace and curing and fixing the thermosetting adhesive. Implementation method. 3. The method according to claim 2, wherein the thermosetting adhesive is applied to a substantially constant thickness. 4. The thermosetting adhesive applied to the application area such that the fillets formed on adjacent semiconductor elements of the plurality of semiconductor elements arranged on the wiring board do not contact each other. 4. The method according to claim 2, wherein the thickness of the agent is set. 5. A semiconductor element used in the method of mounting a semiconductor element according to claim 2, wherein the length of the semiconductor element in the arrangement direction is Ls, and the semiconductor element is formed between adjacently arranged semiconductor elements. Assuming that the width of each fillet of the thermosetting adhesive in the arrangement direction is Fb, the length L _LED of the opposed lower surface in the arrangement direction is set to Ls ≧ L _LED + 2Fb, and the truncated pyramid is set. A semiconductor element formed in a shape. 6. A substrate unit in which a plurality of semiconductor elements are linearly arranged on a wiring substrate via a thermosetting adhesive, wherein the thermosetting adhesive is provided on both side surfaces of the semiconductor elements parallel to the arrangement direction. Forming an even fillet with an agent, and filling the thermosetting adhesive in an air space formed between the adjacent semiconductor elements to fix the semiconductor elements on the wiring board. Substrate unit. 7. A method of mounting a semiconductor element in which a plurality of semiconductor elements are linearly arranged on a wiring substrate via a thermosetting adhesive, wherein the arrangement is performed on a lower surface of the semiconductor element facing the wiring substrate. The width in the width direction orthogonal to the direction is W _LED ,
F is the assumed width in the width direction of the fillet of the thermosetting adhesive formed on both side surfaces parallel to the arrangement direction of the semiconductor element, and the thermosetting adhesive is applied on the wiring board. And D is a relative positional accuracy error between the semiconductor element and the semiconductor element, and further extends with a uniform thickness in the arrangement direction on the wiring substrate, and is a coating area formed by applying the thermosetting adhesive. A first step of applying the thermosetting adhesive such that W ≧ (W _LED + 2F + 2D), where W is the width in the width direction; and a center line of the application area in the arrangement direction and the facing side. A second step of mounting a plurality of the semiconductor elements on the application area such that the center line of the lower surface in the arrangement direction substantially matches, and moving the wiring board on which the semiconductor elements are mounted into a heating furnace, Cure and fix thermosetting adhesive Mounting method of a semiconductor device characterized by performing the third step. 8. In the step of mounting the semiconductor element on the thermosetting adhesive, the volume of an air space formed between opposing side surfaces of the adjacent semiconductor element and the mounting of each semiconductor element 8. The mounting of the semiconductor element according to claim 7, wherein the thickness of the application region is set such that the total volume of the outflow of the thermosetting adhesive extruded into the void region is substantially the same. Method. 9. A semiconductor element used in the method of mounting a semiconductor element according to claim 8, wherein each of the semiconductor elements is arranged at least adjacent to an outer peripheral portion of an upper surface on a side opposite to the opposing lower surface. A stepped notch groove is formed in a portion facing each other. 10. The semiconductor device according to claim 9, wherein the bottom end of the notch has the outermost shape of the semiconductor device. 11. The method of manufacturing a semiconductor device according to claim 9, wherein a plurality of the semiconductor devices before being separated are formed on a semiconductor wafer so as to be arranged in a grid pattern, and each boundary of the semiconductor device is formed. Forming a lattice-shaped groove step in the portion by etching, cutting along the groove step with a disk-shaped cutter narrower than the width of the groove step, and separating the semiconductor elements individually. Semiconductor device manufacturing method. 12. In the step of mounting the semiconductor element on the thermosetting adhesive, an air gap formed between opposing side surfaces of the adjacent semiconductor elements is minimized due to a variation in the positional accuracy error D. And the thickness of the application area is set so that the total volume of the outflow of the thermosetting adhesive that is extruded into the air space by mounting the respective semiconductor elements is substantially the same. The method for mounting a semiconductor device according to claim 7, wherein: 13. A semiconductor element applied to the method of mounting a semiconductor element according to claim 12, wherein both side surfaces of each semiconductor element along the width direction are perpendicular to the opposed lower surface and from the opposed lower surface. A semiconductor device having a step having a continuous plane portion. 14. The method of manufacturing a semiconductor device according to claim 13, wherein a plurality of the semiconductor devices before being separated are formed on a semiconductor wafer so as to be arranged in a grid pattern, and each boundary of the semiconductor device is formed. A groove-shaped groove step is formed in a portion by etching or a disk-shaped cutter, and a groove is formed at a position facing the groove step from the back side of the surface of the semiconductor wafer on which the lattice groove step is formed. Forming a cutting groove wider than the width of the step portion with a disk-shaped cutter, scribing along the groove step portion and the cutting groove, and separating the semiconductor element individually. .