JP2002313629A - Chip type inductor - Google Patents
Chip type inductorInfo
- Publication number
- JP2002313629A JP2002313629A JP2001110051A JP2001110051A JP2002313629A JP 2002313629 A JP2002313629 A JP 2002313629A JP 2001110051 A JP2001110051 A JP 2001110051A JP 2001110051 A JP2001110051 A JP 2001110051A JP 2002313629 A JP2002313629 A JP 2002313629A
- Authority
- JP
- Japan
- Prior art keywords
- coil
- chip
- insulating layer
- coil member
- insulating base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
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- Coils Or Transformers For Communication (AREA)
Abstract
(57)【要約】
【課題】 工程を簡素化でき、製造し易く、インダクタ
ンスの設定範囲を広くとることができ、袋詰め梱包を可
能とする。レーザ加工が容易で歩留まり及び信頼性を高
める。また、Q値を高くする。
【解決手段】 絶縁基体10の長手方向外周面に螺旋状
の導体膜からなるコイル12を形成したコイル部材14
と、コイル端部に接続されるようにコイル部材の両端部
に設けた外部電極16と、コイル外周を保護する絶縁層
18を具備している。絶縁基体は、その全長にわたって
断面形状が同一の直方体形状であって、コイル軸に直交
するチップ断面形状のチップ厚/チップ幅は1未満であ
る。外部電極は、コイル部材の幅広面に絶縁層よりも厚
く形成され、その他の導体膜露出部も含めて半田濡れ性
の良好な材料20でメッキ処理される。Q値を高めるに
は、絶縁基体のほぼ全長にわたってコイルを形成し、チ
ップ端面は無導体にする。
(57) [Summary] [PROBLEMS] To simplify a process, to facilitate manufacture, to set a wide inductance setting range, and to enable packing in a bag. Laser processing is easy and increases yield and reliability. Also, the Q value is increased. SOLUTION: A coil member 14 in which a coil 12 made of a spiral conductive film is formed on an outer circumferential surface of an insulating base 10 in a longitudinal direction.
And external electrodes 16 provided at both ends of the coil member so as to be connected to the ends of the coil, and an insulating layer 18 for protecting the outer periphery of the coil. The insulating base has a rectangular parallelepiped shape having the same cross-sectional shape over its entire length, and the chip thickness / chip width of the chip cross-sectional shape orthogonal to the coil axis is less than 1. The external electrode is formed thicker than the insulating layer on the wide surface of the coil member, and is plated with a material 20 having good solder wettability, including other exposed portions of the conductive film. To increase the Q value, a coil is formed over almost the entire length of the insulating base, and the end face of the chip is made non-conductive.
Description
【0001】[0001]
【発明の属する技術分野】本発明は、表面実装に対応し
たチップ型インダクタに関し、更に詳しく述べると、絶
縁基体の長手方向外周面に螺旋状の導体膜からなるコイ
ルを形成したコイル部材と、それぞれコイル端部に接続
されるようにコイル部材の両端部に設けた外部電極と、
コイルの外周を保護する絶縁層を具備している構造のチ
ップ型インダクタに関するものである。このチップ型イ
ンダクタは、例えば携帯機器などの高周波回路で使用さ
れる。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip type inductor compatible with surface mounting, and more particularly, to a coil member having a coil formed of a spiral conductive film on an outer circumferential surface of an insulating base in a longitudinal direction. External electrodes provided at both ends of the coil member so as to be connected to the coil ends,
The present invention relates to a chip type inductor having a structure provided with an insulating layer for protecting the outer periphery of a coil. This chip-type inductor is used, for example, in a high-frequency circuit such as a portable device.
【0002】[0002]
【従来の技術】チップ型インダクタは、外部電極の配置
方向とコイル軸方向の関係によって二つの形式に分けら
れる。第1の形式は、両外部電極の配置方向がコイル軸
方向に直交するような構造であり、第2の形式は両外部
電極の配置方向がコイル軸方向に一致する構造である。2. Description of the Related Art Chip type inductors are classified into two types according to the relationship between the direction in which external electrodes are arranged and the direction of the coil axis. The first type is a structure in which the arrangement direction of both external electrodes is orthogonal to the coil axis direction, and the second type is a structure in which the arrangement direction of both external electrodes coincides with the coil axis direction.
【0003】前記第1の形式では、回路基板に対するチ
ップの置き方によって磁界が発生する方向が異なるた
め、チップ上面に方向確認用のマーカーを付し、それに
基づいて規定の向きに実装する必要があった。そのた
め、マーカー形成という余分な工程が必要になるばかり
でなく、テーピング梱包が必要となり(袋詰め梱包がで
きない)、毎回、紙やプラスチックなどの梱包廃材が発
生する問題が生じる。それに対して前記第2の形式で
は、原理的に構造に方向性が無いために、回路基板に対
するチップの置き方が変わっても磁界の発生方向は変わ
らない(即ち電気的特性に変化がない)利点がある。In the first type, since the direction in which the magnetic field is generated differs depending on how the chip is placed on the circuit board, it is necessary to attach a marker for confirming the direction on the upper surface of the chip and mount the chip in a prescribed direction based on the marker. there were. For this reason, not only an extra step of forming a marker is required, but also taping packing is required (packing packing is not possible), and a problem arises that packing waste such as paper and plastic is generated every time. On the other hand, in the second type, since the structure has no directionality in principle, the direction in which the magnetic field is generated does not change even when the placement of the chip on the circuit board changes (that is, the electrical characteristics do not change). There are advantages.
【0004】チップ長手方向にコイルを形成することに
よって両外部電極の配置方向がコイル軸方向に一致させ
る構造は、従来、積層方式とレーザ加工方式とで実現さ
れている。A structure in which a coil is formed in the longitudinal direction of a chip so that the arrangement directions of both external electrodes coincide with the coil axis direction has been conventionally realized by a lamination method and a laser processing method.
【0005】積層法式は、電気絶縁層と導体パターンを
交互に積層し導体パターンが順次接続されることで、電
気絶縁体中で積層方向に重畳したコイルが形成され、該
コイルの両端部がそれぞれ引出導体によって積層体チッ
プ外表面の外部電極に接続される構造である。[0005] In the lamination method, the electric insulating layer and the conductor pattern are alternately laminated and the conductor patterns are sequentially connected to form a coil superimposed in the laminating direction in the electric insulator. In this structure, the lead conductor is connected to an external electrode on the outer surface of the multilayer chip.
【0006】レーザ加工方式は、中央部が凹んだ糸巻き
形状の絶縁基体の表面全体に導体膜を形成しておき、凹
んだ中央部をレーザ加工によって螺旋状に溝を掘りコイ
ルとするものである。ここで両端部も中央部も、コイル
軸に垂直な断面は正方形状である。両端部の膨らんでい
る部分が外部電極となり、コイルの外周を絶縁樹脂でコ
ートする構造である。このようなチップ型インダクタ
は、例えば特許第3083482号公報などに開示され
ている。In the laser processing method, a conductor film is formed on the entire surface of a bobbin-shaped insulating substrate having a concave central portion, and a groove is helically formed in the concave central portion by laser processing to form a coil. . Here, the cross section perpendicular to the coil axis is square at both ends and the center. The bulging portions at both ends become external electrodes, and the outer periphery of the coil is coated with an insulating resin. Such a chip inductor is disclosed in, for example, Japanese Patent No. 3084482.
【0007】[0007]
【発明が解決しようとする課題】しかし積層方式による
チップ型インダクタは、積層工程が複雑であり、小型に
なればなるほど小さい領域にコイルを形成しなければな
らなくなるため、高精度印刷が必要になりパターン形成
が困難になる。更に、チップ断面で強度が弱い導体部が
かなりの面積をとるために曲げ強度が弱い問題もある。However, in the case of a chip type inductor using a lamination method, the lamination process is complicated, and the smaller the size, the more the coil must be formed in a small area. Pattern formation becomes difficult. Further, there is also a problem that the bending strength is weak because the conductor part having low strength in the chip cross section takes a considerable area.
【0008】それに対してレーザ加工方式によるチップ
型インダクタは、そのような問題は少ない。しかし従来
構造では、凹んでいる中央部分にコイルを形成するため
に、コイルを形成できる領域が短くなり、広い範囲でイ
ンダクタンスを変化させることが困難である。無理に高
インダクタンス品を作製しようとすると、レーザ加工間
隔が狭くなって短絡などの不良品が生じやすく、歩留ま
りが低下する問題が生じる。また、チップの4面のどの
面でも実装機で吸着できるように、絶縁樹脂でコートし
た全ての面を平らにする必要があり、工程が複雑にな
る。On the other hand, a chip type inductor using a laser processing method has few such problems. However, in the conventional structure, since the coil is formed in the recessed central portion, the area where the coil can be formed becomes short, and it is difficult to change the inductance in a wide range. If an attempt is made to produce a high inductance product forcibly, the laser processing interval becomes narrow, and a defective product such as a short circuit is likely to occur, which causes a problem that the yield decreases. In addition, it is necessary to flatten all the surfaces coated with the insulating resin so that any one of the four surfaces of the chip can be adsorbed by the mounting machine, which complicates the process.
【0009】更に、いずれの方式でも、チップ両端面の
外部電極が磁界を遮断するため、Q値が低下する。積層
方式では引出導体があり、従来のレーザ加工方式ではコ
イル端部が中央の凹んだ部分に位置してその外側の膨ら
んだ部分に外部電極が設けられているから、チップ端面
の導体を取り除いてもQ値は高くならない。Further, in any of the methods, the external electrodes on both end surfaces of the chip block the magnetic field, so that the Q value decreases. In the lamination method, there is a lead conductor.In the conventional laser processing method, the coil end is located in the central concave part and the external electrode is provided on the bulging part outside, so remove the conductor on the chip end face. However, the Q value does not increase.
【0010】本発明の目的は、工程を簡素化でき、製造
し易く、インダクタンスの設定範囲を広くとることがで
き、テーピングすることなく袋詰め梱包が可能なチップ
型インダクタを提供することである。本発明の他の目的
は、Q値を高くできるチップ型インダクタを提供するこ
とである。本発明の更に他の目的は、レーザ加工が容易
で歩留まりを高くできるチップ型インダクタを提供する
ことである。An object of the present invention is to provide a chip type inductor which can simplify a process, is easy to manufacture, can set a wide range of inductance, and can be packed in a bag without taping. Another object of the present invention is to provide a chip type inductor capable of increasing the Q value. Still another object of the present invention is to provide a chip type inductor which can be easily laser-processed and can increase the yield.
【0011】[0011]
【課題を解決するための手段】本発明は、絶縁基体の長
手方向外周面に螺旋状の導体膜からなるコイルを形成し
たコイル部材と、それぞれコイル端部に接続されるよう
にコイル部材の両端部に設けた外部電極と、コイルの外
周を保護する絶縁層を具備している構造を前提とし、前
記絶縁基体は、その全長にわたって断面形状が同一の直
方体形状であって、コイル軸に直交するチップ断面形状
のチップ厚/チップ幅が1未満であるチップ型インダク
タである。なお本発明において、直方体状とはほぼ直方
体状を意味しており、適当な寸法の面取りや丸めなどを
施した形状も含むことは言うまでもない。According to the present invention, there is provided a coil member having a coil formed of a spiral conductive film on the outer circumferential surface of an insulating base in a longitudinal direction, and both ends of the coil member connected to coil ends. Assuming a structure including an external electrode provided in the portion and an insulating layer for protecting the outer periphery of the coil, the insulating base has a rectangular parallelepiped shape having the same cross-sectional shape over its entire length, and is orthogonal to the coil axis. This is a chip-type inductor in which the chip thickness / chip width of the chip cross-sectional shape is less than 1. In the present invention, the rectangular parallelepiped shape means a substantially rectangular parallelepiped shape, and it goes without saying that the shape includes chamfering or rounding of appropriate dimensions.
【0012】また本発明は、絶縁基体の長手方向外周面
に螺旋状の導体膜からなるコイルを形成したコイル部材
と、それぞれコイル端部に接続されるようにコイル部材
の両端部に設けた外部電極と、コイルの外周を保護する
絶縁層を具備している構造を前提とし、前記絶縁基体
は、その全長にわたって断面形状が同一の直方体形状で
あって、コイル軸に直交するチップ断面形状のチップ厚
/チップ幅が1未満であり、前記外部電極は、コイル部
材の両方の幅広面に絶縁層よりも厚く形成され、その他
の導体膜露出部も含めて半田濡れ性の良好な材料でメッ
キ処理されているチップ型インダクタである。ここで、
例えばコイル部材の外周4側面を第1の絶縁層が覆い、
そのうちの両方の幅広面の第1の絶縁層上のみに、コイ
ル部材の幅よりも幅広で且つ表面が平坦な第2の絶縁層
が形成されているような構造としてもよい。Further, the present invention provides a coil member having a coil formed of a spiral conductive film on an outer circumferential surface of a longitudinal direction of an insulating base, and an external member provided at both ends of the coil member so as to be connected to the coil end, respectively. Assuming a structure including an electrode and an insulating layer for protecting the outer periphery of the coil, the insulating base has a rectangular parallelepiped shape having the same cross-sectional shape over its entire length, and has a chip cross-sectional shape orthogonal to the coil axis. Thickness / chip width is less than 1, and the external electrodes are formed thicker than the insulating layer on both wide surfaces of the coil member, and are plated with a material having good solder wettability, including other exposed portions of the conductive film. Chip type inductors. here,
For example, the first insulating layer covers the outer four sides of the coil member,
The structure may be such that a second insulating layer wider than the width of the coil member and having a flat surface is formed only on the first insulating layers on both of the wide surfaces.
【0013】更に本発明は、絶縁基体の長手方向外周面
に螺旋状の導体膜からなるコイルを形成したコイル部材
と、それぞれコイル端部に接続されるようにコイル部材
の両端部に設けた外部電極と、コイルの外周を保護する
絶縁層を具備している構造を前提とし、前記絶縁基体
は、その全長にわたって断面形状が同一の直方体形状で
あって、コイル軸に直交するチップ断面形状のチップ厚
/チップ幅が1未満であり、前記外部電極は、コイル部
材の一方の幅広面のみに絶縁層よりも厚く形成され、そ
の他の導体膜露出部も含めて半田濡れ性の良好な材料で
メッキ処理されていて、他方の幅広面が他の側面とは異
なる色になっているチップ型インダクタである。ここ
で、コイル部材の外部電極形成面に対向する幅広面の両
端部に無導体部を形成してもよい。また、例えばコイル
部材の外周4側面を第1の絶縁層が覆い、そのうちの外
部電極形成面に対向する幅広面の第1の絶縁層上のみ
に、コイル部材の幅よりも幅広で且つ表面が平坦であっ
て前記第1の絶縁層とは色が異なる第2の絶縁層が形成
されている構造としてもよい。Further, the present invention provides a coil member having a coil formed of a spiral conductive film on an outer circumferential surface of a longitudinal direction of an insulating base, and external members provided at both ends of the coil member so as to be connected to the respective coil ends. Assuming a structure including an electrode and an insulating layer for protecting the outer periphery of the coil, the insulating base has a rectangular parallelepiped shape having the same cross-sectional shape over its entire length, and has a chip cross-sectional shape orthogonal to the coil axis. Thickness / chip width is less than 1, the external electrode is formed thicker than the insulating layer only on one wide surface of the coil member, and is plated with a material having good solder wettability, including other exposed portions of the conductive film. A chip inductor that has been treated and the other wide side is a different color than the other side. Here, a non-conductive portion may be formed at both ends of the wide surface facing the external electrode forming surface of the coil member. Further, for example, the first insulating layer covers the four outer peripheral side surfaces of the coil member, and only the first insulating layer on the wide surface facing the external electrode formation surface is wider than the coil member and the surface is wider. A structure in which a second insulating layer which is flat and has a different color from the first insulating layer may be formed.
【0014】絶縁層を2層構造とする場合には、第1の
絶縁層を低温焼結セラミックスで、第2の絶縁層を耐熱
性樹脂で構成することがきる。When the insulating layer has a two-layer structure, the first insulating layer can be made of low-temperature sintered ceramics and the second insulating layer can be made of heat-resistant resin.
【0015】両方の外部電極形成部の間の領域のみにコ
イルを形成する場合には、コイル部材の両端面に導体が
設けられていてもよい。When the coil is formed only in the region between the two external electrode forming portions, conductors may be provided on both end surfaces of the coil member.
【0016】また本発明は、絶縁基体の長手方向外周面
に螺旋状の導体膜からなるコイルを形成したコイル部材
と、それぞれコイル端部に接続されるようにコイル部材
の両端部に設けた外部電極と、コイルの外周を保護する
絶縁層を具備している構造を前提とし、前記絶縁基体
は、その全長にわたって断面形状が同一の直方体形状で
あって、コイルは絶縁基体の両端近傍のみを残して、該
絶縁基体のほぼ全長にわたって、外部電極の内側まで形
成されており、コイル部材の両端面が無導体面になって
いるチップ型インダクタである。この場合も、コイル軸
に直交するチップ断面形状のチップ厚/チップ幅を1未
満とするのがよい。Further, the present invention provides a coil member having a coil formed of a spiral conductive film on the outer circumferential surface of an insulating base in the longitudinal direction, and an external member provided at both ends of the coil member so as to be connected to the coil end. Assuming a structure including an electrode and an insulating layer that protects the outer periphery of the coil, the insulating base has a rectangular parallelepiped shape having the same cross-sectional shape over the entire length thereof, and the coil leaves only near both ends of the insulating base. Thus, a chip-type inductor is formed over substantially the entire length of the insulating base up to the inside of the external electrode, and both end surfaces of the coil member are non-conductive surfaces. Also in this case, it is preferable to set the chip thickness / chip width of the chip cross-sectional shape perpendicular to the coil axis to less than 1.
【0017】本発明に係るチップ型インダクタにおい
て、外部電極は、例えば導体粒子とエポキシ樹脂の混合
物の硬化膜で形成できる。コイル部材の両端近傍部の外
部電極形成箇所の一部に、絶縁基体が露出した部分を設
け、その露出した絶縁基体の部分と導体膜の両方の上に
外部電極を形成すると密着強度を高めることができる。In the chip-type inductor according to the present invention, the external electrodes can be formed of a cured film of a mixture of, for example, conductive particles and epoxy resin. An exposed portion of the insulating base is provided at a part of the external electrode forming portion near both ends of the coil member, and the external electrode is formed on both the exposed portion of the insulating base and the conductive film to increase adhesion strength. Can be.
【0018】[0018]
【実施例】図1は本発明に係るチップ型インダクタの一
実施例を示しており、Aは外観斜視図、Bは縦断面図で
ある。絶縁基体10の長手方向外周面に螺旋状の導体膜
からなるコイル12を形成したコイル部材14と、それ
ぞれコイル端部に接続されるようにコイル部材の両端部
に設けた外部電極16と、コイル12の外周を保護する
絶縁層18を具備している。絶縁基体10は、その全長
にわたって断面形状が同一の直方体形状であって、コイ
ル軸に直交するチップ断面形状のチップ厚/チップ幅が
1未満(即ち、コイル軸方向に見たときに横長形状)に
設定されている。外部電極16は、コイル部材14の両
方の幅広面に絶縁層18よりも厚く形成され、その他の
導体膜露出部も含めて半田濡れ性の良好な材料20でメ
ッキ処理されている。1 shows an embodiment of a chip type inductor according to the present invention, wherein A is an external perspective view and B is a longitudinal sectional view. A coil member 14 having a coil 12 made of a spiral conductive film formed on an outer circumferential surface of the insulating base 10 in a longitudinal direction; external electrodes 16 provided at both ends of the coil member so as to be connected to coil ends, respectively; 12 is provided with an insulating layer 18 for protecting the outer periphery. The insulating base 10 has a rectangular parallelepiped shape having the same cross-sectional shape over its entire length, and a chip thickness / chip width of a chip cross-sectional shape orthogonal to the coil axis is less than 1 (that is, a horizontally long shape when viewed in the coil axis direction). Is set to The external electrodes 16 are formed thicker than the insulating layer 18 on both wide surfaces of the coil member 14, and are plated with a material 20 having good solder wettability, including other exposed portions of the conductor film.
【0019】絶縁基体10は、例えばセラミックス(例
えばアルミナ等)あるいは樹脂(例えばエポキシ樹脂
等)からなる。その外表面全体に、メッキあるいは塗膜
の焼き付け等の方法により銀あるいは銅等からなる導体
膜を形成し、その導体膜にレーザ加工によって螺旋状に
切り溝を形成してコイル12とする。黒色系のセラミッ
クスを用いると、レーザ光の反射が生じず良好な加工が
可能となる。コイル形成には、このようなレーザ加工の
他、コイルの寸法形状によってはサンドブラストやエッ
チングによる溝加工も可能である。半田濡れ性の良好な
材料によるメッキ処理としては、例えば先ずニッケルメ
ッキを行い、次に半田メッキを施す。The insulating substrate 10 is made of, for example, ceramics (eg, alumina) or resin (eg, epoxy resin). A conductor film made of silver, copper, or the like is formed on the entire outer surface by plating or baking of a coating film, and a spiral groove is formed in the conductor film by laser processing to form the coil 12. When a black ceramic is used, good processing can be performed without reflection of laser light. For forming the coil, in addition to such laser processing, groove processing by sandblasting or etching is also possible depending on the dimensions and shape of the coil. As a plating process using a material having good solder wettability, for example, nickel plating is performed first, and then solder plating is performed.
【0020】外部電極16は、例えば銀や銅等の導体粒
子とエポキシ樹脂の混合物(導電樹脂)の硬化膜で形成
するのが好ましい。工程を簡略化できるからである。勿
論、従来同様、導体ペースト(銀ペーストなど)の焼き
付け等の方法でもよい。外側の絶縁層18は、コイル1
2を保護する機能を果たし、樹脂を塗布し硬化させた膜
でもよいし、低融点ガラスなどを付着し焼結した膜でも
よい。The external electrode 16 is preferably formed of a cured film of a mixture (conductive resin) of conductive particles such as silver or copper and an epoxy resin. This is because the process can be simplified. As a matter of course, a method such as baking of a conductor paste (silver paste or the like) may be used as in the related art. The outer insulating layer 18 is a coil 1
2, a film coated with a resin and cured, or a film obtained by adhering low-melting glass or the like and sintering may be used.
【0021】本発明では、チップ厚をチップ幅よりも小
さくしたことにより、形状的な異方性があるために実装
面を幅の広い2面(上下面)に限定することができる。
つまり、断面が長方形であり、面の幅が異なる(形状に
異方性がある)ので、どちらかに揃えることは容易であ
る。例えば、上記実施例のように、広い面のどちらを実
装面にしても電気的特性を満足するようになっている
と、テーピング梱包することなく袋詰め梱包でもパーツ
フィーダで所定の向きに整列供給することが可能であ
る。また、チップ幅に対してチップ厚が小さいので、実
装時にチップを回路基板上に載せる時に勢いで転がるこ
ともなく安定し、半田付け時のチップ立ちも起き難い。
更に、実装時にバキューム吸着する面(実装面とは反対
側の面)は幅広の2面に限られるから、その2面のみ平
坦に仕上げればよく、絶縁コートする工程も4面全てを
平らに仕上げなければならない従来品よりも容易とな
る。アルミナセラミック製の絶縁基体の場合、縦横高さ
の寸法公差は通常、±0.03mm程度である。従って、
本発明において絶縁基体の幅と厚みの差は、0.06mm
より大きくする。絶縁層や外部導体などの厚みのばらつ
き、及び形状的異方性によるチップ整列が可能なことな
どを考慮し、最終製品のチップ幅とチップ厚の関係を決
める。チップ寸法にもよるが、現状の1005タイプの
チップでは、 0.06mm<(チップ幅−チップ厚)≦0.2mm の範囲、より好ましくは 0.1mm≦(チップ幅−チップ厚)≦0.2mm の範囲とするのがよい。In the present invention, since the chip thickness is smaller than the chip width, the mounting surface can be limited to two wide surfaces (upper and lower surfaces) because of the shape anisotropy.
That is, since the cross section is rectangular and the width of the surface is different (there is anisotropy in the shape), it is easy to align them with either one. For example, as in the above-described embodiment, if the electrical characteristics are satisfied regardless of which one of the wide surfaces is the mounting surface, even if the package is packed in a bag without taping, the parts are fed in a predetermined direction using a parts feeder. It is possible to Further, since the chip thickness is smaller than the chip width, the chip is stabilized without being rolled by force when mounting the chip on the circuit board during mounting, and the chip is unlikely to stand during soldering.
Furthermore, since the surface on which vacuum suction is performed during mounting (the surface opposite to the mounting surface) is limited to two wide surfaces, only the two surfaces need to be finished flat. It is easier than conventional products that must be finished. In the case of an insulating substrate made of alumina ceramic, the dimensional tolerance of the height and width is usually about ± 0.03 mm. Therefore,
In the present invention, the difference between the width and the thickness of the insulating base is 0.06 mm.
Make it bigger. The relationship between the chip width and the chip thickness of the final product is determined in consideration of variations in the thickness of the insulating layer and the external conductor and the possibility of chip alignment due to shape anisotropy. Although it depends on the chip size, in the current 1005 type chip, 0.06 mm <(chip width−chip thickness) ≦ 0.2 mm, more preferably 0.1 mm ≦ (chip width−chip thickness) ≦ 0. It is better to set the range to 2 mm.
【0022】絶縁層の他の例を図2に示す。絶縁層は、
コイル部材14の外周4側面を薄い第1の絶縁層22が
覆い(図2のA参照)、そのうちの両方の幅広面(上下
面)の第1の絶縁層上のみに、コイル部材の幅よりも若
干幅広で且つ表面が平坦な第2の絶縁層24が形成され
ている構造(図2のB参照)としてもよい。このように
すると、幅広な2面(上下面)の平坦度を更に高めるこ
とができ、実装時のバキューム吸着をより一層安定に且
つ確実に行うことが可能となる。また薄い第1の絶縁層
22のみではコイル部材14の角部は更に薄くなるが、
第2の絶縁層24を設けることで、角部も十分に被覆さ
れる。このような第2の絶縁層24は、平らな部材にコ
ートした樹脂を転写することで容易に形成できる。FIG. 2 shows another example of the insulating layer. The insulating layer
A thin first insulating layer 22 covers the four outer peripheral sides of the coil member 14 (see A in FIG. 2), and only the first insulating layer on both wide surfaces (upper and lower surfaces) has a width smaller than the width of the coil member. The second insulating layer 24 may be slightly wider and have a flat surface (see FIG. 2B). By doing so, the flatness of the two wide surfaces (upper and lower surfaces) can be further increased, and the vacuum suction at the time of mounting can be performed more stably and reliably. Also, the corners of the coil member 14 are further thinned only with the thin first insulating layer 22,
By providing the second insulating layer 24, corners are sufficiently covered. Such a second insulating layer 24 can be easily formed by transferring a resin coated on a flat member.
【0023】このように絶縁層を2層構造にする場合に
は、第1の絶縁層22が低温焼結セラミックス(セラミ
ックスとガラスの混合物)からなり、第2の絶縁層24
が耐熱性樹脂(エポキシ系、フッ素系、シリコン系な
ど)からなる構成が好ましい。第1の絶縁層22が低温
焼結セラミックスからなる場合には、焼結工程が必要と
なるが、このときの加熱によって、レーザ加工により尖
ったコイル12の角(導体膜にレーザで切り溝を形成し
た直後の角:図3のA参照)を、図3のBに示すように
丸めることができる。このようにコイル12の角が丸み
を帯びることによって、高周波抵抗が低下し、Q値が高
くなる利点が生じる。When the insulating layer has a two-layer structure, the first insulating layer 22 is made of low-temperature sintered ceramics (a mixture of ceramics and glass) and the second insulating layer
Is preferably made of a heat-resistant resin (epoxy, fluorine, silicon, etc.). When the first insulating layer 22 is made of low-temperature sintered ceramics, a sintering step is required. However, by heating at this time, the corners of the coil 12 which are sharpened by laser processing (the kerf is cut in the conductive film by laser). The corner immediately after formation: see FIG. 3A) can be rounded as shown in FIG. 3B. When the corners of the coil 12 are rounded as described above, there is an advantage that the high-frequency resistance is reduced and the Q value is increased.
【0024】図4に示すように、コイル部材14は、そ
の両端近傍部の外部電極形成箇所の一部に、絶縁基体1
0が露出した部分26を設け、その露出した絶縁基体の
部分と導体膜の両方の上に外部電極を形成する構成とし
てもよい(外部電極形成位置を点線で示す)。図4のA
はチップ幅の全体にわたって導体膜が除去されて絶縁基
体の部分が露出しており、図4のBはチップ幅の一部で
導体膜が除去されて絶縁基体の部分が露出している。導
体膜上のみの場合には外部電極の密着強度が不十分とな
ることがあるが、外部電極の一部分が、導体膜の一部を
除去して絶縁基体の素地を露出させて表面を荒らした絶
縁基体に直接接着されるように構成すると、密着強度が
高まる。As shown in FIG. 4, the coil member 14 has an insulating base 1 on a part of the external electrode forming portion near both ends thereof.
A configuration may be adopted in which a portion 26 where 0 is exposed is provided, and an external electrode is formed on both the exposed insulating substrate portion and the conductive film (the position where the external electrode is formed is indicated by a dotted line). A in FIG.
In FIG. 4B, the portion of the insulating substrate is exposed by removing the conductive film over the entire width of the chip. In FIG. 4B, the portion of the conductive film is removed by exposing the portion of the chip width to expose the portion of the insulating substrate. In the case of only on the conductive film, the adhesion strength of the external electrode may be insufficient, but a part of the external electrode has been roughened by removing a part of the conductive film and exposing the base of the insulating base. Adhesion strength is increased by being configured to be directly adhered to the insulating base.
【0025】本発明では絶縁基体は、その全長にわたっ
て断面形状が同一の直方体形状であるために、その全長
を利用してコイルを形成できる。そこで、同じ10nH
のインダクタンスとなるように、コイルをほぼ全長にわ
たって形成した場合(図5のA)と中央部のみ(外部電
極間の領域)に形成した場合(図5のB)とについて磁
束密度の分布を求めた。図5から明らかなように、磁界
はコイルの端部から外に出ており、磁束密度の分布が異
なっているのが分かる。コイルから発生した磁界を遮断
しないように構成することによって、コイルのQ値が高
くなることは周知の事項である。しかし、どのような構
造にして磁界を遮断しないようにするかが問題である。In the present invention, since the insulating base has a rectangular parallelepiped shape having the same cross-sectional shape over the entire length, a coil can be formed using the entire length. Therefore, the same 10 nH
The distribution of the magnetic flux density is determined for the case where the coil is formed over substantially the entire length (A in FIG. 5) and the case where the coil is formed only at the center (the region between the external electrodes) (B in FIG. 5). Was. As can be seen from FIG. 5, the magnetic field exits from the end of the coil, and the distribution of the magnetic flux density is different. It is a well-known matter that the Q value of the coil is increased by not interrupting the magnetic field generated from the coil. However, there is a problem how to prevent the magnetic field from being interrupted.
【0026】本実施例のように端面に導体がある場合に
は、チップ端面までほぼ全長にわたってコイルを形成す
ると、磁界の強い部分を導体が覆うことになり、図6の
曲線aで示すように周波数−Q値特性は著しく低下す
る。それに対して、コイルを中央部分のみに形成した場
合には磁界の強い部分に導体が少なく、図6の曲線bで
示すように周波数−Q値特性の低下を抑えることができ
る。図5に示されている磁束密度分布を考慮すると、コ
イル端部がチップ端面から離れていた方がよく、できる
だけ中央部分に設けるのが好ましい。When a conductor is formed on the end face as in this embodiment, if a coil is formed over substantially the entire length up to the chip end face, the conductor covers a portion where the magnetic field is strong, as shown by a curve a in FIG. The frequency-Q value characteristic is significantly reduced. On the other hand, when the coil is formed only in the central portion, the conductor is less in the portion where the magnetic field is strong, and the decrease in the frequency-Q value characteristic can be suppressed as shown by the curve b in FIG. In consideration of the magnetic flux density distribution shown in FIG. 5, it is better that the coil end is far from the chip end face, and it is preferable that the coil end is provided as centrally as possible.
【0027】図7は本発明に係るチップ型インダクタの
他の実施例を示している。図1に示す実施例と同様、絶
縁基体30の長手方向外周面に螺旋状の導体膜からなる
コイル32を形成したコイル部材34と、それぞれコイ
ル端部に接続されるようにコイル部材34の両端部に設
けた外部電極36と、コイル32の外周を保護する絶縁
層38を具備している。絶縁基体30は、その全長にわ
たって断面形状が同一の直方体形状であって、コイル軸
に直交するチップ断面形状のチップ厚/チップ幅が1未
満になっている。外部電極36は、コイル部材34の両
方の幅広面に絶縁層38の一部を覆うように形成され、
その他の導体膜露出部も含めて半田濡れ性の良好な材料
40でメッキ処理されている。FIG. 7 shows another embodiment of the chip inductor according to the present invention. As in the embodiment shown in FIG. 1, a coil member 34 having a coil 32 formed of a spiral conductive film on the outer circumferential surface of the insulating base 30 in the longitudinal direction, and both ends of the coil member 34 so as to be connected to the coil ends, respectively. And an insulating layer 38 for protecting the outer periphery of the coil 32. The insulating base 30 has a rectangular parallelepiped shape having the same cross-sectional shape over its entire length, and the chip thickness / chip width of the chip cross-sectional shape orthogonal to the coil axis is less than 1. The external electrodes 36 are formed on both wide surfaces of the coil member 34 so as to cover a part of the insulating layer 38.
It is plated with a material 40 having good solder wettability, including other exposed portions of the conductor film.
【0028】この実施例では、コイル32は絶縁基体3
0の両端近傍のみを残して、該絶縁基体30のほぼ全長
にわたって、外部電極36の内側まで形成されており、
コイル部材34の両端面は無導体面になっている。外部
電極36は、幅広の上下2面の両端部に形成されてお
り、上下いずれの向きでも回路基板に表面実装可能であ
る。In this embodiment, the coil 32 is
0, and is formed over almost the entire length of the insulating base 30 to the inside of the external electrode 36, except for the vicinity of both ends of 0.
Both end surfaces of the coil member 34 are non-conductive surfaces. The external electrodes 36 are formed at both ends of the wide upper and lower surfaces, and can be surface-mounted on the circuit board in any direction.
【0029】本発明では、絶縁基体30が、その全長に
わたって断面形状が同一の直方体形状であることから、
コイル32は、外部電極36の間の領域に限られず、絶
縁基体30のほぼ全長にわたって形成することができ
る。そのため巻数を多くすることが可能となり、高イン
ダクタンスを実現できる。従って、低インダクタンスか
ら高インダクタンスまで広範囲の対応が可能となる。ま
た、巻数が少ない場合には導体幅を広くとれるので低抵
抗となる。In the present invention, since the insulating base 30 has the same rectangular parallelepiped shape over the entire length thereof,
The coil 32 is not limited to the region between the external electrodes 36, and can be formed over substantially the entire length of the insulating base 30. Therefore, the number of turns can be increased, and high inductance can be realized. Therefore, it is possible to handle a wide range from low inductance to high inductance. Further, when the number of turns is small, the conductor width can be widened, so that the resistance becomes low.
【0030】更に、コイル32を絶縁基体30のほぼ全
長にわたって形成する構成では、途中で磁界が漏れ難く
コイルの端部から外に放射される(図5のA参照)。本
実施例では、コイル部材34の端面に導体膜が無く、従
って磁界を遮断することが無いため損失が少なくQ値を
高くすることができる。Further, in the configuration in which the coil 32 is formed over substantially the entire length of the insulating base 30, a magnetic field is hardly leaked on the way and is radiated outside from the end of the coil (see FIG. 5A). In the present embodiment, there is no conductor film on the end face of the coil member 34 and, therefore, the magnetic field is not interrupted, so that the loss is small and the Q value can be increased.
【0031】本実施例のようにチップ端面に導体膜が無
い場合には、コイルを中央部分のみに形成した場合には
磁界の強い部分に外部電極が存在するために、図8の曲
線cで示すような周波数−Q値特性となる。それに対し
て図7に示すように、チップ端面までほぼ全長にわたっ
てコイルを形成すると、磁界の強い部分には導体が無
く、図8の曲線dで示すように周波数−Q値特性は向上
する。従って、チップ端面に導体膜がない場合には、巻
数が少ない場合でも、できるだけチップのほぼ全長を利
用してコイルを形成するのが好ましい。When there is no conductor film on the end face of the chip as in this embodiment, when the coil is formed only in the central portion, since the external electrode exists in the portion where the magnetic field is strong, the curve c in FIG. The frequency-Q value characteristic as shown is obtained. On the other hand, as shown in FIG. 7, when the coil is formed over almost the entire length up to the chip end face, there is no conductor in the portion where the magnetic field is strong, and the frequency-Q value characteristic is improved as shown by the curve d in FIG. Therefore, when there is no conductor film on the end face of the chip, it is preferable to form the coil using almost the entire length of the chip as much as possible, even if the number of turns is small.
【0032】図9は本発明に係るチップ型インダクタの
他の実施例を示している。図7に示す実施例と同様、絶
縁基体30の長手方向外周面に螺旋状の導体膜からなる
コイル32を形成したコイル部材34と、それぞれコイ
ル端部に接続されるようにコイル部材34の両端部に設
けた外部電極36と、コイル32の外周を保護する絶縁
層38を具備している。絶縁基体30は、その全長にわ
たって断面形状が同一の直方体形状であって、コイル軸
に直交するチップ断面形状のチップ厚/チップ幅は1未
満である。コイル32は絶縁基体30の両端近傍のみを
残して、該絶縁基体30のほぼ全長にわたって、外部電
極36の内側まで形成されており、コイル部材34の両
端面は無導体面になっている。外部電極36は、コイル
部材34の両方の幅広面に絶縁層38の一部を覆うよう
に形成され、その他の導体膜露出部も含めて半田濡れ性
の良好な材料40でメッキ処理されている。FIG. 9 shows another embodiment of the chip type inductor according to the present invention. As in the embodiment shown in FIG. 7, a coil member 34 having a coil 32 made of a spiral conductive film formed on the outer circumferential surface of the insulating base 30 in the longitudinal direction, and both ends of the coil member 34 so as to be connected to the coil ends, respectively. And an insulating layer 38 for protecting the outer periphery of the coil 32. The insulating base 30 has a rectangular parallelepiped shape having the same cross-sectional shape over its entire length, and the chip thickness / chip width of the chip cross-sectional shape orthogonal to the coil axis is less than 1. The coil 32 is formed over substantially the entire length of the insulating base 30 up to the inside of the external electrode 36, leaving only the vicinity of both ends of the insulating base 30, and both end faces of the coil member 34 are non-conductive surfaces. The external electrodes 36 are formed on both wide surfaces of the coil member 34 so as to cover a part of the insulating layer 38, and are plated with a material 40 having good solder wettability, including other exposed portions of the conductor film. .
【0033】この実施例では、外部電極36は、幅広の
2面うちの一方の面(下面)の両端に形成されており、
その反対側の幅広面には他の側面とは異なる色の平坦な
絶縁層39が設けられている。従って、外部電極36を
形成した面が実装面であり、回路基板に対向する。反対
側の異なる色の平坦面でバキューム吸着され表面実装さ
れる。バキューム吸着は色の違いを認識することで自動
的に行われる。この構造では、平坦化が必要な面は1面
のみとなるので、樹脂コート作業はより一層簡略化でき
る。In this embodiment, the external electrodes 36 are formed at both ends of one of the two wide surfaces (the lower surface).
On the opposite wide surface, a flat insulating layer 39 of a color different from the other side surfaces is provided. Therefore, the surface on which the external electrodes 36 are formed is the mounting surface, and faces the circuit board. Vacuum suction is performed on the opposite flat surface of a different color, and the surface is mounted. Vacuum suction is automatically performed by recognizing a difference in color. In this structure, since only one surface needs to be flattened, the resin coating operation can be further simplified.
【0034】外部電極36は一方の幅広面のみに形成さ
れており、それ以外の面には無い。コイル32をコイル
部材34のほぼ全長にわたって形成する場合には、前記
のようにコイル端部にはできるだけ導体が無いことが好
ましい。従って、本実施例のような構成では、異なる色
の樹脂コートをする面の両端部近傍では、コイルに関係
のない余分な導体膜の部分を除去することで、Q値をよ
り一層高くすることができる。The external electrode 36 is formed only on one wide surface, and not on the other surface. When the coil 32 is formed over substantially the entire length of the coil member 34, it is preferable that the coil end has as few conductors as possible as described above. Therefore, in the configuration as in the present embodiment, the Q value can be further increased by removing an unnecessary portion of the conductor film irrelevant to the coil in the vicinity of both ends of the surface coated with the resin of a different color. Can be.
【0035】本実施例の場合には、チップ端面のみなら
ずチップ端部近傍も導体膜が無いように構成するのがよ
い。図10はその場合のコイル部材34の上面図を示し
ている。符号42が、端部近傍において導体膜を除去し
絶縁基体の素材が露出している部分を表している。な
お、このように導体膜を除去するには、コイル形成と同
様、レーザ加工によって容易に行うことができる。この
構成によって、周波数−Q値特性はより一層向上する
(図11の曲線e参照)。この特性は、コイルを中央部
に形成しチップ端面に導体膜を有する構造の特性(図1
1の曲線f参照)に比して、遙かに良好であることが分
かる。In the case of this embodiment, it is preferable that the conductor film is not formed not only on the chip end face but also near the chip end. FIG. 10 shows a top view of the coil member 34 in that case. Reference numeral 42 denotes a portion where the conductor film is removed near the end and the material of the insulating base is exposed. The removal of the conductor film can be easily performed by laser processing, similarly to the coil formation. With this configuration, the frequency-Q value characteristic is further improved (see the curve e in FIG. 11). This characteristic is the characteristic of a structure in which a coil is formed in the center and a conductor film is provided on the end face of the chip (FIG.
1 (see curve f)).
【0036】次に、本発明に係るチップ型インダクタの
製造手順について説明する。図12は、図1に対応する
構造のチップ型インダクタの製造工程の一例を示してい
る。以下の順序は図面の符号に対応している。 (1)直方体状の絶縁基体50の全外表面(6面)に導
体膜52を形成する。絶縁基体50にはアルミナセラミ
ックを使用し、導体膜52は銅メッキによって形成し
た。絶縁基体50は、長さ1.0mm、幅0.5mm、厚さ
0.35mmの最終チップ寸法を得ることを目標とし、チ
ップ抵抗の製造と同じ設備が使用できるようにした。 (2)次に、レーザ加工によって外周面に螺旋状の切り
溝54を形成しコイル56を作製した。ここでは絶縁基
体の両端面にも導体膜が形成されたままであるので、コ
イル56は外部電極形成部分の間の領域に限って形成し
た。これがコイル部材58である。 (3)そのコイル部材58の幅広の対向2面(上下面)
の両端部分に外部電極60を形成する。外部電極60
は、銀粒子とエポキシ樹脂を混合した導電樹脂を厚く転
写し加熱硬化することで形成した。 (4)外部電極60の間の領域にコイルを保護するよう
にエポキシ樹脂層62をコートする。この樹脂コート
は、幅広面が平坦になるようにする。例えば印刷で形成
してもよいし、塗布後に平らな部材を押し付けることで
平坦にしてもよい。そして加熱し硬化させる。 (5)最後に、外部電極のみならず、その他の導体膜露
出部も含めて半田濡れ性の良好な材料64でメッキ処理
する。ここでは、全ての導体面にニッケルメッキし更に
半田メッキを行った。Next, the manufacturing procedure of the chip type inductor according to the present invention will be described. FIG. 12 shows an example of a manufacturing process of a chip-type inductor having a structure corresponding to FIG. The following order corresponds to the reference numbers in the drawings. (1) The conductor film 52 is formed on the entire outer surface (six surfaces) of the rectangular parallelepiped insulating base 50. Alumina ceramic was used for the insulating substrate 50, and the conductor film 52 was formed by copper plating. The insulating substrate 50 was designed to obtain a final chip size of 1.0 mm in length, 0.5 mm in width, and 0.35 mm in thickness, so that the same equipment as used for manufacturing chip resistors could be used. (2) Next, a spiral cut groove 54 was formed on the outer peripheral surface by laser processing to produce a coil 56. Here, since the conductor film is still formed on both end surfaces of the insulating base, the coil 56 is formed only in the region between the external electrode forming portions. This is the coil member 58. (3) Two wide opposing surfaces (upper and lower surfaces) of the coil member 58
External electrodes 60 are formed at both end portions of the substrate. External electrode 60
Was formed by thickly transferring and heat-curing a conductive resin in which silver particles and an epoxy resin were mixed. (4) A region between the external electrodes 60 is coated with an epoxy resin layer 62 so as to protect the coil. This resin coat is to make the wide surface flat. For example, it may be formed by printing, or may be flattened by pressing a flat member after application. Then, it is cured by heating. (5) Finally, not only the external electrodes but also the exposed portions of the conductor film are plated with a material 64 having good solder wettability. Here, all the conductor surfaces were plated with nickel and further plated with solder.
【0037】なお、上記の(3)の工程と(4)の工程
は、順序が逆でもよい。いずれにしても、この構成は実
装可能な面を2面に限っており、外周全てに外部電極を
厚く形成し、外周全てに平坦な絶縁層を形成する従来構
造よりは作製が容易である。The order of the steps (3) and (4) may be reversed. In any case, this structure is limited to only two mountable surfaces, and is easier to manufacture than a conventional structure in which external electrodes are formed thick on the entire outer periphery and a flat insulating layer is formed on the entire outer periphery.
【0038】図13は、図7に対応する構造のチップ型
インダクタを製造する工程の例を示している。以下の手
順は図面の符号に対応している。 (1)直方体状の絶縁基体50の全外表面(6面)に導
体膜52を形成する。絶縁基体50にはアルミナセラミ
ックを使用し、導体膜52は銅メッキによって形成し
た。絶縁基体50は、長さ1.0mm、幅0.5mm、厚さ
0.35mmの最終チップ寸法を得ることを目標とした。 (2)次に、両端面の導体膜を研磨などにより削除し
て、絶縁基体50の素地を露出させた。 (3)そして、レーザ加工によって外周面に螺旋状の切
り溝54を形成しコイル56を作製した。ここでは絶縁
基体50のほぼ全長にわたってコイル56を形成してい
る。勿論、後の工程で外部電極と接続するために、端部
の0.03mm以上は導体膜のまま残しておく必要があ
る。これがコイル部材58である。 (4)両端部を除いてコイル56を保護するようにエポ
キシ樹脂層62をコートする。この樹脂コートは、幅広
面が平坦になるようにする。例えば印刷で形成してもよ
いし、塗布後に平らな部材を押し付けることで平坦にし
てもよい。 (5)そのコイル部材58の幅広の対向2面(上下面)
の両端部分に外部電極60を形成する。外部電極60
は、コイル部材58の端部の導体膜及びエポキシ樹脂層
62の端部を含むように、銀粒子とエポキシ樹脂を混合
した導電樹脂を厚く転写し加熱硬化することで形成す
る。 (6)最後に、外部電極60のみならず、その他の導体
膜露出部も含めて半田濡れ性の良好な材料64でメッキ
処理する。ここでは、全ての導体面にニッケルメッキと
半田メッキを行った。従って、最終的にチップ両端面は
絶縁基体50の素地が露出したまま(即ち無導体)の状
態となる。FIG. 13 shows an example of a process for manufacturing a chip inductor having a structure corresponding to FIG. The following procedures correspond to the reference numerals in the drawings. (1) The conductor film 52 is formed on the entire outer surface (six surfaces) of the rectangular parallelepiped insulating base 50. Alumina ceramic was used for the insulating substrate 50, and the conductor film 52 was formed by copper plating. The purpose of the insulating substrate 50 was to obtain a final chip size of 1.0 mm in length, 0.5 mm in width, and 0.35 mm in thickness. (2) Next, the conductor films on both end surfaces were removed by polishing or the like to expose the base of the insulating base 50. (3) Then, a spiral cut groove 54 was formed on the outer peripheral surface by laser processing to produce a coil 56. Here, the coil 56 is formed over substantially the entire length of the insulating base 50. Of course, in order to connect to the external electrode in a later step, 0.03 mm or more of the end portion needs to be left as a conductive film. This is the coil member 58. (4) The epoxy resin layer 62 is coated so as to protect the coil 56 except for both ends. This resin coat is to make the wide surface flat. For example, it may be formed by printing, or may be flattened by pressing a flat member after application. (5) Wide opposing two surfaces (upper and lower surfaces) of the coil member 58
External electrodes 60 are formed at both end portions of the substrate. External electrode 60
Is formed by thickly transferring and heat-curing a conductive resin in which silver particles and an epoxy resin are mixed so as to include the conductive film at the end of the coil member 58 and the end of the epoxy resin layer 62. (6) Finally, not only the external electrodes 60 but also other exposed portions of the conductive film are plated with a material 64 having good solder wettability. Here, nickel plating and solder plating were performed on all conductor surfaces. Therefore, both ends of the chip are finally in a state where the base of the insulating base 50 is exposed (that is, no conductor).
【0039】このような構造では、コイル形成にチップ
のほぼ全体を使用しており、そのために高いインダクタ
ンスを得ることができるし、端面に導体が無いためにQ
値が高くなる。In such a structure, almost the entire chip is used for forming the coil, so that a high inductance can be obtained, and since there is no conductor on the end face, Q
The value increases.
【0040】なお、直方体状の絶縁基体の両端面の導体
膜を削除するのではなく、棒状の絶縁体の外周面に導体
膜を形成し、それを所定の長さで切断する方法でも、
(3)の工程で得たものと同様のものを作製できる。In addition, instead of removing the conductor films on both end surfaces of the rectangular parallelepiped insulating base, a method of forming a conductor film on the outer peripheral surface of a rod-shaped insulator and cutting the same at a predetermined length is also used.
A product similar to that obtained in the step (3) can be manufactured.
【0041】図14は、図9に対応する構造のチップ型
インダクタを製造する工程の例を示している。以下の手
順は図面の符号に対応している。 (1)直方体状の絶縁基体50の全外表面(6面)に導
体膜52を形成する。絶縁基体50にはアルミナセラミ
ックを使用し、導体膜52は銅メッキによって形成し
た。絶縁基体は、長さ1.0mm、幅0.5mm、厚さ0.
35mmの最終チップ寸法を目標として設計した。 (3)次に、両端面の導体膜は削除して、絶縁基体50
の素地を露出させた。 (3)レーザ加工によって外周面に螺旋状の切り溝54
を形成しコイル56を作製した。ここでは絶縁基体50
のほぼ全長にわたってコイル56を形成した。勿論、外
部電極と接続するために、一方の幅広面の端部の0.0
3mm以上は導体膜のまま残しておく必要がある。また、
コイルに関係のない反対側の幅広面の両端部分の導体は
削除し、できるだけ磁界を妨害しないようにする。 (4)両端部を除いてコイル56を保護するようにエポ
キシ樹脂層62をコートする。この樹脂コートは、一方
の幅広面と両方の幅狭面は同じ色でよいが、他方の幅広
面は異なる色となるように、色を変えて認識しやすくす
る。この樹脂コートは、色を違えた幅広面が平坦になる
ようにする。例えば印刷で形成してもよいし、塗布後に
平らな部材を押し付けることで平坦にしてもよい。色を
違えた樹脂層を符号63で示す。 (5)そのコイル部材58の一方の幅広面(側面と同じ
色の下面)の両端部分のみに外部電極60を形成する。
外部電極60は、コイル部材58の端部の導体膜及び樹
脂層の端部を含むように、銀粒子とエポキシ樹脂を混合
した導電樹脂を厚く転写し加熱硬化することで形成す
る。 (6)最後に、外部電極のみならず、その他の導体膜露
出部も含めて半田濡れ性の良好な材料64でメッキ処理
する。ここでは、全ての導体面にニッケルメッキと半田
メッキを行った。従って、チップ両端面は絶縁基体の素
材が露出したままの状態となる。FIG. 14 shows an example of a process for manufacturing a chip inductor having a structure corresponding to FIG. The following procedures correspond to the reference numerals in the drawings. (1) The conductor film 52 is formed on the entire outer surface (six surfaces) of the rectangular parallelepiped insulating base 50. Alumina ceramic was used for the insulating substrate 50, and the conductor film 52 was formed by copper plating. The insulating substrate has a length of 1.0 mm, a width of 0.5 mm, and a thickness of 0.1 mm.
Designed for a final chip size of 35 mm. (3) Next, the conductor films on both end faces are deleted, and the insulating substrate 50 is removed.
The base was exposed. (3) Spiral cut grooves 54 on the outer peripheral surface by laser processing
Was formed to produce a coil 56. Here, the insulating substrate 50
Was formed over substantially the entire length of the coil. Of course, in order to connect with the external electrode, 0.0
It is necessary to leave the conductor film of 3 mm or more as a conductor film. Also,
The conductors at both ends of the opposite wide surface that are not related to the coil are deleted so as not to disturb the magnetic field as much as possible. (4) The epoxy resin layer 62 is coated so as to protect the coil 56 except for both ends. In this resin coat, one wide surface and both narrow surfaces may have the same color, but the other wide surface has a different color to facilitate recognition. This resin coat makes the wide surface of the different color flat. For example, it may be formed by printing, or may be flattened by pressing a flat member after application. The resin layers having different colors are indicated by reference numeral 63. (5) External electrodes 60 are formed only on both ends of one wide surface (the lower surface of the same color as the side surface) of the coil member 58.
The external electrode 60 is formed by thickly transferring and heat-curing a conductive resin obtained by mixing silver particles and an epoxy resin so as to include the conductive film at the end of the coil member 58 and the end of the resin layer. (6) Finally, not only the external electrodes but also other exposed portions of the conductive film are plated with a material 64 having good solder wettability. Here, nickel plating and solder plating were performed on all conductor surfaces. Therefore, both end surfaces of the chip are in a state where the material of the insulating base is exposed.
【0042】このような構造では、コイル形成にチップ
のほぼ全体を使用しており、そのために高いインダクタ
ンスを得ることができるし、端面のみならず上面端部の
導体も無いために、より一層Q値を高くすることができ
る。In such a structure, almost the entire chip is used for forming the coil, so that a high inductance can be obtained. Further, since there is no conductor not only at the end face but also at the end of the upper face, the Q is further improved. The value can be higher.
【0043】[0043]
【発明の効果】本発明は上記のように、絶縁基体は、そ
の全長にわたって断面形状が同一の直方体形状であっ
て、コイル軸に直交するチップ断面形状のチップ厚/チ
ップ幅が1未満の幅広形状であるから、平坦化すべき絶
縁層形成面が少なくて済むため、工程を簡素化でき、製
造し易くなる。また、形状的な異方性を利用すること
で、パーツフィーダで向きを揃えて供給できるため、テ
ーピングすることなく袋詰め梱包が可能となり、コスト
を低下できるし、梱包廃材も発生しない。As described above, according to the present invention, the insulating substrate has a rectangular parallelepiped shape having the same cross-sectional shape over its entire length, and the chip thickness / chip width of the chip cross-sectional shape orthogonal to the coil axis is less than 1. Because of the shape, the surface on which the insulating layer is to be planarized can be reduced, so that the process can be simplified and the production becomes easy. In addition, by using the shape anisotropy, the parts can be supplied in the same direction by the parts feeder, so that the bag can be packed without taping, the cost can be reduced, and no packaging waste is generated.
【0044】また、コイルをチップのほぼ全長にわたっ
て形成できるので、必要なインダクタンスの範囲を広く
とることができる。また巻数が少ない場合には導体幅を
広くできるため、低抵抗にすることができるし、レーザ
加工が容易となり短絡を防止できるため歩留まりが高く
なり、信頼性も高くなる。Further, since the coil can be formed over almost the entire length of the chip, the required inductance range can be widened. When the number of turns is small, the conductor width can be widened, so that the resistance can be reduced. Further, laser processing can be facilitated and short circuit can be prevented, so that the yield is increased and the reliability is also increased.
【0045】また本発明は、コイル部材の端面には導体
膜が無い状態とし、しかもコイルをチップのほぼ全長に
わたって形成できるように構成したことにより、磁界が
遮断され難くなり、Q値を著しく高くすることができ
る。Further, according to the present invention, since the coil member is formed without the conductive film on the end face of the coil member and the coil can be formed over substantially the entire length of the chip, the magnetic field is hardly interrupted, and the Q value is significantly increased. can do.
【図1】本発明に係るチップ型インダクタの一実施例を
示す説明図。FIG. 1 is an explanatory view showing one embodiment of a chip-type inductor according to the present invention.
【図2】絶縁層の構造の他の例を示す説明図。FIG. 2 is an explanatory view showing another example of the structure of the insulating layer.
【図3】導体膜の変形を示す説明図。FIG. 3 is an explanatory view showing deformation of a conductive film.
【図4】コイル部材の他の構造を示す上面図。FIG. 4 is a top view showing another structure of the coil member.
【図5】コイル長と磁束密度分布の関係を示す説明図。FIG. 5 is an explanatory diagram showing a relationship between a coil length and a magnetic flux density distribution.
【図6】チップ端面に導体が有る場合のコイル長による
特性変化を示すグラフ。FIG. 6 is a graph showing a characteristic change according to a coil length when a conductor is present on a chip end surface.
【図7】本発明に係るチップ型インダクタの他の実施例
を示す説明図。FIG. 7 is an explanatory view showing another embodiment of the chip inductor according to the present invention.
【図8】チップ端面に導体が無い場合のコイル長による
特性変化を示すグラフ。FIG. 8 is a graph showing a characteristic change according to a coil length when there is no conductor on a chip end surface.
【図9】本発明に係るチップ型インダクタの更に他の実
施例を示す説明図。FIG. 9 is an explanatory view showing still another embodiment of the chip-type inductor according to the present invention.
【図10】コイル部材の構造を示す上面図。FIG. 10 is a top view showing the structure of the coil member.
【図11】その周波数−Q値特性を示すグラフ。FIG. 11 is a graph showing the frequency-Q value characteristics.
【図12】本発明に係るチップ型インダクタの一実施例
の製造工程説明図。FIG. 12 is a view illustrating a manufacturing process of one embodiment of the chip-type inductor according to the present invention.
【図13】本発明に係るチップ型インダクタの他の実施
例の製造工程説明図。FIG. 13 is a view illustrating a manufacturing process of a chip-type inductor according to another embodiment of the present invention.
【図14】本発明に係るチップ型インダクタの更に他の
実施例の製造工程説明図。FIG. 14 is an explanatory view of a manufacturing process of still another embodiment of the chip-type inductor according to the present invention.
【符号の説明】 10 絶縁基体 12 コイル 14 コイル部材 16 外部電極 18 絶縁層[Description of Signs] 10 Insulating base 12 Coil 14 Coil member 16 External electrode 18 Insulating layer
───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5E070 AA01 CA11 CC00 EA00 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5E070 AA01 CA11 CC00 EA00
Claims (12)
体膜からなるコイルを形成したコイル部材と、それぞれ
コイル端部に接続されるようにコイル部材の両端部に設
けた外部電極と、コイルの外周を保護する絶縁層を具備
しているチップ型インダクタにおいて、 前記絶縁基体は、その全長にわたって断面形状が同一の
直方体形状であって、コイル軸に直交するチップ断面形
状のチップ厚/チップ幅が1未満であることを特徴とす
るチップ型インダクタ。1. A coil member having a coil formed of a spiral conductive film formed on an outer circumferential surface of an insulating base in a longitudinal direction, external electrodes provided at both ends of the coil member so as to be connected to coil ends, respectively. A chip-type inductor having an insulating layer for protecting the outer periphery of a coil, wherein the insulating base has a rectangular parallelepiped shape having the same cross-sectional shape over the entire length thereof, and a chip thickness / chip having a chip cross-sectional shape orthogonal to the coil axis. A chip type inductor having a width of less than 1.
体膜からなるコイルを形成したコイル部材と、それぞれ
コイル端部に接続されるようにコイル部材の両端部に設
けた外部電極と、コイルの外周を保護する絶縁層を具備
しているチップ型インダクタにおいて、 前記絶縁基体は、その全長にわたって断面形状が同一の
直方体形状であって、コイル軸に直交するチップ断面形
状のチップ厚/チップ幅が1未満であり、前記外部電極
は、コイル部材の両方の幅広面に絶縁層よりも厚く形成
され、その他の導体膜露出部も含めて半田濡れ性の良好
な材料でメッキ処理されていることを特徴とするチップ
型インダクタ。2. A coil member in which a coil made of a spiral conductive film is formed on a longitudinal outer peripheral surface of an insulating base, external electrodes provided at both ends of the coil member so as to be connected to coil ends, respectively. A chip-type inductor having an insulating layer for protecting the outer periphery of a coil, wherein the insulating base has a rectangular parallelepiped shape having the same cross-sectional shape over the entire length thereof, and a chip thickness / chip having a chip cross-sectional shape orthogonal to the coil axis. The external electrode has a width of less than 1, and the external electrode is formed thicker than the insulating layer on both wide surfaces of the coil member, and is plated with a material having good solder wettability, including other exposed portions of the conductive film. A chip type inductor characterized by the above-mentioned.
が覆い、そのうちの両方の幅広面の第1の絶縁層上のみ
に、コイル部材の幅よりも幅広で且つ表面が平坦な第2
の絶縁層が形成されている請求項2記載のチップ型イン
ダクタ。3. A first insulating layer covering the outer peripheral four side surfaces of the coil member, and the first insulating layer having a wider surface than the coil member and having a flat surface is provided only on the first insulating layer on both of the wide surfaces. 2
3. The chip-type inductor according to claim 2, wherein said insulating layer is formed.
体膜からなるコイルを形成したコイル部材と、それぞれ
コイル端部に接続されるようにコイル部材の両端部に設
けた外部電極と、コイルの外周を保護する絶縁層を具備
しているチップ型インダクタにおいて、 前記絶縁基体は、その全長にわたって断面形状が同一の
直方体形状であって、コイル軸に直交するチップ断面形
状のチップ厚/チップ幅が1未満であり、前記外部電極
は、コイル部材の一方の幅広面のみに絶縁層よりも厚く
形成され、その他の導体膜露出部も含めて半田濡れ性の
良好な材料でメッキ処理されていて、他方の幅広面が他
の側面とは異なる色になっていることを特徴とするチッ
プ型インダクタ。4. A coil member in which a coil made of a spiral conductive film is formed on an outer circumferential surface of an insulating base in a longitudinal direction, external electrodes provided on both ends of the coil member so as to be connected to coil ends, respectively. A chip-type inductor having an insulating layer for protecting the outer periphery of a coil, wherein the insulating base has a rectangular parallelepiped shape having the same cross-sectional shape over the entire length thereof, and a chip thickness / chip having a chip cross-sectional shape orthogonal to the coil axis. The width of the external electrode is less than 1, and the external electrode is formed to be thicker than the insulating layer only on one wide surface of the coil member, and is plated with a material having good solder wettability, including other exposed portions of the conductor film. Wherein the other wide side has a different color from the other side.
幅広面の両端部に無導体部を形成する請求項4記載のチ
ップ型インダクタ。5. The chip-type inductor according to claim 4, wherein conductor-free portions are formed at both ends of the wide surface of the coil member facing the external electrode formation surface.
が覆い、そのうちの外部電極形成面に対向する幅広面の
第1の絶縁層上のみに、コイル部材の幅よりも幅広で且
つ表面が平坦であって第1の絶縁層とは色が異なる第2
の絶縁層が形成されている請求項4又は5記載のチップ
型インダクタ。6. The first insulating layer covers the four outer peripheral sides of the coil member, and is wider than the coil member only on the wide first insulating layer facing the external electrode formation surface. The second has a flat surface and a different color from the first insulating layer.
6. The chip-type inductor according to claim 4, wherein said insulating layer is formed.
らなり、第2の絶縁層が耐熱性樹脂からなる請求項3又
は6記載のチップ型インダクタ。7. The chip-type inductor according to claim 3, wherein the first insulating layer is made of a low-temperature sintered ceramic, and the second insulating layer is made of a heat-resistant resin.
領域のみに形成されており、コイル部材の両端面が導体
で覆われている請求項1乃至7のいずれかに記載のチッ
プ型インダクタ。8. The chip type according to claim 1, wherein the coil is formed only in a region between the two external electrode forming portions, and both end surfaces of the coil member are covered with a conductor. Inductor.
体膜からなるコイルを形成したコイル部材と、それぞれ
コイル端部に接続されるようにコイル部材の両端部に設
けた外部電極と、コイルの外周を保護する絶縁層を具備
しているチップ型インダクタにおいて、 前記絶縁基体は、その全長にわたって断面形状が同一の
直方体形状であって、コイルは絶縁基体の両端近傍のみ
を残して、該絶縁基体のほぼ全長にわたって、外部電極
の内側まで形成されており、コイル部材の両端面が無導
体面になっていることを特徴とするチップ型インダク
タ。9. A coil member in which a coil made of a spiral conductive film is formed on an outer circumferential surface of an insulating base in a longitudinal direction, external electrodes provided at both ends of the coil member so as to be connected to coil ends, respectively. In a chip-type inductor having an insulating layer for protecting an outer periphery of a coil, the insulating base has a rectangular parallelepiped shape having the same cross-sectional shape over the entire length thereof, and the coil is left only near both ends of the insulating base. A chip-type inductor which is formed over substantially the entire length of an insulating base up to the inside of an external electrode, and both end surfaces of a coil member are non-conductive surfaces.
チップ厚/チップ幅が1未満である請求項9記載のチッ
プ型インダクタ。10. The chip-type inductor according to claim 9, wherein the chip thickness / chip width of the chip cross-sectional shape orthogonal to the coil axis is less than 1.
の混合物の硬化膜からなる請求項1乃至10のいずれか
に記載のチップ型インダクタ。11. The chip-type inductor according to claim 1, wherein the external electrode comprises a cured film of a mixture of conductive particles and epoxy resin.
成箇所の一部に、絶縁基体が露出した部分を設け、その
露出した絶縁基体の部分と導体膜の両方の上に外部電極
が形成されている請求項1乃至11のいずれかに記載の
チップインダクタ。12. An exposed portion of an insulating base is provided at a part of an external electrode forming portion near both ends of a coil member, and an external electrode is formed on both the exposed portion of the insulating base and the conductive film. The chip inductor according to claim 1, wherein:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001110051A JP2002313629A (en) | 2001-04-09 | 2001-04-09 | Chip type inductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001110051A JP2002313629A (en) | 2001-04-09 | 2001-04-09 | Chip type inductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002313629A true JP2002313629A (en) | 2002-10-25 |
Family
ID=18961895
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001110051A Pending JP2002313629A (en) | 2001-04-09 | 2001-04-09 | Chip type inductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002313629A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006005297A (en) * | 2004-06-21 | 2006-01-05 | Murata Mfg Co Ltd | Electronic component |
| KR101026034B1 (en) | 2008-07-16 | 2011-03-30 | 주식회사 아모텍 | Chip Shaped Power Inductor |
| CN112967863A (en) * | 2019-12-12 | 2021-06-15 | 三星电机株式会社 | Coil component |
| CN113764169A (en) * | 2020-06-01 | 2021-12-07 | 株式会社村田制作所 | Inductance component and method for manufacturing inductance component |
-
2001
- 2001-04-09 JP JP2001110051A patent/JP2002313629A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006005297A (en) * | 2004-06-21 | 2006-01-05 | Murata Mfg Co Ltd | Electronic component |
| KR101026034B1 (en) | 2008-07-16 | 2011-03-30 | 주식회사 아모텍 | Chip Shaped Power Inductor |
| CN112967863A (en) * | 2019-12-12 | 2021-06-15 | 三星电机株式会社 | Coil component |
| US11842834B2 (en) | 2019-12-12 | 2023-12-12 | Samsung Electro-Mechanics Co., Ltd. | Coil component |
| CN112967863B (en) * | 2019-12-12 | 2024-01-05 | 三星电机株式会社 | Coil assembly |
| CN113764169A (en) * | 2020-06-01 | 2021-12-07 | 株式会社村田制作所 | Inductance component and method for manufacturing inductance component |
| CN113764169B (en) * | 2020-06-01 | 2024-03-12 | 株式会社村田制作所 | Inductance component and method for manufacturing inductance component |
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