JP2002313811A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technique for effectively removing metallic element remaining in a semiconductor film which is obtained by using the metallic element having catalytic action for crystallization of an amorphous semiconductor film. SOLUTION: To remove catalyst element used for crystallization of a semiconductor film having an amorphous structure, a region whereto rare gas element is added, or a semiconductor film whereto rare gas element is added is formed, heat treatment is carried out, and catalyst element is moved there and gettering is accomplished. A thin oxide film is formed in an interface between a semiconductor film whereto rare gas element is added and a semiconductor film having a crystal structure.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device using a semiconductor film having a crystal structure and a manufacturing method thereof, and more specifically, to a thin film transistor (hereinafter, referred to as TFT).
And a method for manufacturing the same.
Note that in this specification, a semiconductor device includes all devices that function using semiconductor characteristics.

[0002]

2. Description of the Related Art In order to form an integrated circuit using a TFT, a technique of forming a semiconductor film having a crystal structure on an insulating surface is regarded as important. The semiconductor film is used to form an active layer of the TFT (including the channel forming region, the source and drain regions, and the like), and the quality itself is a factor directly determining the electrical characteristics of the TFT. It is.

[0003] A method for forming a semiconductor film having a crystal structure includes a method in which an amorphous semiconductor film is once formed and then crystallized by irradiating a laser beam, or a heat treatment using an electric furnace is performed. Is used. However, a semiconductor film manufactured by such a method is composed of a large number of crystal grains, and the crystal orientation cannot be controlled by being oriented in an arbitrary direction. Therefore, carrier movement is not performed smoothly as compared with a single crystal semiconductor, and T
This is a factor that limits the electrical characteristics of the FT.

On the other hand, the technique disclosed in Japanese Patent Application Laid-Open No. Hei 7-183540 is a technique for crystallizing a silicon semiconductor film by adding a metal element such as nickel. It is known that it has the effect of promoting heat and lowering the required temperature. In addition, it is possible to enhance the orientation of the crystal orientation. Fe, Ni, Co, Ru, Rh, Pd, Os, I
It is known to be one or more selected from r, Pt, Cu, and Au.

[0005] However, since a metal element having a catalytic action (herein, referred to as a catalyst element in all cases) is added, the metal element remains in the film of the semiconductor film or on the film surface.
There is a problem that the electrical characteristics of the TFT vary.
For example, there is a problem in that the off-state current of the TFT increases, and there is variation among individual elements. In other words, the metal element having a catalytic action on crystallization is unnecessary once the crystalline semiconductor film is formed.

[0006] The gettering technique using phosphorus makes it possible to remove a metal element added for crystallization from a specific region of a semiconductor film even at a heating temperature of about 500 ° C. For example, by adding phosphorus to the source / drain region of the TFT and performing a heat treatment at 450 to 700 ° C.
The metal element added for crystallization can be easily removed from the element formation region. One example of such a technique is disclosed in Japanese Patent No. 3032801.

The gettering technique includes an extrinsic gettering for giving a gettering effect by applying a strain field or a chemical action to a silicon wafer from the outside, and a strain of a lattice defect involving oxygen generated inside the wafer. Intrinsic gettering using a place is known. For extrinsic gettering,
Back side of silicon wafer (opposite side of device)
There are known a method of causing mechanical damage to the substrate, a method of forming a polycrystalline silicon film, and a method of diffusing phosphorus. There is also known a gettering technique in which a strain field is formed by secondary lattice defects formed by ion implantation. These technologies have been developed as large-scale integrated circuit manufacturing technologies using single-crystal silicon substrates, and have been developed to date, including the empirical elements on the premise of using silicon wafers. is there. In any case, the gettering is performed by moving metal impurities and the like contained in the semiconductor with some energy and concentrating them in a predetermined region (gettering site), so that the metal impurity in the element forming region (gettered region) can be obtained. This is to reduce the concentration.

[0008]

Phosphorus is an element used in many semiconductor devices to form an n-type semiconductor region as a donor and known as a dopant. Therefore, gettering using phosphorus can be relatively easily incorporated into a TFT manufacturing process. The gettering using phosphorous makes it possible to remove a metal element introduced into a semiconductor film for crystallization of silicon by a heat treatment at 550 ° C. for about 4 hours. However, the concentration of phosphorus that must be added to the semiconductor film for this purpose is 1 × 10 ²⁰ / cm ³ or more, and preferably 1 × 10 ²¹ / cm ³ , which increases the processing time required for doping. there were. Further, the addition of phosphorus by an ion implantation method or an ion doping method (refers to a method in which mass separation of implanted ions is not performed in this specification) causes a semiconductor film to become amorphous and a high concentration of phosphorus. The addition made subsequent recrystallization difficult.

The present invention is a means for solving such a problem, and effectively removes a metal element remaining in a semiconductor film obtained by using a metal element having a catalytic action on crystallization of the semiconductor film. The purpose is to provide a technique for removing.

[0010]

In order to solve the above-mentioned problems, the present invention provides a method for removing a catalytic element used for crystallization of a semiconductor film having an amorphous structure. It is characterized in that a semiconductor film is formed, a catalytic element is moved there, and gettering is completed.

Specifically, a method for manufacturing a semiconductor device according to the present invention comprises the steps of: forming a first semiconductor film containing silicon as a main component and having an amorphous structure on a substrate having an insulating surface; A step of adding a catalytic element for promoting crystallization of silicon to the semiconductor film to form a first semiconductor film having a crystal structure by a first heat treatment; and a step of forming a surface of the first semiconductor film having the crystal structure. Forming a barrier layer on the
A step of forming a second semiconductor film over the barrier layer, and adding a rare gas element to the second semiconductor film at the same time as or after the film formation, and performing gettering by a second heat treatment. The method includes a step of moving the catalyst element to the second semiconductor film, a step of removing the second semiconductor film, and a step of removing the barrier layer.

Alternatively, a step of forming a first semiconductor film containing silicon as a main component and having an amorphous structure on a substrate having an insulating surface, and adding a catalyst element for promoting crystallization of silicon to the first semiconductor film. Adding, forming a first semiconductor film having a crystal structure by a first heat treatment, irradiating a first semiconductor film laser beam having the crystal structure, and forming a first semiconductor film having the crystal structure. Forming a barrier layer on the surface of the semiconductor film, forming a second semiconductor film on the barrier layer, and forming a rare gas element on the second semiconductor film simultaneously with or after the film formation. Adding, performing gettering by a second heat treatment to move the catalytic element to the second semiconductor film, removing the second semiconductor film, and removing the barrier layer. Contains.

[0013] Alternatively, a step of forming a first semiconductor film containing silicon as a main component and having an amorphous structure on a substrate having an insulating surface, and adding a catalyst element for promoting crystallization of silicon to the first semiconductor film. Adding, forming a first semiconductor film having a crystalline structure by a first heat treatment, forming a barrier layer on a surface of the first semiconductor film having the crystalline structure, Forming a third semiconductor film at the same time, or adding a rare gas element to the second semiconductor film at the same time as or after the film formation, and performing gettering by a second heat treatment to remove the catalyst element from the second semiconductor film. Transferring to a second semiconductor film, removing the second semiconductor film, removing the barrier layer, and irradiating the first semiconductor film having the crystal structure with laser light. Contains.

Alternatively, a step of forming a first semiconductor film containing silicon as a main component and having an amorphous structure on a substrate having an insulating surface, and crystallizing silicon on the first semiconductor film having the amorphous structure. Adding a catalyst element that promotes the following steps: a step of forming a barrier layer on the surface of the first semiconductor film having the amorphous structure; and a step of forming a second semiconductor film on the barrier layer. A step of adding a rare gas element to the second semiconductor film at the same time as or after the film formation, and a heat treatment for crystallizing the first semiconductor film having the amorphous structure to form a first semiconductor film having a crystalline structure. Forming the semiconductor film and moving the catalytic element to the second semiconductor film; removing the second semiconductor film; removing the barrier layer; Laser on 1 semiconductor film And a step of irradiating.

Alternatively, a step of adding a catalytic element for promoting crystallization of silicon to the insulating surface, and forming a first semiconductor film containing silicon as a main component and having an amorphous structure on the substrate having the insulating surface. Forming a barrier layer on a surface of the first semiconductor film having the amorphous structure;
Forming a second semiconductor film on the first semiconductor film having the amorphous structure, adding a rare gas element to the second semiconductor film simultaneously with or after the film formation, Crystallizing the first semiconductor film having the amorphous structure by processing to form a first semiconductor film having a crystalline structure, and moving the catalyst element to the second semiconductor film; 2) removing the semiconductor film, removing the barrier layer, and irradiating the first semiconductor film having the crystal structure with laser light.

The barrier layer may be formed by oxidizing the surface with ozone water such as a chemical oxide, or oxidizing the surface by oxidizing the surface by plasma treatment or irradiating ultraviolet rays in an atmosphere containing oxygen to generate ozone. Also,
Sputtering of silicon oxide film etc. or plasma CV
It may be formed by the D method.

As the rare gas element added to form the gettering site, one or more selected from He, Ne, Ar, Kr, and Xe are used. These rare gas elements are added by an ion implantation method or an ion doping method, or are incorporated at the same time as the formation of the second semiconductor film.

The first heat treatment for crystallization is performed by radiating one or more of a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high-pressure sodium lamp, and a high-pressure mercury lamp. LRTA method, a GRTA method using an inert gas such as nitrogen or argon as a heating medium, or a furnace annealing method using an electric heating furnace.

The first heat treatment for gettering is performed by radiation from one or more selected from a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high-pressure sodium lamp, and a high-pressure mercury lamp. LRTA method or GRT using an inert gas such as nitrogen or argon as a heating medium
The method A is employed, or the furnace annealing method using an electric heating furnace is employed.

The semiconductor device of the present invention obtained by such a manufacturing method has a semiconductor film having a crystal structure on an insulating surface, and the concentration of oxygen contained in the semiconductor film is 5 × 1.
0 ¹⁸ / cm ³ or less, characterized by having a region containing a rare gas element at a concentration of 1 × 10 ¹³ to 1 × 10 ²⁰ / cm ³ in or near the surface of the semiconductor film. .

Another structure is a semiconductor device having a semiconductor film having a crystal structure on an insulating surface, wherein the semiconductor film is a thin rod-shaped crystal or a thin flat rod-shaped crystal, and the concentration of oxygen contained in the semiconductor film is 5 × 10 ¹⁸ / cm ³ or less, characterized by having a region containing a rare gas element at a concentration of 1 × 10 ¹³ to 1 × 10 ²⁰ / cm ³ inside or near the surface of the semiconductor film. And

In another structure, in a semiconductor device having a semiconductor film having a crystal structure on an insulating surface, a gate insulating film, and a gate electrode, the semiconductor film has a structure in which oxygen overlaps with the gate electrode. At a concentration of 5 × 10 ¹⁸ / cm ³ or less, and the rare gas element is 1 × 1 in the inside of the semiconductor film or in the vicinity of the interface with the gate insulating film.
It is characterized by having an area contained at a concentration of 0 ¹³ to 1 × 10 ²⁰ / cm ³ .

Another structure is a semiconductor device having a semiconductor film having a crystal structure on an insulating surface, a gate insulating film, and a gate electrode, wherein the semiconductor film is a thin rod-shaped crystal or a thin flat rod-shaped crystal. In a region overlapping with the gate electrode, oxygen is contained at a concentration of 5 × 10 ¹⁸ / cm ³ or less, and a rare gas element is 1 × 10 ¹³ inside the semiconductor film or near an interface with the gate insulating film. ~ 1 × 1
It is characterized by having an area contained at a concentration of 0 ²⁰ / cm ³ .

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [Embodiment 1] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a view for explaining an embodiment of the present invention. A method in which a metal element having a catalytic action is added to the entire surface of a semiconductor film having an amorphous structure, crystallized, and then gettering is performed. is there.

In FIG. 1A, the material of the substrate 100 is not particularly limited, but barium borosilicate glass, aluminoborosilicate glass, quartz, or the like can be preferably used. An inorganic insulating film having a thickness of 10 to 200 nm is formed as a blocking layer 101 on the surface of the substrate 100. One example of a suitable blocking layer is a silicon oxynitride film formed by a plasma CVD method.
A first silicon oxynitride film made of iH ₄ , NH ₃ and N ₂ O is formed to a thickness of 50 nm, and a _second silicon oxynitride film made of SiH ₄ and N ₂ O is formed to a thickness of 100 nm. Apply the formed one. The blocking layer 101 is provided so that the alkali metal contained in the glass substrate does not diffuse into the semiconductor film formed thereover. The blocking layer 101 can be omitted when quartz is used as the substrate.

A semiconductor film (first semiconductor film) 102 having an amorphous structure formed on the blocking layer 101 is
A semiconductor material containing silicon as a main component is used. Typically, an amorphous silicon film or an amorphous silicon germanium film is applied, and a plasma CVD method, a low-pressure CVD method,
Alternatively, it is formed to a thickness of 10 to 100 nm by a sputtering method. In order to obtain high-quality crystals, the concentration of impurities such as oxygen and nitrogen contained in the semiconductor film 102 having an amorphous structure is preferably reduced to 5 × 10 ¹⁸ / cm ³ or less. These impurities are factors that hinder the crystallization of the amorphous semiconductor and increase the density of trapping centers and recombination centers even after crystallization. For this purpose, it is desirable to use not only a high-purity material gas but also an ultra-high vacuum-compatible CVD apparatus provided with a mirror surface treatment (electric polishing treatment) in the reaction chamber and an oil-free vacuum exhaust system.

Thereafter, the semiconductor film 10 having an amorphous structure
To the surface of 2, a metal element having a catalytic action to promote crystallization is added. Metal elements having a catalytic action to promote crystallization of a semiconductor film include iron (Fe), nickel (Ni), cobalt (Co), ruthenium (Ru), and rhodium (R).
h), palladium (Pd), osmium (Os), iridium (Ir), platinum (Pt), copper (Cu), gold (A
u) and the like, and one or more selected from them can be used. Typically, nickel is used, and a nickel acetate salt solution containing 1 to 100 ppm by weight of nickel is applied by a spinner to form the catalyst-containing layer 103. In this case, in order to improve the familiarity of the solution, as a surface treatment of the semiconductor film 102 having an amorphous structure, an extremely thin oxide film is formed using an aqueous solution containing ozone, and the oxide film is formed using hydrofluoric acid and aqueous hydrogen peroxide. After forming a clean surface by etching with a mixed solution of the above, an ultrathin oxide film is formed by treating again with an ozone-containing aqueous solution. Since the surface of a semiconductor film such as silicon is hydrophobic in nature, a nickel acetate solution can be uniformly applied by forming an oxide film in this manner.

Of course, the catalyst-containing layer 103 is not limited to such a method, and may be formed by a sputtering method, an evaporation method, a plasma treatment, or the like. Further, the catalyst containing layer 103
May be formed before forming the semiconductor film 102 having an amorphous structure, that is, on the blocking layer 101.

A heat treatment for crystallization is performed while the semiconductor film 102 having an amorphous structure and the catalyst-containing layer 103 are kept in contact with each other. Examples of the heat treatment method include a furnace annealing method using an electric heating furnace, a halogen lamp,
Rapid thermal annealing using a metal halide lamp, xenon arc lamp, carbon arc lamp, high pressure sodium lamp, high pressure mercury lamp, etc.
ing) method (LRTA method). Alternatively, a gas heating type rapid thermal annealing method (GRTA method) is employed. Considering productivity, it is considered preferable to employ the LRTA method or the GRTA method.

When the LRTA method is used, the lamp light source for heating is turned on for 1 to 60 seconds, preferably 30 to 60 seconds, and the lighting is repeated 1 to 10 times, preferably 2 to 6 times.
Although the light emission intensity of the lamp light source is arbitrary, the semiconductor film instantaneously has a temperature of 600 to 1000 ° C., preferably 650 to 1000 ° C.
Heat to about 750 ° C. Even at such a high temperature, the semiconductor film is only heated instantaneously, and the substrate 100 itself is not distorted and deformed. In this manner, the semiconductor film having an amorphous structure is crystallized, so that a semiconductor film (first semiconductor film) 104 having a crystal structure illustrated in FIG. 1B can be obtained. This can be achieved only by providing a catalyst-containing layer.

In the case where the furnace annealing method is used as another method, one hour at 500 ° C. prior to the heat treatment.
Heat treatment is performed for about time to release hydrogen contained in the semiconductor film 102 having an amorphous structure. Then, crystallization is performed by performing a heat treatment at 550 to 600 ° C., preferably 580 ° C. for 4 hours in a nitrogen atmosphere using an electric furnace. Thus, a semiconductor film (first semiconductor film) 104 having a crystal structure illustrated in FIG. 1B is formed.

In order to further increase the crystallization rate (the ratio of the crystal component to the total volume or area of the film) and to repair the defects remaining in the crystal grains, the crystal structure is increased as shown in FIG. Irradiating continuous oscillation or pulse oscillation laser light to the semiconductor film 104 having the
The excimer laser light or less than the wavelength 400nm for laser, YAG laser is a solid laser, YVO ₄ laser, YAlO ₃ laser or YLF second laser
Harmonics and third harmonics are used. The continuous wave laser light is
The second and third harmonics of the above-described solid-state laser are condensed and irradiated in a linear or elliptical shape.

When a continuous wave YVO ₄ laser is used, it is converted to a second harmonic by a wavelength conversion element and
Crystallization is performed by scanning with an energy beam of W at a speed of 1 to 100 cm / sec.

In the case of using a pulse oscillation excimer laser, a pulse laser beam having a repetition frequency of about 10 to 1000 Hz is used, and the laser beam is irradiated by an optical system for 100 times.
Laser processing may be performed on the semiconductor film 104 having a crystal structure with a concentration of about 400 mJ / cm ² and an overlap ratio of 90 to 95%.

In the semiconductor film (first semiconductor film) 105 having a crystal structure obtained in this way, a catalytic element (here, nickel) remains. It is not evenly distributed in the film, but as an average concentration,
It remains at a concentration exceeding 1 × 10 ¹⁹ / cm ³ . Of course, even in such a state, various semiconductor elements including the TFT can be formed. However, the element is removed by gettering by a method described below.

First, as shown in FIG. 1D, a thin barrier layer 106 is formed on the surface of a semiconductor film 105 having a crystal structure. The thickness of the barrier layer is not particularly limited, but may be simply replaced with a chemical oxide formed by treatment with ozone water. Alternatively, chemical oxides can be formed similarly by treating with an aqueous solution in which a hydrogen peroxide solution is mixed with sulfuric acid, hydrochloric acid, nitric acid, or the like. As another method, the plasma treatment in an oxidizing atmosphere or the oxidation treatment by generating ozone by ultraviolet irradiation in an oxygen-containing atmosphere may be performed. Further, a barrier layer may be formed by heating to about 200 to 350 ° C. using a clean oven to form a thin oxide film. Alternatively, an oxide film of about 1 to 5 nm may be deposited as a barrier layer by a plasma CVD method, a sputtering method, an evaporation method, or the like.

A semiconductor film (second semiconductor film) 107 is formed thereon by plasma CVD or high-frequency sputtering.
It is formed with a thickness of about 250 nm. Typically, an amorphous silicon film is selected. Since the semiconductor film 107 is removed later, it is preferable that the film be low in density in order to increase the etching selectivity with respect to the semiconductor film 105 having a crystal structure. For example, when an amorphous silicon film is formed by a plasma CVD method, the substrate temperature is set to about 100 to 200 ° C., and 25 to 40 atomic% of hydrogen is contained in the film.
The same applies to the case where the sputtering method is employed. A large amount of hydrogen can be contained in a film by sputtering at a substrate temperature of 200 ° C. or lower with a mixed gas of argon and hydrogen. When a rare gas element is added at the time of film formation by a sputtering method or a plasma CVD method, the rare gas element can be incorporated into the film at the same time. A gettering site can be formed with the rare gas element thus taken in.

Thereafter, the rare gas element is added to the semiconductor film 107 in an amount of 1 × 10 ²⁰ or less by ion doping or ion implantation.
It is added so as to be contained at a concentration of 2.5 × 10 ²² / cm ³ .
Although the acceleration voltage is arbitrary, the ions of the rare gas to be implanted pass through the semiconductor film 107 and the barrier layer 106 because it is a rare gas element, and a part of the semiconductor film 1 has a crystalline structure.
You can reach 05. Since the rare gas element itself is inert in the semiconductor film, even if there is a region near the surface of the semiconductor film 105 at a concentration of about 1 × 10 ¹³ to 1 × 10 ²⁰ / cm ³ , There is no significant effect on device characteristics.

Helium (He), neon (Ne), argon (Ar), krypton (K)
r) or one or more selected from xenon (Xe). The present invention is characterized in that these rare gas elements are used as an ion source to form a gettering site and are implanted into a semiconductor film by an ion doping method or an ion implantation method. There are two meanings to implant ions of these rare gas elements. One is to form a dangling bond by implantation to give a strain to the semiconductor film, and the other is to give a strain by implanting the ion between lattices of the semiconductor film. Injection of an inert gas ion can satisfy both of them simultaneously, but in particular, the latter is argon (Ar), krypton (Kr), xenon (X
This is remarkably obtained when an element having a larger atomic radius than silicon, such as e), is used.

In order to surely achieve the gettering, it is necessary to perform a heat treatment thereafter. The heat treatment is performed by a furnace annealing method, an LRTA method, or a GRTA method. In the case of performing the furnace annealing method, a heat treatment is performed in a nitrogen atmosphere at 450 to 600 ° C. for 0.5 to 12 hours. When the LRTA method is used, a lamp light source for heating is turned on for 1 to 60 seconds, preferably 30 to 60 seconds, and this is repeated 1 to 10 times, preferably 2 to 6 times.
Although the light emission intensity of the lamp light source is arbitrary, the semiconductor film is instantaneously at 600 to 1000 ° C., preferably 700 to 1000 ° C.
Heat to about 750 ° C.

In the gettering, the catalytic element in the region to be gettered (capture site) is released by thermal energy and moves to the gettering site by diffusion. Therefore, gettering depends on the processing temperature, and the higher the temperature, the faster the gettering proceeds. FIG.
As shown by the arrow in (E), the direction in which the catalytic element moves is a distance of about the thickness of the semiconductor film, and the gettering is completed in a relatively short time. The upper limit of the processing temperature needs to consider the heat resistance of the substrate and the temperature at which the rare gas element contained in the semiconductor film 107 is not thermally released. When a glass substrate is used, when the furnace annealing is used, 7
The temperature should be lower than or equal to 00 ° C., and lower than or equal to 800 ° C. when performing the LRTA or GRTA method. Of course, when a quartz substrate is used, it can be instantaneously heated to 1000 ° C.

It should be noted that even with this heat treatment, 1 × 10 ²⁰ / c
The semiconductor film 107 containing a rare gas element at a concentration of m ³ or more does not crystallize. This is considered to be because the rare gas element is not re-emitted even in the above-mentioned processing temperature range and remains in the film to inhibit crystallization of the semiconductor film.

Thereafter, the amorphous semiconductor 107 is selectively etched and removed. As an etching method, C
Dry etching without plasma using IF ₃ or wet etching with an alkaline solution such as an aqueous solution containing hydrazine or tetraethylammonium hydroxide (chemical formula (CH ₃ ) ₄ NOH) can be performed. At this time, the barrier layer 106 functions as an etching stopper. After that, the barrier layer 106 may be removed with hydrofluoric acid.

In this manner, as shown in FIG. 1F, a semiconductor film 108 having a crystal structure in which the concentration of the catalytic element is reduced to 1 × 10 ¹⁷ / cm ³ or less can be obtained. The semiconductor film 108 having the crystal structure thus formed is formed as a thin rod-shaped crystal or a thin flat rod-shaped crystal by the action of a catalytic element, and each crystal grows in a specific direction when viewed macroscopically. The semiconductor film 108 having such a crystal structure can be applied to not only an active layer of a TFT but also a photoelectric conversion layer of a photosensor or a solar cell. Further, the present invention can be applied to a gettering process for a semiconductor layer having an SOI (Silicon on Insulator) structure.

[Embodiment 2] FIG. 11 is a view for explaining an embodiment of the present invention. After a semiconductor film having a crystal structure is formed by heat treatment, gettering is performed, and further, intense light such as laser light is applied. A method for improving the crystallinity by the irradiation of the light will be described. In FIG. 11, the description will be made using the same reference numerals as those in FIG. 1 used in the description of the first embodiment.

FIGS. 11A and 11B show a process similar to that of the first embodiment, in which a blocking layer 101, a semiconductor film 102 having an amorphous structure, and a layer containing a catalyst element are formed on a substrate 100. After the formation of the semiconductor film 103, a semiconductor film 104 having a crystal structure is formed by heat treatment.

Thereafter, as shown in FIG. 11C, a barrier layer 106 is formed on the surface of the semiconductor film (first semiconductor film) 104 having a crystal structure, and further a semiconductor film 107 is formed. A rare gas element is ion-implanted or ion-doped into the semiconductor film 107 at 1 × 10 ^{20 to} 2.5 × 10 ²² / cm ^3.
To be contained at a concentration of

Then, as shown in FIG. 11D, heat treatment is performed by furnace annealing, LRTA, or GRTA. In the case of performing the furnace annealing method, a heat treatment is performed in a nitrogen atmosphere at 450 to 600 ° C. for 0.5 to 12 hours. When the LRTA method is used, a lamp light source for heating is turned on for 1 to 60 seconds, preferably 30 to 60 seconds, and this is repeated 1 to 10 times, preferably 2 to 6 times. The light emission intensity of the lamp light source is arbitrary.
Heat to about 00 to 750 ° C. In addition, a continuous oscillation or pulse oscillation YAG laser, YL
Second harmonic of F laser and YVO ₄ laser (wavelength 53
(2 nm), gettering can be performed.
In gettering, the catalytic element at the capture site is released by thermal energy and moves to the gettering site by diffusion. Therefore, gettering depends on the processing temperature,
The higher the temperature, the faster gettering proceeds. As shown by the arrow in FIG. 11D, the direction in which the catalyst element moves is a distance about the thickness of the semiconductor film,
Gettering is completed in a relatively short time.

It should be noted that even with this heat treatment, 1 × 10 ²⁰
The semiconductor film (second semiconductor film) 107 containing a rare gas element at a concentration of / cm ³ or more does not crystallize. This is considered to be because the rare gas element is not re-emitted even in the above-mentioned processing temperature range and remains in the film to inhibit crystallization of the semiconductor film.

After that, the semiconductor film 107 is selectively etched and removed. As an etching method, ClF
_{3 can be performed} by dry etching without using plasma, or wet etching with an alkali solution such as an aqueous solution containing hydrazine or tetraethylammonium hydroxide (chemical formula (CH ₃ ) ₄ NOH). At this time, the barrier layer 106 functions as an etching stopper. After that, the barrier layer 106 may be removed with hydrofluoric acid.

In order to further increase the crystallization ratio (the ratio of crystal components in the total volume of the film) and repair defects remaining in the crystal grains, a semiconductor film having a crystal structure as shown in FIG. It is also effective to irradiate 104 with laser light. An excimer laser beam having a wavelength of 400 nm or less, or a second or third harmonic of a YAG laser is used as the laser. In any case, the repetition frequency is 10 to 1
Using a pulse laser light of about 000 Hz, the laser light is focused to 100 to 400 mJ / cm ² by an optical system,
Irradiation is performed at an overlap rate of 95% to form a semiconductor film 111 having a crystal structure.

[Embodiment 3] FIG. 14 is a view for explaining an embodiment of the present invention, in which a metal element having a catalytic action is added to the entire surface of a semiconductor film having an amorphous structure and crystallized. And gettering at the same time.

First, as shown in FIG. 14A, a catalytic element containing layer 302 is formed on a blocking layer 301.
This may be formed by applying an aqueous solution or an alcohol solution containing a catalytic element by a spinner, or may be formed by a sputtering method, an evaporation method, a plasma treatment, or the like.

Thereafter, as shown in FIG. 14B, a semiconductor film (first semiconductor film) 303 having an amorphous structure is formed to a thickness of 10 to 100 nm by a plasma CVD method, a low pressure CVD method, or a sputtering method. Formed. Further, a barrier layer 304 is formed. These forming methods are the same as in the first embodiment.

As shown in FIG. 14C, a semiconductor film (second semiconductor film) 305 is formed thereon with a thickness of 25 to 250 nm by a plasma CVD method or a sputtering method. Typically, an amorphous silicon film is selected. This semiconductor film 3
Since 05 is also removed later, it is desirable to form a film having a low density.

Thereafter, the rare gas element is added to the semiconductor film 305 in an amount of 1 × 10 ^20-
It is added so as to be contained at a concentration of 2.5 × 10 ²² / cm ³ .
Although the acceleration voltage is arbitrary, the ions of the rare gas to be implanted pass through the semiconductor film 305 and the barrier layer 304 because of the rare gas element, and reach a part of the semiconductor film 303 having an amorphous structure. No problem. Since the rare gas element itself is inert in the semiconductor film, the semiconductor film 303
Even when a region in the vicinity of the surface of the contained at a concentration of about ^{1 × 10 18 ~1 × 10 20} / cm 3, not significantly affect device characteristics.

Then, a heat treatment is performed as shown in FIG. The heat treatment is performed by a furnace annealing method using an electric heating furnace or an LRTA method using a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high-pressure sodium lamp, a high-pressure mercury lamp, or the like. Alternatively, the heat treatment is performed by a GRTA method using nitrogen, argon, or the like as a heating medium.

When the LRTA method is used, the lamp light source for heating is turned on for 1 to 60 seconds, preferably 30 to 60 seconds, and the lighting is repeated 1 to 10 times, preferably 2 to 6 times.
The emission intensity of the lamp light source is arbitrary, but the semiconductor film is instantaneously at 600 to 1000 ° C., preferably 650 to 1000 ° C.
Heat to about 750 ° C. Even at such a high temperature, the semiconductor film is only heated instantaneously, and the substrate 100 itself is not distorted and deformed. In the case of using the furnace annealing method, heat treatment is performed at 500 ° C. for about 1 hour before the heat treatment to release hydrogen contained in the semiconductor film 303 having an amorphous structure. Then, using an electric furnace, in a nitrogen atmosphere at 550 to 600 ° C, preferably 580 ° C.
For 4 hours for crystallization.

By this heat treatment, the catalyst element seeps into the semiconductor film 303 having an amorphous structure, and is crystallized toward the semiconductor film 305 (arrow 30 in FIG. 14D).
7 direction) diffuse. Thereby, crystallization and gettering are performed simultaneously by one heat treatment.

After that, the semiconductor film 305 is selectively etched and removed. As an etching method, ClF
_{3 can be performed} by dry etching without using plasma, or wet etching with an alkali solution such as an aqueous solution containing hydrazine or tetraethylammonium hydroxide (chemical formula (CH ₃ ) ₄ NOH). At this time, the barrier layer 304 functions as an etching stopper. The barrier layer 304 may be removed with hydrofluoric acid thereafter.

As shown in FIG. 14E, a semiconductor film (first semiconductor film) 306 having a crystal structure in which the concentration of the catalytic element has been reduced to 1 × 10 ¹⁷ / cm ³ or less can be obtained. In order to increase the crystallinity of the semiconductor film 306 having this crystal structure, laser light irradiation may be performed as in Embodiment 1.

The semiconductor film 306 having a crystal structure thus formed is formed as a thin rod-shaped or thin flat rod-shaped crystal by the action of a catalytic element. ing. The semiconductor film 306 having such a crystal structure can be applied to not only an active layer of a TFT but also a photoelectric conversion layer of a photosensor or a solar cell.

[Embodiment 4] In Embodiment 1 or 2, after a blocking layer and a semiconductor film 102 having an amorphous structure are formed on a substrate 101, as shown in FIG. Thin barrier layer 1 on the surface of semiconductor film 102
09, and an acceptor or donor of about 1 × 10 ¹⁶ to 1 × 10 ¹⁸ / cm ³ may be added by an ion doping method or an ion implantation method. This is for the purpose of controlling the valence electrons of the semiconductor film after the semiconductor film 102 having an amorphous structure is crystallized, and can be applied, for example, when controlling the threshold voltage of a TFT. .

Thereafter, a semiconductor film having a crystal structure may be formed in the same manner as in Embodiment Mode 1 or 2. Or,
The steps after FIG. 14B may be performed in the same manner as in Embodiment Mode 3 to form a semiconductor film having a crystal structure.

[Embodiment 5] In Embodiments 1 to 3,
To form a semiconductor film having a crystal structure as shown in FIG.
After that, 1 is formed by ion doping or ion implantation.
× 10¹⁶~ 1 × 10 ¹⁸/cm^ThreeDegree of acceptor or donor
May be added. This is a semiconductor film with a crystalline structure
The purpose of the present invention is to control the valence electrons of
Similarly, it is applied when controlling the threshold voltage of a TFT.
Can be

The one conductivity type impurity element added here is activated by heat treatment at 400 to 600 ° C., and can function as an acceptor or a donor.

[0067]

[Embodiment 1] An example of a method for simultaneously manufacturing a pixel portion and TFTs (n-channel TFT and p-channel TFT) of a driver circuit provided around the pixel portion on the same substrate by using the present invention. Will be described with reference to FIGS. 4 to 8 and FIG.

In FIG. 4A, a substrate 201 can be a glass substrate, a quartz substrate, a ceramic substrate, or the like. Alternatively, a silicon substrate, a metal substrate, or a stainless steel substrate on which an insulating film is formed may be used. When a glass substrate is used, one having a thickness of 0.5 to 1.1 mm is adopted, but it is necessary to reduce the thickness for the purpose of weight reduction. In order to further reduce the weight, it is desirable to use a material having a specific gravity as small as 2.37 g / cc.

Then, as shown in FIG.
A blocking layer 202 made of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film (SiO _x N _y ) is formed on 1. A typical example has a two-layer structure as the blocking layer 202. The first silicon oxynitride film 202a formed by using SiH ₄ , NH ₃ , and N ₂ O as a reaction gas has a thickness of 50 to 100 nm, SiH ₄ , and N 2. ₂ O
Silicon oxynitride film 2 formed by using as a reaction gas
02b having a thickness of 100 to 150 nm.

As a semiconductor film used as an active layer, a semiconductor film having a crystal structure manufactured according to any one of Embodiment Modes 1 to 5 is used.
06 is formed. The thickness of this semiconductor film is 20 to 100 n
m, preferably 30 to 60 nm.

Next, the semiconductor layer 203 separated into islands is formed.
The gate insulating film 207 covering the layers 206 to 206 is formed. The gate insulating film 207 is formed by a plasma CVD method or a sputtering method, and has a thickness of 40 to 150 nm and is formed of an insulating film containing silicon. Of course, as the gate insulating film, an insulating film containing silicon can be used as a single layer or a stacked structure. When a silicon oxide film is used, TEOS (Tetraethyl Ortho Silicon
e) and O ₂ were mixed, the reaction pressure was 40 Pa, and the substrate temperature was 300.
It can be formed by discharging at a high-frequency (13.56 MHz) power density of 0.5 to 0.8 W / cm ² . The silicon oxide film thus manufactured can obtain good characteristics as a gate insulating film by thermal annealing at 400 to 500 ° C. after formation.

On the gate insulating film 207, a film thickness of 20 to 10
Tantalum nitride (TaN) 20 as a first conductive film of 0 nm
8 and tungsten (W) 209 as a second conductive film having a thickness of 100 to 400 nm. Ta, W, Ti, M are used as conductive materials for forming the gate electrode.
It is formed of an element selected from o, Al, and Cu, or an alloy material or a compound material containing the element as a main component. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. Also, the first
Is formed of a tantalum (Ta) film, the second conductive film is a W film, the first conductive film is formed of a tantalum nitride (TaN) film, and the second conductive film is formed of an Al film. Alternatively, the first conductive film may be formed of a tantalum nitride (TaN) film and the second conductive film may be formed of a Cu film.

Next, as shown in FIG. 4B, a mask 210 made of resist is formed by a light exposure process, and a first etching process for forming a gate electrode and a wiring is performed. ICP (Inductively Coupled Pl)
(asma: inductively coupled plasma) An etching method is preferably used. The etching gas used is not limited, but may be W or Ta.
It is suitable to use CF ₄ , Cl ₂ and O ₂ for N etching. Each gas flow ratio is 25/25/10
(SCCM) and 500W to coil type electrode at 1Pa pressure
RF (13.56 MHz) power is applied to generate plasma to perform etching. A 150 W RF (13.56 MHz) power is also applied to the substrate side (sample stage) and a substantially negative self-bias voltage is applied. The W film is etched under the first etching conditions to make the end of the first conductive layer tapered.

Thereafter, the etching conditions were changed to the second etching conditions, CF ₄ and Cl ₂ were used as etching gases, the respective gas flow ratios were set to 30/30 (SCCM), and the coil-type electrode was formed at a pressure of 1 Pa. An RF (13.56 MHz) power of 500 W is supplied to generate plasma, and etching is performed for about 30 seconds. 20 W RF (13.
(56 MHz) power is applied and a substantially negative self-bias voltage is applied. Under the second etching condition in which CF ₄ and Cl ₂ are mixed, the W film and the TaN film are etched to the same extent. Note that in order to perform etching without leaving a residue on the gate insulating film, the etching time is preferably increased by about 10 to 20%.

In the first etching process, by making the shape of the mask made of resist suitable,
The ends of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. By this first etching process, first-shaped conductive layers 211 to 215 (first conductive layers 211a to 215a and second conductive layers 211b to 211) formed of a first conductive layer and a second conductive layer are formed.
15b) is formed. In the gate insulating film, a region which is not covered with the first shape conductive layers 211 to 215 is etched to be thin by about 20 to 50 nm.

Then, a first n-type semiconductor region is formed using the first shape conductive layer as a mask. The conditions of the ion doping method in the first doping process for forming this are that the dose is 5 × 10 ^{14 to} 5 × 10 ¹⁵ / cm ² (typically 1 × 10 ¹⁵ / cm ² ) Voltage is 60-100keV
Is doped with phosphorus. Here, an impurity region is formed in each semiconductor layer by utilizing a difference in thickness between the first shape conductive layers 211 to 215 and the gate insulating film. Thus, the first n
Form semiconductor regions 216 to 219 are formed. This first n
Phosphorus is added to the type semiconductor region in a concentration range of 1 × 10 ²⁰ to 1 × 10 ²¹ / cm ³ .

Next, a second etching process is performed as shown in FIG. 5A without removing the resist mask 210. Using CF ₄ , Cl _2, and O _{2 as} etching gases, the respective gas flow rates are set to 20/20/20 (SCCM), and 500 W of RF (1
(3.56 MHz) power is supplied to generate plasma to perform etching. 20W R on the substrate side (sample stage)
F (13.56 MHz) power is applied, and a lower self-bias voltage is applied than in the first etching process. This third
The W film is etched under the above etching conditions. Thus, the W film is anisotropically etched to form the second shape conductive layer 2.
20 to 224 (the first conductive layers 220a to 224a and the second
Of the conductive layers 220b to 224b). The gate insulating film that is not covered by the second shape conductive layers 220 to 224 is further etched to a thickness of about 20 to 50 nm and becomes thinner.

Then, the resist mask is removed.
Without performing a second doping process, the semiconductor layer with a donor
Is added. Doping treatment is ion doping method,
Alternatively, ion implantation may be used. Ion doping method
The condition is a dose of 1.5 × 10¹⁴/cm^TwoAnd the acceleration voltage
The operation is performed at 60 to 100 keV. In this case, the second shape
The conductive layers 220b to 223b serve as a mask for phosphorus,
The second n-type semiconductor regions 225 to 228 are formed in a self-aligned manner.
Is done. 1 × 10¹⁶~ 1 × 10 ¹⁸/cm^Threeof
Add an impurity element of periodic table 15 such as phosphorus in the concentration range
You.

Thereafter, a mask 229 is formed, and a third etching process is performed. SF ₆ and Cl _{2 as} etching gas
And a gas flow ratio of 50/10 (SCCM), and a RF of 500 W applied to the coil-type electrode at a pressure of 1.3 Pa.
(13.56 MHz) Power is supplied to generate plasma, and etching is performed for about 30 seconds. Substrate side (sample stage)
, A 10 W RF (13.56 MHz) power is applied, and a substantially negative self-bias voltage is applied. Thus, the second shape conductive layer 220a is formed according to the third etching condition.
And 222a to 224a are etched to form third shape conductive layers 230 to 233 (first conductive layers 230a to 233).
a and the second conductive layers 230b to 233b) are formed.

Next, a mask 2 newly made of resist
50 is formed, and a third doping process is performed as shown in FIG. By the third doping process, the first
P-type semiconductor regions 234 and 235 are formed. The concentration of boron added to form a p-type semiconductor region is 1
The concentration is from × 10 ^{20 to} 5 × 10 ²¹ / cm ³ , which is 1.5 to 3 times higher than the concentration of phosphorus added in the previous step.

In the above steps, n is added to each semiconductor layer.
A type or p-type semiconductor region is formed. Second shape conductive layer 221 and third shape conductive layers 230 and 231
Becomes a gate electrode. Also, the second shape conductive layer 232
Is one electrode forming a storage capacitor in the pixel portion. Further, the third shape conductive layer 233 forms a data line in the pixel portion.

Next, a first interlayer insulating film 237 covering almost the entire surface is formed. The first interlayer insulating film 237 is formed to have a thickness of 100 to 200 nm by a plasma CVD method or a sputtering method. One suitable example is
This is a 150-nm-thick silicon oxynitride film formed by a plasma CVD method. Of course, the first interlayer insulating film 237
Is not limited to a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.

Thereafter, a step of activating the impurity element added to each semiconductor layer is performed. This activation can be performed by furnace annealing, LRTA, GRTA, or irradiation of laser light. In the furnace annealing method, an electric furnace is used, and 400 to 70 in a nitrogen atmosphere.
Heat treatment is performed at 0 ° C., typically 500 ° C., for 4 hours. To activate by laser beam irradiation, use YAG
Irradiation is performed from the substrate side using the second harmonic (532 nm) of the laser. This is for sufficiently activating the second n-type semiconductor region overlapping the second shape conductive layer 221. Of course, this is the same in the LRTA method using a lamp light source, and the semiconductor film is heated by radiation of the lamp light source from both sides of the substrate or the substrate side.

Then, as shown in FIG. 6B, a second interlayer insulating film 2 made of silicon nitride is formed by a plasma CVD method.
Then, a heat treatment is performed at 410 ° C. using a clean oven, and the semiconductor film is hydrogenated with hydrogen released from the silicon nitride film.

Next, as shown in FIG. 7A, a third interlayer insulating film 239 made of an organic insulating material is formed on the second interlayer insulating film 238. Next, a contact hole reaching the data line 224 and a contact hole reaching each impurity region are formed. Then, Al, Ti, Mo, W
A wiring and a pixel electrode are formed by using the method described above. For example, a stacked film of a Ti film having a thickness of 50 to 250 nm and an alloy film (an alloy film of Al and Ti) having a thickness of 300 to 500 nm is used.
Thus, the source or drain wirings 240, 241,
The gate wiring 243, the connection wiring 242, and the pixel electrode 224 are formed.

As described above, the driving circuit 301 including the p-channel TFT 303 and the n-channel TFT 304 and the pixel portion 302 including the n-channel TFT 305 can be formed on the same substrate. n-channel type T
The FT 305 has a multi-gate structure. In the pixel portion 302, an insulating film formed in the same layer as the semiconductor film 206 and the gate insulating film 236, and an auxiliary capacitor 306 formed of a third-shaped conductive layer 232 are formed.

The p-channel TFT 30 of the driving circuit 301
3 is a so-called single drain in which a first p-type semiconductor region 234 (a region functioning as a source region or a drain region) is formed outside a channel formation region 245 and a third shape conductive layer 230 forming a gate electrode. It has a structure. The n-channel TFT 304 includes a channel formation region 246, a second n-type semiconductor region 226 (LDD region) partly overlapping with the conductive layer 221 in the second shape, and a first n-type semiconductor region functioning as a source region or a drain region. It has a semiconductor region 217. The configuration of such an LDD region is intended mainly to prevent TFT deterioration due to the hot carrier effect. Such an n-channel type TF
Shift register circuit by T and p channel type TFT,
A buffer circuit, a level shifter circuit, a latch circuit, and the like can be formed. In particular, the structure of the n-channel TFT 304 is suitable for a buffer circuit with a high driving voltage, in order to prevent deterioration due to the hot carrier effect.

The n-channel TFT 305 of the pixel section 302
The channel forming region 247, the third shape conductive layer 23
A second n-type semiconductor region 227 formed outside the semiconductor device 1;
A first n functioning as a source region or a drain region
Type semiconductor region 218. The auxiliary capacity 30
The semiconductor layer 206 functioning as one electrode of
P-type semiconductor region 235 is formed.

In the pixel portion, 244 is a pixel electrode, and 242 is a connection electrode for connecting the data line 224 to the first n-type semiconductor region of the semiconductor film 205. Also, 2
43 is a gate wiring, not shown in the figure,
It is connected to the third shape conductive layer 231 functioning as a gate electrode.

As shown in FIG. 7B, the storage capacitor 306 is formed by the semiconductor film 206, the gate insulating film 236, and the capacitor electrode (third-shaped conductive layer) 232, and the gate wiring 249 of the adjacent pixel is formed. Is connected to

FIG. 8 is a top view of such a pixel portion 302. FIG. FIG. 8 shows a top view of substantially one pixel, and the reference numerals are the same as those in FIG. 7A. A-
The cross-sectional structures taken along the lines A ′ and BB ′ are shown in FIGS.
(B). In the pixel structure in FIG. 8, by forming the gate wiring and the gate electrode on different layers, the gate wiring 243 and the semiconductor layer 205 can be overlapped, and a function as a light-blocking film is added to the gate wiring. I have. In addition, an end of the pixel electrode 244 is arranged so as to overlap with the data line 233 so that a gap between the pixel electrodes is shielded from light, so that formation of a light-shielding film (black matrix) can be omitted. As a result, it is possible to improve the aperture ratio as compared with the related art.

The substrate provided with the driving circuit 301 and the pixel portion 302 formed in this embodiment is called an active matrix substrate for convenience. Using such an active matrix substrate, a display device driven by active matrix can be formed. Here, since the pixel electrode is formed of a light-reflective material, a reflective display device can be formed by applying the present invention to a liquid crystal display device. From such a substrate, a liquid crystal display device or a light emitting device in which a pixel portion is formed using an organic light emitting element can be formed. FIG. 10 is a diagram illustrating the appearance of an active matrix substrate in which a driving circuit and a pixel portion are formed by TFTs. A pixel portion 506 and driving circuits 504 and 505 are formed over a substrate 501. An input terminal 502 is formed at one end of the substrate,
The wiring 503 connected to each drive circuit is routed.

[Embodiment 2] In this embodiment, the structure of an active matrix substrate for forming a transmission type display device will be described with reference to FIG. FIG. 9 illustrates a configuration of the pixel portion 302 of the active matrix substrate formed in Embodiment 1. n-channel type TFT 305 and storage capacitor 30
6 is formed in the same manner as in the first embodiment.

In order to form an active matrix substrate corresponding to a transmission type, it is necessary to form a translucent pixel electrode. In the first embodiment, after a contact hole is formed in the third interlayer insulating film 239, a translucent pixel electrode 250 is formed using ITO or the like. Then, the connection electrode 24
2, a connection line 251 for connecting the gate line 243, the first n-type semiconductor region of the n-channel TFT 305 to the pixel electrode 250, and the semiconductor film 206 forming one electrode of the auxiliary capacitor 306 to the pixel electrode 250. Connection wiring 25
Form 2 With such a structure, an active matrix substrate corresponding to a transmissive display device can be formed.

[Embodiment 3] In this embodiment, a process of manufacturing an active matrix driven liquid crystal display device from the active matrix substrate manufactured in Embodiment 1 will be described below. FIG. 12 is used for the description.

First, according to Embodiment 1, after obtaining an active matrix substrate in the state of FIG. 7A, an alignment film 604 is formed on the active matrix substrate and a rubbing process is performed. Although not shown, before forming the alignment film 604, columnar spacers for maintaining a substrate interval may be formed at desired positions by patterning an organic resin film such as an acrylic resin film. . Instead of the columnar spacers, spherical spacers may be spread over the entire surface of the substrate.

Next, the counter electrode 60 is placed on the counter substrate 601.
2 is formed, an alignment film 603 is formed on the entire surface of the counter substrate 601, and a rubbing process is performed. The counter electrode 602 is formed of ITO. Then, the active matrix substrate on which the pixel portion and the driver circuit are formed and the counter substrate are bonded with a sealant (not shown). A filler is mixed in the sealant, and the two substrates are bonded together at a uniform interval by the filler and the spacer. Thereafter, a liquid crystal material 605 is injected between the two substrates, and completely sealed with a sealing agent (not shown). A known liquid crystal material may be used as the liquid crystal material. Thus, the liquid crystal display device driven by the active matrix shown in FIG. 12 is completed.

[Embodiment 4] FIG. 13 is an example showing the structure of a light emitting device of an active matrix drive system. The n-channel TFT 652 and the p-channel TFT 653 of the drive circuit portion 650 and the switching TFT 654 and the current control TFT 655 of the pixel portion 651 shown in Embodiment 1
It is manufactured in the same manner as described above.

A first interlayer insulating film 618 made of silicon nitride and silicon oxynitride is formed above the gate electrodes 608 to 611, and is used as a protective film. Further, as a planarizing film, a second interlayer insulating film 619 made of an organic resin material such as polyimide or acrylic is formed.

The circuit configuration of the drive circuit section 650 differs between the gate signal side drive circuit and the data signal side drive circuit, but is omitted here. Wirings 612 and 613 are connected to the n-channel TFT 652 and the p-channel TFT 653, and a shift register, a latch circuit, a buffer circuit, and the like are formed using these TFTs.

In the pixel portion 651, the data line 614 is connected to the source side of the switching TFT 654, and the drain side line 615 is connected to the gate electrode 611 of the current control TFT 655. The current control TFT 65
The source side of No. 5 is connected to the power supply wiring 617, and the electrode 616 on the drain side is connected to the anode of the light emitting element.

On these wirings, a second interlayer insulating film 627 made of an organic insulating material such as silicon nitride is formed. The organic resin material has a hygroscopic property and has a property of absorbing H ₂ O. Because the the H ₂ O is re-released oxygen is supplied to the organic compound, causing degradation of the organic light emitting device, in order to prevent occlusion and re-emission of H ₂ O, the second
A third insulating film 620 made of silicon nitride or silicon oxynitride is formed on the interlayer insulating film 627 of FIG. Alternatively, the second interlayer insulating film 627 is omitted, and the third insulating film 6
It is also possible to form this layer with only 20 layers.

The organic light emitting device 656 is formed on the third insulating film 620, and is formed of a transparent conductive material such as ITO (indium tin oxide), an anode 621, a hole injection layer, a hole transport layer, a light emitting layer, and the like. Compound layer 623 having MgA
and a cathode 624 formed using a material such as alkali metal or alkaline earth metal such as g or LiF. The detailed structure of the organic compound layer 623 is arbitrary, and an example is shown in FIG.

Since the organic compound layer 623 and the cathode 624 cannot be subjected to wet processing (such as etching with a chemical solution and washing with water), they are formed of a photosensitive resin material on the organic insulating film 619 in accordance with the anode 621. Partition layer 62
2 is provided. The partition layer 622 is formed so as to cover an end of the anode 622. Specifically, the partition layer 622 is formed by applying a negative resist and having a thickness of about 1 to 2 μm after baking. Thereafter, exposure is performed by irradiating ultraviolet rays using a photomask provided with a predetermined pattern. When a negative resist material having poor transmittance is used, the rate of exposure in the thickness direction of the film changes, and when this is developed, the shape of the partition layer changes to a shape in which the upper part protrudes in a direction parallel to the substrate surface ( (A so-called overhang shape).
Of course, such a partition layer can also be formed using photosensitive polyimide or the like.

For the cathode 624, a material containing magnesium (Mg), lithium (Li) or calcium (Ca) having a small work function is used. Preferably, MgAg (M
An electrode made of a material obtained by mixing g and Ag at a ratio of Mg: Ag = 10: 1) may be used. In addition, MgAgAl electrode, Li
An Al electrode and a LiFAl electrode are mentioned. Further thereon, a fourth insulating film 625 of silicon nitride or a DLC film is formed to a thickness of 2 to 30 nm, preferably 5 to 10 nm. The DLC film can be formed by a plasma CVD method, and can be formed to cover the end of the partition layer 622 with good coverage even at a temperature of 100 ° C. or lower. DL
The internal stress of the C film can be reduced by mixing a small amount of oxygen or nitrogen, and can be used as a protective film. The DLC film contains oxygen and C
It is known that gas barrier properties of O, CO ₂ , H ₂ O and the like are high. After the cathode 624 is formed, the fourth insulating film 625 is preferably formed continuously without opening to the atmosphere. This is because the state of the interface between the cathode 624 and the organic compound layer 623 greatly affects the luminous efficiency of the organic light emitting device.

As described above, by forming the organic compound layer 623 and the cathode layer 624 without contacting the partition layer 622 to form an organic light-emitting element, it is possible to prevent cracks due to thermal stress. In addition, since the organic light emitting element 656 most dislikes oxygen and H ₂ O, the organic light emitting element 656 uses silicon nitride or silicon oxynitride and the DLC film
25 are formed. These are the organic light emitting elements 6
It also has a function of keeping the alkali metal element of 56 out.

In FIG. 13, the switching TFT 654 has a multi-gate structure, and the current controlling TFT 655 has a low concentration drain (LD) overlapping the gate electrode.
D) is provided. TFT using polycrystalline silicon,
Because of high operation speed, deterioration such as hot carrier injection is likely to occur. Therefore, as shown in FIG. 6, it is highly reliable to form a TFT having a different structure (a switching TFT having a sufficiently low off-state current and a current control TFT having a high resistance against hot carrier injection) in a pixel according to the function. This is very effective in manufacturing a display device having high image quality and high performance (high performance).

As shown in FIG. 13, the TFTs 654, 65
On the lower layer side (substrate 601 side) of the semiconductor film forming
A first insulating film 602 is formed. On the opposite upper layer side, a second insulating film 618 is formed. On the other hand, a third insulating film 620 is formed below the organic light emitting element 656. A fourth insulating film 625 is formed on the upper layer side. Then, an organic insulating film 619 is formed between the two,
It is integrated. Alkali metals such as sodium, which the TFTs 654 and 655 hate most, can be used as a contamination source on the substrate 60.
1 or the organic light emitting element 656 is conceivable.
02 and the second insulating film 618 for blocking. On the other hand, since the organic light-emitting element 656 most dislikes oxygen and H ₂ O, a third insulating film 620 and a fourth insulating film 625 are formed to block them. These also have a function of keeping the alkali metal element included in the organic light-emitting element 656 from outside.

In an organic light-emitting device having a structure as shown in FIG.
0, anode 6 made of a transparent conductive film represented by ITO
The step of continuously forming the film 21 by a sputtering method can be adopted. The sputtering method is suitable for forming a dense silicon nitride film or a silicon oxynitride film without significantly damaging the surface of the organic insulating film 619.

As described above, the pixel portion is formed by combining the TFT and the organic light emitting device, and the light emitting device can be completed. In such a light-emitting device, a driver circuit can be formed over the same substrate using a TFT. As shown in FIG. 13, a semiconductor film, a gate insulating film, and a gate electrode, which are main components of a TFT, are formed by surrounding a lower layer side and an upper layer side thereof with a blocking layer made of silicon nitride or silicon oxynitride and a protective film. It has a structure that prevents contamination of alkali metals and organic substances. On the other hand, an organic light-emitting element contains an alkali metal as a part, is surrounded by a protective film made of silicon nitride or silicon oxynitride, and a gas barrier layer made of an insulating film containing silicon nitride or carbon as a main component. _It has a structure to prevent ₂ O from entering.

As described above, according to the present invention, a light emitting device can be completed without combining elements having different characteristics with respect to impurities. Further, reliability can be improved by eliminating the influence of stress.

Example 5 The ability to remove a catalytic metal element from a semiconductor film after crystallization depends on the crystallization rate of the semiconductor film (the film volume or (The ratio of the crystallization region to the area).

Samples having different crystallization ratios were prepared by changing the heating time by adding nickel to the amorphous silicon film.
Specifically, the heat treatment temperature is set to 650 ° C. by the GRTA method.
FIGS. 17 and 18 show an example of the crystallization ratio of a sample manufactured by changing the heating time as (heating time: 3 minutes 30 seconds). FIG. 17 shows the result of observing with an optical microscope using the difference in light transmittance between the amorphous region and the crystallized region, and plotting the area ratio as the crystallization ratio. FIG. 18 shows TO (a-Si: 480) obtained from the Raman spectrum.
cm ^-1) and TO (c-Si: is the result of plotting against the heat treatment time and the peak intensity ratio of 520cm around ^-1). The crystallization rate varies in the range of approximately 95-99.9%.

Gettering was performed after irradiation with laser light (XeCl excimer laser, 480 mJ / cm ² ).
The crystallization rate becomes almost 100% by the irradiation of the laser beam. In this state, the concentration of residual nickel was examined when the gettering treatment was performed at 625 ° C. and 650 ° C. (each heating time was 3 minutes and 30 seconds) for 3 minutes. Nickel concentration is TX
It was measured by RF (Total Reflection X-Ray Fluorescence). FIG. 19 shows the result of gettering at 625 ° C., and when the crystallization rate is high, the residual nickel concentration has a large variation and is high. On the other hand, when gettering is performed at 650 ° C. as shown in FIG. 20, no correlation is observed.

Depending on the crystallization ratio before the laser beam irradiation, when the value is extremely high, the residual nickel concentration increases because silicified nickel precipitates at the crystal grain boundaries and the amount of the precipitation increases. This is considered to be because nickel or nickel silicide precipitates become large.
This indicates that when the temperature at the time of gettering decreases, nickel becomes difficult to move to the gettering site. Therefore, from the viewpoint of expanding the allowable range of the processing conditions in gettering, it is understood that it is desirable to define the crystallization ratio, and it is preferable to set the crystallization ratio to about 95 to 99%.

Example 6 The degree to which a catalytic metal element can be removed from a silicon film after crystallization depends not only on the heating temperature and time for gettering but also on the crystallization rate of the semiconductor film (the volume of the film or the volume of the film). (The ratio of the crystallization region to the area). In this embodiment, an example of the dependence of the laser irradiation conditions on the gettering characteristics will be described.

FIG. 21 shows the result of measuring the concentration distribution of nickel added as a metal element that promotes crystallization by secondary ion mass spectrometry. The silicon film, which is a sample, is obtained by crystallizing by adding nickel and performing heat treatment, and then irradiating the silicon film with changing the energy density of laser light. The laser light uses a pulse oscillation XeCl excimer laser (wavelength 308 nm) as a light source and has a repetition frequency of 3
The same region was repeatedly irradiated 12 times at 0 Hz.
Energy density, compared 480 mJ / cm ^2, which is a standard condition, it is compared for the case of a 380 mJ / cm ² and 550 mJ / cm ^2.

FIG. 21 shows the distribution of nickel in the crystallized silicon film in the depth direction. It can be seen that nickel segregates on the surface of the silicon film as the laser beam energy density increases. This is because the silicon film is melted by laser light irradiation, solidifies from the base side (substrate side), and the solid-liquid interface moves toward the surface. In other words, it can be understood that nickel segregates in a liquid having a high solid solubility, so that its concentration increases on the surface that solidifies last. FIG. 22 shows the result of measuring the nickel concentration on the surface of the crystallized silicon film by TXRF while changing the energy density of the laser beam from 240 to 550 mJ / cm ² . In FIG. 22, the nickel concentration on the surface increases 360 degrees.
mJ / cm ² or more.

As described above, the energy density is 360 mJ / cm ²
Is the critical point, but as shown in FIG. 23, it is also the point at which the Raman shift of crystalline silicon in the Raman spectroscopic spectrum is sharply reduced. The data in FIG. 22 and FIG.
This indicates that the silicon film is crystallized through a molten state at an energy density of 360 mJ / cm ² or more.

FIG. 24 shows a high-resolution transmission electron microscope photograph near the crystal grain boundary, and FIG. 25 shows an electron beam diffraction image. This is 4
The sample after irradiation with a laser beam of 80 mJ / cm ² . In FIG. 24, a lattice image of nickel silicide can be confirmed. Table 1 shows the inter-plane distance of the crystal obtained from the electron diffraction image of FIG. According to Table 1, the nickel silicide observed at the grain boundary is not NiSi ₂ but Ni ₃ Si ₂
Alternatively, it is considered to be Ni ₂ Si. The nickel melted by the irradiation of the laser beam is supercooled to form Ni ₃ S
It can be seen to have frozen at the grain boundaries in the state of i ₂ and Ni ₂ Si. This is presumed that NiSi ₂ existing at the grain boundary was changed to Ni ₃ Si ₂ or Ni ₂ Si by the energy of the laser. Since Ni ₃ Si ₂ and Ni ₂ Si have a low thermally stable temperature, it can be considered that nickel is easily released from these silicides.

[0121]

[Table 1]

[Embodiment 7] Various semiconductor devices can be manufactured by using the present invention. Such semiconductor devices include video cameras, digital cameras, goggle-type display devices (head-mounted displays), navigation systems, sound reproduction devices (car audio, audio components, etc.), notebook personal computers,
Examples include a game machine, a portable information terminal (a mobile computer, a mobile phone, a portable game machine, an electronic book, or the like), an image reproducing device provided with a recording medium, and the like. Specific examples of these semiconductor devices are shown in FIGS.

FIG. 15A shows a monitor of a desktop personal computer or the like.
It is composed of a support 3302, a display portion 3303, and the like.
By using the present invention, the display portion 3303 and other integrated circuits can be manufactured.

FIG. 15B shows a video camera, which includes a main body 3311, a display section 3312, an audio input section 3313, operation switches 3314, a battery 3315, and an image receiving section 331.
6 and so on. By using the present invention, the display unit 331
2 and other integrated circuits.

FIG. 15C shows a part (one right side) of the head mounted EL display, which includes a main body 3321, a signal cable 3322, a head fixing band 3323, and a projection section 33.
24, an optical system 3325, a display unit 3326, and the like. By using the present invention, the display portion 3326 and other integrated circuits can be manufactured.

FIG. 15D shows an image reproducing apparatus (specifically, a DVD reproducing apparatus) provided with a recording medium.
1, recording medium (DVD, etc.) 3332, operation switch 33
33, a display section (a) 3334, a display section (b) 3335, and the like. The display portion (a) 3334 mainly displays image information, and the display portion (b) 3335 mainly displays character information. By using the present invention, the display portion (a) 3334, the display portion (b) 3335, and the like are displayed. Other integrated circuits can be manufactured. Note that the image reproducing device provided with the recording medium includes a home game machine and the like.

FIG. 15E shows a goggle type display device (head mounted display), which includes a main body 3341, a display portion 3342, and an arm portion 3343. By using the present invention, the display portion 3342 and other integrated circuits can be manufactured.

FIG. 15F shows a notebook personal computer, which includes a main body 3351, a housing 3352, and a display portion 3.
353, a keyboard 3354, and the like. By using the present invention, the display portion 3353 and other integrated circuits can be manufactured.

FIG. 16A shows a portable telephone, and the main body 34 is provided.
01, audio output unit 3402, audio input unit 3403, display unit 3404, operation switch 3405, antenna 3406
including. By using the present invention, the display portion 3404 and other integrated circuits can be manufactured.

FIG. 16B shows a sound reproducing device, specifically, a car audio.
2. Including operation switches 3413 and 3414. The light-emitting device of the present invention can be used for the display portion 3412. In this embodiment, the in-vehicle audio is shown, but the present invention may be applied to a portable or home-use audio reproducing apparatus.

FIG. 16C shows a digital camera, which includes a main body 3501, a display section (A) 3502, an eyepiece section 3503,
An operation switch 3504, a display portion (B) 3505, and a battery 3506 are included. By using the present invention, a display portion (A) 3502, a display portion (B) 3505, and other integrated circuits can be manufactured.

As described above, the applicable range of the present invention is extremely wide, and can be applied to various electronic devices. Further, the electronic device of the present embodiment can be realized by using a configuration composed of any combination of the first to fifth embodiments.

[0133]

According to the present invention, a catalytic element can be efficiently removed or reduced from a semiconductor film having a crystal structure obtained by using a catalytic element that promotes crystallization. Further, this treatment has a feature that the treatment can be performed at a temperature lower than a temperature at which the glass substrate is distorted and deformed.

Further, the rare gas element added to the semiconductor film for performing gettering is inactive in the semiconductor film, so that there is no adverse effect of, for example, changing the threshold voltage of the TFT. In addition, the rare gas element added by the ion implantation method or the ion doping method can be supplied in a state of containing no balance gas with high purity, so that the time required for doping can be reduced and the productivity of the semiconductor device can be improved. Can be improved.

Further, the semiconductor film having a crystal structure manufactured according to the present invention has excellent crystallinity due to the effect of the catalytic element, and the catalytic element is removed or reduced by gettering. Therefore, when used as an active layer of a semiconductor device, a semiconductor device having excellent electrical characteristics and high reliability can be obtained.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a manufacturing process of a semiconductor device of the present invention.

FIG. 2 is a cross-sectional view illustrating a manufacturing process of a semiconductor device of the present invention.

FIG. 3 is a cross-sectional view illustrating a manufacturing process of a semiconductor device of the present invention.

FIG. 4 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate corresponding to a reflective display device manufactured using the present invention.

FIG. 5 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate corresponding to a reflective display device manufactured using the present invention.

FIG. 6 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate corresponding to a reflective display device manufactured using the present invention.

FIG. 7 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate corresponding to a reflective display device manufactured using the present invention.

FIG. 8 is a top view illustrating a structure of a pixel portion of an active matrix substrate corresponding to a reflective display device manufactured using the present invention.

FIG. 9 is a cross-sectional view illustrating a structure of a pixel portion of an active matrix substrate corresponding to a transmission display device manufactured using the present invention.

FIG. 10 is a top view illustrating an appearance of an active matrix substrate.

FIG. 11 is a cross-sectional view illustrating a manufacturing process of a semiconductor device of the present invention.

FIG. 12 is a cross-sectional view illustrating a structure of a liquid crystal display device manufactured using the present invention.

FIG. 13 is a cross-sectional view illustrating a structure of a light-emitting device manufactured using the present invention.

FIG. 14 is a cross-sectional view illustrating a manufacturing process of a semiconductor device of the present invention.

FIG. 15 illustrates an example of a semiconductor device.

FIG. 16 illustrates an example of a semiconductor device.

FIG. 17 is a graph showing a relationship between a heat treatment time by a GRTA method and a crystallization ratio.

FIG. 18 shows TO (a) determined from Raman spectrum.
The graph which shows the heat treatment time dependence of the peak intensity ratio of -Si: 480cm < ^-1 >) and TO (c-Si: around 520cm < ^-1 >).

FIG. 19 is a graph showing the relationship between the crystallization ratio and the residual nickel concentration after gettering (temperature 625 during gettering).
° C).

FIG. 20 is a graph showing the relationship between the crystallization ratio and the residual nickel concentration after gettering (temperature 650 during gettering).
° C).

FIG. 21 is a graph showing a distribution of nickel concentration in a semiconductor film by secondary ion mass spectrometry, showing distributions before and after laser light irradiation.

FIG. 22 shows a nickel concentration distribution on the surface of a semiconductor film;
7 is a graph showing the irradiation energy dependence of laser light.

FIG. 23 is a graph showing Raman shift of a semiconductor film and showing irradiation energy dependence of laser light.

FIG. 24 is a high-resolution transmission electron micrograph of the vicinity of a crystal grain boundary.

FIG. 25 is an electron diffraction image at a specific point near a crystal grain boundary.

Continuation of the front page (51) Int.Cl. ⁷ Identification code FI Theme coat II (Reference) H01L 29/78 627G (72) Inventor Hideto Onuma 398 Hase, Atsugi-shi, Kanagawa Prefecture F-term in the Semiconductor Energy Laboratory Co., Ltd. (Reference) 2H092 GA59 HA03 HA04 HA05 JA24 JA28 JA34 JA37 JA41 JA46 JB07 JB54 JB56 JB61 KA04 KA07 KA08 KA10 KA12 KB25 MA02 MA04 MA07 MA08 MA10 MA12 MA18 MA22 MA27 MA28 MA29 MA30 MA37 NA07 NA21 NA27 NA29 5F052 AA02 AA02AA02A DB03 GG52 GG58 HJ01 HJ04 HJ12 HJ13 HJ23 HL03 HL04 HL06 HL07 HL11 HM15 HM18 HM19 NN03 NN04 NN22 NN23 NN24 NN27 NN34 NN35 NN44 NN72 NN73 NN78 PP01 PP02 PP03 PP04 Q05 PP04 Q11 Q13

Claims (17)

[Claims] In a semiconductor device in which a semiconductor film having a crystal structure is formed on an insulating surface, the concentration of oxygen contained in the semiconductor film is 5 × 10 ¹⁸ / cm ³ or less. In the vicinity of the surface, the rare gas element contained 1 × 10
A semiconductor device having a region which is contained at a concentration of ¹³ to 1 × 10 ²⁰ / cm ³ . 2. A semiconductor device in which a semiconductor film having a crystal structure is formed on an insulating surface, wherein the semiconductor film is a thin rod-shaped or flat rod-shaped crystal, and the concentration of oxygen contained in the semiconductor film is 5 × 10 ¹⁸ / cm ³ or less, and the rare gas element is 1 × 10
A semiconductor device having a region which is contained at a concentration of ¹³ to 1 × 10 ²⁰ / cm ³ . 3. A semiconductor device having a semiconductor film having a crystal structure on an insulating surface, a gate insulating film, and a gate electrode, wherein the semiconductor film has a concentration of 5 × 10 ¹⁸ in a region overlapping with the gate electrode. / cm ³ or less,
In addition, the rare gas element is 1 × 10 ¹³ to 1 × 10 ²⁰ inside the semiconductor film or near the interface with the gate insulating film.
A semiconductor device having a region contained at a concentration of / cm ³ . 4. A semiconductor device having a semiconductor film having a crystal structure on an insulating surface, a gate insulating film, and a gate electrode, wherein the semiconductor film is a thin rod-shaped crystal or a thin flat rod-shaped crystal. In the overlapping region, oxygen is contained at a concentration of 5 × 10 ¹⁸ / cm ³ or less, and the rare gas element is contained in the semiconductor film or in the vicinity of the interface with the gate insulating film in an amount of 1 × 10 ¹³ to 1 × 10 ^20. A semiconductor device having a region contained at a concentration of / cm ³ . 5. The semiconductor device according to claim 1, wherein the rare gas element is one or more selected from He, Ne, Ar, Kr, and Xe. 6. A step of forming a first semiconductor film containing silicon as a main component and having an amorphous structure on a substrate having an insulating surface, and a catalyst element for promoting crystallization of silicon in the first semiconductor film. Forming a first semiconductor film having a crystal structure by a first heat treatment; forming a barrier layer on a surface of the first semiconductor film having the crystal structure; Forming a second semiconductor film thereon, and adding a rare gas element to the second semiconductor film at the same time as or after the film formation, performing gettering by a second heat treatment, and forming the catalyst element Transferring to the second semiconductor film; and removing the second semiconductor film;
Removing the barrier layer. 7. A step of forming a first semiconductor film containing silicon as a main component and having an amorphous structure on a substrate having an insulating surface, and a catalyst element for promoting crystallization of silicon in the first semiconductor film. Forming a first semiconductor film having a crystal structure by a first heat treatment; irradiating a first semiconductor film laser beam having the crystal structure with laser light; Forming a barrier layer on the surface of the first semiconductor film, forming a second semiconductor film on the barrier layer, and forming a rare gas element on the second semiconductor film simultaneously with or after the film formation. And a step of performing gettering by a second heat treatment to move the catalytic element to the second semiconductor film, a step of removing the second semiconductor film, and a step of removing the barrier layer And characterized by having A method for manufacturing the body of the device. 8. The method for manufacturing a semiconductor device according to claim 6, wherein the barrier layer is formed of ozone water. 9. The method for manufacturing a semiconductor device according to claim 6, wherein the barrier layer is formed by oxidizing the surface by plasma treatment. 10. A method for manufacturing a semiconductor device according to claim 6, wherein the barrier layer is formed by irradiating ultraviolet rays in an atmosphere containing oxygen to generate ozone and oxidize the surface. . 11. The method for manufacturing a semiconductor device according to claim 6, wherein the rare gas element is one or more selected from He, Ne, Ar, Kr, and Xe. 12. The method for manufacturing a semiconductor device according to claim 6, wherein the rare gas element is added by an ion implantation method or an ion doping method. 13. The method according to claim 6, wherein the first heat treatment is performed by one or more selected from a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high-pressure sodium lamp, and a high-pressure mercury lamp. A method for manufacturing a semiconductor device, which is performed by radiation from a seed. 14. The method for manufacturing a semiconductor device according to claim 6, wherein the first heat treatment is performed by a furnace annealing method using an electric furnace. 15. The method according to claim 6, wherein the second heat treatment is performed by one or more selected from a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, and a high pressure mercury lamp. A method for manufacturing a semiconductor device, which is performed by radiation from a seed. 16. The method for manufacturing a semiconductor device according to claim 6, wherein the second heat treatment is performed by a furnace annealing method using an electric furnace. 17. The method according to claim 6, wherein the catalyst element is Fe, Ni, Co, Ru, Rh, P
A method for manufacturing a semiconductor device, which is one or more kinds selected from d, Os, Ir, Pt, Cu, and Au.