JP2002334976A - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor deviceInfo
- Publication number
- JP2002334976A JP2002334976A JP2001139524A JP2001139524A JP2002334976A JP 2002334976 A JP2002334976 A JP 2002334976A JP 2001139524 A JP2001139524 A JP 2001139524A JP 2001139524 A JP2001139524 A JP 2001139524A JP 2002334976 A JP2002334976 A JP 2002334976A
- Authority
- JP
- Japan
- Prior art keywords
- solid
- state imaging
- imaging device
- wiring board
- light
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 32
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000004065 semiconductor Substances 0.000 title claims abstract description 8
- 238000003384 imaging method Methods 0.000 claims abstract description 76
- 230000007547 defect Effects 0.000 abstract description 4
- 230000007257 malfunction Effects 0.000 abstract 1
- 239000010931 gold Substances 0.000 description 15
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 14
- 229910052737 gold Inorganic materials 0.000 description 14
- 229920005989 resin Polymers 0.000 description 5
- 239000011347 resin Substances 0.000 description 5
- 239000000919 ceramic Substances 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 4
- 239000003566 sealing material Substances 0.000 description 4
- 206010027146 Melanoderma Diseases 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 230000010355 oscillation Effects 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Light Receiving Elements (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、光学センサに適用
され、パッケージにおける製造工程の改良を図った半導
体装置の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device which is applied to an optical sensor and which improves a manufacturing process of a package.
【0002】[0002]
【従来の技術】一般に、半導体装置の中の1つである撮
像素子としては、例えばCCD(Charge Cou
pled Device)型、CMOS(Comple
mentary Metal Oxide Semic
onductor)型等の固体撮像素子を用いたものが
あり、これら光学センサの基体を保護するように囲むパ
ッケージには、セラミック、あるいは樹脂などのものが
主流であった。このような固体撮像素子パッケージは、
固体撮像素子とセラミックあるいは樹脂などの箱型筐体
とをワイヤーボンディング工法により電気的に接続し形
成される。2. Description of the Related Art Generally, as an image pickup device which is one of semiconductor devices, for example, a CCD (Charge Cou) is used.
Pled Device) type, CMOS (Comple)
mentary Metal Oxide Semiic
There is a type using a solid-state imaging device such as an insulator type, and a package that protects the base of these optical sensors so as to protect the substrate is mainly made of ceramic or resin. Such a solid-state imaging device package is
It is formed by electrically connecting a solid-state imaging device and a box-shaped casing made of ceramic or resin by a wire bonding method.
【0003】近年、携帯性を重視した電子機器の市場に
おいて小型化や薄型化が求められており、固体撮像素子
パッケージにおいても従来のワイヤーボンディング工法
から、フリップチップ工法によるパッケージ又はパッケ
ージングせずに固体撮像素子を配線板に直接フリップチ
ップする構造に変えることで小型化や薄型化を図ってい
る。In recent years, there has been a demand for smaller and thinner electronic devices in the market for electronic devices that emphasize portability. In solid-state image pickup device packages, instead of the conventional wire bonding method, a package using a flip chip method or a package is not used. By changing the structure of the solid-state image sensor directly to a flip-chip on a wiring board, miniaturization and thinning are achieved.
【0004】図3は、超音波フリップチップ工法を用い
た従来の固定撮像素子パッケージの製造方法を示すもの
である。図3(a)に示すように固体撮像素子1の面上
に受光部2を配置し、受光部2と同一面上の両端に外部
接続パッド3を形成する。次いで、図3(b)に示すよ
うに固体撮像素子1を受光部2を含む面を上に向けて配
置し、外部接続パッド3上に、例えば超音波および圧力
により金などの突起バンプ4を取り付ける。一方、固体
撮像素子1とは別に図3(c)示すように、配線板5に
開口部6を形成し、配線板5の面上に電極パッド7を形
成する。次いで、図3(d)に示すように固体撮像素子
1を受光部2を含む面を下に向け、受光部2に配線板5
の開口部6を臨むように配置し、固体撮像素子1の外部
接続パッド3に突起バンプ4を介して配線板5の電極パ
ッド7を電気的に接続する。このときの接続方法は、受
光部2を含む面を下に向けた個体撮像素子1の上方向か
ら例えば超音波発振ホーンに連結されたヘッドにより超
音波と圧力を加えることで、接続する超音波フリップチ
ップ接合である。FIG. 3 shows a conventional method for manufacturing a fixed image pickup device package using an ultrasonic flip chip method. As shown in FIG. 3A, the light receiving unit 2 is arranged on the surface of the solid-state imaging device 1, and external connection pads 3 are formed at both ends on the same surface as the light receiving unit 2. Next, as shown in FIG. 3B, the solid-state imaging device 1 is arranged with the surface including the light receiving portion 2 facing upward, and the bumps 4 made of gold or the like are formed on the external connection pads 3 by, for example, ultrasonic waves and pressure. Attach. On the other hand, as shown in FIG. 3C, an opening 6 is formed in the wiring board 5 separately from the solid-state imaging device 1, and an electrode pad 7 is formed on the surface of the wiring board 5. Next, as shown in FIG. 3D, the solid-state imaging device 1 is placed with the surface including the light receiving unit 2 facing downward, and the wiring board 5
The electrode pad 7 of the wiring board 5 is electrically connected to the external connection pad 3 of the solid-state imaging device 1 via the bump 4. The connection method at this time is to apply ultrasonic waves and pressure by a head connected to an ultrasonic oscillation horn, for example, from above the solid-state imaging device 1 with the surface including the light receiving unit 2 facing downward, thereby connecting the ultrasonic waves to be connected. Flip chip bonding.
【0005】[0005]
【発明が解決しようとする課題】しかしながら、従来の
半導体装置の製造方法にあっては、歩留まり等の点で下
記のように改良すべき余地があった。すなわち、図3
(b)に示す固体撮像素子1の外部接続パッド3に突起
バンプ4を形成する工程では、固体撮像素子1を受光部
2を含む面を上に向けて作業を行うため、受光部2への
異物付着の確率が大きくなる。受光部2にはμm程度の
異物が付着しても、異物が画面上で黒点と認識され、そ
の結果、黒点不良による歩留まり低下を招くという問題
点があった。また、固体撮像素子1に突起バンプ4を形
成するため、固体撮像素子1を1個ずつ搬送しなければ
ならず、工程タクトが長くなってしまっていた。さら
に、図3(b)に示す固体撮像素子1の外部接続パッド
3に突起バンプ4を形成する工程および図3(d)に示
す固体撮像素子1と配線板5とを超音波フリップチップ
接合する工程において、固体撮像素子1の外部接続パッ
ド3に超音波と圧力が2回かかることになり、その結
果、外部接続パッド3へのダメージが大きく、クラック
等の故障原因になる場合があるという問題点があった。However, in the conventional method of manufacturing a semiconductor device, there is room for improvement as described below in terms of yield and the like. That is, FIG.
In the step of forming the projecting bumps 4 on the external connection pads 3 of the solid-state imaging device 1 shown in (b), since the work including the light-receiving unit 2 is performed with the surface of the solid-state imaging device 1 turned upward, The probability of foreign matter adhesion increases. Even if a foreign matter of about μm adheres to the light receiving unit 2, the foreign matter is recognized as a black spot on the screen, and as a result, there is a problem that the yield is reduced due to a black spot defect. Further, since the projecting bumps 4 are formed on the solid-state imaging device 1, the solid-state imaging devices 1 must be conveyed one by one, and the process tact becomes longer. Further, a step of forming the projection bumps 4 on the external connection pads 3 of the solid-state imaging device 1 shown in FIG. 3B and the ultrasonic flip-chip bonding of the solid-state imaging device 1 and the wiring board 5 shown in FIG. In the process, the ultrasonic wave and the pressure are applied twice to the external connection pad 3 of the solid-state imaging device 1, and as a result, the external connection pad 3 is greatly damaged, which may cause a failure such as a crack. There was a point.
【0006】そこで本発明は、製品不良や故障を招かず
に工程タクトの改善を図れる半導体装置の製造方法を提
供することを目的とする。SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of manufacturing a semiconductor device capable of improving a process tact without causing a product defect or a failure.
【0007】[0007]
【課題を解決するための手段】上記目的達成のため、請
求項1記載の発明による半導体装置の製造方法は、配線
が形成される配線板に光を通過可能な開口部を形成し、
該配線板における開口部側の端部にパッドを形成する工
程と、前記配線板のパッド上にバンプを形成する工程
と、光を電気信号に変換する固体撮像素子に光を入射す
る受光部を配置し、該固体撮像素子の受光部を有する面
側にパッドを形成する工程と、前記配線板の開口部に受
光部が臨むように前記固体撮像素子を配置し、前記配線
板のパッドに前記固体撮像素子のパッドをバンプを介し
て接合する工程と、を含むことを特徴とする。請求項1
に従属する請求項2記載の発明は、前記配線板に前記固
体撮像素子を接合する工程は、超音波フリップチップ工
法を用いて行うことを特徴とする。According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming an opening through which light can pass in a wiring board on which wiring is formed;
Forming a pad at the end of the wiring board on the opening side; forming a bump on the pad of the wiring board; and a light-receiving unit that inputs light to a solid-state imaging device that converts light into an electric signal. Arranging and forming a pad on the surface side of the solid-state imaging device having the light-receiving portion, and arranging the solid-state imaging device such that the light-receiving portion faces the opening of the wiring board; Joining the pads of the solid-state imaging device via the bumps. Claim 1
The invention according to claim 2 is characterized in that the step of bonding the solid-state imaging device to the wiring board is performed using an ultrasonic flip-chip method.
【0008】[0008]
【作用】本発明では、まず配線板に光を通過させる開口
部が形成されるとともに、開口部側の端部にパッドが形
成され、配線板のパッド上にバンプが形成される。一
方、配線板とは別に、受光部を有する固体撮像素子にも
パッドが形成される。そして、配線板の開口部に受光部
が臨むように固体撮像素子が配置され、それぞれのパッ
ドがバンプを介して接合される。上記のように、配線板
と固体撮像素子とを接合することで、固体撮像素子パッ
ケージを製造する。According to the present invention, first, an opening for transmitting light is formed in a wiring board, a pad is formed at an end on the opening side, and a bump is formed on a pad of the wiring board. On the other hand, apart from the wiring board, pads are also formed on the solid-state imaging device having the light receiving section. Then, the solid-state imaging device is arranged so that the light receiving portion faces the opening of the wiring board, and the respective pads are joined via the bumps. As described above, the solid-state imaging device package is manufactured by joining the wiring board and the solid-state imaging device.
【0009】[0009]
【発明の実施の形態】以下、本発明の実施の形態を、図
面を参照しながら説明する。第1図は本発明を適用した
固体撮像素子パッケージの製造方法を説明するための工
程図である。まず、配線板11側の工程から説明する。
図1(a)に示すように、配線板11を用意する。配線
板11はセラミック又は樹脂などを素材とし、薄い平面
状に成形する。次いで、配線板11の面上にNi(ニッ
ケル)やAu(金)を主成分とするメッキ処理をして、
所定の配線エリアを形成し、チップ(後述するICやチ
ップ部品およびコネクタなどの部品24)との接続およ
び接合を容易にする。ここでの配線板11には、主にセ
ラミック基板、ガラスエポキシ基板、射出成形回路基板
等を使用する。次いで、配線板11に光を通過可能な開
口部12を形成し、開口部12の近傍に金メッキが施さ
れた複数のパッド13を形成する。ここで、開口部12
は配線板11の一部分を貫通するものであり、パッド1
3はチップ(後述する固体撮像素子15)との接続のた
めの配線板11の電極となる。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a process chart for explaining a method of manufacturing a solid-state imaging device package to which the present invention is applied. First, the steps on the wiring board 11 side will be described.
As shown in FIG. 1A, a wiring board 11 is prepared. The wiring board 11 is made of a material such as ceramic or resin, and is formed into a thin planar shape. Next, the surface of the wiring board 11 is plated with Ni (nickel) or Au (gold) as a main component,
A predetermined wiring area is formed to facilitate connection and bonding with a chip (a component 24 such as an IC, a chip component, and a connector described later). As the wiring board 11 here, a ceramic substrate, a glass epoxy substrate, an injection molded circuit board, or the like is mainly used. Next, an opening 12 through which light can pass is formed in the wiring board 11, and a plurality of gold-plated pads 13 are formed near the opening 12. Here, the opening 12
The pad 1 penetrates a part of the wiring board 11 and the pad 1
Reference numeral 3 denotes an electrode of the wiring board 11 for connection with a chip (a solid-state imaging device 15 described later).
【0010】次いで、図1(b)に示すように、パッド
13上にワイヤーボンディング技術を用いたスタッドバ
ンプボンディング又はメッキにより金バンプ14を形成
する。金バンプ14は、超音波と圧力による超音波フリ
ップチップ工法によりパッド13と接合され、電極であ
るパッド13を介して配線板11と電気的に接続され
る。ここで、超音波フリップチップ工法は、加圧と超音
波発振による接合方法であり、上記超音波発振の時間は
0.5秒前後で、その温度は室温と同じである。Next, as shown in FIG. 1B, a gold bump 14 is formed on the pad 13 by stud bump bonding or plating using a wire bonding technique. The gold bump 14 is bonded to the pad 13 by an ultrasonic flip chip method using ultrasonic waves and pressure, and is electrically connected to the wiring board 11 via the pad 13 that is an electrode. Here, the ultrasonic flip chip method is a bonding method using pressure and ultrasonic oscillation, and the ultrasonic oscillation time is about 0.5 seconds, and the temperature is the same as room temperature.
【0011】一方、配線板11とは別工程で固体撮像素
子15側の製造が行われ、次にその工程について説明す
る。図1(c)に示すように、固体撮像素子15を用意
する。ここで、固体撮像素子15は、シリコンの板ウェ
ハーからなり、例えばCCD型、CMOS型などであ
り、受けた光をその強さに応じて電気信号に変換するも
のである。固体撮像素子15の面上に撮影した光を受け
る部分である受光部16を配置し、受光部16を含む固
体撮像素子15の面上に固体撮像素子15の外部接続の
ための電極パッド17を形成する。On the other hand, the solid-state imaging device 15 is manufactured in a process different from that of the wiring board 11, and the process will be described next. As shown in FIG. 1C, a solid-state imaging device 15 is prepared. Here, the solid-state imaging device 15 is made of a silicon plate wafer, and is, for example, a CCD type, a CMOS type, or the like, and converts received light into an electric signal according to its intensity. A light receiving section 16 which is a portion for receiving the photographed light is arranged on the surface of the solid-state imaging device 15. Form.
【0012】次いで、図1(d)に示すように、加熱可
能なステージ(図示略)に金バンプ14が接合された配
線板11を載置し、配線板11の開口部12に受光部1
6が臨むように固体撮像素子15を設置する。次いで、
固体撮像素子15の上方から超音波と圧力を固体撮像素
子15に加え、固体撮像素子15の電極パッド17と金
バンプ14とを金属結合する。このときのステージ温度
は、加熱する際のボンディング条件によるが、例えば室
温から150℃程度である。上記金属結合により、配線
板11と固体撮像素子15が金バンプ14を介して電気
的に接続されるとともに、上記金属結合により配線板1
1と固体撮像素子15が一体的なパッケージ状態で接合
されることにより、固体撮像素子パッケージ18が形成
される。ここでのパッケージは、たとえばCCD型、C
MOS型などの固体撮像素子を含むLSIチップを保護
し、かつμm単位のLSIとmm単位のプリント板との
接続の仲介等の役目を担っているものである。Next, as shown in FIG. 1D, the wiring board 11 to which the gold bumps 14 are bonded is placed on a heatable stage (not shown), and the light receiving section 1 is placed in the opening 12 of the wiring board 11.
The solid-state imaging device 15 is set so that the front surface 6 faces. Then
Ultrasonic waves and pressure are applied to the solid-state imaging device 15 from above the solid-state imaging device 15, and the electrode pads 17 of the solid-state imaging device 15 and the gold bumps 14 are metal-bonded. The stage temperature at this time depends on the bonding conditions at the time of heating, but is, for example, about room temperature to about 150 ° C. The wiring board 11 and the solid-state imaging device 15 are electrically connected via the gold bumps 14 by the metal bonding, and the wiring board 1 is connected by the metal bonding.
The solid-state imaging device package 18 is formed by joining the solid-state imaging device 1 and the solid-state imaging device 15 in an integrated package state. The package here is, for example, CCD type, C
It protects an LSI chip including a solid-state imaging device such as a MOS type, and has a role of mediating connection between an LSI in μm unit and a printed board in mm unit.
【0013】次に、固体撮像素子パッケージ18の動作
の概略を説明すると、開口部12を通過した光は受光部
16で受光され、受光部16によって受光された光は固
体撮像素子15により電気信号に変換される。次いで、
変換された電気信号は金バンプ14を介して配線板11
へ送られ、配線板11から端子(図示略)等により外部
へ出力される。Next, the operation of the solid-state imaging device package 18 will be briefly described. Light passing through the opening 12 is received by the light-receiving portion 16, and the light received by the light-receiving portion 16 is converted into an electric signal by the solid-state imaging device 15. Is converted to Then
The converted electric signal is applied to the wiring board 11 via the gold bump 14.
And output from the wiring board 11 to the outside through terminals (not shown) or the like.
【0014】次に、図1に示す製造工程により製造され
た固体撮像素子パッケージ18の実装例を説明する。第
2図は、固体撮像素子パッケージ18のレンズ等を実装
した固体撮像素子モジュール19の断面を示す図であ
る。構成を説明すると、固体撮像素子モジュール19は
固体撮像素子パッケージ18を有しており、固体撮像素
子パッケージ18に対して、配線板11を挟んで固体撮
像素子15の反対面にガラス等の透明なシール材20が
配置されており、シール材20は接着剤を用いて配線板
11の開口部12を固体撮像素子15の反対側で機密封
止している。シール材20は、透明なガラス等を素材と
し、固体撮像素子パッケージ18の受光部16へ光を通
過することができるとともに、受光部16をゴミ等の付
着および湿気から守るものである。シール材20の採光
面側にはレンズ鏡筒21が配置され、レンズ鏡筒21に
は光を通過可能な光窓22が形成されている。レンズ鏡
筒21は内部にレンズ23を有し、レンズ23は光窓2
2を通過した入射光を固体撮像素子15の受光部16に
結像する。Next, an example of mounting the solid-state imaging device package 18 manufactured by the manufacturing process shown in FIG. 1 will be described. FIG. 2 is a diagram showing a cross section of the solid-state imaging device module 19 on which the lens and the like of the solid-state imaging device package 18 are mounted. Explaining the configuration, the solid-state imaging device module 19 has a solid-state imaging device package 18, and a transparent material such as glass is provided on the opposite surface of the solid-state imaging device 15 with the wiring board 11 interposed therebetween. A sealing material 20 is provided, and the sealing material 20 seals the opening 12 of the wiring board 11 on the opposite side of the solid-state imaging device 15 using an adhesive. The sealing material 20 is made of transparent glass or the like, and is capable of transmitting light to the light receiving unit 16 of the solid-state imaging device package 18 and protecting the light receiving unit 16 from adhesion of dust and moisture. A lens barrel 21 is disposed on the daylighting surface side of the sealing material 20, and an optical window 22 through which light can pass is formed in the lens barrel 21. The lens barrel 21 has a lens 23 inside, and the lens 23 is
The incident light passing through 2 is focused on the light receiving unit 16 of the solid-state imaging device 15.
【0015】一方、配線板11に接合された固体撮像素
子15の周囲に封止樹脂24が塗布されることで、固体
撮像素子パッケージ18が樹脂封止され、樹脂封止によ
り配線板11と固体撮像素子15との接合が補強され
る。封止樹脂24には、エポキシ系樹脂等が用いられ、
例えばトランスファモールド法などにより固体撮像素子
15に密着し被覆される。On the other hand, by applying a sealing resin 24 around the solid-state imaging device 15 joined to the wiring board 11, the solid-state imaging device package 18 is resin-sealed. The bonding with the image sensor 15 is reinforced. An epoxy resin or the like is used for the sealing resin 24,
For example, the solid-state imaging device 15 is tightly covered by a transfer molding method or the like.
【0016】固体撮像素子パッケージ18の配線板11
には、駆動回路や映像信号処理回路などの基本機能を集
約したICやチップ部品およびコネクタなどの部品25
が取り付けられる。なお、ICやチップ部品およびコネ
クタなどの部品25の取付けは、部品の数、サイズおよ
び取付け位置など実施の形態により様々な状態がある。The wiring board 11 of the solid-state imaging device package 18
Includes components such as ICs, chip components, and connectors that integrate basic functions such as drive circuits and video signal processing circuits.
Is attached. The attachment of the component 25 such as an IC, a chip component, and a connector has various states depending on the embodiment such as the number, size, and attachment position of the component.
【0017】上記、シール材19、レンズ鏡筒20およ
びICやチップ部品およびコネクタなどの部品24等の
構成により、固体撮像素子パッケージ18が実装され、
固体撮像素子モジュール19が形成される。The solid-state image pickup device package 18 is mounted by the structure of the seal member 19, the lens barrel 20, and the components 24 such as ICs, chip components and connectors.
The solid-state imaging device module 19 is formed.
【0018】次に、固体撮像素子モジュール19の動作
の概略を説明すると、レンズ鏡筒21に形成された光窓
22に入射した光はレンズ23により固体撮像素子15
の受光部16に結像される。受光部16に結像された光
は固体撮像素子15により電気信号に変換され、変換さ
れた電気信号は固体撮像素子15から金バンプ14を介
して配線板11へ送られる。送られた電気信号は配線板
11に取り付けられたICやチップ部品およびコネクタ
などの部品25により映像信号処理等をされる。Next, the operation of the solid-state image sensor module 19 will be briefly described. Light incident on an optical window 22 formed in a lens barrel 21 is transmitted by a lens 23 to the solid-state image sensor 15.
Is formed on the light receiving section 16 of the image forming apparatus. The light focused on the light receiving unit 16 is converted into an electric signal by the solid-state imaging device 15, and the converted electric signal is sent from the solid-state imaging device 15 to the wiring board 11 via the gold bump 14. The transmitted electric signal is subjected to video signal processing and the like by a component 25 such as an IC, a chip component and a connector attached to the wiring board 11.
【0019】この実施の形態によれば、固体撮像素子パ
ッケージ18の製造工程において、金バンプ14が配線
板11の面上のパッド13上に形成される。そのため、
固体撮像素子15の受光部16を上向きに載置し、固体
撮像素子15に形成される電極パッド17上に金バンプ
14を形成する工程がなくなる。したがって、受光部1
6への異物等の付着する確率が大幅に低下し、受光部1
6への異物等の付着による黒点不良が軽減される。ま
た、金バンプ14が配線板11のパッド13上に形成さ
れる工程は、配線板11が数十個並んだ状態の集合配線
板単位で搬送できる。したがって、配線板11の搬送回
数が数十分の1になり、工程タクトを短縮できる。さら
に、固体撮像素子15の電極パッド17上に超音波およ
び圧力が加えられるのは、固体撮像素子15と配線板1
1とを接合する超音波フリップチップ時の1回のみとな
る。したがって、固体撮像素子15の電極パッド17は
超音波および圧力によるダメージが半減され、品質信頼
性が向上する。According to this embodiment, the gold bumps 14 are formed on the pads 13 on the surface of the wiring board 11 in the manufacturing process of the solid-state imaging device package 18. for that reason,
The step of mounting the light receiving section 16 of the solid-state imaging device 15 upward and forming the gold bumps 14 on the electrode pads 17 formed on the solid-state imaging device 15 is eliminated. Therefore, the light receiving unit 1
6 greatly reduces the probability of foreign matter or the like adhering to the light receiving unit 1
Black spot defects due to the attachment of foreign matter and the like to the surface 6 are reduced. In the step of forming the gold bumps 14 on the pads 13 of the wiring board 11, the gold bumps 14 can be conveyed in a unit of a collective wiring board in which several tens of the wiring boards 11 are arranged. Therefore, the number of times the wiring board 11 is transported is reduced to several tenths, and the tact time of the process can be reduced. Further, ultrasonic waves and pressure are applied on the electrode pads 17 of the solid-state imaging device 15 because the solid-state imaging device 15 and the wiring board 1
1 is performed only once during the ultrasonic flip chip bonding. Therefore, damage to the electrode pad 17 of the solid-state imaging device 15 due to ultrasonic waves and pressure is reduced by half, and quality reliability is improved.
【0020】なお、上述の説明における様々な細部の特
定ないし実例および数値や文字列その他の記号の例示
は、本発明の思想を明瞭にするための、あくまでも参考
であって、それらのすべてまたは一部によって本発明の
思想が限定されないことは明らかである。また、周知の
手法、周知の手順、周知のアーキテクチャおよび周知の
回路構成等についてはその細部にわたる説明を避ける
が、これも説明を簡潔にするためであって、これら周知
事項のすべてまたは一部を意図的に排除するものではな
い。かかる周知事項は本発明の出願時点で当業者の知り
得るところであるので、上述の説明に当然含まれてい
る。It should be noted that the specification or examples of various details and the examples of numerical values, character strings, and other symbols in the above description are merely reference for clarifying the idea of the present invention, and all or one of them is referred to. It is obvious that the concept of the present invention is not limited by the parts. In addition, well-known techniques, well-known procedures, well-known architectures, and well-known circuit configurations will not be described in detail, but this is also for the sake of brevity, and all or a part of these well-known matters will be described. It is not intentionally excluded. Such a well-known matter can be known to those skilled in the art at the time of filing the present invention, and is therefore included in the above description.
【0021】[0021]
【発明の効果】請求項1記載の発明によれば、配線が形
成される配線板に光を通過可能な開口部を形成し、該配
線板における開口部側の端部にパッドを形成し、前記配
線板のパッド上にバンプを形成するようにしたので、固
体撮像素子の受光部を上向きに載置し、該固体撮像素子
の面上のパッドにバンプを形成する工程を無くすことが
でき、製品不良や故障を招かずに工程タクトを短縮する
ことができる。請求項2記載の発明によれば、前記配線
板を超音波フリップチップ工法により固体撮像素子に接
合するようにしたので、製造工程を室温から150℃程
度で行うことができ、製造工程の複雑化を招かずに工程
タクトを短縮することができる。According to the first aspect of the present invention, an opening through which light can pass is formed in a wiring board on which wiring is formed, and a pad is formed at an end of the wiring board on the opening side. Since the bumps are formed on the pads of the wiring board, the light receiving portion of the solid-state imaging device is placed upward, and the step of forming the bumps on the pads on the surface of the solid-state imaging device can be eliminated, The process tact can be shortened without causing product failure or failure. According to the second aspect of the present invention, since the wiring board is bonded to the solid-state imaging device by the ultrasonic flip chip method, the manufacturing process can be performed at room temperature to about 150 ° C., and the manufacturing process is complicated. Process time can be shortened without inducing.
【図1】本発明の実施の形態による固体撮像素子パッケ
ージの製造方法の一例を示す工程図である。FIG. 1 is a process chart showing an example of a method for manufacturing a solid-state imaging device package according to an embodiment of the present invention.
【図2】実施の形態による固体撮像素子パッケージをモ
ジュールに実装した実装例を示す断面図である。FIG. 2 is a cross-sectional view illustrating a mounting example in which the solid-state imaging device package according to the embodiment is mounted on a module.
【図3】従来技術の固体撮像素子パッケージの製造方法
を示す工程図である。FIG. 3 is a process chart showing a method for manufacturing a solid-state imaging device package according to a conventional technique.
11……配線板、12……開口部、13……パッド、1
4……金バンプ、15…固体撮像素子、16……受光
部、17……電極パッド11 ... wiring board, 12 ... opening, 13 ... pad, 1
4 ... gold bump, 15 ... solid-state image sensor, 16 ... light receiving section, 17 ... electrode pad
───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 4M118 AA10 AB01 BA10 BA14 FA06 GD03 GD07 HA02 HA25 HA26 HA31 5F044 KK16 LL01 QQ00 5F088 BA16 BB03 EA04 JA01 JA09 JA20 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M118 AA10 AB01 BA10 BA14 FA06 GD03 GD07 HA02 HA25 HA26 HA31 5F044 KK16 LL01 QQ00 5F088 BA16 BB03 EA04 JA01 JA09 JA20
Claims (2)
な開口部を形成し、該配線板における開口部側の端部に
パッドを形成する工程と、 前記配線板のパッド上にバンプを形成する工程と、 光を電気信号に変換する固体撮像素子に光を入射する受
光部を配置し、該固体撮像素子の受光部を有する面側に
パッドを形成する工程と、 前記配線板の開口部に受光部が臨むように前記固体撮像
素子を配置し、前記配線板のパッドに前記固体撮像素子
のパッドをバンプを介して接合する工程と、を含むこと
を特徴とする半導体装置の製造方法。1. A step of forming an opening through which light can pass through a wiring board on which wiring is formed, and forming a pad at an end of the wiring board on the opening side; and forming a bump on a pad of the wiring board. Forming a light-receiving portion for inputting light to a solid-state imaging device that converts light into an electric signal, and forming a pad on a surface side of the solid-state imaging device having the light-receiving portion; Manufacturing the semiconductor device, comprising: arranging the solid-state imaging device so that the light-receiving portion faces the opening; and bonding the pad of the solid-state imaging device to the pad of the wiring board via a bump. Method.
る工程は、超音波フリップチップ工法を用いて行うこと
を特徴とする請求項1記載の半導体装置の製造方法。2. The method according to claim 1, wherein the step of bonding the solid-state imaging device to the wiring board is performed using an ultrasonic flip-chip method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001139524A JP2002334976A (en) | 2001-05-10 | 2001-05-10 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001139524A JP2002334976A (en) | 2001-05-10 | 2001-05-10 | Method for manufacturing semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002334976A true JP2002334976A (en) | 2002-11-22 |
Family
ID=18986287
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001139524A Pending JP2002334976A (en) | 2001-05-10 | 2001-05-10 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002334976A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005017684A (en) * | 2003-06-26 | 2005-01-20 | Nec Corp | Optical module and method for manufacturing the same |
| JP2005045092A (en) * | 2003-07-24 | 2005-02-17 | Konica Minolta Opto Inc | Semiconductor device, imaging device, and semiconductor device manufacturing method |
| JP2007181212A (en) * | 2005-12-27 | 2007-07-12 | Samsung Electro-Mechanics Co Ltd | Camera module package |
| JP2010199202A (en) * | 2009-02-24 | 2010-09-09 | Dainippon Printing Co Ltd | Image sensor module |
-
2001
- 2001-05-10 JP JP2001139524A patent/JP2002334976A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005017684A (en) * | 2003-06-26 | 2005-01-20 | Nec Corp | Optical module and method for manufacturing the same |
| JP2005045092A (en) * | 2003-07-24 | 2005-02-17 | Konica Minolta Opto Inc | Semiconductor device, imaging device, and semiconductor device manufacturing method |
| JP2007181212A (en) * | 2005-12-27 | 2007-07-12 | Samsung Electro-Mechanics Co Ltd | Camera module package |
| JP2010199202A (en) * | 2009-02-24 | 2010-09-09 | Dainippon Printing Co Ltd | Image sensor module |
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