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JP2003007562A - Multilayer ceramic capacitor and its manufacturing method - Google Patents

Multilayer ceramic capacitor and its manufacturing method

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Publication number
JP2003007562A
JP2003007562A JP2001184602A JP2001184602A JP2003007562A JP 2003007562 A JP2003007562 A JP 2003007562A JP 2001184602 A JP2001184602 A JP 2001184602A JP 2001184602 A JP2001184602 A JP 2001184602A JP 2003007562 A JP2003007562 A JP 2003007562A
Authority
JP
Japan
Prior art keywords
ceramic
metal
internal electrode
raw material
dielectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001184602A
Other languages
Japanese (ja)
Inventor
Koichi Chazono
広一 茶園
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP2001184602A priority Critical patent/JP2003007562A/en
Publication of JP2003007562A publication Critical patent/JP2003007562A/en
Pending legal-status Critical Current

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  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve the problem that the contribution of an electric barrier caused by a grain boundary of dielectric layers becomes small, and field intensity applied to one layer out of the dielectric layers becomes large when the layer is thinned, so that the insulation property of the dielectric layers is apt to be deteriorated in a high temperature load life test, and therefor it is difficult to make the dielectric layers thinner than or equal to 3 μm or further 2 μm in the conventional technique. SOLUTION: Metal powder or organic metal compound is contained in a ceramic material for forming the dielectric layers. In the case of baking, metal is driven out from the dielectric layers, thereby forming a thin film metal layer that is an electric barrier between the dielectric layers and an internal electrode layer.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】この発明は、誘電体層の厚み
が、例えば5μm以下の、薄層大容量タイプの積層セラ
ミックコンデンサとその製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin-layer large-capacity type monolithic ceramic capacitor having a dielectric layer having a thickness of, for example, 5 μm or less, and a method for manufacturing the same.

【0002】[0002]

【従来の技術】一般に、積層セラミックコンデンサは、
セラミックグリーンシートと内部電極パターンとを交互
に多数層積層し、内部電極パターン毎に裁断し、得られ
たチップ状の積層体の端部に外部電極ペーストを付加
し、1200℃程度の高温で焼成することにより製造さ
れている。
2. Description of the Related Art Generally, a monolithic ceramic capacitor is
A large number of layers of ceramic green sheets and internal electrode patterns are alternately laminated, and the internal electrode patterns are cut, external electrode paste is added to the ends of the obtained chip-shaped laminated body, and firing is performed at a high temperature of about 1200 ° C. It is manufactured by

【0003】ここで、セラミックグリーンシートはセラ
ミック原料粉末を有機バインダでつないでシート状に形
成したものからなり、焼成により誘電体層になる。内部
電極パターン及び外部電極ペーストは金属粉末を主成分
とする導電性ペーストからなり、この導電性ペーストは
焼成により内部電極層や外部電極になる。
Here, the ceramic green sheet is formed by connecting ceramic raw material powders with an organic binder to form a sheet, and becomes a dielectric layer by firing. The internal electrode pattern and the external electrode paste are made of a conductive paste containing metal powder as a main component, and this conductive paste becomes an internal electrode layer or an external electrode by firing.

【0004】ところで、積層セラミックコンデンサは、
誘電体層の材料組成、誘電体層を形成する原料粉体の物
性、誘電体層を形成するセラミックグリーンシートの物
性、内部電極層と誘電体層との同時焼成、誘電体層の再
酸化技術等を駆使して、今や誘電体層の一層厚みが3μ
mで、積層数が600層を超えるものが量産されるよう
になっている。
By the way, the monolithic ceramic capacitor is
Material composition of dielectric layer, physical properties of raw material powder for forming dielectric layer, physical properties of ceramic green sheet for forming dielectric layer, simultaneous firing of internal electrode layer and dielectric layer, reoxidation technology of dielectric layer Now, the thickness of the dielectric layer is 3μ.
m, the number of laminated layers exceeds 600 layers is mass-produced.

【0005】[0005]

【発明が解決しようとする課題】ところで、誘電体層を
薄層化した場合、誘電体層の粒界に起因する電気的障壁
の寄与が小さくなり、しかも、誘電体層の一層に印加さ
れる電界強度が大きくなるので、高温負荷寿命試験にお
いて、誘電体層が絶縁劣化し易くなる。従って、誘電体
層を3μm、更には2μm以下に薄層化することは、従
来の技術の延長線では実現が困難である。
By the way, when the dielectric layer is made thin, the contribution of the electrical barrier due to the grain boundary of the dielectric layer is reduced, and moreover, it is applied to one layer of the dielectric layer. Since the electric field strength increases, the dielectric layer is easily deteriorated in insulation in the high temperature load life test. Therefore, it is difficult to reduce the thickness of the dielectric layer to 3 μm, further to 2 μm or less, as an extension of the conventional technique.

【0006】この発明は、誘電体層を薄層化しても絶縁
劣化が生じ難い、寿命のできるだけ長い信頼性の高い積
層セラミックコンデンサとその製造方法を提供すること
を目的とする。
It is an object of the present invention to provide a highly reliable multilayer ceramic capacitor which has a long life as much as possible and is highly resistant to insulation deterioration even if the dielectric layer is made thin, and a method for manufacturing the same.

【0007】[0007]

【課題を解決するための手段】この発明に係る積層セラ
ミックコンデンサは、誘電体磁器組成物からなる1又は
2以上の誘電体層と、この誘電体層を挟持している少な
くとも2以上の内部電極層と、該内部電極層に電気的に
接続されている外部電極と、該誘電体層と該内部電極層
との間に形成されている金属薄膜層とを備えていること
を特徴とするものである。
A monolithic ceramic capacitor according to the present invention comprises one or more dielectric layers made of a dielectric ceramic composition and at least two internal electrodes sandwiching the dielectric layer. A layer, an external electrode electrically connected to the internal electrode layer, and a metal thin film layer formed between the dielectric layer and the internal electrode layer. Is.

【0008】また、この発明に係る積層セラミックコン
デンサの製造方法は、セラミック原料を調製する原料調
製工程と、該原料調製工程で得られたセラミック原料を
用いてセラミックグリーンシートを形成するシート形成
工程と、該シート形成工程で得られたセラミックグリー
ンシートに内部電極パターンを印刷する印刷工程と、該
印刷工程を経たセラミックグリーンシートを積層して積
層体を得る積層工程と、該積層工程で得られた積層体を
内部電極パターン毎に裁断してチップ状の積層体を得る
裁断工程と、該裁断工程で得られたチップ状の積層体を
焼成する焼成工程とを備え、前記原料調製工程は、前記
セラミック原料は金属粉末又は有機金属化合物を含有し
ていることを特徴とするものである。
The method for manufacturing a monolithic ceramic capacitor according to the present invention includes a raw material preparing step of preparing a ceramic raw material, and a sheet forming step of forming a ceramic green sheet using the ceramic raw material obtained in the raw material preparing step. A printing step of printing an internal electrode pattern on the ceramic green sheet obtained in the sheet forming step; a laminating step of laminating the ceramic green sheets subjected to the printing step to obtain a laminate; The raw material preparing step includes a cutting step of cutting the laminated body for each internal electrode pattern to obtain a chip-shaped laminated body, and a firing step of firing the chip-shaped laminated body obtained in the cutting step. The ceramic raw material is characterized by containing a metal powder or an organometallic compound.

【0009】ここで、この発明は、前記誘電体層の厚さ
が0.5〜5μm又は前記セラミックグリーンシートの
厚さが0.7〜10μmの場合、特に有効である。前記
誘電体層の厚さが0.5μm未満又は前記セラミックグ
リーンシートの厚さが0.7μm未満になると、誘電体
層の一層に印加される電界強度が大きくなり過ぎ、誘電
体層が高温負荷寿命試験において、絶縁劣化し易くなる
からである。
The present invention is particularly effective when the dielectric layer has a thickness of 0.5 to 5 μm or the ceramic green sheet has a thickness of 0.7 to 10 μm. When the thickness of the dielectric layer is less than 0.5 μm or the thickness of the ceramic green sheet is less than 0.7 μm, the electric field strength applied to one layer of the dielectric layer becomes too large and the dielectric layer is loaded with high temperature. This is because the insulation deterioration is likely to occur in the life test.

【0010】また、前記金属薄膜層を形成する金属又は
合金、又はセラミック原料中に含有させる金属粉末又は
有機金属化合物中の金属としては前記誘電体磁器組成物
に対して内部電極層を形成している金属より濡れ性の悪
いもの、具体的には、前記誘電体磁器組成物に対する接
触角が110〜180度の金属又は合金が好ましい。
Further, as the metal or alloy forming the metal thin film layer, or the metal powder or metal in the organometallic compound contained in the ceramic raw material, an internal electrode layer is formed on the dielectric ceramic composition. A metal or an alloy having a wettability lower than that of the metal, specifically, a metal or an alloy having a contact angle of 110 to 180 degrees with respect to the dielectric ceramic composition is preferable.

【0011】また、前記誘電体磁器組成物がチタン酸バ
リウム系で、内部電極層がNi又はNiを主成分とする
合金からなる場合、内部電極層より濡れ性の悪い金属又
は合金としては、例えば、Au,Pt,Pd,Ag及び
Cuから選択された1種又は2種以上の金属、又はA
u,Pt,Pd,Ag及びCuから選択された1種又は
2種以上の金属とNiとの合金を挙げることができる。
チップ状の積層体の焼成温度が高い場合には、Pt,P
dが好ましい。
When the dielectric ceramic composition is a barium titanate system and the internal electrode layer is made of Ni or an alloy containing Ni as a main component, examples of the metal or alloy having a lower wettability than the internal electrode layer include: , One or more metals selected from Au, Pt, Pd, Ag and Cu, or A
An alloy of Ni and one or more metals selected from u, Pt, Pd, Ag and Cu can be mentioned.
When the firing temperature of the chip-shaped laminate is high, Pt, P
d is preferred.

【0012】また、前記金属薄膜層の厚さは10Å〜5
0nmが好ましい。金属薄膜層の厚さが10Å未満では
電気的障壁として不充分であり、金属薄膜層の厚さが5
0nmを超えると、金属薄膜層の材料費が多くなり過
ぎ、積層セラミックコンデンサの原料コストが高くなり
過ぎるからである。
The metal thin film layer has a thickness of 10Å-5.
0 nm is preferred. If the thickness of the metal thin film layer is less than 10Å, it is insufficient as an electrical barrier, and the thickness of the metal thin film layer is 5
This is because if the thickness exceeds 0 nm, the material cost of the metal thin film layer becomes too high, and the raw material cost of the monolithic ceramic capacitor becomes too high.

【0013】また、セラミック原料中に含有させる金属
は金属粉末/ゾルの状態のものに限らず、脱バインダ性
を損なわない範囲で有機金属化合物等の状態のものでも
よい。
The metal contained in the ceramic raw material is not limited to the metal powder / sol state, but may be the metal state such as an organometallic compound as long as the binder removal property is not impaired.

【0014】また、セラミック原料中に含有させる金属
粉末又は有機金属化合物はセラミック原料100重量部
に対して0.04〜5重量部が好ましい。金属粉末又は
有機金属化合物が0.04重量部未満では電気的障壁と
して不充分であり、金属粉末又は有機金属化合物が5重
量部を超えると、積層セラミックコンデンサの原料コス
トが高くなり過ぎるからである。
The metal powder or the organometallic compound contained in the ceramic raw material is preferably 0.04 to 5 parts by weight with respect to 100 parts by weight of the ceramic raw material. If the amount of the metal powder or the organometallic compound is less than 0.04 parts by weight, it is insufficient as an electric barrier, and if the amount of the metal powder or the organometallic compound exceeds 5 parts by weight, the raw material cost of the monolithic ceramic capacitor becomes too high. .

【0015】また、前記金属粉末の平均粒径は0.00
5〜0.1μmが好ましい。金属粉末の平均粒径がこの
範囲にあるとセラミック原料中に良好に分散するからで
ある。また、金属薄膜層は、目的の効果を発揮する限
り、必ずしも完全な膜を形成していなくても良い。
The average particle size of the metal powder is 0.00
5 to 0.1 μm is preferable. This is because when the average particle size of the metal powder is in this range, the metal powder is well dispersed in the ceramic raw material. Further, the metal thin film layer does not necessarily have to form a perfect film as long as it exhibits the intended effect.

【0016】[0016]

【実施例】まず、BaTiO,Ho,MgO,
MnO及びBaSiOの各化合物の粉末及びPt粉末
を表1に示す割合で各々秤量し、これらの化合物をPS
Zを入れたボールミルに入れ、水を加え、湿式で約15
時間混合した。そして、得られた泥漿を脱水し、150
℃で15時間加熱し、乾燥させた。
EXAMPLES First, BaTiO 3 , Ho 2 O 3 , MgO,
Powders of each compound of MnO and BaSiO 3 and Pt powder were weighed at the ratios shown in Table 1, and these compounds were treated with PS.
Put it in a ball mill containing Z, add water, and wet about 15
Mixed for hours. Then, the obtained sludge is dehydrated to 150
It was heated at ℃ for 15 hours and dried.

【0017】[0017]

【表1】 [Table 1]

【0018】次に、乾燥させた前記泥漿を粉砕し、これ
を大気中において約800℃で2時間仮焼し、この仮焼
物をボールミルに入れ、エタノールを加え、湿式で約8
時間解砕した。そして、得られた泥漿を120℃で5時
間加熱し、乾燥させ、仮焼物の粉末を得た。
Next, the dried slurry is crushed and calcined in the atmosphere at about 800 ° C. for 2 hours, the calcined product is put into a ball mill, ethanol is added, and a wet process of about 8 is performed.
Crushed on time. Then, the obtained slurry was heated at 120 ° C. for 5 hours and dried to obtain a calcined powder.

【0019】次に、この仮焼物の粉末1000g(10
0重量部)に、アクリル酸エステルポリマー、グリセリ
ン、縮合リン酸塩の水溶液からなる有機バインダーを1
5重量%添加し、更に、50重量%の水を加え、これら
をボールミルに入れ、粉砕及び混合してスラリーを作成
した。なお、この実施例では原料粉末にPt粉末を入れ
て混合しているが、スラリーを作成する段階でPt粉末
を加えても良い。
Next, 1000 g (10
1 part by weight of an organic binder composed of an aqueous solution of acrylic acid ester polymer, glycerin and condensed phosphate.
5% by weight was added, and further 50% by weight of water was added, and these were placed in a ball mill, pulverized and mixed to prepare a slurry. Although Pt powder is added to the raw material powder and mixed in this embodiment, Pt powder may be added at the stage of preparing the slurry.

【0020】次に、このスラリーを真空脱泡機に入れて
脱泡した後、リバースロールコータに入れ、ポリエステ
ルフィルム上にこのスラリーからなる薄膜を形成した。
そして、この薄膜をポリエステルフィルム上で100℃
に加熱して乾燥させ、打ち抜き、10cm×10cmの
正方形のグリーンシートを得た。
Next, this slurry was put in a vacuum defoaming machine to defoam, and then put in a reverse roll coater to form a thin film of this slurry on the polyester film.
Then, this thin film is placed on a polyester film at 100 ° C.
It was heated to dryness and punched out to obtain a 10 cm × 10 cm square green sheet.

【0021】一方、平均粒径が0.2μmのニッケル粉
末10gと、エチルセルロース0.9gをブチルカルビ
トール9.1gに溶解させたものとを撹拌機に入れ、1
0時間撹拌して、内部電極層用の導電性ペーストを得
た。そして、上記グリーンシートにこの導電性ペースト
からなる導電パターンを印刷し、乾燥させた。
On the other hand, 10 g of nickel powder having an average particle size of 0.2 μm and 0.9 g of ethyl cellulose dissolved in 9.1 g of butyl carbitol were placed in a stirrer, and 1
After stirring for 0 hour, a conductive paste for internal electrode layers was obtained. Then, a conductive pattern made of this conductive paste was printed on the green sheet and dried.

【0022】次に、上記導電パターンの印刷面を上にし
てグリーンシートを10枚積層した。この際、隣接する
上下のシートにおいて、その印刷面がパターンの長手方
向に約半分程ずれるように配置した。更に、この積層物
の上下両面に導電パターンの印刷の施されていないグリ
ーンシートを積層した。
Next, ten green sheets were laminated with the printed surface of the conductive pattern facing up. At this time, the adjacent upper and lower sheets were arranged such that their printing surfaces were displaced by about half in the longitudinal direction of the pattern. Further, green sheets on which conductive patterns were not printed were laminated on the upper and lower surfaces of this laminate.

【0023】次に、この積層物を約50℃の温度で厚さ
方向に約40トンの圧力を加えて圧着させ、その後、こ
の積層物を格子状に裁断し、縦3.2mm×横1.6m
mの積層チップを得た。
Next, the laminate is pressed at a temperature of about 50 ° C. by applying a pressure of about 40 tons in the thickness direction, and then the laminate is cut into a lattice shape, and the length is 3.2 mm × width 1 .6m
m laminated chips were obtained.

【0024】次に、内部電極層が露出する積層チップの
端面にNi外部電極をディップで形成し、この積層チッ
プを雰囲気焼成が可能な炉に入れ、N雰囲気中で加熱
して有機バインダを除去させ、続いて、酸素分圧が10
−5〜10−10atmの条件下、1200℃で焼成
し、その後、N雰囲気下、600〜1000℃で再酸
化処理を行ない、積層磁器コンデンサを得た。
Next, a Ni external electrode is formed by dipping on the end face of the laminated chip from which the internal electrode layer is exposed, and the laminated chip is placed in a furnace capable of atmospheric firing and heated in an N 2 atmosphere to form an organic binder. And then the oxygen partial pressure is reduced to 10
It was fired at 1200 ° C. under the condition of −5 to 10 −10 atm, and then reoxidized at 600 to 1000 ° C. in an N 2 atmosphere to obtain a laminated ceramic capacitor.

【0025】次に、得られた積層磁器コンデンサを内部
電極層に直交する面で切断し、その断面を電子顕微鏡で
観察したところ、図1に示すように、内部電極層10と
誘電体層12の間に金属薄膜層14が形成されていた。
これは、セラミック原料中に添加した金属粉末の誘電体
層に対する濡れ性が悪いので、焼成中に誘電体層12か
ら金属粉末が排除され、内部電極層10と誘電体層12
の界面に集まって形成されたものと考えられる。
Next, the obtained laminated ceramic capacitor was cut along a plane orthogonal to the internal electrode layers and the cross section thereof was observed with an electron microscope. As shown in FIG. 1, the internal electrode layers 10 and the dielectric layers 12 were obtained. The metal thin film layer 14 was formed between them.
This is because the metal powder added to the ceramic raw material has poor wettability with respect to the dielectric layer, so that the metal powder is removed from the dielectric layer 12 during firing, and the internal electrode layer 10 and the dielectric layer 12 are removed.
It is thought that they were formed by gathering at the interface of.

【0026】次に、同様にして、積層磁器コンデンサの
断面を観察し、誘電体層12の厚さ(μm)及び金属薄
膜層14の厚さ(μm)を測定したとこと、表2に示す
通りであった。
Next, in the same manner, the cross section of the laminated ceramic capacitor was observed, and the thickness (μm) of the dielectric layer 12 and the thickness (μm) of the metal thin film layer 14 were measured. It was on the street.

【0027】次に、得られた積層磁器コンデンサの電気
的諸特性を測定したところ、表2に示す通りであった。
Next, various electric characteristics of the obtained laminated ceramic capacitor were measured, and the results were as shown in Table 2.

【0028】なお、電気的諸特性は次の要領で測定し
た。
The electrical characteristics were measured as follows.

【0029】(A) 比誘電率εs は、温度20℃、周波
数1kHz、電圧(実効値)1.0Vの条件で静電容量
を測定し、この測定値と、一対の内部電極層14の対向
面積と、一対の内部電極層間の誘電体磁器層の厚さから
計算で求めた。
(A) The relative permittivity ε s is measured by measuring the electrostatic capacity under the conditions of a temperature of 20 ° C., a frequency of 1 kHz, and a voltage (effective value) of 1.0 V. It was calculated from the area and the thickness of the dielectric ceramic layer between the pair of internal electrode layers.

【0030】(B) 誘電損失tanδ(%)は、上記した
比誘電率の測定の場合と同一の条件で測定した。
(B) Dielectric loss tan δ (%) was measured under the same conditions as in the above-mentioned measurement of relative permittivity.

【0031】(C) 比抵抗(Ωcm)は、温度20℃にお
いてDC25Vを60秒間印加した後に、一対の外部電
極間の抵抗値を測定して得た。
(C) The specific resistance (Ωcm) was obtained by applying DC 25 V for 60 seconds at a temperature of 20 ° C. and then measuring the resistance value between a pair of external electrodes.

【0032】(D) 加速寿命(sec)は、150℃/1
8V/μmの直流電界下にて漏れ電流が最小漏れ電流の
10倍になるまでの時間を測定して得た。
(D) Accelerated life (sec) is 150 ° C / 1
It was obtained by measuring the time until the leakage current became 10 times the minimum leakage current under a DC electric field of 8 V / μm.

【0033】(E) 容量変化率(%)は、恒温槽の中に試
料を入れ、−25℃及び+85℃の各温度において、周
波数1kHz、電圧(実効値)1.0Vの条件で静電容
量を測定し、20℃の静電容量に対する静電容量の変化
率を求めることによって得た。
(E) The rate of change in capacity (%) was determined by placing the sample in a constant temperature bath, and at a temperature of -25 ° C. and + 85 ° C., at a frequency of 1 kHz and a voltage (effective value) of 1.0 V. It was obtained by measuring the capacitance and determining the rate of change of the capacitance with respect to the capacitance of 20 ° C.

【0034】[0034]

【表2】 [Table 2]

【0035】表1、表2から明らかなように、本発明に
よれば、誘電体層の層厚が5μm以下で、所望の電気的
諸特性を有し、かつ加速寿命が、試料No.1,No.
7,No.9の添加金属無しの場合(比較例)、すなわ
ちNi単独で内部電極を形成した場合と比較して著しく
改善された、信頼性の高い積層磁器コンデンサを得るこ
とができた。
As is clear from Tables 1 and 2, according to the present invention, the dielectric layer has a layer thickness of 5 μm or less, desired electrical characteristics, and an accelerated life of Sample No. 1, No.
7, No. It was possible to obtain a highly reliable laminated porcelain capacitor which was remarkably improved as compared with the case of No. 9 with no added metal (comparative example), that is, the case of forming the internal electrode with Ni alone.

【0036】[0036]

【発明の効果】この発明によれば、誘電体層に対する濡
れ性が内部電極層より悪い金属薄膜層を内部電極層と誘
電体層の間に設けたので、誘電体層を薄層化しても絶縁
劣化を生じ難い、寿命特性の良い積層セラミックコンデ
ンサを得ることができるという効果がある。
According to the present invention, since the metal thin film layer having a wettability with respect to the dielectric layer lower than that of the internal electrode layer is provided between the internal electrode layer and the dielectric layer, even if the dielectric layer is thinned. There is an effect that it is possible to obtain a monolithic ceramic capacitor that does not easily cause insulation deterioration and has good life characteristics.

【0037】ここで、寿命特性が良くなったのは次のよ
うな理由によるものと考えられる。すなわち、積層セラ
ミックコンデンサの内部電極層間においては、誘電体層
のセラミック粒子間の粒界や内部電極層と誘電体層との
界面に電気的障壁があり、誘電体層の一層厚みを薄くす
るとセラミック粒子間の粒界が少なくなって、内部電極
層間の電気的障壁が小さくなり、絶縁劣化を生じる。
The reason why the life characteristics are improved is considered to be as follows. That is, between the internal electrode layers of the monolithic ceramic capacitor, there are electrical barriers at the grain boundaries between the ceramic particles of the dielectric layer and at the interface between the internal electrode layer and the dielectric layer. The number of grain boundaries between particles is reduced, the electrical barrier between the internal electrode layers is reduced, and insulation deterioration occurs.

【0038】ところが、誘電体層に対する濡れ性が内部
電極層より悪い金属薄膜層を誘電体層と内部電極層の間
に設けると、誘電体層と金属薄膜層との界面の電気的障
壁が、内部電極層が誘電体層と直接接している場合より
高くなり、これが粒界の減少による電気的障壁の低下を
補い、絶縁劣化が生じ難くなる。このような理由から寿
命が延びたものと考えられる。
However, when a metal thin film layer having a wettability with respect to the dielectric layer lower than that of the internal electrode layer is provided between the dielectric layer and the internal electrode layer, the electrical barrier at the interface between the dielectric layer and the metal thin film layer is The internal electrode layer is higher than when it is in direct contact with the dielectric layer, which compensates for the lowering of the electrical barrier due to the reduction of grain boundaries, and insulation deterioration is less likely to occur. For this reason, it is considered that the life has been extended.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明に係る積層セラミックコンデンサの断
面の部分拡大説明図である。
FIG. 1 is a partially enlarged explanatory view of a cross section of a monolithic ceramic capacitor according to the present invention.

【符号の説明】[Explanation of symbols]

10 内部電極層 12 誘電体層 14 金属薄膜層 10 Internal electrode layer 12 Dielectric layer 14 Metal thin film layer

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5E001 AB03 AC04 AC09 AC10 AH01 AH06 AH09 AJ01 AJ02 5E082 AB03 BC35 BC39 EE04 EE18 EE19 EE23 EE26 EE35 FG06 FG26 FG54 LL01 LL02 LL03 MM24 PP03 PP09 PP10    ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 5E001 AB03 AC04 AC09 AC10 AH01                       AH06 AH09 AJ01 AJ02                 5E082 AB03 BC35 BC39 EE04 EE18                       EE19 EE23 EE26 EE35 FG06                       FG26 FG54 LL01 LL02 LL03                       MM24 PP03 PP09 PP10

Claims (15)

【特許請求の範囲】[Claims] 【請求項1】 誘電体磁器組成物からなる1又は2以上
の誘電体層と、この誘電体層を挟持している少なくとも
2以上の内部電極層と、該内部電極層に電気的に接続さ
れている外部電極と、該誘電体層と該内部電極層との間
に形成されている金属薄膜層とを備えていることを特徴
とする積層セラミックコンデンサ。
1. One or more dielectric layers made of a dielectric ceramic composition, at least two internal electrode layers sandwiching the dielectric layers, and electrically connected to the internal electrode layers. And a metal thin film layer formed between the dielectric layer and the internal electrode layer.
【請求項2】 前記誘電体層の厚さが0.5〜5μmで
あることを特徴とする請求項1に記載の積層セラミック
コンデンサ。
2. The multilayer ceramic capacitor according to claim 1, wherein the dielectric layer has a thickness of 0.5 to 5 μm.
【請求項3】 前記金属薄膜層を形成している金属の前
記誘電体磁器組成物に対する濡れ性が、前記内部電極層
を形成している金属の前記誘電体磁器組成物に対する濡
れ性より悪いことを特徴とする請求項1又は2に記載の
積層セラミックコンデンサ。
3. The wettability of the metal forming the metal thin film layer to the dielectric ceramic composition is worse than the wettability of the metal forming the internal electrode layer to the dielectric ceramic composition. The multilayer ceramic capacitor according to claim 1 or 2.
【請求項4】 前記金属薄膜層を形成している金属の前
記誘電体磁器組成物に対する接触角が110〜180度
であることを特徴とする請求項1〜3のいずれかに記載
の積層セラミックコンデンサ。
4. The laminated ceramic according to claim 1, wherein a contact angle of a metal forming the metal thin film layer with respect to the dielectric ceramic composition is 110 to 180 degrees. Capacitors.
【請求項5】 前記内部電極層がNi又はNiを主成分
とする合金からなることを特徴とする請求項1〜4のい
ずれかに記載の積層セラミックコンデンサ。
5. The multilayer ceramic capacitor according to claim 1, wherein the internal electrode layers are made of Ni or an alloy containing Ni as a main component.
【請求項6】 前記金属薄膜層が、Au,Pt,Pd,
Ag及びCuから選択された1種又は2種以上の金属、
又はAu,Pt,Pd,Ag及びCuから選択された1
種又は2種以上の金属とNiとの合金からなることを特
徴とする請求項1〜5のいずれかに記載の積層セラミッ
クコンデンサ。
6. The metal thin film layer comprises Au, Pt, Pd,
One or more metals selected from Ag and Cu,
Or 1 selected from Au, Pt, Pd, Ag and Cu
6. The multilayer ceramic capacitor according to claim 1, wherein the multilayer ceramic capacitor is made of one kind or an alloy of two or more kinds of metals and Ni.
【請求項7】 前記金属薄膜層の厚さが10Å〜50n
mであることを特徴とする請求項1〜6のいずれかに記
載の積層セラミックコンデンサ。
7. The metal thin film layer has a thickness of 10Å to 50 n.
The multilayer ceramic capacitor according to any one of claims 1 to 6, wherein m is m.
【請求項8】 セラミック原料を調製する原料調製工程
と、該原料調製工程で得られたセラミック原料を用いて
セラミックグリーンシートを形成するシート形成工程
と、該シート形成工程で得られたセラミックグリーンシ
ートに内部電極パターンを印刷する印刷工程と、該印刷
工程を経たセラミックグリーンシートを積層して積層体
を得る積層工程と、該積層工程で得られた積層体を内部
電極パターン毎に裁断してチップ状の積層体を得る裁断
工程と、該裁断工程で得られたチップ状の積層体を焼成
する焼成工程とを備え、前記セラミック原料は金属粉末
又は有機金属化合物を含有していることを特徴とする積
層セラミックコンデンサの製造方法。
8. A raw material preparing step of preparing a ceramic raw material, a sheet forming step of forming a ceramic green sheet using the ceramic raw material obtained in the raw material preparing step, and a ceramic green sheet obtained in the sheet forming step. A printing step of printing an internal electrode pattern on the substrate, a laminating step of laminating ceramic green sheets that have undergone the printing step to obtain a laminated body, and cutting the laminated body obtained in the laminating step into internal electrode patterns And a firing step of firing the chip-shaped laminate obtained in the cutting step, wherein the ceramic raw material contains a metal powder or an organometallic compound. Method for manufacturing laminated ceramic capacitor.
【請求項9】 前記セラミックグリーンシートの厚さが
0.7〜10μmであることを特徴とする請求項8に記
載の積層セラミックコンデンサの製造方法。
9. The method according to claim 8, wherein the ceramic green sheet has a thickness of 0.7 to 10 μm.
【請求項10】 前記セラミック原料中に含有している
金属粉末又は有機金属化合物中の金属の、前記セラミッ
クグリーンシートを焼成して得られた誘電体磁器組成物
に対する濡れ性が、前記内部電極パターンの主成分とな
っている金属粉末の該誘電体磁器組成物に対する濡れ性
より悪いことを特徴とする請求項8又は9に記載の積層
セラミックコンデンサの製造方法。
10. The wettability of the metal powder or the metal in the organometallic compound contained in the ceramic raw material with respect to the dielectric ceramic composition obtained by firing the ceramic green sheet is the internal electrode pattern. 10. The method for producing a monolithic ceramic capacitor according to claim 8, wherein the wettability of the metal powder, which is the main component of the above, with respect to the dielectric ceramic composition is worse.
【請求項11】 前記セラミック原料中に含有している
金属粉末又は有機金属化合物中の金属の、前記セラミッ
クグリーンシートを焼成して得られた誘電体磁器組成物
に対する接触角が110〜180度であることを特徴と
する請求項8〜10のいずれかに記載の積層セラミック
コンデンサの製造方法。
11. The contact angle of the metal contained in the ceramic raw material or the metal in the organometallic compound with respect to the dielectric ceramic composition obtained by firing the ceramic green sheet is 110 to 180 degrees. The method for manufacturing a monolithic ceramic capacitor according to any one of claims 8 to 10, wherein:
【請求項12】 前記内部電極パターンの主成分となっ
ている金属粉末がNi又はNiを主成分とする合金から
なることを特徴とする請求項8〜11のいずれかに記載
の積層セラミックコンデンサの製造方法。
12. The multilayer ceramic capacitor according to claim 8, wherein the metal powder which is the main component of the internal electrode pattern is made of Ni or an alloy whose main component is Ni. Production method.
【請求項13】 前記セラミック原料中に含有している
金属粉末又は有機金属化合物中の金属が、Au,Pt,
Pd,Ag及びCuから選択された1種又は2種以上の
金属であることを特徴とする請求項8〜12のいずれか
に記載の積層セラミックコンデンサの製造方法。
13. The metal in the metal powder or the organometallic compound contained in the ceramic raw material is Au, Pt,
13. The method for producing a multilayer ceramic capacitor according to claim 8, wherein the metal is one or more metals selected from Pd, Ag and Cu.
【請求項14】 前記セラミック原料中に含有している
前記金属粉末の平均粒径が0.005〜0.1μmであ
ることを特徴とする請求項8〜13のいずれかに記載の
積層セラミックコンデンサの製造方法。
14. The monolithic ceramic capacitor according to claim 8, wherein an average particle diameter of the metal powder contained in the ceramic raw material is 0.005 to 0.1 μm. Manufacturing method.
【請求項15】 前記セラミック原料100重量部に対
し、前記金属粉末が5重量部以下であることを特徴とす
る請求項8〜14のいずれかに記載の積層セラミックコ
ンデンサの製造方法。
15. The method for manufacturing a monolithic ceramic capacitor according to claim 8, wherein the metal powder is 5 parts by weight or less with respect to 100 parts by weight of the ceramic raw material.
JP2001184602A 2001-06-19 2001-06-19 Multilayer ceramic capacitor and its manufacturing method Pending JP2003007562A (en)

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