JP2003169326A - Data decoder, data receiver and method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To further cut down the memory capacity of a memory means for a data decoder, compared with the conventional one. <P>SOLUTION: The operation of a decoding means 33 and a transforming means 34 is controlled to repeatedly execute a decoding process and a data format transforming process alternately one after the other in divided block units after dividing coded data in a plurality of blocks. As the result, it will suffice to store only constituent data of each divided block in a memory means 31C and hence the memory capacity of the memory means 31 can be greatly cut down, compared with that needed to store all the data. Thus, compared with in the prior art, the memory capacity of the memory means 31 can be greatly cut down. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data decoding device, a data receiving device and their methods, for example BS.
(Broadcasting Satellite) It is suitable for being applied to a receiver of digital broadcasting.

[0002]

2. Description of the Related Art Conventionally, in BS digital broadcasting,
After the video / audio data of a plurality of programs are encoded by a transmitting device based on a predetermined encoding method, the encoded video / audio data are multiplexed and transmitted.

The receiver installed in the viewer's house selects a program designated by the viewer's tuning operation from a plurality of programs, decodes the video / audio data of the selected program, and externally decodes it. Display on the monitor.

At the same time, in the BS digital broadcasting, in addition to the video / audio data of the program, for example, description data called program guide information (hereinafter referred to as EPG (Electronic Program Guide) data) for explaining the contents of each program, etc. Distribute still image data such as.

In this case, in BS digital broadcasting, when transmitting still image data to be transmitted by a transmitting device, for example, JPEG (Joint Photographfic Experts) is used.
Group) system to generate still image compressed data by compressing and encoding the still image data, and distribute the still image compressed data to each receiver.

The receiver restores the original still image data by receiving the still image compressed data sent from the transmitting device and decompressing and decoding the received still image compressed data. Next, the receiver executes an image format conversion process for converting the image format and the image size of the still image data into the image format and the image size for monitor display on the restored still image data, and The resulting still image data is output to the monitor and displayed.

FIG. 7 shows a configuration of a conventional still picture decoding / displaying section 1 which executes decoding processing and image format conversion processing on received still picture compressed data among the respective circuits constituting a receiver of BS digital broadcasting. Indicates. The still image decoding / display unit 1 sends the still image compressed data S1 obtained by demodulating the received broadcast wave to the compressed data writing circuit 2.

The compressed data writing circuit 2 temporarily stores the compressed compressed image data S1 in the compressed data storage area 3A of the memory 3.
Write in. Subsequently, the still image decoding circuit 4 reads the still image compressed data S1 from the compressed data storage area 3A of the memory 3, and then decompresses and reads the still image compressed data S1 based on the JPEG method. Of the still image data S2 is restored and written in the expanded data storage area 3B of the memory 3.

Subsequently, the image format conversion circuit 5 reads the restored still image data S2 from the expanded data storage area 3B of the memory 3, and then the image format and the image size of the still image data S2 are displayed on an external monitor. The image format and image size that can be displayed are converted, and the still image data S3 obtained as a result is written in the display image storage area 3C of the memory 3.

The image display circuit 6 reads the still image data S3 from the display image storage area 3C of the memory 3 and outputs it to an external monitor for display. The memory access arbitration circuit 7 performs arbitration work for the bus usage right when the compressed data writing circuit 2, the still image decoding circuit 4, the image format conversion circuit 5 and the image display circuit 6 read / write data from / to the memory 3. Has been done.

[0011]

In the still picture decoding / displaying section 1 having such a structure, one picture of still picture data S2 decoded by the still picture decoding circuit 4 is stored in the expanded data storage area of the memory 3. 3B, the expanded data storage area 3 of the relevant memory 3 is written at a predetermined timing.
The still image data S2 for one screen is read from B and the image format conversion process is executed.

As described above, the conventional still image decoding display unit 1 is
Since the decoding process and the image format conversion process are executed for each screen, the still image decoding circuit 4
Still image data S for one screen that has been decrypted by
2 must be stored in the expanded data storage area 3B of the memory 3 from the time it is written in the expanded data storage area 3B of the memory 3 to the start of the image format conversion process.

Therefore, in the still picture decoding display unit 1, the memory 3
In the expanded data storage area 3B, it is necessary to secure a memory capacity capable of storing at least one screen of still image data. For example, high resolution still image data S2 is written in the expanded data storage area 3B. In this case, it is necessary to increase the memory capacity of the expanded data storage area 3B, resulting in an unavoidable problem that the memory capacity of the entire memory 3 increases.

The present invention has been made in consideration of the above points, and it is an object of the present invention to propose a data decoding device, a data receiving device, and their methods capable of significantly reducing the memory capacity as compared with the prior art. .

[0015]

In order to solve such a problem, according to the present invention, a decoding process for decoding coded data coded based on a predetermined coding method is performed, and the decoded data is decoded. In a storage means, a decoding means for reading the decoded data from the storage means, and a data format conversion process for converting the read data into a predetermined data format, and the encoded data in a plurality of areas. And a control means for controlling the operations of the decoding means and the conversion means so that the decoding processing and the data format conversion processing are sequentially and repeatedly executed for each divided area.

As a result, since it is sufficient to store only the data forming the divided areas in the storage means, the memory capacity of the storage means can be significantly reduced as compared with the case of storing the entire data. Thus, it is possible to further reduce the memory capacity of the storage means as compared with the conventional case.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described in detail below with reference to the drawings.

In FIG. 1, 10 is BS (Br
oadcasting Satellite) shows the configuration of a digital broadcast receiver, in which a broadcast wave distributed from a BS digital broadcast transmitter is received by an antenna 11 and designated by a viewer's channel selection operation from the received plurality of program data. The selected program data is selected, and the selected program data is decoded and displayed on an external monitor.

The CPU (Central Processing) of the receiver 10
The unit) 12 controls the operation of each circuit of the receiver 10 based on input data input by a viewer operating an operating means such as a remote commander (not shown).

That is, the tuner 13 extracts a desired broadcast wave from the broadcast waves received by the antenna 11, demodulates the extracted broadcast wave to generate multiplexed data S10, and the demultiplexer 14 Send to.

From the multiplexed data S10, the demultiplexer 14 compresses still image data such as video / audio compression data S11 of the program and explanation data for explaining the contents of each program called EPG (Electronic Program Guide) data. Separated from the data S12, the video / audio compressed data S11 is sent to the AV (Audio Visual) decoder 15, and the still image compressed data S12 is sent to the bus BUS.
To the still image decoding display unit 16 via.

The AV decoder 15 expands and decodes the video / audio compressed data S11 of this program to generate video data and audio data. Then, the AV decoder 15 sends the video data to the NTSC (National Television System Committ).
ee) system luminance signal and color difference signal and digital-analog conversion to generate a video signal S13, which is sent to the adder 17 and audio data is digital-analog converted to the audio signal S1.
4 is generated and sent to the adder 18.

The still picture decoding / display section 16 restores the original still picture data by decompressing and decoding the still picture compression data S12 supplied from the demultiplexer 14. Next, the still image decoding display unit 16 performs an image format conversion process on the restored still image data to convert the image format and image size of the still image data into the image format and image size for monitor display. The still image signal S15 obtained as a result is executed by the adder 1
Send to 7.

The adder 17 mixes the video signal S13 supplied from the AV decoder 15 and the still image signal S15 supplied from the still image decoding display unit 16 and outputs the mixture to the monitor for display.

The additional sound generator 19 performs pulse code modulation (PCM) on a predetermined additional sound.
Is generated to generate the additional sound signal S16, which is sent to the adder 18. The adder 18 is the AV decoder 15
The audio signal S14 supplied from the device and the additional sound signal S16 supplied from the additional sound generation unit 19 are mixed and output to the monitor.

The structure of the still picture decoding / displaying section 16 is shown in FIG. 2 in which parts corresponding to those in FIG. The still image decoding display unit 16 divides one screen composed of the still image compressed data S12 supplied from the demultiplexer 14 into a plurality of areas, and performs decoding processing and image format conversion processing in units of the divided areas. It is designed to be executed alternately and repeatedly.

That is, the still picture decoding / display section 16 includes the still picture compression data S supplied from the demultiplexer 14.
12 is sent to the compressed data writing circuit 2 and the linked list generating circuit 30. The compressed data writing circuit 4 once writes the still image compressed data S12 in the compressed data storage area 31A of the memory 31.

The link list generating circuit 30 detects the image format and image size of the still image compressed data S12 by analyzing the header portion of the still image compressed data S12, and then detects the detected image format and image size. Based on the memory capacity of the memory 31, the number of divisions for dividing one screen constituted by the still image compressed data S12 into a plurality of areas is determined.

Then, the link list generation circuit 30 sequentially and alternately repeats the decoding process and the image format conversion process in the divided area unit for the still image compressed data S12 for one screen. Is generated and the link list S20 is written in the link list storage area 31A of the memory 31.

As shown in FIG. 3, the link list S20 is composed of a plurality of processing procedures RT1 to RTN. Each processing procedure RT1 to RTN includes a processing name, a processing control parameter, and an address of the next processing procedure RT. Is described.

That is, as the process name, the decoding process or the image format conversion process is described. As the processing control parameter, in the case of the decoding process, the pixel sampling ratio, the area to be decoded, the address specified when reading / writing data from / in the memory 31, are described.
In the case of the image format conversion processing, the image format conversion method, the image size conversion ratio, and the address designated when reading / writing data in the memory 31 are described. As the address of the next processing procedure RT, the address of the memory 31 in which the next processing procedure RT is written is described. If the processing procedure RT is the last processing procedure RTN, it is the last processing procedure RTN. Is described.

Here, as shown in FIG. 4, one screen composed of the compressed still image data S12 is divided into eight areas P0 to P0.
The link list S20 generated when dividing into P7 will be described. Note that FIG. 5 shows the data structure of the still image compressed data S12 divided into eight regions P0 to P7, and each region P0 to P7 is data according to the characteristics of the original still image data before compression encoding. The amount is different.

In this case, the link list S20 contains the information shown in FIG.
, The area P0 is set as the first processing procedure RT1.
Decoding process and expanded data storage area 31C of the memory 31
The writing process to the area P0 and the memory 3 are described as the subsequent processing procedure RT2.
The writing process to the display image storage area 31D of No. 1 is described.

Then, in the link list S20, the decoding process of the area P1 and the memory 3 are performed as the processing procedure RT3.
The writing process to the expanded data storage area 31C of No. 1 is described, and as the subsequent processing procedure RT4, the image format conversion processing of the area P1 and the display image storage area 31 of the memory 31
The writing process to D is described.

Thereafter, the link list S20 describes a processing procedure RT for sequentially and repeatedly executing the decoding processing and the image format conversion processing in the area P, and finally, as the processing procedure RT15, the processing procedure RT of the area P7 is described. The decoding process and the writing process to the expanded data storage area 31C of the memory 31 are described, and as the subsequent processing procedure RT16, the image format conversion process of the region P7 and the writing process to the display image storage area 31D of the memory 31 are described. .

By the way, the operation control circuit 32 includes the CPU 1
When the operation start command is supplied from 2, the processing procedure RT described at the head of the link list is started from the specified address in the link list storage area 31A of the memory 31.
1 is read out, and the operation of the still image decoding circuit 33 is controlled based on the processing procedure RT1.

That is, the still picture decoding circuit 33 is provided in the memory 3
The original divided still image data S22A is restored by reading only the divided still image compressed data S21A forming the region P0 of the still image compressed data S12 from the first compressed data storage region 31B and decompressing and decoding this. Then, this is written in the expanded data storage area 31C of the memory 31.

Then, the operation control circuit 32 operates the memory 31.
Of the link list storage area 31A of
The processing procedure RT2 is read from the address designated by, and the operation of the image format conversion circuit 34 is controlled based on the processing procedure RT2.

That is, the image format conversion circuit 34
Is an image format capable of displaying the image format and the image size of the divided still image data S22A after reading the restored still image data S22A from the expanded data storage area 31C of the memory 31. Then, the divided still image data S23A obtained as a result is converted into the image size, and is written in the display image storage area 31D of the memory 31.

Next, the operation control circuit 32 operates the memory 31.
Of the link list storage area 31A of
The processing procedure RT3 is read from the address designated by and the operation of the still image decoding circuit 33 is controlled based on the processing procedure RT3.

That is, the still picture decoding circuit 33 is provided in the memory 3
The original divided still image data S22B is restored by reading only the divided still image compressed data S21B forming the region P1 of the still image compressed data S12 from the first compressed data storage area 31B and decompressing and decoding this. Then, this is written in the expanded data storage area 31C of the memory 31.

Then, the operation control circuit 32 operates the memory 31.
Of the link list storage area 31A of
The processing procedure RT4 is read from the address designated by, and the operation of the image format conversion circuit 34 is controlled based on the processing procedure RT4.

That is, the image format conversion circuit 34
Is an image format capable of displaying the image format and the image size of the divided still image data S22B after reading the restored still image data S22B from the expanded data storage area 31C of the memory 31. Then, the divided still image data S23B obtained as a result is converted into the image size and is written in the display image storage area 31D of the memory 31.

Thereafter, the operation control circuit 32 is similarly operated.
Reads sequentially the processing procedures RT5 to RT16 of the link list S20 from the link list storage area 31A of the memory 31, and controls the operations of the still image decoding circuit 33 and the image format conversion circuit 34 based on the read processing procedures RT5 to RT16. By doing so, the decoding process and the image format conversion process are sequentially and alternately repeated for each of the areas P2 to P7.

As a result, the decoding process and the image format conversion process are executed over all the areas P0 to P7 that form the still image compressed data S12 for one screen stored in the compressed data storage area 31B of the memory 31, and the memory is stored. Still image data S23 composed of divided still image data S23A to S23H is stored in the display image storage area 31D of 31.
Is written.

In this state, the image display circuit 6 reads the still image data S from the display image storage area 31D of the memory 31.
23 is read and the still image data S23 is analog-digital converted to generate a still image signal S15, which is output to an external memory via the adder 17 and displayed. The memory access arbitration circuit 7 is adapted to perform bus arbitration work when each circuit reads / writes data from / to the memory 31.

In the above configuration, the linked list generating circuit 30 is composed of the still image compressed data S12 based on the image format and image size of the still image compressed data S12 to be displayed and the memory capacity of the memory 31. The number of divisions for dividing one screen into a plurality of areas is determined.

Then, the link list generation circuit 30 sequentially and alternately repeats the decoding process and the image format conversion process on the divided still image compressed data S12 in units of the divided areas. Is generated and the link list S20 is written in the link list storage area 31A of the memory 31.

The operation control circuit 32 reads the link list S20 from the link list storage area 31A of the memory 31, and controls the operations of the still image decoding circuit 33 and the image format conversion circuit 34 based on the read link list S20. Thus, the decoding process and the image format conversion process are sequentially and alternately repeated in units of the regions P0 to P7 that form the still image compressed data S12 for one screen.

As described above, in the still image decoding display unit 16, 1
Divided still image data S that constitutes an area P obtained by dividing the screen into eight
22 need only be stored in the expanded data storage area 31C of the memory 31, and the memory capacity of the expanded data storage area 31C can be reduced in comparison with the case where one screen of still image data is stored. , The memory capacity of the entire memory 31 can be significantly reduced.

According to the above configuration, the compressed still image data S12 to be displayed is divided into a plurality of areas P0 to P7, and the decoding processing and the image format conversion processing are sequentially and alternately repeated for each of the divided areas P0 to P7. Area P in the expanded data storage area 31C of the memory 31 by executing
Since it suffices to store the divided still image data S22 configuring the above, it is possible to significantly reduce the memory capacity of the expanded data storage area 31C as compared with the case where one screen of still image data is stored. The memory capacity of the memory 31 can be further reduced as compared with the conventional case.

In the above embodiment, the case where the still picture decoding circuit 33 is applied as the decoding means has been described, but the present invention is not limited to this, and a code coded based on a predetermined coding method. A decoding process for decoding the encrypted data may be performed, and various other decoding means for storing the decoded data in the storage means may be applied.

Further, although the case where the memory 31 is applied as the storage means has been described in the above embodiment, the present invention is not limited to this, and various other storage means may be applied.

Further, in the above embodiment, the case where the image format conversion circuit 34 is applied as the conversion means has been described, but the present invention is not limited to this, and the decrypted data is read from the storage means and the read operation is performed. Other various conversion means for performing the data format conversion process for converting the data into a predetermined data format may be applied.

In the above-described embodiment, the case where the link list generating circuit 30 and the operation control circuit 32 are applied as the control means has been described, but the present invention is not limited to this, and the encoded data is divided into a plurality of areas. And various other control means for controlling the operations of the decoding means and the conversion means are applied so that the decoding processing and the data format conversion processing are sequentially and alternately repeated for each divided area unit. Is also good.

Further, although the case where the antenna 11 is applied as the receiving means has been described in the above-mentioned embodiment, the present invention is not limited to this, and the encoded data encoded based on a predetermined encoding method is used. Other various receiving means for receiving may be applied.

[0057]

As described above, according to the present invention, the encoded data is divided into a plurality of areas, and the decoding processing and the data format conversion processing are sequentially and repeatedly executed for each divided area. By controlling the operations of the decoding means and the conversion means, it is sufficient to store only the data constituting the divided areas in the storage means, and the memory capacity of the storage means is significantly larger than that in the case of storing the entire data. Therefore, the memory capacity of the storage means can be further reduced as compared with the conventional case.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a receiver for BS digital broadcasting according to the present invention.

FIG. 2 is a block diagram showing a configuration of a still image decoding display unit.

FIG. 3 is a chart showing data contents of a link list.

FIG. 4 is a schematic diagram for explaining a case where one screen is divided into eight.

FIG. 5 is a schematic diagram showing a data structure of still image compressed data divided into eight parts.

FIG. 6 is a schematic diagram showing a specific example of a link list.

FIG. 7 is a block diagram showing a configuration of a conventional still image decoding display unit.

[Explanation of symbols]

1, 16 ... Still image decoding display unit, 2 ... Compressed data writing circuit, 3, 31 ... Memory. 3A, 31B ... Compressed data storage area, 3B, 31C ... Expanded data storage area,
3C, 31D ... Display image storage area, 4, 33 ... Still image decoding circuit, 5, 34 ... Image format conversion circuit,
6 ... Image display circuit, 7 ... Memory access arbitration circuit,
10 ... Receiver, 12 ... CPU, 30 ... Link list generation circuit, 31A ... Link list storage area, 32 ...
… Operation control circuit.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H04N 7/03 7/035 F term (reference) 5C025 BA27 BA30 CA06 DA01 DA04 DA05 5C053 FA07 FA27 GB36 JA15 KA03 KA05 KA24 LA06 5C059 KK08 MA00 PP01 RC26 RC28 SS02 TA74 TC18 TC27 UA05 UA37 UA38 5C063 AB03 AB11 AC02 CA05 CA09 CA29

Claims (16)

[Claims] 1. Decoding means for performing a decoding process for decoding coded data coded based on a predetermined coding method, and storing the decoded data in a storage means, and the storage means A conversion unit that reads the decoded data, performs a data format conversion process that converts the read data into a predetermined data format, and divides the encoded data into a plurality of areas, and the divided area units 2. A data decoding device, comprising: a control means for controlling the operations of the decoding means and the conversion means so that the decoding processing and the data format conversion processing are sequentially and repeatedly executed. 2. The control means generates processing procedure information for sequentially and alternately executing the decoding processing and the data format conversion processing by analyzing the encoded data, and the generated processing procedure information. The data decoding device according to claim 1, wherein the operations of the decoding means and the conversion means are controlled based on the processing procedure information. 3. The data decoding apparatus according to claim 1, wherein the control means determines the number of divisions into which the encoded data is divided into a plurality of areas by analyzing the encoded data. . 4. The data decoding apparatus according to claim 1, wherein the coded data is still image data compression-coded based on a predetermined coding method. 5. A receiving means for receiving coded data coded based on a predetermined coding method, a decoding process for decoding the received coded data, and the decoded data. Decoding means for storing the decoded data in the storage means, and a conversion means for performing a data format conversion process for converting the read data in the storage means and converting the read data in a predetermined data format; Control means for dividing the data into a plurality of areas and controlling the operations of the decoding means and the conversion means so that the decoding processing and the data format conversion processing are sequentially and repeatedly executed for each of the divided areas. A data receiving device comprising: 6. The control means generates processing procedure information for sequentially and repeatedly executing the decoding processing and the data format conversion processing by analyzing the encoded data, and the generated processing procedure information. The data receiving apparatus according to claim 5, wherein the operation of the decoding unit and the conversion unit is controlled based on the processing procedure information. 7. The data receiving apparatus according to claim 5, wherein the control means determines the number of divisions into which the encoded data is divided into a plurality of areas by analyzing the encoded data. . 8. The data receiving apparatus according to claim 5, wherein the encoded data is still image data compression-encoded based on a predetermined encoding method. 9. A first step of performing a decoding process for decoding encoded data encoded according to a predetermined encoding method, and storing the decoded data in a storage means, and the storage means. A second data format conversion process for reading the decrypted data from the device and converting the read data into a predetermined data format.
And a third step of dividing the encoded data into a plurality of areas and sequentially and alternately repeating the decoding processing and the data format conversion processing in the divided area units. Characteristic data decoding method. 10. In the third step, by analyzing the encoded data, processing procedure information for sequentially and repeatedly executing the decoding processing and the data format conversion processing is generated, and the generation is performed. 10. The data decoding method according to claim 9, wherein the decoding process and the conversion process are performed based on the processing procedure information. 11. The data according to claim 9, wherein in the third step, the number of divisions into which the encoded data is divided into a plurality of areas is determined by analyzing the encoded data. Decryption method. 12. The data decoding method according to claim 9, wherein the coded data is still image data compression-coded based on a predetermined coding method. 13. A first step of receiving coded data coded based on a predetermined coding method, a decoding process of decoding the received coded data, and decoding the coded data. A second step of storing the read data in the storage means, and a third step of performing a data format conversion process of reading the decrypted data from the storage means and converting the read data into a predetermined data format.
And a fourth step of dividing the encoded data into a plurality of areas and sequentially and alternately repeating the decoding processing and the data format conversion processing in the divided area units. Characteristic data reception method. 14. In the fourth step, by analyzing the encoded data, processing procedure information for sequentially and alternately executing the decoding processing and the data format conversion processing is generated, and the generation is performed. 14. The data receiving method according to claim 13, wherein the decoding process and the conversion process are performed based on the processing procedure information. 15. The data according to claim 13, wherein in the fourth step, the number of divisions into which the encoded data is divided into a plurality of areas is determined by analyzing the encoded data. Receiving method. 16. The data receiving method according to claim 13, wherein the encoded data is still image data compression-encoded based on a predetermined encoding method.