JP2003243786A - Wiring board, manufacturing method of the same, semiconductor device, manufacturing method of the same, and electronic apparatus - Google Patents

Abstract

An object of the present invention is to provide an inexpensive, high-density wiring board and a semiconductor device having high connection reliability and a method for manufacturing the same. The present invention relates to a substrate having an electrode and coated with an insulating layer having a hole formed so as to expose the electrode, a layer of Cr or Ti connected to the electrode and closely attached to the insulating layer. And a wiring formed by laminating a layer of Cu and a layer of Cu adhered on the layer of Cr or Ti, a protective film covering the wiring and having a hole for solder bonding, and a protective film formed on the protective film. And a solder for external connection, which is mounted in a hole for solder joint and is formed by diffusion alloying a layer of Cu in the wiring to reach and connect to the layer of Cr or Ti.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a wiring board (circuit board), a method of manufacturing the same, a semiconductor device, a method of manufacturing the same, and an electronic apparatus, which are generally related to electronic apparatuses in which an LSI is mounted on a board to function. The present invention relates to a structure of a wiring board suitable for an electronic device requiring both reliability and low cost, a manufacturing method thereof, a semiconductor device and a manufacturing method thereof, and an electronic device and a semiconductor device mounting structure.

[0002]

2. Description of the Related Art As a prior art of the above-mentioned wiring board, there is JP-A-62-263661.

[0003] This prior art includes a multi-layered metal structure for making interconnections on a substrate, comprising an adhesive layer selected from the group consisting of Ti, Ba, Cr and Ta deposited on the substrate; Cu, Fe, Al, A deposited on the layer
a stress relaxation layer selected from the group consisting of g, Ni and Au;
It is described to have a barrier layer made of i or zirconium and a wettable surface layer.

By the way, when the wiring layer and the solder are directly connected to connect the wiring board to an external circuit, the component elements of the solder and the component elements of the wiring layer are mutually connected at the time of solder connection or due to a change over time thereafter. (A solder erosion) occurs in which the wiring constituent material disappears due to diffusion into the wiring.
In accordance with such a phenomenon, since an alloy layer composed of the constituent materials of the solder and the wiring is generated, a problem that the connection portion is brittle and high resistance occurs. Further, as the solder erosion progresses, the solder reaches the lower surface of the wiring member, and the adhesiveness between the wiring member and the base is lost, so that a defect that the connection portion is separated from the base occurs.

[0005] For this reason, two measures are usually taken to prevent the above-mentioned defects from occurring at the portions to be soldered.

One method is to increase the thickness of the wiring material so that the solder does not reach the lower surface of the wiring during the manufacturing process and during use of equipment.

Another method is to protect the wiring from the solder by coating the wiring with a material having high resistance to solder erosion and stopping the erosion of the solder in the material.

The former method of increasing the thickness of the wiring material does not solve the problem of the reduction in strength due to the above-mentioned alloy layer formed at the connection portion. Technical difficulties will occur in other processes such as layer formation and processing.

Further, the latter layer having high resistance to solder, that is, UBM (Under bump metal)
Alternatively, BLM (Ball Limiting Met)
The method of forming a solder diffusion barrier layer called “allergy” requires a new process of forming a metal layer that is not generally used as a wiring material, for example, a layer of Ni, Ni—Cr, Ni—Cu, Pt, or the like. In addition to this, advanced technology is required for processing.

[0010] On the other hand, with the advancement of performance and multifunctionality of electronic equipment, the total wiring length of wiring accommodated in the wiring board used therein is rapidly increasing, and as a result, the wiring becomes finer. At the same time, multilayering has been strongly required. Further, from the viewpoint of signal transmission quality in the wiring board, the requirements for the shape and positional accuracy of the wiring are becoming stricter, and as described above, the wiring is required to secure the function of the connection portion with the outside. It has become difficult to change the specifications. For this reason, in advanced electronic devices, wiring is formed according to specifications determined by electrical characteristics, and a structure in which a connection portion is formed of a material having high solder resistance as described above and a connection electrode is formed in another layer is becoming mainstream. .

However, as described above, such a structure has a problem that the wiring manufacturing process is lengthened and advanced, and the manufacturing cost is significantly increased.

Further, in the case of fine wiring of a wiring board in the future, so-called micro-soldering, which connects a wiring board having a small area of a solder bonding electrode, is required.
There is a problem that a more advanced technique is required for the metal composition and film thickness of M and its processing.

An object of the present invention is to solve the above-mentioned problems.
An object of the present invention is to provide an inexpensive high-density wiring board and a semiconductor device having high connection reliability.

Another object of the present invention is to provide a method of manufacturing a wiring board and a method of manufacturing a semiconductor device capable of manufacturing a high-density wiring board and a semiconductor device having high connection reliability at low cost. It is to provide a method.

Still another object of the present invention is to provide an inexpensive, high-density wiring board having high connection reliability, an electronic apparatus including a semiconductor device, and a semiconductor device mounting structure.

[0016]

In order to achieve the above object, the present invention provides an insulating layer provided on a substrate, a Cu layer, the Cu layer and the insulating layer existing thereunder. And a wiring formed by laminating a layer of Cr or Ti provided as a layer for bringing the Cu layer and the insulating layer into close contact with each other. Wherein the Cu layer is formed by diffusion alloying to reach and connect to the Cr or Ti layer.

Further, the present invention provides a substrate having an electrode and coated with an insulating layer having a hole formed so as to expose the electrode, a substrate made of Cr or Ti connected to the electrode and adhered to the insulating layer. A wiring formed by laminating a layer and a layer of Cu adhered on the Cr or Ti layer, a protective film covering the wiring and having a hole for solder bonding, and a protective film formed on the protective film. And a solder for external connection, which is mounted in a hole for solder joint and formed by diffusion alloying a layer of Cu in the wiring to reach and connect to the layer of Cr or Ti. It is a wiring board.

Further, the present invention is characterized in that the solder for external connection of the wiring board is formed of a solder containing Sn. Further, according to the present invention, in the wiring of the wiring board, the thickness of the Cu layer is about 0.1 μm to about 10 μm. Further, according to the invention, in the wiring of the wiring board, a Cr layer is provided between the Cu layer and the protective film. Further, the present invention is characterized in that the insulating layer of the wiring board includes an organic resin layer. In addition, according to the present invention, the solder for external connection of the wiring board is
It is characterized by being directly connected to a wiring layer connected to an electrode on a substrate. The present invention also provides an anticorrosion layer such as an Au layer or a Ni / Au layer or a pre-flux between the Cu layer of the wiring board and the solder for external connection in order to improve the wettability of the solder. Is provided.

Further, the present invention is an electronic apparatus characterized in that the external connection solder on the wiring board is connected to an electronic component.

Further, the present invention provides an insulating layer forming step of forming an insulating layer on a substrate, and a step of laminating a Cr or Ti layer and a Cu layer on the insulating layer formed in the insulating layer forming step. A wiring forming step of forming a film and forming wiring; and soldering the external connection solder in the wiring formed in the wiring forming step.
Of the Cr or T
and a reflow step of reaching and connecting to the i-th layer.

According to the present invention, there is provided an insulating film forming step of coating an insulating film on a substrate having an electrode and forming a hole so as to expose the electrode, and a step of connecting the electrode to the electrode and adhering to the insulating layer. A layer of Cr or Ti and a layer of Cu in close contact with the layer of Cr or Ti to form a film, forming a wiring, and covering the wiring formed in the wiring forming step A protective film forming step of forming a protective film to form a hole for solder bonding, and mounting a solder for external connection in the hole for solder bonding formed in the protective film forming step, and removing Cu in the wiring. A reflow step of causing the layer to proceed to diffusion (diffusion alloying) to reach the Cr or Ti layer for connection.

According to the present invention, there is provided a semiconductor substrate having an electrode and coated with an insulating layer having a hole formed so as to expose the electrode, a Cr connected to the electrode and adhered to the insulating layer.
Or a wiring formed by laminating a Ti layer and a Cu layer in close contact with the Cr or Ti layer, a protective film covering the wiring and having a solder joint hole formed therein, and the protective film External connection solder, which is mounted in a hole for solder joint formed in the wiring, and is formed by diffusing and progressing (diffusion alloying) the Cu layer in the wiring to reach and connect to the Cr or Ti layer. And a semiconductor device comprising:

Further, the present invention is characterized in that in the wiring of the semiconductor device, a Cr layer is provided between the Cu layer and the protective film. Further, the invention is characterized in that the insulating layer of the semiconductor device includes an organic resin layer.

According to the present invention, there is provided a semiconductor device mounting structure wherein the solder for external connection in the semiconductor device is connected and mounted on an electronic component such as a mounting board.

As described above, according to the present invention, U
Since there is no need to form a BM film, it is free from the above-mentioned increase in the UBM forming process and technical difficulties. In addition, the wiring can be formed with a thickness that is required electrically regardless of the connection portion, and the electrical characteristics can be improved. Further, the entire process is shortened, which is advantageous in terms of manufacturing cost.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a wiring board, a semiconductor device, a semiconductor device mounting structure, and an electronic device according to the present invention will be described with reference to the drawings.

According to the present invention, a specific combination of an adhesive metal and a solder material formed for securing adhesion between a wiring provided under a wiring layer and a base is used. It has been found that a metal can have both an adhesive function and a solder corrosion resistance function.

By the way, as a solder material, a Pb-free Sn-Ag-based solder has recently become mainstream from the viewpoint of environmental friendliness. In any case, Sn
In a solder containing Sn including a Pb-based solder, since the connection is basically achieved by alloying Sn and the electrode metal, the reaction of the alloy formation between the electrode metal and Sn is eroded by solder. Resistance will be affected.

The present inventors have found that Cr and Ti have extremely high resistance to the formation of an alloy with Sn. Therefore, the present inventors have considered using these as electrodes for solder connection. Are very chemically active,
It was confirmed that an oxide film was instantaneously formed in the atmosphere and could not be connected because the molten solder was repelled, and that the oxide film could not be completely removed by a normal method.

Then, an attempt was made to coat the surface of these metals with a metal which is easy to join with solder, and it was found that Cu was the most suitable as a coating layer from the viewpoints of oxidation prevention and cost.

For the Cr or Ti layer, the solder penetrates the above-mentioned coating layer at the stage of soldering, and C
It has also been found that if the solder has not reached the r or Ti layer, the reliability of bonding is unstable. This is because even if the solder diffuses in the coating layer and reaches the Cr or Ti layer during long-term use, the interface between the Cr or Ti layer and the coating layer is caused by oxygen that permeates the coating layer over time. It is presumed that this is because an extremely thin oxide layer may be formed on the substrate and the solder cannot reach the metal Cr or Ti layer. For this reason, the thickness of the Cu layer, which is a coating layer, is 0.1 μm or more due to the necessity of blocking oxygen during the process.
It is necessary to be less than μm.

The present invention has been devised in consideration of the results of these studies, and uses a Cr or Ti layer as an adhesive layer and a solder diffusion preventing layer, and practically as a coating layer for preventing oxidation. This is one in which Cu, which is the lowest resistance material, is applied. And, as the wiring material, Cr /
It was composed of a laminate of Cu / Cr or Ti / Cu / Cr, a part of the Cu layer of these laminated wirings was exposed, and this part was used as it is as a soldering electrode. However, for this purpose, as described above, it is necessary that the solder containing Sn penetrates through the Cu layer and reaches the lower Cr or Ti layer serving as the adhesive layer in the soldering step.

As shown in FIG. 1, a wiring board and a semiconductor device according to the present invention
Substrate 11 and Al, A formed on the substrate 11
an electrode (bump) 12 of u, Ag, etc., a wiring 13 connected to the electrode 12, and an insulating film (stress relaxation layer) made of polyimide, SiO2, SiN or the like provided between the wiring 13 and the substrate 11. 15), a protective film 16 that protects the surface of the wiring 13 and also has a perforated portion for connecting (joining) the solder 17; and a portion provided in the protective film 16 and provided on the mounting substrate. Etc. and the solder 17 connected and mounted.

The insulating layer 15 relieves the stress applied to the solder 17 due to the difference in thermal expansion between the substrate 11 and the mounting substrate as an external circuit.

The wiring 13 according to the present invention has a practically lowest resistance material of 0.1 to
A Cu layer 13a having a thickness of about 10 μm, a Cu or Ti thin film layer 13b having a thickness of about 0.05 to 1.0 μm on the underlayer 15 side, and about 0.01 to 0.3 μm on the protective film 16 side. And a thin film layer 13c of Cr having a thickness of 3 mm. The thin film layers 13b and 13c are composed of the insulating layer 15, the protective film 1
6 and the Cu layer 13a. When the thin film layer 13c on the protective film 16 side is made of Ti, it is difficult to selectively remove the thin film layer 13c.

In particular, as the thin film layer 13b according to the present invention,
It was formed of a metal of Cr or Ti having excellent adhesion to the underlayer (insulating film) 15 and having extremely high resistance to the formation of an alloy with a solder containing Sn. However, these C
Since both r and Ti metals are chemically very active, an oxide film is formed instantaneously in the air, and the molten solder is repelled and cannot be connected. Was not completely removed. Therefore, an attempt was made to coat the surface of these Cr or Ti metals with a metal which is easy to join with the solder, and it was found that Cu was most suitable as the coating layer 13a from the viewpoints of oxidation prevention and cost.

Next, a method of manufacturing the wiring board and the semiconductor device until the solder 17 is connected will be described with reference to FIG.

First, as shown in FIG.
Is an LSI, an opening 18 is formed to at least partially expose the electrode (pad) 12 by dry-etching the inorganic passivation film 15 to perform external connection on the electrode 12 of Al or the like.

Further, as shown in FIG.
Is MCM (multi-chip module: multi-ch
In the case of a wiring board for an ip module, an opening 18 that at least partially exposes the electrode (pad) 12 is formed by a processing method suitable for the material of the insulating layer 15. If the insulating layer 15 is an organic material such as polyimide, the opening 18 is formed by forming the opening 18 by a photo-etching method or by forming the insulating layer by a printing method. The photoetching method can be applied to the case of an inorganic insulating layer. As the etching, either wet etching or dry etching can be applied. If isotropic etching is used as the etching, the opening 18 has a shape that expands outward. Further, anisotropic etching may be used as the etching.

Next, when a thin film 13b of Cr or Ti is formed on the surface of the electrode 12 of Al or the like, a sputter etching process is performed immediately before the film formation to remove an oxide film of the electrode surface such as Al or the like. Without exposing metals, etc.
The film is formed immediately. If the oxide film is not removed, this portion will have a high resistance of several to several hundred Ω.

The substrate 11 from which the oxide film on the surface of the electrode 12 has been removed in this manner is immediately exposed to the air without exposing the substrate 11 to FIG.
2B to 2E, a wiring pattern 13 is formed.

There are two possible methods for forming the wiring pattern 13. As a first method, FIG.
As shown in FIGS. 2B to 2D, the Cr or Ti thin film layer 20b / Cu layer 20a / Cr thin film layer 20 is initially formed.
2C, three unnecessary layers are successively removed from the upper layer by photoetching using a resist mask 21 as shown in FIG. 2E. As a second method, a Cr or Ti thin film layer 20b / Cu thin film layer (thinly formed: about 0.1 to 0.5 μm) is continuously sputter-deposited, followed by semi-additive pattern Cu plating 13a, Thereafter, an unnecessary thin film layer portion is removed. In the latter case, there is a case where the wiring is finally thinly coated with Ni plating in order to protect the wiring from oxidation and the like and to improve the adhesive strength with the protective film.

Next, after the completion of the wiring pattern 13, as shown in FIG. 3A, an organic insulating film 22 such as polyimide or an inorganic insulating film 22 such as SiO2 is coated for both protection of the wiring pattern and electrical insulation. Then, as shown in FIG. 3B, openings (solder joining holes) 19 are formed at positions where the solder is to be connected by a photoetching process using a resist mask 23 to expose the surface of the wiring 13. In this state, Cr
3C, the protective film (insulating film) 16 becomes a mask, and as shown in FIG.
Is removed only at the opening 19 of the protective film 16, and the Cu layer 13a is exposed.

Next, the solder 17 which is the most characteristic of the present invention is described.
The connection between the wiring and the Cu layer of the wiring will be described. As a solder material, a material containing Sn is also common, and Sn-Pb-based solder is most widely used as a solder material, but from the viewpoint of environmental friendliness, Pb-free Sn-Ag is used.
We decided to use a system solder.

In these Sn-containing solders, since the connection is basically achieved by alloying Sn and Cu, the reaction of forming an alloy of Cu and Sn determines the resistance to solder erosion. The present inventors have found that Cr and Ti have extremely high resistance in forming an alloy with Sn. Therefore, the present inventors have considered using this as an electrode for solder connection. Because it is very active, an oxide film is formed instantaneously in the air and it can not be connected because it repels molten solder,
Further, it was confirmed that this oxide film could not be completely removed by a usual method.

Therefore, an attempt was made to coat the surfaces of these metals with metals that are easy to join with solder, and it was found that Cu was the most suitable as the coating layer from the viewpoints of oxidation prevention and cost.

Therefore, as shown in FIG. 3D, a Pb-free Sn—Ag-based solder is supplied to an opening (a hole for solder joint) 19 formed in the protective film 16, and FIG.
As shown in (e), solder connection is performed under solder reflow conditions.

That is, Sn-Ag which is a Pb-free solder
In the case of a system solder, the melting point is about 230 ° C., and the reflow is performed at about 250 ° C. in consideration of the temperature variation on the substrate 11.

When the thickness of the Cu layer 13a is about 3 μm, the reflow time is about 30 seconds.
If the thickness of the Cu layer 13a is about 5 μm,
If the thickness of the solder is about 10 μm, the time is set to about 1 minute 30 seconds to about 2 minutes, so that in the case of the solder containing Sn, the alloying of Sn and Cu (Sn—Cu intermetallic compound) 17a is basically performed. Thus, the connection can be achieved and can reach the lower layer 13b of Cr or Ti, and the solder is joined to the lower layer 13b of Cr or Ti, so that the connection strength and reliability can be secured.

Actually, as shown in an enlarged view in FIG. 1, the main component Sn of the solder is alloyed with Cu and spreads by reflow, and is solder-connected to the Cr (Ti) layer 13b.
It does not progress any further and will be resistant.

Next, as shown in FIG. 4, a connection structure between a wiring and a solder, which is one embodiment of the semiconductor device according to the present invention, will be described. The substrate 11 is a Si wafer, the insulating layer 15 is a polyimide layer, the wiring 13 is a Cr (about 0.1 μm) thin film layer 13b / Cu layer 13a / Cr (about 0.05 μm) thin film layer 13c, and the protective film 16 is a polyimide film. Pb-free Sn-3Ag-based film and solder are used. The solder ball diameter is about 270 μm, UBM (Under
The diameter of the bump metal is about 250 μm.

FIG. 5 shows an SEM observation of the cross section after reflow. When the reflow temperature is about 250 ° C. and the reflow time is one minute, UBM (Under bump meme)
tal) As shown in the cross-sectional structure at the end, the solder diffuses in the Cu layer and reaches the Cr (Ti) layer 13b.
Since the Cu layer still remains, EDX (energy dispersive X-ray analysis: energy dispersive)
According to X-ray spectroscopy) analysis, Sn, which is the main component of the solder, has entered the vicinity of the position where the peak of Cr has appeared, and is often seen. On the other hand, Cu is in a state where the Cu layer 13a remains slightly. I understand. When the reflow temperature is about 250 ° C. and the reflow time is about 20 minutes, as shown in the cross-sectional structure at the end of the UBM, the solder is alloyed and diffuses and sufficiently reaches the Cr (Ti) layer 13b, and the Cr (Ti) layer 13b is sufficiently formed. 3) The layer 13b is connected by soldering, and further diffusion does not proceed, so that the layer 13b has resistance to solder. As a result, according to the EDX analysis, Sn, which is the main component of the solder, sharply decreases near the position where the peak of Cr is present, and the diffusion of the solder has completely progressed to the Cr (Ti) layer 13b. No further progress is made, indicating that the connection reliability was ensured with the durability. Cu detected in the vicinity is an intermetallic compound with Sn.

FIG. 6 shows the reflow time dependency of the initial connection strength. As can be seen from FIG. 6, when the reflow time is about 1 to 2 minutes, since the shear strength varies greatly around 320 (g / bump), the solder alloys and spreads to form Cr (Ti). ) It can be seen that the layer 13b is not sufficiently reached. Further, when the reflow time elapses, the variation in the shear strength is reduced around 290 (g / bump), the solder alloys and spreads, and reaches the Cr (Ti) layer 13b sufficiently, and the Cr (Ti) layer )
It can be seen that the layer 13b was soldered.

FIG. 7 shows the reliability of the connection strength (high temperature storage).
Is shown. As can be seen from FIG.
Even when left at 150 ° C. or 200 ° C., the shear strength is 240 to 250 (g / bump) even if the shear strength is about 320 (g / bump) initially and the standing time is about 500 hours or more. It can be seen that the connection strength is reduced to a stable level, and the reliability of the connection strength can be secured without lowering.

In particular, the Sn-Ag-based solder 17 is applied to the Cu coating layer 13 at the reflow stage (solder stage).
It has been found that the reliability of the bonding is unstable unless it penetrates through a and reaches the Cr (Ti) layer 13b. This is because even if the solder diffuses in the Cu coating layer 13a and reaches the Cr (Ti) layer 13b during a long-term use, the Cr penetrates through the Cu coating layer 13a over a long period of time.
An extremely thin oxide layer is formed at the interface between the (Ti) layer 13b and the Cu covering layer 13a, and the solder 17
It is presumed that this is because the (Ti) layer 13b cannot be reached. For this reason, the thickness of the Cu layer 13a, which is the coating layer, is about 0.1 μm or more because of the need to block oxygen during the reflow process, and the thickness of the Cu layer 13a is at most 10 μm because the solder needs to penetrate during soldering. Or less.

The present invention has been created in consideration of the results of these studies, and has been described in connection with a Cr or Ti layer 1 in a wiring.
3b is used as an adhesive layer and a solder diffusion preventing layer, and Cu is applied as a coating layer 13a for preventing oxidation.

This configuration is based on Cr / Cu / Cr or Ti
According to the present invention, since the / Cu / Cr laminated wiring layer is used, a part of the Cu layer 13a of the laminated wiring 13 is exposed, and this part can be used as it is as a soldering electrode. However, for this purpose, as described above, it is necessary to ensure that the solder 17 containing Sn penetrates through the Cu layer 13a and reaches the lower Cr or Ti layer 13b as an adhesive layer in the soldering step.

Note that the surface of the Cu layer 13b that has been sprinkled is
By providing an anticorrosion layer such as an Au layer, a Ni / Au layer, or a preflux, the wettability of the solder can be improved.

In the above embodiment, the case where the solder 17 is directly connected to the wiring 13 connected to the electrode 12 has been described. However, another wiring layer for connecting between the electrode 12 and the wiring 13 is provided. You may. In this case, the wiring 13
It will be formed in an electrode shape. However, providing another wiring layer increases the number of processes.

FIG. 8 shows another embodiment.

As shown in FIG. 8, when the electrodes 12 on the substrate are formed in an arrangement suitable for connection in advance, the wiring 13 does not need to be formed, and thus the protection for protecting the substrate from external force and atmosphere is required. An opening 19 of the film 16 is formed immediately above the electrode 12, and a Cr layer or a Ti layer, which is a laminated metal layer of the present invention, is formed by using the opening 19 and the edge of the opening to form an electrode for connection. 13b with a thickness of 0.1 μm,
A Cu layer 13a is formed thereon with a thickness of 0.5 to 3 μm, and a Cr 13c is formed on the uppermost layer with a thickness of 0.05 to 0.1 μm. Then, after forming a resist by photolithography on these formed metal layers, C
Unnecessary portions are sequentially removed by etching the r layers 13c and 13b with hydrochloric acid or potassium ferricyanide-based solution and the Cu layer 13a with nitric acid or ferric chloride-based solution. In this case, when a potassium ferricyanide-based solution is used as the Cr etching solution, side etching hardly occurs, so that an electrode pattern can be formed by a single resist pattern formation. In actual solder connection, the flux 20 is applied immediately after the uppermost Cr film 13a is removed with an etchant and dried.
It is possible to prevent insufficient wetting failure at the time of solder connection without forming an expensive antioxidant film such as Au.

When a solder connection is made to the connection pad formed by the above-described process, unlike the above-described embodiment, the melted solder flows to the side surface of the connection pad as shown in FIG. Therefore, if a metal having poor resistance to molten solder is used as a constituent material, the electrodes may be eroded by the solder from the side, so that the actual connection pad area may be reduced, and the connection strength is reduced. However, the connection pad made of the above-mentioned material according to the present patent has the advantage that the solder 17 is connected to the Cr layer or the Ti layer 13b even if the Cu layer 13a, which is not so excellent in molten solder resistance, disappears, Since the layer or the Ti layer 13b is adhered to the underlying substrate, the connection strength hardly decreases. This is because Cr has extremely excellent resistance to molten solder.

Three-dimensional mounting has been proposed as a promising method for increasing the density of mounting in the future, and examples of trial production have been reported. In this mounting, after the LSI chip is polished from the back surface to make the chip extremely thin, a through hole for electrical connection is opened in the Si portion and connected to another LSI through this hole. For this reason, several methods have been tried as connection methods, but the most practical method is a method using solder. In this method, as shown in FIG. 9, a hole is formed after the Si 21 is polished thinly, and is connected to the connection electrode 12 provided on the element / wiring layer 22 side by soldering. The solder 17 is connected to the back surface. In this case, it is technically difficult to increase the thickness of the electrode 12 in the LSI manufacturing process, and it is not practical in terms of cost.

Therefore, when the electrode for solder connection of the material constitution according to the present invention is used, the laminated wiring 13 in which the Cu 13a is sandwiched between the Cr layer or the Ti layer 13b as shown in the above embodiment is used as the wiring. Even when soldering is performed from the back surface, when viewed from the solder 17 side, the configuration is exactly the same as that of the solder connection portion in the above embodiment. Therefore, by using the electrode material and the structure according to the present invention, as shown in FIG. 10, it is possible to realize a structure capable of coping with solder bonding from both the Si 21 side and the element / wiring layer 22 side with one layer. is there.

By connecting and mounting the above-described solder of the wiring board or the semiconductor device according to the present invention to the electrode or the like of the substrate, an electronic device or a semiconductor device mounting structure can be formed. Even if these electronic devices and semiconductor device mounting structures have become finer and more multi-layered due to higher performance and multi-functionality, the functions of external connection parts will be secured. can do.

[0066]

According to the present invention, it is possible to easily realize a high-density wiring board or a semiconductor device having high connection reliability and considering electrical characteristics.

Further, according to the present invention, it is possible to manufacture a high-density wiring board or a semiconductor device having high connection reliability and considering electrical characteristics at a low cost by shortening the process. Play.

Further, according to the present invention, an electronic device or a semiconductor device mounting structure having a high connection reliability and an inexpensive high-density wiring board in consideration of electric characteristics and a semiconductor device is realized. The effect that can be achieved.

[Brief description of the drawings]

FIG. 1 is a sectional view showing one embodiment of a wiring board and a semiconductor device according to the present invention.

FIG. 2 is a view for explaining the first half of an embodiment of the manufacturing process of the wiring board and the semiconductor device according to the present invention.

FIG. 3 is a diagram for explaining the latter half of one embodiment of the manufacturing process of the wiring board and the semiconductor device according to the present invention.

FIG. 4 is a sectional view showing another embodiment of the wiring board and the semiconductor device according to the present invention.

5 is a diagram showing an SEM observation of a cross section after reflow in the embodiment shown in FIG. 4;

6 is a diagram showing the reflow time dependency of the initial connection strength in the embodiment shown in FIG.

FIG. 7 is a diagram showing the reliability of connection strength when left at a high temperature in the embodiment shown in FIG. 4;

FIG. 8 is a sectional view showing one embodiment of a wiring board and a semiconductor device according to the present invention.

FIG. 9 is a cross-sectional view showing one embodiment of a wiring board and a semiconductor device according to the present invention.

FIG. 10 is a sectional view showing one embodiment of a wiring board and a semiconductor device according to the present invention.

[Explanation of symbols]

11 ... substrate, 12 ... electrode (pad), 13 ... wiring (laminated wiring), 13a ... Cu layer, 13b ... Cr or Ti layer, 13c ... Cr layer, 15 ... insulating layer (stress relaxation layer),
Reference numeral 16: wire keeping film (protective layer), 17: solder, 17a: alloying (Sn-Cu intermetallic compound), 18: opening, 19: opening (hole for solder joint)

[Procedure amendment]

[Submission date] February 13, 2003 (2003.2.1
3)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

   ────────────────────────────────────────────────── ─── Continuation of front page    (72) Inventor Yoshihide Yamaguchi             292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa             Hitachi, Ltd., Production Technology Laboratory (72) Inventor Hiroyuki Tenmei             292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa             Hitachi, Ltd., Production Technology Laboratory F term (reference) 4E351 BB01 BB32 BB35 DD04 DD11                       DD17 DD24 GG08                 5E319 AA03 AB05 AC18 BB05 CC33                       CD26 GG01 GG03

Claims (15)

[Claims] 1. An insulating layer provided on a substrate, a Cu layer, and the Cu layer and the insulating layer adhered to each other between the Cu layer and the insulating layer below the Cu layer. A wiring formed by laminating a layer of Cr or Ti provided as a layer, and further forming a layer of Cr or Ti by diffusion alloying a solder for external tangent with respect to a layer of Cu in the wiring. A wiring board, wherein the wiring board is configured to reach and connect to the wiring board. 2. A substrate having an electrode and covered with an insulating layer having a hole formed so as to expose the electrode, a Cr or Ti layer connected to the electrode and adhered to the insulating layer, Or Cu adhered on the Ti layer
A protective film having a hole for solder bonding covering the wiring, mounted on the hole for solder bonding formed in the protective film, and having a Cu And a solder for external connection, which is formed by forming a layer of said alloy into a diffusion alloy to reach said Cr or Ti layer and connecting said layer. 3. A wiring board, characterized in that the solder for external connection according to claim 1 or 2 is formed of a solder containing Sn. 4. The wiring according to claim 1, wherein
A wiring substrate, wherein the thickness of the u layer is about 0.1 μm to about 10 μm. 5. The wiring board according to claim 2, wherein a Cr layer is provided between the Cu layer and the protective film. 6. A wiring board, wherein the insulating layer according to claim 1 includes an organic resin layer. 7. A wiring board, wherein the solder for external connection according to claim 1 is directly connected to a wiring layer connected to an electrode on the board. 8. The method according to claim 1, wherein an Au layer or a Ni / Au layer or a pre-flux is provided between the Cu layer and the solder for external connection in order to improve the wettability of the solder. A wiring board having a rust prevention layer. 9. An electronic device, wherein the solder for external connection on the wiring board according to claim 1 is connected to an electronic component. 10. An insulating layer forming step of forming an insulating layer on a substrate, and Cr or T on the insulating layer formed in the insulating layer forming step.
a wiring forming step of forming a wiring by laminating a layer of i and a layer of Cu, and forming a wiring; and forming a solder for external connection by diffusion alloying with respect to the Cu layer in the wiring formed in the wiring forming step. The Cr
Or a reflow step of reaching and connecting to the Ti layer. 11. An insulating film is coated on a substrate having electrodes,
An insulating film forming step of forming a hole so as to expose the electrode; and a layer of Cr or Ti connected to the electrode and adhered to the insulating layer, and a layer of Cu adhered on the Cr or Ti layer.
Forming a wiring by forming a layer by laminating the above layers; and forming a protective film so as to cover the wiring formed in the wiring forming step, and forming a protective film forming hole for solder joint. A solder for external connection is mounted in the solder joint hole opened in the protective film forming step, and the Cu layer in the wiring is made to be diffusion alloyed and reaches the Cr or Ti layer for connection. A method for manufacturing a wiring board, comprising: a reflow process. 12. A semiconductor substrate having an electrode and coated with an insulating layer having a hole formed so as to expose the electrode, a Cr or Ti layer connected to the electrode and adhered to the insulating layer, Cu adhered on Cr or Ti layer
A protective film having a hole for solder bonding covering the wiring, and a solder film mounted on the hole for solder bonding formed in the protective film, And a solder for external connection, which is formed by diffusion alloying the layer of (a) and (b) to reach and connect to the Cr or Ti layer. 13. The semiconductor device according to claim 12, wherein a Cr layer is provided between the Cu layer and the protective film. 14. A semiconductor device according to claim 12, wherein the insulating layer includes an organic resin layer. 15. A semiconductor device mounting structure in which the solder for external connection in the semiconductor device according to claim 12 is connected and mounted on an electronic component.