JP2003243707A - Display device and method and apparatus for manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device which facilitates miniaturization, extends lifetime and raises luminance of a blue light and a method for manufacturing the same, and to provide an apparatus for efficiently manufacturing the display device. <P>SOLUTION: The display device comprises a pixel section 100 having a plurality of light emitting elements 10 arranged in a matrix, and a current density controller 204. The element 10 has a II-VI compound semiconductor layer, and emits a blue light. The controller 204 controls a mean current density when the element 10 is driven to 300 mA/cm<SP>2</SP>or less. Thus, the lifetime of the element 10 can be extended to 10,000 hours or more. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device having a light emitting element including a II-VI group compound semiconductor layer, a method of manufacturing the same, and a manufacturing device used therefor.

[0002]

2. Description of the Related Art In recent years, display devices using semiconductor light emitting elements have been developed. Among them, GaN and A are used as the light emitting element capable of emitting light of short wavelength such as blue.
A material using a nitride III-V compound semiconductor typified by an lGaN mixed crystal or a GaIn mixed crystal has been actively developed, and a luminous efficiency of about 10% has been obtained. However, since the nitride III-V group compound semiconductor is usually produced on a sapphire substrate having chemical resistance, it is difficult to perform fine processing by etching, and the process for producing the device becomes complicated. was there.

Other light emitting devices capable of emitting light of short wavelength include group II elements zinc (Zn), magnesium (Mg), beryllium (Be), and cadmium (C).
d), at least one member selected from the group consisting of mercury (Hg) and manganese (Mn), and oxygen (O) of Group VI element,
There is one using a II-VI group compound semiconductor containing at least one selected from the group consisting of sulfur (S), selenium (Se) and tellurium (Te). In this light emitting device, a semiconductor laser has a life of about 500 hours, and a light emitting diode has a high brightness green light color. According to this light emitting device, the II-VI group compound semiconductor can be crystal-grown on the GaAs mixed crystal, which can be easily etched, so that fine processing is easy.

[0004]

However, II-
In the case of a semiconductor laser, a threshold current density of a light emitting device using a Group VI compound semiconductor is 500 A / cm ²
However, there is a problem that the reproducibility is not sufficiently high. As for the light emitting diode, since the difference in band gap between the clad layer and the active layer is small, high-intensity blue light is not obtained, and the lifetime is not sufficient due to deterioration from defects. There was a problem.

The present invention has been made in view of the above problems. A first object of the present invention is a display capable of facilitating fine processing, prolonging its life, and enhancing the brightness of blue light. An object is to provide a device and a manufacturing method thereof.

A second object of the present invention is to provide a manufacturing apparatus capable of efficiently manufacturing the display device of the present invention.

[0007]

A display device according to the present invention comprises at least one Group II element from the group consisting of zinc, magnesium, manganese, beryllium, cadmium and mercury, and oxygen, sulfur, selenium and tellurium. I having at least one Group VI element from the group
A light emitting device having a group I-VI compound semiconductor layer, and an average current density when driving the light emitting device is 300 mA / c.
and a current density control unit for controlling to m ² or less.

According to the method of manufacturing a display device of the present invention, zinc, magnesium, manganese, beryllium,
At least one of the group consisting of cadmium and mercury
A growth region utilizing a mask when growing a II-VI group compound semiconductor layer containing a group II element of a seed and at least one group VI element of a group consisting of oxygen, sulfur, selenium and tellurium. And a step of forming a plurality of light emitting elements by limiting the above, and a step of forming a current density control unit for controlling the average current density when driving the light emitting elements to 300 mA / cm ² or less.

The production apparatus according to the present invention comprises, on a substrate, at least one group II element selected from the group consisting of zinc, magnesium, manganese, beryllium, cadmium and mercury, and oxygen, sulfur, selenium and tellurium. II-VI containing at least one Group VI element from the group
A group for growing a group compound semiconductor layer, a holding section for holding a substrate, a raw material supply section for supplying a raw material of a II-VI compound semiconductor layer to the substrate, and a II-VI group compound for growing on the substrate And a mask for limiting the region of the semiconductor layer.

In the display device according to the present invention, the current density is 3
Since it is suppressed to as low as 00 mA / cm ² or less, the life is extended.

In the method of manufacturing a display device according to the present invention, a plurality of light emitting elements are formed by facilitating fine processing and limiting the growth region.

Since the manufacturing apparatus according to the present invention includes the mask, the region of the II-VI group compound semiconductor layer grown on the substrate is limited.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(First Embodiment) FIG. 1 shows a first embodiment of the present invention.
3 shows a schematic configuration of the display device according to the embodiment. This display device includes, for example, a pixel portion 100 including a plurality of light emitting elements 10 arranged in a matrix, and a peripheral circuit portion 200 provided in the peripheral portion of the pixel portion 100. The peripheral circuit section 200 includes a signal terminal 201,
It has a horizontal scanning unit 202 and a vertical scanning unit 203. The horizontal scanning unit 202 sends a horizontal scanning signal to the pixel unit 100 together with the image signal input to the signal terminal 201, and the vertical scanning unit 203 sends a vertical scanning signal to the pixel unit 100 together with the image signal.

The peripheral circuit section 200 also includes a horizontal scanning section 2
02 and the vertical scanning unit 203 to drive the light emitting element 10.
Current density control unit 2 for controlling the average current density when moving
It is equipped with 04. This current density control unit 204
Current density is 300mA / cm ²By controlling below
To extend the life of the light emitting device 10.
It It should be noted that the average current density means that the current was applied in a pulse shape.
At one pixel during one cycle of the swept current density
Means the average value of.

FIG. 2 shows a sectional structure of the light emitting device 10 shown in FIG. This light emitting element 10 is formed on one surface of the substrate 11 via a III-V group buffer layer 12a, and
-VI group buffer layer 12b, n-type clad layer 13, light emitting layer 14, p-type clad layer 15, first semiconductor layer 16a,
The second semiconductor layer 16b, the superlattice semiconductor layer 17, and the contact layer 18 are sequentially laminated. Of these, the n-type cladding layer 13 and the p-type cladding layer 15 correspond to the pair of cladding layers in the present invention.

The substrate 11 has, for example, a thickness of 100 μm to
It is 400 μm and is made of GaAs, silicon (Si) or glass. GaAs is an n-type impurity doped with silicon (Si) of about 2 × 10 ¹⁸ cm ⁻³
Type conductivity may be used, and chromium (II) oxide may be used.
It may have a semi-insulating property to which (CrO) is added.
The same applies to silicon. The III-V group buffer layer 12a contains 1 × 1 silicon (Si) as an n-type impurity.
It is composed of n-type GaAs added with about 0 ¹⁹ cm ^-3 . The thickness of the III-V group buffer layer 12a may be, for example, about 100 nm or more when the substrate 11 has conductivity, but is preferably 1 μm or more when the substrate 11 is semi-insulating or insulating. This is because the resistance increases.

The II-VI group buffer layer 12b is, for example,
For example, the thickness is 100 nm to 200 nm, and zinc and
And chlorine (Cl) as n-type impurities
2 x 10¹⁸cm^-3N-type ZnSe mixed crystal added to some extent
It is configured. The n-type cladding layer 13 has, for example, a thickness
Is about 1 μm, and chlorine is 2 × 10 as an n-type impurity.
¹⁷cm^-3Structured with n-type ZnMgSSe mixed crystal added to some extent
Is made. The composition of the n-type cladding layer 13 is
So that the band gap is 2.85 eV or more.
Preferably. From the n-type cladding layer 13 to the light emitting layer 14
A transition region (so-called guide layer) is not formed over
The mold cladding layer 13 and the light emitting layer 14 are directly adjacent to each other.
Is it possible to extend the life of the light emitting element 10?
It is. For example, if it is a ZnMgSSe mixed crystal, II
88 mol% of zinc and 12 m of magnesium in the group
ol%, sulfur in Group VI 18 mol%, selenium
82 mol% is preferable. In this case, at room temperature
The bandgap in the substrate is 2.9 eV,
For example, if it is made of GaAs, the lattice mismatch with the substrate 11
In the case of 0%.

The light emitting layer 14 has, for example, a multiple quantum well structure in which an active layer and a barrier layer are laminated for 1 to 10 periods. For example, the active layer and the barrier layer may be stacked in this order from the n-type cladding layer 13 side, and the barrier layer may be adjacent to the p-type cladding layer 15. You may make it adjoin 15 and. The active layer is, for example, n-type Zn doped with chlorine as an n-type impurity.
It is composed of a CdSe mixed crystal or an n-type ZnCdSSe mixed crystal. The composition of cadmium in Group II is, for example, 1 mol% to 50 mol%. The thickness of one cycle of the active layer is preferably 10 nm or less, for example, 2 nm. The emission energy of the active layer is set to 2.58 eV or more by adjusting the composition and the thickness, and emission in the blue region can be obtained. In FIG. 3, the composition of the active layer is Zn _0.8 Cd _0.2 Se and the thickness of the active layer is 2 n.
The emission spectrum when m is shown.

The n-type impurity is added to the active layer in order to increase the emission intensity. FIG. 4 shows the chlorine concentration dependence of the luminous efficiency. In the figure, the vertical axis and the horizontal axis represent the luminous efficiency and the chlorine concentration, respectively, and their units are W / A and cm ^-3 , respectively. As can be seen from FIG. 4, the luminous efficiency is improved when the amount of chlorine added is 2 × 10 ¹⁸ cm ⁻³ or less,
It is further improved in the range of 2 × 10 ¹⁴ cm ⁻³ or more and 2 × 10 ¹⁸ cm ⁻³ or less. That is, the amount of chlorine added is 2 ×
It is preferably 10 ¹⁸ cm ^-3 or less, and 2 × 10 ¹⁴ c
More preferably, it is in the range of m ⁻³ or more and 2 × 10 ¹⁸ cm ⁻³ or less.

The barrier layer has a thickness of, for example, about 5 nm in one cycle, and has Z added with chlorine as an n-type impurity.
It is composed of nSSe mixed crystal. The composition of the ZnSSe mixed crystal is, for example, 6 mol% of sulfur in the VI group element,
The selenium content is preferably 94 mol%. Board 11
This is because the lattice mismatch with the substrate 11 can be made to be almost 0% when is composed of GaAs. However, even if the lattice mismatch with the substrate 11 is set to about -0.2%, the characteristics do not deteriorate. Therefore, for example, sulfur in the group VI element is 18 mol%, selenium is 82 mol%, and tensile strain is introduced. Good. The difference in bandgap between the active layer and the barrier layer is preferably 100 meV or more. The n-type impurity concentration in the barrier layer is similar to that in the active layer.

The p-type cladding layer 15 has a thickness of, for example, about 0.7 μm and is made of a p-type ZnMgSSe mixed crystal to which nitrogen (N) as a p-type impurity is added at about 5 × 10 ¹⁷ cm ^−3. There is. The composition of the p-type cladding layer 15 is
Similar to the n-type cladding layer 13, it is preferable that the band gap at room temperature be 2.85 eV or more. As described above, the p-type cladding layer 15 and the light emitting layer 14
This is because the lifespan of the light emitting element 10 can be extended by directly adjoining and.

The first semiconductor layer 16a has a thickness of, for example, about 0.15 μm and contains 2 × of nitrogen as a p-type impurity.
It is composed of a p-type ZnSSe mixed crystal added with about 10 ¹⁸ cm ⁻³ . The second semiconductor layer 16b has, for example, a thickness of 0.13 μm, and nitrogen of 2 × 10 5 is used as a p-type impurity.
It is composed of a p-type ZnSe mixed crystal added with about ¹⁸ cm ⁻³ . The composition of the ZnSSe mixed crystal is, for example,
In the case of being composed of aAs, if the sulfur in the VI group element is 6 mol% and the selenium is 94 mol%, the substrate 11
This is preferable because it can be lattice-matched with.

The superlattice semiconductor layer 17 is formed by alternately stacking, for example, five cycles of a p-type ZnSe layer containing chlorine as a p-type impurity and a p-type ZnTe layer containing chlorine as a p-type impurity. There is. The thickness of the p-type ZnSe layer is constant in each cycle, and the thickness of the p-type ZnTe layer gradually increases from the second semiconductor layer 16b toward the contact layer 18. The contact layer 18 has, for example, a thickness of 3 nm, and nitrogen of 2 × 10 ¹⁹ cm as a p-type impurity.
^-3 added p-type ZnTe.

A contact electrode 19a, which is a transparent electrode, is formed on the contact layer 18, and a wiring electrode 19b is formed on a part of the contact electrode 19a.
The contact electrode 19a has a structure in which gold (Au) is stacked in a thickness of about 10 nm and is electrically connected to the contact layer 18. The wiring electrode 19b is made of titanium (T
i) and aluminum (Al) are sequentially stacked and alloyed by heat treatment.
Connected to 00.

FIG. 5 shows an example of the configuration of the pixel section 100 shown in FIG. This is the case where the substrate 11 is made of a semi-insulating or insulating material. For example, the substrate 1
1 is common to all the light emitting elements 10. In addition, each light emitting element 10 is electrically connected, for example, for each row by using the III-V group buffer layer 12a in common, and is electrically connected, for example, for each column by the wire 300. III-
The V-group buffer layer 12a and the wire 300 are connected to a common wiring (not shown).

The display device having such a structure can be manufactured as follows.

FIG. 6 shows the structure of an MBE crystal growth apparatus used when manufacturing this display device. This MB
The E crystal growth apparatus is a kind of vacuum vapor deposition apparatus, and has two growth chambers 40, which are connected to an ultra-high vacuum exhaust device (not shown).
Equipped with 50. The growth chambers 40 and 50 are the vacuum transfer chamber 6
1 and the introduction chamber 62 are connected via a gate valve 63.

The growth chamber 40 is for growing a III-V group compound semiconductor layer, and a substrate holder 41 as a holding portion for holding the substrate 11 is provided inside. The substrate holder 41 is made of, for example, molybdenum (Mo), and can be heated by a heater (not shown). In the growth chamber 40, a plurality of particle beam source cells 42 (for example, Knuzen cells (K cells)) that are raw material supply units are arranged so as to face the substrate 11. Each particle beam source cell 42 contains a group III element, V
Raw materials corresponding to group elements and n-type impurities are individually filled. For example, gallium (Ga) or indium (In) is used as the group III element, arsenic (As) is used as the group V element, and silicon is used as the n-type impurity. Each of the particle beam source cells 42 can be individually heated according to the raw material to be filled.
When it is silicon, for example, 900 ° C. and 700, respectively
℃, 250 ℃, 1000 ℃. Shutters 43 that can be opened and closed are provided near the irradiation ports of each particle beam source cell 42.

The growth chamber 40 is further provided with a high-speed electron gun 44 and a screen 45 corresponding thereto, and high-speed electron diffraction (RHEED; Diffracted by the surface of the substrate 11).
By projecting a Reflection High Energy Electron Diffraction) image on the screen 45, the surface state of the substrate 11 can be observed.

The growth chamber 50 is for growing a II-VI group compound semiconductor, and like the growth chamber 40, has a substrate holder 51 which is a holding portion inside and a plurality of raw material supply portions which face the substrate holder 51. The particle beam source cell 52 is provided.
Each particle beam source cell 52 is individually filled with a raw material corresponding to a group II element, a group VI element, and an n-type impurity. For example, the group II element is individually filled with zinc, magnesium, cadmium, or beryllium, the group VI element is individually filled with sulfur, selenium, or tellurium, and the n-type impurity is individually filled with zinc chloride (ZnCl ₂ ). A valve cracking cell is used for sulfur and selenium, and a Knuzen cell is used for others. Each particle beam source cell 52 is capable of individually raising the temperature according to the raw material to be filled. When the raw material is zinc, magnesium, cadmium, beryllium, sulfur, selenium, tellurium, or zinc chloride, , 200 ℃, 320 ℃, 160 ℃, 1000 ℃, 1 respectively
The temperatures are 20 ° C, 260 ° C, 200 ° C, and 80 ° C. Similar to the growth chamber 40, each shutter 53 is arranged near the irradiation port of each particle beam source cell 52.

The growth chamber 50 is also provided with a plasma generation chamber 54 which is a raw material supply unit for converting nitrogen into plasma and irradiating it toward the substrate 11 so that nitrogen (N) can be added as a p-type impurity. ing. The plasma generation chamber 54 is
For example, it is composed of an ECR (Electron Cyclotron Resonance) cell. In this ECR cell, a microwave is supplied from a microwave terminal 54b into a cell surrounded by a magnet 54a, and nitrogen gas is supplied from a gas introduction pipe 54c to turn nitrogen into plasma, and the plasma outlet 5
Irradiation starts from 4d. Plasma outlet 5
Similar to the particle beam source cell 52, a shutter 53 is arranged near 4d. The plasma generation chamber 5
Although not shown, 4 may be configured by an RF (Radio Frequency) cell.

Similar to the growth chamber 40, the growth chamber 50 is further provided with a high-speed electron gun 55 and a screen 56 corresponding thereto, so that the surface condition of the substrate 11 can be observed. ing.

Using the MBE crystal growth apparatus as described above, first, for example, the substrate 11 is attached to the substrate holder 41 with indium as an adhesive and heated to about 600 ° C. to thermally clean the surface of the substrate 11. Then, for example,
Particle beams of gallium, arsenic, and silicon are 1-2 x 1 each
0 ^-7 Torr, 1 × 10 ^-5 Torr, 1 × 10 ^-9 Tor
Irradiated at an intensity of r or less, and made of n-type GaAs III
-Group V buffer layer 12a is grown.

Subsequently, for example, annealing is performed in an arsenic atmosphere to bring the surface rearrangement structure of the III-V group buffer layer 12a in the RHEED observation into a state of c (4 × 4) arsenic excess surface. After that, the substrate 1 is transferred using the vacuum transfer chamber 61.
1 is transferred to the growth chamber 50. III-V group buffer layer 1
The surface rearrangement structure of 2a is made into a state of an arsenic-rich surface,
This is for preventing the adhesion of impurities and for forming an optimum surface for growing the II-VI group compound semiconductor layer by transferring excessive amount of arsenic after transferring to the growth chamber 50.

After transferring the substrate 11 to the growth chamber 50, the substrate 11 is attached to the substrate holder 51, and the temperature is raised to, for example, about 460 ° C. to evaporate excess arsenic, and the III-V group buffer layer 12a in the RHEED observation is formed. The surface rearrangement structure is a (2 × 4) arsenic stable surface. This is because the density of stacking faults can be reduced. After that, the temperature of the substrate 11 is cooled to a temperature (for example, 280 ° C.) for growing the II-VI group compound semiconductor layer, and each particle beam is supplied onto the III-V buffer layer 12a to supply each II. -Grow a Group VI compound semiconductor layer.

First, for example, a particle beam of zinc, which is a group II element, and a particle beam of selenium, which is a group VI element, are alternately irradiated to form a II-VI group buffer layer 12 made of n-type ZnSe.
grow b. The particle beams of zinc and selenium are alternately irradiated in order to reduce the stacking fault density by improving the flatness of the interface between the III-V group buffer layer 12a and the II-VI group buffer layer 12b.

Next, on the II-VI group buffer layer 12b, for example, an n-type cladding layer 13 made of an n-type ZnMgSSe mixed crystal, an n-type ZnCdSe mixed crystal, or an n-type ZnC.
Light emitting layer 14 composed of an active layer made of dSSe mixed crystal and a barrier layer made of ZnSSe mixed crystal, p-type ZnMgS
P-type clad layer 15 made of Se, first semiconductor layer 16a made of p-type ZnSSe mixed crystal, second semiconductor layer 16b made of p-type ZnSe, p-type ZnSe layer and p-type ZnTe
Layer and a contact layer 18 made of p-type ZnTe are sequentially grown.

After growing each semiconductor layer on the substrate 11, the semiconductor layer is taken out from the MBE crystal growth apparatus, and gold is deposited on the contact layer 18 to form a contact electrode 19a. Further, titanium and gold are sequentially vapor-deposited on a part of the contact electrode 19a to be alloyed to form the wiring electrode 1
9b is formed.

After that, for example, each semiconductor layer is selectively removed by etching or dicing using hydrofluoric acid (HF) or the like, and each light emitting element 10 is separated. After separating each light emitting element 10, for example, the wiring electrode 19b is connected by the wire 300 in the direction (column direction) orthogonal to the extension direction (row direction) of the III-V group buffer layer 12a, as shown in FIG. The pixel portion 100 is formed. Furthermore, III-
The V-group buffer layer 12a and the wire 300 are connected to a common wire (not shown), and the signal terminal 201, the horizontal scanning unit 202, the vertical scanning unit 203, and the current density control unit 204 are connected.
Are provided in the peripheral portion of the pixel portion 100. As a result, the display device shown in FIG. 1 is formed.

This display device operates as follows.

In this display device, when a predetermined voltage is applied to the light emitting element 10, the light emitting layer 14 emits light,
High-intensity blue light is obtained. At that time, the average current density flowing through the light emitting element 10 is set to 300 by the current density control unit 204.
It is controlled to mA / cm ² or less. Here, FIG. 7 shows the relationship between the average current density and the life of the light emitting device 10 according to the present embodiment. As can be seen from FIG. 7, when the average current density is 300 mA / cm ² or less, a life of 10,000 hours or more, which is required commercially, is secured.

As described above, according to the present embodiment, II-
Since the light emitting device 10 including the group VI compound semiconductor layer is provided, fine processing is easy, and the average current density when driving the light emitting device 10 is 300 mA / cm.
^Since the current density control unit 204 is controlled to ² or less, a long life of 10,000 hours or more can be secured.

Further, since the light emitting layer 14 and the n-type clad layer 13 and the p-type clad layer 15 are directly adjacent to each other, the life can be further extended.

Further, the active layer contains 2 × 10 ¹⁸ c of n-type impurities.
Since it is contained within the range of m ⁻³ or less, the emission intensity and the emission efficiency can be improved.

In addition, the band gaps of the n-type cladding layer 13 and the p-type cladding layer 15 at room temperature are 2.85.
Since it is set to eV or more, the light emitting layer 14 and the n-type cladding layer 13 and the p-type cladding layer 15 are directly adjacent to each other, and the life can be further extended.

Although a specific example has been described above as a constituent material of the light emitting element 10 in the display device of the present invention, other materials as shown in Table 1 or Table 2 may be used. In the table, before the colon (:) is the semiconductor material,
The impurities after the colon are added. The composition in parentheses in Table 1 is lattice-matched with GaAs, and the composition in parentheses in Table 2 is lattice-matched with InP. Other configurations, manufacturing methods, operations and effects are the same as those in the first embodiment. Therefore, detailed description of the same parts is omitted here.

[0048]

[Table 1]

[0049]

[Table 2]

(Second Embodiment) FIG. 8 shows a second embodiment of the present invention.
3 shows a schematic configuration of the display device according to the embodiment. This display device includes a light emitting element 10 having a blue emission color, a light emitting element 20 having a green emission color, and a light emitting element 30 having a red emission color.
And have the same configuration as the first embodiment except that the pixel portions 100A are arranged in a matrix. Therefore, the same reference numerals are given to corresponding components here, and detailed description of the same components will be omitted. In addition to the light emitting element 10, the current density control unit 204
Although it may be configured to control the average current density when driving the light emitting element 20 and the light emitting element 30, at least the average current density when driving the light emitting element 10 is 30.
It may be configured so as to be controlled to 0 mA / cm ² or less. Further, the light emitting elements 10, 20, 30 are arranged, for example, so that the emission colors are the same in the column direction and the emission colors are repeated in the row direction in order.

FIG. 9 shows X- of the pixel section 100A shown in FIG.
It shows a cross-sectional structure along the X-ray. Light emitting element 20
Has the same configuration as the light emitting layer 10 except that the composition of the active layer in the light emitting layer 24, for example, the composition of cadmium is different. The light emitting element 30 has the same configuration as the light emitting element 10 except that the composition of the active layer in the light emitting layer 34 is different. The active layer of the light emitting layer 34 is, for example, Z
It is composed of a semiconductor material obtained by adding a rare earth element or a transition metal element to an nCdSe mixed crystal. The composition of cadmium is 0.01 mol% to 0.5 mol%. Rare earth elements include lanthanum (La), cerium (Ce),
Praseodymium (Pr), Neodymium (Nd), Promethium (Pm), Samarium (Sm), Europium (E
u), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Y)
b) or lutetium (Lu). The active layer of the light emitting layer 34 may be made of, for example, a III-V group compound semiconductor.

This display device can be manufactured as follows.

FIG. 10 shows a part of a manufacturing apparatus used for manufacturing this display device. This manufacturing equipment
In the growth chamber 50 of the MBE crystal growth apparatus shown in FIG. 5, a metal mask 70 having a plurality of slits 71 is provided so as to face the substrate 11. The mask 70 can be moved up and down as needed.

11 to 13 show a method of manufacturing a display device using this manufacturing apparatus in the order of steps. First,
As shown in FIG. 11A, the III-V group buffer layer 12a, the II-VI group buffer layer 12b, and the n-type cladding layer 13 are formed on the substrate 11 in the same manner as in the first embodiment, for example. To grow sequentially.

Next, as shown in FIG. 11B, the n-type cladding layer 13 is masked with the n-type cladding layer 13 so that, for example, the slit 71 of the mask 70 corresponds to the region where the light emitting layer 14 is to be formed.
And the particle beam is irradiated to grow the light emitting layer 14. Then, as shown in FIG. 12A, for example, the light emitting layer 24
The mask 70 is moved so that the slits 71 of the mask 70 correspond to the region where the light emitting layer 24 is to be formed, and the light emitting layer 24 is grown.
After that, as shown in FIG. 12B, for example, the mask 70 is moved so that the slit 71 of the mask 70 corresponds to the region where the light emitting layer 34 is to be formed, and the light emitting layer 34 is grown.

After growing the light emitting layers 14, 24 and 34, the mask 70 is removed, and as shown in FIG. 13, for example, the p-type cladding layer 15 and the first layer are formed on the entire surface in the same manner as in the first embodiment. First semiconductor layer 16a, second semiconductor layer 16
b, the superlattice semiconductor layer 17 and the contact layer 18 are sequentially grown. After that, the substrate 11 is taken out from the MBE crystal growth apparatus, and the contact electrode 19a and the wiring electrode 19b are formed in the same manner as in the first embodiment,
The respective light emitting elements 10, 20, 30 are separated and the signal terminals 20 are separated.
1, a horizontal scanning unit 202, a vertical scanning unit 203, and a current density control unit 204 are provided and wired. As a result, the display device shown in FIG. 8 is formed.

In this display device, the light emitting elements 10, 20,
When a predetermined voltage is applied to 30, the light emitting layers 14, 24, 3
Light emission occurs in each of the four light emitting elements 10, 2
With 0 and 30, different luminescences of blue, green and red can be obtained. At this time, the current density control unit 204 controls the light emitting element 1
Since the average current densities of 0, 20, and 30 are controlled, the light emitting elements 10, 20, and 3 are the same as in the first embodiment.
The life of 0 is extended.

As described above, according to this embodiment, II-
When the Group VI compound semiconductor layer is grown, the growth region is limited by using the mask 70 to form the plurality of light emitting devices 10, 20, 30. Therefore, the light emitting devices 10, 20 having different emission wavelengths are formed. , 30 can be efficiently and easily formed on the same substrate 11.

Although the present invention has been described with reference to the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made. For example, in the above-described embodiment, the II-VI group buffer layer 12b, the n-type clad layer 13, the light emitting layer 14, of the light emitting devices 10, 20, 30 are used.
24, 34, p-type cladding layer 15, first semiconductor layer 16
a, the second semiconductor layer 16b, the superlattice semiconductor layer 17, and the contact layer 18, the II-VI group compound semiconductors constituting the respective semiconductors have been described with reference to specific examples. Group VI compound semiconductors (ie, at least one Group II element from the group consisting of zinc, magnesium, manganese, beryllium, cadmium, and mercury and at least one group selected from the group consisting of oxygen, sulfur, selenium, and tellurium). II containing Group VI elements
Each of these layers may be formed of a group VI compound semiconductor).

Further, in the above embodiment, the case where the substrate 11 is common to all the light emitting elements 10, 20, 30 has been described, but the substrate is used as each of the light emitting elements 10, 20, 3.
The light emitting elements 10, 20, and 30 may be arranged on the arrangement substrate (not shown) separately for each 0 or for each row or column.

Further, in the above-mentioned embodiment, all the light emitting elements are constituted by using the II-VI group compound semiconductor layer, but at least one light emitting element having the II-VI group compound semiconductor layer is provided. However, a light emitting device having another structure, for example, a light emitting device made of a III-V group compound semiconductor containing at least one group III element and at least a group V element may be included.

In addition, in the second embodiment, the mask is used only when the light emitting layers 14, 24 and 34 are formed, but also when the semiconductor layers other than the light emitting layers 14, 24 and 34 are formed. You may use it. For example, the p-type clad layer 15, the first semiconductor layer 16a, the second semiconductor layer 16b, the superlattice semiconductor layer 17, and the contact layer 18
Also, by using a mask for growth, it is possible to facilitate etching when separating the light emitting elements 10, 20, 30 and reduce the time required for etching. In addition, the III-V group buffer layers 12a, II-V
The group I buffer layer 12b and the n-type cladding layer 13 may also be grown using a mask. The shape of the slit 71 of the mask 70 is also a shape corresponding to each column or row, but may be a shape corresponding to each light emitting element 10, 20, 30.

Furthermore, in the second embodiment, a plurality of light emitting elements 10, 20, 30 having different emission wavelengths are used.
The case of manufacturing a display device having
The mask may be used also when manufacturing a display device having a single emission wavelength.

In addition, in the second embodiment, one mask 70 is used and the position covered by the mask 70 is moved to form the active layers 14, 24 and 34. It is also possible to prepare masks each having a slit corresponding to the growth planned region of the emission color and replace the masks to grow the active layer.

Furthermore, the manufacturing apparatus described in the above embodiments can be widely used not only for manufacturing a display device but also for manufacturing various semiconductor elements and various semiconductor devices by growing a semiconductor layer. .

[0066]

As described above, according to the display device of any one of claims 1 to 13, II-V
Since the light emitting device having the group I compound semiconductor layer and the current density control unit for controlling the average current density when driving the light emitting device are controlled to 300 mA / cm ² or less, fine processing is easy and at the same time. , The life can be extended.

According to the display device of the second aspect,
Since the light emitting layer and the pair of cladding layers are directly adjacent to each other, the life can be further extended.

Further, according to the display device of the fourth aspect,
Since the active layer contains the n-type impurity in the range of 2 × 10 ¹⁸ cm ⁻³ or less, the emission intensity and the emission efficiency of the light emitting device can be improved.

In addition, according to the display device of the eighth aspect, since the band gap of the pair of clad layers at room temperature is 2.85 eV or more, the light emitting layer and the pair of clad layers are directly adjacent to each other. , The life can be extended.

Furthermore, according to the display device manufacturing method of claim 14, when the II-VI group compound semiconductor layer is grown, a growth region is limited by using a mask to form a plurality of light emitting elements. Since the step of forming and the step of forming the current density control unit for controlling the average current density when driving the light emitting element to 300 mA / cm ² or less are included, the display device of the present invention can be efficiently and easily manufactured. It can be manufactured.

In addition, according to the manufacturing apparatus of the fifteenth aspect, since the mask for limiting the region of the II-VI group compound semiconductor layer to be grown on the substrate is provided, the display device having a plurality of light emitting elements. Thus, various semiconductor devices can be efficiently formed.

[Brief description of drawings]

FIG. 1 is a schematic diagram showing a configuration of a display device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a configuration of the light emitting device shown in FIG.

FIG. 3 is a characteristic diagram showing a relationship between light wavelength and light emission intensity in the light emitting device shown in FIG.

FIG. 4 is a characteristic diagram showing chlorine concentration dependence of luminous efficiency of the light emitting device shown in FIG.

5 is a perspective view illustrating a configuration example of the pixel unit illustrated in FIG.

6 is a configuration diagram of an MBE crystal growth apparatus used for manufacturing the light emitting device shown in FIG.

FIG. 7 is a characteristic diagram showing a relationship between average current density and life of the light emitting device shown in FIG.

FIG. 8 is a schematic diagram showing a configuration of a display device according to a second embodiment of the present invention.

9 is a sectional view taken along line XX of the pixel portion shown in FIG.

10 is a perspective view showing a configuration of a part of a manufacturing apparatus used for manufacturing the light emitting device shown in FIG.

11 is a cross-sectional view for explaining a manufacturing process of the light emitting device shown in FIG.

FIG. 12 is a cross-sectional view for explaining the manufacturing process subsequent to FIG.

FIG. 13 is a cross-sectional view for explaining the manufacturing process following FIG.

[Explanation of symbols]

10, 20, 30 ... Light emitting element, 11 ... Substrate, 12a ... I
II-V group buffer layer, 12b ... II-VI group buffer layer, 13 ... N-type cladding layer, 14, 24, 34 ... Light-emitting layer, 15 ... P-type cladding layer, 16a ... First semiconductor layer,
16b ... 2nd semiconductor layer, 17 ... Superlattice semiconductor layer, 18
... Contact layer, 19a ... Contact electrode, 19b ... Wiring electrode, 40, 50 ... Growth chamber, 41, 51 ... Substrate holder, 42, 52 ... Particle beam source cell, 43, 53 ... Shutter, 44, 55 ... High-speed electron Gun, 45, 56 ... Screen, 54 ... Plasma generation chamber, 54a ... Magnet, 54b ... Microwave terminal, 54c ... Gas introduction pipe, 54d ... Plasma exit port, 61 ... Vacuum transfer chamber, 62 ... Introduction chamber, 63 ... Gate Valve, 70 ... Mask, 71 ... Slit, 100, 1
00A ... Pixel section, 200 ... Peripheral circuit section, 201 ... Signal terminal, 202 ... Horizontal scanning section, 203 ... Vertical scanning section, 204
… Current density control unit, 300… Wire

Claims (15)

[Claims] 1. Zinc (Zn), magnesium (Mg),
At least one Group II element from the group consisting of manganese (Mn), beryllium (Be), cadmium (Cd) and mercury (Hg), and oxygen (O), sulfur (S), selenium (Se) and tellurium. A light emitting device having a II-VI group compound semiconductor layer containing at least one VI group element from the group consisting of (Te), and an average current density when driving the light emitting device of 300 m.
A display device comprising: a current density control unit for controlling the current density to A / cm ² or less. 2. The light emitting device includes a light emitting layer made of the II-VI group compound semiconductor layer, and a pair of clad layers provided via the light emitting layer, the light emitting layer and the pair of clads. The display device according to claim 1, wherein the display device is directly adjacent to the layer, and the light emitting layer has a multi-quantum well structure in which a barrier layer and an active layer are stacked. 3. The emission energy of the active layer is 2.5.
The display device according to claim 2, wherein the display device has a voltage of 8 eV or more. 4. The active layer contains 2 × 10 ¹⁸ n-type impurities.
The display device according to claim 2, wherein the display device is included within a range of cm ^-3 or less. 5. The display device according to claim 2, wherein the active layer contains chlorine (Cl) as an n-type impurity. 6. The active layer is formed of a II-VI group compound semiconductor layer containing a Group II element zinc and cadmium and at least a selenium element of the Group VI element sulfur and selenium. 2. The display device according to item 2. 7. The barrier layer comprises zinc of Group II element and V
3. The display device according to claim 2, comprising a II-VI group compound semiconductor layer containing a group I element sulfur and selenium. 8. The display device according to claim 2, wherein the pair of cladding layers has a bandgap at room temperature of 2.85 eV or more. 9. The pair of clad layers comprises a II-VI compound semiconductor layer containing a Group II element zinc and magnesium and a Group VI element sulfur and selenium. Display device. 10. The display device according to claim 1, wherein the light emitting element includes a substrate made of GaAs, silicon, glass, or InP, and the II-VI group compound semiconductor layer is provided on the substrate. . 11. The light emitting device comprises at least gallium selected from the group consisting of gallium (Ga) and indium (In) which are group III elements, and arsenic (As) and phosphorus (P) which are group V elements. A group III-V buffer layer comprising at least one of the group
The display device according to claim 10, wherein the II-VI group compound semiconductor layer is provided on the substrate via a II-V group buffer layer. 12. The display device according to claim 10, wherein a plurality of the light emitting elements are provided and the substrate is common to the respective light emitting elements. 13. The display device according to claim 12, wherein the plurality of light emitting elements include elements having different emission wavelengths. 14. Zinc (Zn), magnesium (Mg), manganese (Mn), beryllium (B) on a substrate.
e), at least one group II element from the group consisting of cadmium (Cd) and mercury (Hg), and oxygen (O), sulfur (S), selenium (Se) and tellurium (T).
When growing a II-VI group compound semiconductor layer containing at least one VI group element from the group consisting of e),
Forming a plurality of light emitting devices by limiting a growth region using a mask, and forming a current density control unit for controlling an average current density when driving the light emitting devices to 300 mA / cm ² or less. And a method for manufacturing a display device. 15. Zinc (Zn), magnesium (Mg), manganese (Mn), beryllium (B) on a substrate.
e), at least one group II element from the group consisting of cadmium (Cd) and mercury (Hg), and oxygen (O), sulfur (S), selenium (Se) and tellurium (T).
A manufacturing apparatus for growing a II-VI group compound semiconductor layer containing at least one Group VI element from the group consisting of e), comprising: a holding unit for holding a substrate; and a II-VI group for the substrate. A manufacturing apparatus comprising: a raw material supply unit that supplies a raw material of a compound semiconductor layer; and a mask that limits a region of a II-VI group compound semiconductor layer grown on a substrate.