JP2003203882A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device, and its manufacturing method, in which the chip size can be reduced by reducing chipping. <P>SOLUTION: A plurality of semiconductor elements 12 are formed on the upper surface of a compound semiconductor substrate 11 and a dicing region 14 for separating the compound semiconductor substrate 11 into individual semiconductor elements 12 is formed between element forming regions. Surface of the dicing region 14 is covered with a protective polyimide film 16 isolated in the dicing region 14. More specifically, side edge of the polyimide film 16 is located on the outside of the element forming region (especially, in the dicing region 14). <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and its manufacturing method. In particular, it relates to a method of dividing a plurality of semiconductor elements formed on a semiconductor substrate and a structure of divided regions.

[0002]

2. Description of the Related Art In a semiconductor element manufacturing process, a large number of semiconductor elements 2 are generally formed on a surface of a semiconductor substrate (wafer) 1 at the same time by using photolithography, vacuum deposition or the like, as shown in FIG. Is. Dicing regions (dicing lines) 3 are formed between the semiconductor elements 2 formed at the same time, and the semiconductor substrate 1 is cut into individual semiconductor elements by vertically and horizontally cutting the portions where the semiconductor elements 2 are formed along the dicing areas 3. It is divided into two. In this division step, conventionally, the dicing region 3 is exposed from the insulating film 4 or the like covering the surface of the semiconductor substrate 1 so that the region can be easily recognized, and the dicer blade is moved along this region. The semiconductor element 2 is divided into individual pieces.

Generally, a semiconductor chip (cut semiconductor element including a dicing area left around)
The unit price of is determined by the number of semiconductor chips taken from one wafer (hereinafter referred to as the number of chips taken). That is, the unit cost of the semiconductor chip can be reduced as the number of chips formed per wafer is increased. Since the number of chips taken per wafer is determined by the area of the semiconductor chips, a chip area as small as possible is required to reduce the unit price of the semiconductor chips.

The chip area is the sum of the area of the element forming area and the area of the dicing area. Usually, the chip area can be reduced by reducing the element forming area. However, when the chip area becomes sufficiently small, the ratio of the area of the dicing region to the chip area becomes large. Therefore, in addition to the reduction of the element formation region, it has recently been required to reduce the dicing region. In order to reduce the dicing area, it is necessary to narrow the width of the dicing area.

However, in the semiconductor chip 5 obtained from the compound semiconductor substrate, when the semiconductor substrate 1 is diced,
As shown in FIG. 2, cracks and chips called chipping 6 occur around the cut portion of the dicing area 3. When the width of the dicing area 3 is narrowed, such chipping 6 reaches the element forming area of the semiconductor element 2. Therefore, even if the dicing area is reduced and the number of chips taken per wafer is increased, the chip yield rate is good. Is reduced,
Eventually, the number of chips taken will be the same as before the chip reduction. Therefore, there is a need for a method of reducing the dicing area without chipping.

As a method of reducing chipping, there is a method disclosed in Japanese Patent Laid-Open No. 6-169014. In this method, a chip is made difficult to reach the element formation region by forming a groove in the dicing region formed on the outer periphery of the element formation region, but since the width of the dicing region is widened by the groove, the chip size However, it is difficult to reduce the chip size and the unit price per chip because it is not possible to increase the original number of chips that can be obtained.

The present invention has been made in view of the problems of the above-described conventional example, and an object of the present invention is to provide a semiconductor device capable of reducing chipping and chip size, and manufacturing thereof. To provide a method.

[0008]

DISCLOSURE OF THE INVENTION A method of manufacturing a semiconductor device according to claim 1 of the present invention is the method of manufacturing a semiconductor device, wherein a semiconductor substrate having a plurality of semiconductor elements is cut into individual semiconductor elements. It is characterized in that the side edge of the protective film formed in the dicing region of the substrate is located outside the semiconductor element formation region and the semiconductor substrate is cut from above the protective film.

In the method of manufacturing a semiconductor device according to the first aspect, since the semiconductor substrate is cut from above the protective film formed in the dicing region, chipping and cracks are formed in the vicinity of the cut surface of the semiconductor substrate. Even if it occurs, the chipped or cracked portion of the semiconductor substrate can be held by the protective film, and the chipping or peeling of the substrate due to chipping can be prevented. Further, at the side edge of the protective film, the stress in the surface portion of the semiconductor substrate changes due to the film stress of the protective film. Therefore, by keeping this side edge outside the semiconductor element formation region, It is possible to stop cracks and the like grown from the cut surface at the position corresponding to the side edge of the protective film, and prevent the cracks and the like from reaching the semiconductor formation region. Therefore, according to the present invention, it is possible to suppress the occurrence of chipping and cracks in the semiconductor substrate (particularly, the compound semiconductor substrate) in the manufacturing process of the semiconductor device, and reduce the width of the dicing region to reduce the chip size. be able to.

According to a second aspect of the present invention, in the method of manufacturing a semiconductor device according to the first aspect, the side edge of the protective film formed in the dicing region and the semiconductor element forming region are formed. The side edge of the formed protective film is made to face outside the semiconductor element formation region with a gap, and the semiconductor substrate is cut from above the protective film formed in the dicing region. In the embodiment described in claim 2, the side edge of the protective film is located at two locations outside the semiconductor element formation region, and the effect of suppressing chipping and cracks can be further enhanced.

According to a third aspect of the present invention, the side edge of the protective film in the method of manufacturing a semiconductor device according to the first or second aspect is in direct contact with the semiconductor substrate in the dicing region. It has a feature. According to the third aspect of the invention, since the side edge of the protective film is in direct contact with the semiconductor substrate, the film stress of the protective film can be directly transmitted to the semiconductor substrate, and chipping and cracks are suppressed. The effect can be increased.

An embodiment according to claim 4 of the present invention is characterized in that the protective film in the method of manufacturing a semiconductor device according to claim 1, 2 or 3 is a film made of a polyimide material. If a polyimide material is used as the protective film, a large film stress can be generated at a position located on the side edge of the protective film, and the effect of suppressing chipping and cracks can be enhanced.

A semiconductor device according to claim 5 of the present invention is
A semiconductor device formed by cutting a semiconductor substrate on which a plurality of semiconductor elements is formed for each semiconductor element, wherein a protective film is formed on the semiconductor substrate in a region adjacent to a cut end surface of the semiconductor substrate. One side edge of the protective film is located on the cut end surface of the semiconductor substrate, and the other side edge of the protective film is located outside the semiconductor element formation region.

According to another aspect of the semiconductor device of the present invention,
Since the protective film is formed on the semiconductor substrate in the region adjacent to the cut end surface of the semiconductor substrate, even if chipping or cracks occur near the cut surface of the semiconductor substrate, chipping or cracks occur when cutting the semiconductor substrate. The portions can be held by the protective film, and the chipping or peeling of the substrate due to chipping can be prevented.
Further, since the side edge of the protective film is located outside the semiconductor element formation region, it is possible to stop cracks and the like grown from the cut surface of the semiconductor substrate at a position corresponding to the side edge of the protective film, and cracks and the like are generated. It is possible to prevent it from reaching the semiconductor formation region. Therefore, according to the semiconductor device of the present invention, chipping or cracking of the semiconductor substrate can be suppressed in the manufacturing process of the semiconductor device.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION (First Embodiment) A first embodiment of the present invention will be described with reference to FIGS. Figure 3
4A, 4 </ b> B, 4 </ b> C, and 4 </ b> D, 4 </ b> E, 4 </ b> F are schematic views showing the manufacturing process of the semiconductor device according to the present embodiment. Further, FIG. 5 is an enlarged cross-sectional view of the dicing region in the step of FIG. 3C, and FIG. 6 is a plan view of the semiconductor substrate.

In the manufacturing process of a semiconductor device, first,
As shown in FIG. 3A, a compound semiconductor substrate (wafer)
A semiconductor element 12 such as a field effect transistor is formed on the surface (first main surface) of 11 and an insulating film 13 such as SiN is formed on the surface. Next, as shown in FIG. 3B, in the dicing area 14 located between the semiconductor elements 12 and the electrode pad portion 15 of the semiconductor element 12, the insulating film 13 is opened by photolithography and etching, and the dicing area 14 is formed. The surface of the compound semiconductor substrate 11 is exposed. The width of the dicing area 14 at this time is, for example, 30
˜100 μm.

Then, a photosensitive polyimide resin as a final protective film is uniformly applied on the compound semiconductor substrate 11 by spin coating to form a polyimide film 16, as shown in FIG.
As shown in (c), the polyimide film 16 is partially opened by photolithography. That is, the electrode pad portion 15
The polyimide film 16 is opened by the dicing area 1
The polyimide film 16 is removed along the both side edges of 4.
Therefore, as shown in the enlarged cross section of FIG. 5, most of the dicing region 14 is covered with the polyimide film 16 (reinforcing film), and the polyimide film 16 covering the dicing region 14 and the formation region of the semiconductor element 12 are separated. It is separated from the covering polyimide film 16.

Next, as shown in FIG. 4D, the compound semiconductor substrate 11 is polished from the back surface (second main surface) side where the semiconductor element 12 is not formed until a predetermined thickness is obtained. make it thin. FIG. 6 shows the formation region of the semiconductor element 12, the dicing region 14, and the opening of the polyimide film 16 formed on the surface of the compound semiconductor substrate (wafer) 11 in this manner.

As shown in FIG. 4E, the compound semiconductor substrate 11 is cut from above the polyimide film 16 by a dicer blade 17 of a dicing device, and cut along a dicing line CC (FIG. 6) along the dicing area 14. It is separated vertically and horizontally and divided into a plurality of semiconductor chips 18 as shown in FIG.

Between the cut portion of the compound semiconductor substrate 11 and the formation area of the semiconductor element 12, the side edge t of the polyimide film 16 covering the dicing area 14 and the semiconductor element 1 are formed.
2, the side edge t of the polyimide film 16 covering the formation region of 2
And are facing each other with a gap. In other words, the polyimide film 16 in the dicing area 14 is
It is isolated within 4. When the compound semiconductor substrate 11 is cut by the dicer blade 17, cracks and chips called chipping occur on both sides of the cut portion, but when the compound semiconductor substrate 11 is cut by the dicer blade 17, the cut portion of the compound semiconductor substrate 11 is cut. Even if chipping occurs at the edge, since the surface of the compound semiconductor substrate 11 is held by the polyimide film 16, chipping does not occur and only cracks occur in the compound semiconductor substrate 11. Further, at the position where the side edge t of the polyimide film 16 is located, the stress in the surface portion of the compound semiconductor substrate 11 is changed due to the film stress generated in the polyimide film 16, and therefore, as shown in FIG. The chipping generated from the portion (the chipping portion is held by the polyimide film 16 as described above, so it is more appropriate to call a crack) is a stress at a position facing the side edge t of the polyimide film 16. It stops at the change point (shown by the broken line in FIG. 7),
It becomes more difficult to spread to the semiconductor element 12 side than that. Particularly, in this embodiment, the side edge t of the polyimide film 16 formed in the dicing area 14 and the side edge t of the polyimide film 16 formed in the area where the semiconductor element 12 is formed.
Since the stress change points are provided at two locations, the effect of chipping prevention is further enhanced. Therefore, according to the present invention, the semiconductor chip 18 with a small chipping amount can be obtained.

FIG. 8 is a plan view schematically showing the semiconductor chip 18 thus obtained. In the semiconductor chip manufactured by the conventional method, chipping as shown in FIG. 2 occurs, whereas in the semiconductor chip 18 of FIG. 8 according to the present invention, chipping hardly occurs.
The width of the dicing area 14 can be reduced accordingly.

In this embodiment, the width of the dicing area is set to 30 to 100 μm as described above, but the smaller the width, the larger the number of chips that can be taken.
The width of the dicing area depends on the dicer blade 17 used.
The width can be changed according to the width (blade thickness).

(Second Embodiment) In the first embodiment,
The polyimide film 16 which is a reinforcing film is used for the compound semiconductor substrate 1
After being applied to the entire surface of No. 1 to form a desired pattern by etching, as shown in FIGS. 9A and 9B, the compound semiconductor substrate 11 on which the semiconductor element 12 is formed is formed.
Alternatively, the semiconductor film 18 may be obtained by applying the polyimide film 16 only to the dicing region 14 by printing or the like and cutting the polyimide film 16 along the polyimide film 16 in the dicing region 14 with the dicer blade 17.

Also by such a method, the chipping that occurs when the compound semiconductor substrate 11 is cut by the dicer blade 17 can be stopped at the edge of the polyimide film 16, and as in the case of the first embodiment, the chipping is performed. Can be prevented from extending to the region of the semiconductor element 12.

[0025]

According to the method of manufacturing a semiconductor device of the present invention, a portion of a semiconductor substrate where chipping or cracking has occurred can be held by a protective film, and the chipping or peeling of the substrate due to chipping can be prevented. Can be prevented. Further, by arranging the side edge of the protective film outside the semiconductor element forming region, it is possible to stop the cracks grown from the cut surface of the semiconductor substrate at a position corresponding to the side edge of the protective film, and the crack etc. Can be prevented from reaching the semiconductor formation region. Therefore, according to the present invention, chipping or cracking of the semiconductor substrate can be suppressed in the manufacturing process of the semiconductor device, and the width of the dicing region can be narrowed to reduce the chip size.

In the method for manufacturing a semiconductor device of the present invention, the side edge of the protective film formed in the dicing area and the side edge of the protective film formed in the semiconductor element forming area are separated from the semiconductor element forming area. If you are facing each other with a gap between
The side edges of the protective film are located at two locations outside the semiconductor element formation region, and the effect of suppressing chipping and cracks can be further enhanced.

In the method for manufacturing a semiconductor device of the present invention, if the side edge of the protective film is brought into direct contact with the semiconductor substrate in the dicing region, the film stress of the protective film can be directly transmitted to the semiconductor substrate, The effect of suppressing chipping and cracks can be enhanced.

Further, if a polyimide material is used for the protective film, a large film stress can be generated at a position located on the side edge of the protective film, and the effect of suppressing chipping and cracks can be enhanced.

Further, in the semiconductor device of the present invention, even if chipping or cracks are generated in the vicinity of the cut surface when the semiconductor substrate is cut, the protective film covers the places where the chipping or cracks occur when the semiconductor substrate is cut. It can be held, and the chipping and chipping of the substrate can be prevented. Further, since the side edge of the protective film is located outside the semiconductor element formation region, it is possible to stop cracks and the like grown from the cut surface of the semiconductor substrate at a position corresponding to the side edge of the protective film, and cracks and the like are generated. It is possible to prevent it from reaching the semiconductor formation region. Therefore, according to the semiconductor device of the present invention, chipping or cracking of the semiconductor substrate can be suppressed in the manufacturing process of the semiconductor device.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing a structure of a semiconductor device according to a conventional example.

FIG. 2 is a plan view of a semiconductor chip obtained by dicing the above semiconductor substrate.

3A to 3C are schematic cross-sectional views showing a manufacturing process of a semiconductor chip according to the first embodiment of the present invention.

4 (d) to (f) are schematic cross-sectional views of the manufacturing process of the semiconductor device showing the continuation of the process of FIG.

5 is an enlarged cross-sectional view of a dicing region in the step of FIG. 3 (c).

FIG. 6 is a plan view of a semiconductor substrate.

FIG. 7 is an explanatory view of the operation of the present invention.

FIG. 8 is a plan view schematically showing a semiconductor chip obtained by the manufacturing method according to the present invention.

9A to 9C are schematic cross-sectional views showing a manufacturing process of a semiconductor chip according to the second embodiment of the present invention.

[Explanation of symbols]

11 Compound semiconductor substrate 12 Semiconductor element 13 Insulating film 14 Dicing area 15 Electrode pad 16 Polyimide film 17 dicer blade 18 semiconductor chips

Continued front page    (72) Inventor Makoto Inai             2-10-10 Tenjin, Nagaokakyo, Kyoto Stock             Murata Manufacturing Co., Ltd. (72) Inventor Masaaki Sueyoshi             2-10-10 Tenjin, Nagaokakyo, Kyoto Stock             Murata Manufacturing Co., Ltd.

Claims (5)

[Claims] 1. A method of manufacturing a semiconductor device, wherein a semiconductor substrate having a plurality of semiconductor elements formed thereon is cut into individual semiconductor elements, and a side edge of a protective film formed in a dicing region of the semiconductor substrate is formed. A method for manufacturing a semiconductor device, which comprises locating the semiconductor substrate outside the semiconductor element formation region and cutting the semiconductor substrate from above the protective film. 2. A side edge of the protective film formed in the dicing area and a side edge of the protective film formed in the semiconductor element forming area are opposed to each other with a gap outside the semiconductor element forming area. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor substrate is cut from above the protective film formed in the dicing region. 3. The method of manufacturing a semiconductor device according to claim 1, wherein a side edge of the protective film is in direct contact with the semiconductor substrate in a dicing region. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the protective film is a film made of a polyimid material. 5. A semiconductor device formed by cutting a semiconductor substrate on which a plurality of semiconductor elements are formed for each semiconductor element, wherein a protective film is formed on the semiconductor substrate in a region adjacent to a cut end surface of the semiconductor substrate. The semiconductor device is characterized in that one side edge of the protective film is located on a cut end surface of the semiconductor substrate, and the other side edge of the protective film is located outside the semiconductor element formation region. .