JP2003207558A - One-chip cpu having highly sensitive and highly accurate gps function - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a one-chip CPU having a GPS function capable of detecting highly sensitively and highly accurately position information on existence of a CPU. <P>SOLUTION: This CPU is constituted from a GPS tuner for down-converting a GPS signal received by an antenna to a proper level, and then performing two-bit quantization and sampling output, a GPS coprocessor for executing parallel correlation and integrating operation of the output signal from the GPS tuner by a large-scale real-time correlator, and performing highly sensitive detection of the GPS signal and highly accurate calculation of position information data, and the one-chip CPU for transmitting the output signal from the GPS coprocessor by a subsequent communication device through a network or performing another CPU operation. This CPU is formed by mounting the GPS tuner, the GPS coprocessor and the one-chip CPU on a single chip, or is formed as a chip set comprising two chips wherein the GPS tuner is mounted separately and the GPS coprocessor and the one-chip CPU are mounted on a single chip. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CPU which is the center of an arithmetic processing function in various electronic devices such as a mobile terminal, and in particular, can detect the position information of the CPU with high sensitivity and high accuracy. The present invention relates to a one-chip CPU with a GPS function.

[0002]

2. Description of the Related Art Conventionally, a CPU (including an FPGA, etc.), which is the center of an arithmetic processing function in various electronic devices such as a mobile terminal, is connected to a data bus, an address bus, etc. (hereinafter simply called a bus) of the CPU. The arithmetic processing is executed according to the contents of the program stored in the external memory, and in the one-chip CPU, etc., the arithmetic processing is executed according to the contents of the program stored in the firmware-embedded internal memory. By controlling the interface and the like, processing that satisfies the specifications of various electronic devices is performed.

In recent years, GPS (Global Positioning S
ystem: Global Positioning System) Detecting car position information by car navigation and handy GPS device or mobile phone with GPS function due to improvement of measurement accuracy and miniaturization and cost reduction of GPS device with rapid progress of technology. Detection of human position information and the like can be easily performed, and it is becoming more familiar.

[0004]

However, the above-mentioned C
Electronic equipment equipped with PU, especially game machines for pachinko machines such as pachinko machines and odometers that count the mileage of used cars, etc. Since a lot of crimes such as illegal prize acquisition and high-value assessment have occurred due to replacement of chip CPUs, etc., countermeasures against them have been required.

In the United States, FCC (Federal Comm.
The cellular carrier is urgent due to E-911 regulations by the unications Commission:
(No. 11) The caller must be notified of his / her position automatically, and all new phones will be implemented by the end of 2002, and 95% of all cellular phones will be available by the end of 2005. The plan for implementation will be announced. Even in Japan, callers of emergency (110, 119) calls need to notify the police or fire department of the location of the accident or fire site, and a means for easily detecting accurate location information was required. .

The present invention has been made to solve the above-mentioned demands, and highly sensitively detects the position information where the CPU, which is the center of the arithmetic processing function in various electronic devices such as mobile phones such as cellular phones, exists. Also, it provides a one-chip CPU with GPS function that can detect and prevent fraud by exchanging CPUs and automatically notify position information by managing with a server or the like via a network while detecting with high accuracy. The purpose is to do.

[0007]

In order to solve the above problems, the one-chip CP with high sensitivity and high accuracy GPS function of the present invention
In U, a GPS tuner that down-converts a GPS signal received by an antenna to an appropriate level and then performs 2-bit quantization and sampling output, and a parallel correlation and integration of an output signal from the GPS tuner by a large-scale real-time correlator. A GPS coprocessor that performs calculation to detect a highly sensitive GPS signal and calculate highly accurate position information data, and an output signal from the GPS coprocessor is transmitted via a network by a communication device in a subsequent stage, or the like. One-chip CPU that performs the CPU operation, and the GPS tuner, the GPS coprocessor and the one-chip CPU are mounted on a single chip, or the GPS tuner is separated and the GPS coprocessor and the one-chip CPU are integrated into a single chip. The chip set consists of two chips mounted on the chip.

The GPS tuner uses the G signal received by the antenna.
Since the PS signal is down-converted to an appropriate level and 2-bit quantization and sampling output are performed, the PS signal is composed of a high frequency amplifier, a quadrature detector, an LPF, an AGC amplifier, a gate, a control circuit, a frequency synthesizer and the like. Also,
A SAW filter for preventing jamming is connected to the high frequency amplifier.

The GPS coprocessor detects a GPS signal with high sensitivity by executing a gate and sampling circuit for sampling and inputting an output signal from the GPS tuner and a large-scale and real-time parallel correlation and integration calculation of the sampling signal. At the same time, it is composed of a real-time correlator and a control circuit for calculating the position information data with higher accuracy than the carrier wave phase data in the GPS signal, a RAM for storing the position information data, and the like.

Further, the one-chip CPU has a CPU for performing arithmetic processing as a core, an RTC for generating clocks and various timing signals, a ROM accumulating a program memory, and an arithmetic result for accumulating. RAM
And a serial interface for serial communication and a parallel interface for parallel input / output.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments and examples of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of a one-chip CPU with a high-sensitivity / high-accuracy GPS function according to the present invention. A GPS tuner that down-converts a GPS signal received by an antenna 6 to an appropriate level and then performs 2-bit quantization and sampling output. 2 and an output signal from the GPS tuner 2 into a large-scale real-time correlator 3
High-sensitivity GPS by executing parallel correlation and integration calculation by 2
G for signal detection and highly accurate position information data calculation
A PS coprocessor 3 and a one-chip CPU that transmits an output signal from the GPS coprocessor 3 via a network by a communication device 9 in a subsequent stage or performs another CPU operation
It consists of 4. And the GPS tuner 2 and GP
The S coprocessor 3 and the one-chip CPU 4 are mounted on a single chip to be a single chip, which is used as a CPU of various electronic devices including a mobile terminal such as a cellular phone. Or GPS
The tuner 2 is separated and a GPS coprocessor 3 and a one-chip CPU 4 are mounted on a single chip to form a chip set of two chips, which is used as a CPU of various electronic devices including a portable terminal such as the cellular phone. FIG. 1 shows a block in the latter case, where the CPU 1 with GPS function and the GPS
The tuner 2 constitutes the CPU chip set 8 with the GPS function, but in any case, the SAW filter 5 connected to the GPS tuner 2 is externally attached. In addition, the GPS tuner 2, the GPS coprocessor 3, and the one-chip CPU 4
If the battery 7 is connected to the device and the GPS signal can always be received and the position can be detected even when the power source of the device is OFF, the power source of the device can be turned on again even if an illegal operation such as the replacement of the CPU is performed. When is turned on, the communication device 9 in the subsequent stage transmits it to the server or the like via the network to send the CP.
By acquiring and managing the position information and ID information of U, it is possible to detect and prevent fraud.

FIG. 2 shows the high sensitivity / high accuracy GP of the present invention.
It is a circuit block diagram of the GPS tuner which comprises the one-chip CPU with an S function. Since the GPS tuner 2 down-converts the GPS signal received by the antenna 6 to an appropriate level and then performs 2-bit quantization and sampling output, the high-frequency amplifier 20, the quadrature detector 21, and the LPF 2 are provided.
2, AGC amplifier 23, gate 24, control circuit 25, frequency synthesizer 26, and the like. The AGC amplifier 23 acts so as to stabilize the gain at the time of occurrence of interference, and it acts together with the quadrature detector 21 and the LPF 22 in the preceding stage to E
It can operate stably even in MI environment. Further, the SAW filter 5 for preventing jamming is connected to the high frequency amplifier 20. The GPS tuner 2 is
The GPS coprocessor 3 and the one-chip CPU 4 may be mounted on the same chip, or may be separated as separate chips to form a chipset with two chips, depending on the unit price of the product in the chip manufacturing process or the status of the manufacturing technology.

Next, FIG. 3 shows the high-sensitivity and high-accuracy GP of the present invention.
It is a circuit block diagram of the GPS coprocessor which comprises the one-chip CPU with an S function. The GPS coprocessor 3
Is a gate 30 and a sampling circuit 31 for sampling and inputting an output signal from the GPS tuner 2,
A real-time correlator for performing parallel correlation and integration calculation on the sampling signal on a large scale in real time to detect the GPS signal with high sensitivity and for calculating position information data with higher accuracy than carrier phase data in the GPS signal. 32 and a control circuit 33, and a RAM 34 or the like for accumulating the position information data. As described in the problems to be solved by the invention, in order to reliably perform automatic notification of position information due to unauthorized operation of electronic devices or E-911 regulations by replacing the CPU, etc.
An indoor GPS capable of measurement is required. GP signal with high sensitivity because indoor GPS signal level is about 30 dB lower than outdoors
S technology is required, but A-GPS is required to meet the requirement.
(Assist GPS: Assist GPS, F. van Diggelen and
C.Abraham, "Indor GPS Technology", CTIA Wireless-A
genda, Dallas, May 2001) and perform parallel correlation and integration operations on a large scale and in real time. According to the method, the sensitivity is high even in an environment where frequency fading occurs, such as indoors, and a highly accurate reference frequency is unnecessary. Further, since the dedicated hardware including the real-time correlator 32 and the control circuit 33 is in charge of executing the large-scale and real-time parallel correlation and integration calculation, the interrupt processing when the CPU executes is unnecessary. Here, the real-time correlator 3
2 is composed of at least 2000 correlators per satellite, and real-time parallel correlation and long-time integration calculation, for example, 1000 ms, makes 30 dB higher sensitivity than 1 ms integration. Is obtained. Further, highly accurate position information data is calculated from carrier wave phase data in the GPS signal detected with high sensitivity,
It is stored in the RAM 34. The bus 35 of the RAM 34 is connected to the bus 46 of the subsequent one-chip CPU 4.

Next, FIG. 4 shows the high-sensitivity and high-accuracy GP of the present invention.
One-chip CP that constitutes one-chip CPU with S function
It is a circuit block diagram of U. The one-chip CPU 4 is
An RTC 41 for generating a clock and various timing signals with a CPU 40 for performing arithmetic processing as a core
A ROM 42 storing a program memory, a RAM 43 storing a calculation result, a serial interface 44 performing serial communication, a parallel interface 45 performing parallel input / output, and the like. Further, each component is connected by a bus 46. Here, the CPU 40 uses the GPS coprocessor 3
The position information data from is read from the RAM 34 in the GPS coprocessor 3 via the buses 35 and 46 and stored in the RAM 43 in the one-chip CPU 4. Further, as shown in FIG. 1, the position information data can be transmitted to the communication device 9 connected to the subsequent stage of the one-chip CPU 4, and can be transmitted to the server or the like via the network. The ROM 42 stores a program for controlling the CPU 40, and the RAM 43 stores position information data and the like. The ROM 42 is preferably an E ² PROM or a flash memory, and the RAM 43 is preferably a non-volatile memory such as a battery back-up SRAM.

Further, the control circuit 3 of the GPS coprocessor 3
If non-volatile memory chips such as ROM 42 and RAM 43 for controlling the CPU 3 and the one-chip CPU 4 are overlaid with other chip components to form a two-layer structure, the firmware can be protected against unauthorized reverse engineering due to chip cutting. Fraud can be prevented because analysis is impossible.

[0016]

As described above, if the one-chip CPU with high sensitivity and high accuracy of the GPS function of the present invention is used as a CPU in various electronic devices including mobile terminals such as cellular phones, an electronic device equipped with the CPU is provided. By detecting the location information of the CPU, which is the center of the arithmetic processing function, with high sensitivity and accuracy, regardless of whether the device is outdoors or indoors, and by managing it with a server etc. via a network Therefore, it is possible to achieve a great effect that it is possible to easily detect and prevent fraud by exchanging the CPU and the like and easily perform automatic notification of position information.

[Brief description of drawings]

FIG. 1 is a configuration block diagram of a one-chip CPU with a high-sensitivity / high-accuracy GPS function of the present invention.

FIG. 2 is a circuit block diagram of a GPS tuner forming a one-chip CPU with a high sensitivity / high accuracy GPS function of the present invention.

FIG. 3 is a circuit block diagram of a GPS coprocessor which constitutes a one-chip CPU with a high sensitivity / high accuracy GPS function of the present invention.

FIG. 4 is a circuit block diagram of a one-chip CPU that constitutes the one-chip CPU with a high sensitivity / high accuracy GPS function of the present invention.

[Explanation of symbols]

1 One-chip CPU with GPS function 2 GPS tuner 3 GPS coprocessor 4 one-chip CPU 5 SAW filter 6 antenna 7 battery 8 CPU chipset with GPS function 9 Communication device 20 high frequency amplifier 21 Quadrature detector 22 LPF 23 AGC amplifier 24 gates 25 Control circuit 26 Frequency Synthesizer 30 gates 31 Sampling circuit 32 Real-time correlator 33 Control circuit 34 RAM 35 bus 40 CPU 41 RTC 42 ROM 43 RAM 44 serial interface 45 parallel interface 46 bus

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Hiroshi Isshiki             3 Pegasus at 8 Miyuki-cho, Shizuoka City, Shizuoka Prefecture             Inside the net corporation (72) Inventor Hideo Fukuda             3 Pegasus at 8 Miyuki-cho, Shizuoka City, Shizuoka Prefecture             Inside the net corporation (72) Inventor Masao Yoshida             9-8-19 Arima, Arima, Miyamae-ku, Kawasaki City, Kanagawa Prefecture             Limited company WYS day (72) Inventor Hideo Yasuda             3 Pegasus at 8 Miyuki-cho, Shizuoka City, Shizuoka Prefecture             Inside the net corporation (72) Inventor Komiko Umechu             4-10 Hiroo, Shibuya-ku, Tokyo Hiroo Gar             Den Hills O Building No. 811 (72) Inventor Akira Uchiyama             3 Pegasus at 8 Miyuki-cho, Shizuoka City, Shizuoka Prefecture             Inside the net corporation F term (reference) 5J062 AA08 BB05 CC07 DD11 GG02                 5K067 AA33 BB04 FF03 HH23 JJ56                       KK01 KK13 KK15

Claims (4)

[Claims] 1. A GPS tuner that performs 2-bit quantization and sampling output after down-converting a GPS signal received by an antenna to an appropriate level, and a parallel correlation of an output signal from the GPS tuner with a large-scale real-time correlator. A GPS coprocessor that executes an integral calculation to detect a highly sensitive GPS signal and calculates highly accurate position information data, and an output signal from the GPS coprocessor is transmitted via a network by a communication device in a subsequent stage. It is configured by a one-chip CPU that performs other CPU operations, and the GPS tuner, GPS coprocessor, and one-chip CPU are mounted on a single chip, or the GPS tuner is separated and the GPS coprocessor and one-chip CPU are integrated. It has a feature that it is a chipset consisting of two chips mounted on another chip. High-sensitivity, high-precision one-chip CPU with GPS function. 2. A GPS tuner down-converts a GPS signal received by an antenna to an appropriate level and then performs 2-bit quantization and sampling output, so that a high frequency amplifier, a quadrature detector, an LPF, an AGC amplifier, a gate, and a control circuit. And a frequency synthesizer, a SAW filter, etc., and the GPS coprocessor executes a large-scale real-time parallel correlation and integration operation with a gate and a sampling circuit for sampling and inputting an output signal from the GPS tuner. A highly sensitive real-time correlator and control circuit for detecting a GPS signal and calculating more accurate position information data than carrier phase data in the GPS signal, a RAM for accumulating the position information data, etc. The one-chip CPU is An RTC for generating a clock and various timing signals, a ROM for accumulating a program memory, a RAM for accumulating calculation results, and a serial for serial communication, with a CPU for performing arithmetic processing as a core. The high-sensitivity / high-accuracy G according to claim 1, characterized by comprising an interface and a parallel interface for performing parallel input / output.
One-chip CPU with PS function. 3. The GPS signal can be detected with high sensitivity by configuring the real-time correlator of the GPS coprocessor with at least 2000 correlators per satellite. One-chip CPU with high sensitivity and high accuracy GPS function described in. 4. A non-volatile memory chip such as a ROM and a RAM for controlling the control circuit of the GPS coprocessor and the one-chip CPU has a two-layer structure by being overlapped with other chip components. A high-sensitivity, high-precision one-chip CPU with a GPS function according to claim 3.