JP2003218022A - Substrate processing method and substrate processing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate processing method and a substrate processing apparatus capable of easily and immediately identifying factors causing substrate failures. <P>SOLUTION: The method comprises the steps of: pre-storing, as a first group, factors causing substrate failures indicating if occurrence of any substrate failure among several types of phenomena caused thereby falls within (1) the time during processing of resist coating or heat treating, and (2) the time during exposure processing or developing treatment; pre-storing, as a second group, a plurality of specific factors causing specific failures in respective processing and treatments, as obtained by plural sampling; and pre-storing solutions, corresponding to said plurality of specific factors, whereby in a stage of manufacturing actual products of substrates, it is possible to easily and rapidly identify a specific factor causing a specific failure and eliminate the failure when the substrate failure was actually detected by referring to the first and the second groups of factors described above. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate processing method and a substrate processing apparatus for forming a desired resist film or resist pattern on a semiconductor substrate in the manufacture of semiconductor devices, particularly in a photolithography process.

[0002]

2. Description of the Related Art In a photolithography process in the manufacture of semiconductor devices, a resist film is formed on the surface of a semiconductor wafer (hereinafter referred to as "wafer"), which is then exposed to a predetermined pattern and further developed. As a result, a desired resist pattern is formed.

Conventionally, such a photolithography process includes a resist coating processing unit for rotating a wafer to apply a resist solution by centrifugal force, a developing processing unit for supplying a developing solution to a wafer and performing a developing process. It is carried out by the coating / developing apparatus and the exposure apparatus which is continuously provided integrally with the apparatus. In addition, such a coating and developing treatment apparatus, for example, after forming a resist film,
Alternatively, it has a heating processing unit and a cooling processing unit that perform thermal processing such as heating processing and cooling processing on the wafer before and after the development processing, and further, a transfer robot that transfers the wafer between these processing units. And so on.

[0004]

By the way, in the formation of the resist film, it is necessary to apply the resist solution uniformly and evenly on the wafer, but at present, the resist solution is locally applied on the wafer. In some cases, coating failure (coating unevenness) may occur in which the resist solution is not applied or the resist solution is locally applied thinly or thickly.

Further, for example, even when the resist film is formed without causing defective coating, a defect may occur in the subsequent exposure processing and development processing. In such a case, during resist coating processing or exposure processing,
There is a problem that it is not easy to determine which process causes a wafer defect due to a processing defect during the development process, and the cause of the defect cannot be easily specified. This makes it difficult to improve the yield.

In view of the above circumstances, it is an object of the present invention to provide a substrate processing method and a substrate processing apparatus capable of easily and quickly identifying the cause of a substrate defect.

[0007]

In order to achieve the above object, a substrate processing method according to the present invention is a substrate processing method in which a resist film is applied on a substrate and then heat-treated. A step of storing in advance as a first factor group which of the above-mentioned processes the defect of the resist film has occurred is described above; and the factor of occurrence of the defect for each process in the first factor group. A plurality of extracted factors and pre-storing them as a second factor group, a process of pre-storing a measure for eliminating the defect for each of the plurality of generation factors, and a defect of the resist film formed on the substrate And a step of detecting the occurrence of a defect in the first factor group based on the detection result, and the cause is identified from the second factor group. Eliminate Comprising the step of subjecting the treatment that.

According to the present invention, whether the time when the substrate defect occurs is the resist coating process or the heat treatment is stored in advance as a first factor group, and an individual specific case during the resist coating process or the heat treatment is stored. A plurality of typical defect generation factors are extracted and stored in advance as a second factor group. Further, measures for eliminating the defects are stored in advance in correspondence with the individual specific factors. Therefore, in the actual manufacturing stage of the product substrate, the defect factor is actually detected, and the defect factors are easily and quickly specified by using the previously stored first and second factor groups based on the detection result. However, the said defect can be eliminated.

In one form of the present invention, for example, the identification of the first factor can be performed by image recognition of the substrate surface.

In the present invention, as a result of the detection, the first
The second factor group in the case where it is specified that the factor of (4) is during the resist film coating process is (a) the misalignment of the centering of the resist nozzle for discharging the resist on the substrate,
(B) Presence of air bubbles in the resist supply pipe connected to the resist nozzle or particles in the resist,
(C) Defective supply amount, supply speed or suck back of the resist, and (d) defective rotation state when the substrate is rotated to form a resist film. These (a) ~
The defect (d) can be identified by the defective coating state of a plurality of types of resists.

In order to eliminate these defects (a) to (d), in the case of (a), the position of the resist nozzle is detected to adjust the centering deviation, and In the case of), the bubbles or particles are detected to perform dummy dispensing of the resist nozzle, and in the case of (c), the resist supply adjustment valve or suck back valve interposed in the supply pipe is adjusted, In the case of (d), the motor for rotating the substrate is adjusted.

According to one aspect of the present invention, after the coating process and the heat treatment, the substrate is further subjected to an exposure process and a development process to form a resist pattern, and a defect of the resist pattern formed on the substrate. Extracting a plurality of factors causing the occurrence of the above and storing them as the second factor group, and pre-storing a measure for eliminating a defect during the exposure process or the developing process for each of the plurality of causes. And a step of detecting a defect of the resist pattern formed on the substrate, and a step of specifying the cause of occurrence from the second factor group based on the detection result and performing a treatment to eliminate it. . As a result, it is possible to easily identify the defects of the substrate that have occurred in the exposure processing and the development processing, and also to easily identify individual specific defect generation factors in the exposure processing and the development processing, and to easily and easily deal with them. Can be applied quickly.

In the present invention, as a result of the detection, the first
The second factor group in the case where the factor of is specified to be during the exposure processing includes defective exposure amount, defective exposure focus value, and installation of a reticle different from the predetermined reticle.
Further, the second factor group when the first factor is specified to be the time of the developing process is the bubbles in the supply pipe connected to the developer nozzle for discharging the developer or the particles in the developer. Presence, supply amount of developing solution, defective developing time, presence of particles on the substrate before discharging the developing solution. These defects can be identified by, for example, the line width of the resist pattern, the pitch between the patterns, and defects such as sidewalls.

As a measure for eliminating these defects, according to one embodiment of the present invention, the exposure amount is adjusted, the exposure focus value is adjusted, a predetermined reticle is installed,
By detecting the bubbles or particles, the dummy dispense of the developer nozzle, the adjustment of the developer supply adjusting valve interposed in the supply pipe, the adjustment of the developing time, and the adjustment of the amount of clean air during the developing process are performed.

A substrate processing apparatus according to the present invention is a substrate processing apparatus including a coating processing unit for coating a resist film on a substrate and a heat treatment unit for performing heat treatment on the substrate. A first factor group storage unit that stores in advance as a first factor group which one of the above processes the time when a film defect occurs is included in the first factor group storage unit, and the defect factor for each process in the first factor group. Second factor group storage means for extracting a plurality of occurrence factors and pre-storing them as a second factor group, treatment storage means for pre-storing a measure for eliminating the defect for each of the plurality of occurrence factors, and a substrate An inspection device for detecting a defect in the resist pattern formed above, and based on the detection result, which of the processings of the first factor group the defect has occurred is specified and Comprising a treatment means for performing treatment to solve this problem by identifying the cause of the second factor groups.

According to one aspect of the invention, at least:
The apparatus further includes a transfer mechanism that transfers the substrate between the coating processing unit, the heat processing unit, the development processing unit, and the inspection device. As a result, the transfer mechanism automates the transfer of the substrate to each unit, particularly the inspection apparatus, and it is possible to improve the inspection efficiency, the throughput, and the yield.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

1 to 3 are views showing the overall construction of a coating and developing treatment apparatus according to an embodiment of the present invention. FIG. 1 is a plan view, and FIGS. 2 and 3 are front and rear views. .

In the coating and developing treatment apparatus 1, a plurality of semiconductor wafers W as substrates to be treated are transferred into or out of the apparatus 1 from the outside in units of a plurality of wafer cassettes CR, for example, 25 wafers. Cassette station 10 for loading and unloading wafers W
An inspection station 11 that inspects the wafer W to detect defects on the wafer W;
The wafer W is provided between a processing station 12 in which various single-wafer processing units that perform a predetermined processing on the wafer W one by one are arranged in multiple stages at predetermined positions, and an exposure apparatus 100 provided adjacent to the processing station 12. It has a configuration in which the interface unit 14 for delivering and receiving is integrally connected.

In the cassette station 10, as shown in FIG. 1, a plurality of wafer cassettes CR, for example, five wafer cassettes CR are located at the positions of the projections 20a on the cassette mounting table 20, with their respective wafer entrances / outlets facing the processing station 12 side in the X direction. The wafer carriers 22 placed in a row and movable in the cassette arrangement direction (X direction) and in the wafer arrangement direction (Z direction) of the wafers stored in the wafer cassette CR selectively access each wafer cassette CR. It is like this.
Further, the wafer carrier 22 is configured to be rotatable in the θ direction so that the inspection station 11 can be accessed.

In the inspection station 11, as described above, the inspection devices 40a and 40b are provided as the detection means for detecting the defects on the wafer W on the front side and the back side, respectively. A wafer transfer body 30 is arranged between these inspection devices 40a and 40b, and the wafer transfer body 30 can carry a wafer in and out of both of the inspection devices 40a and 40b. Wafers can also be delivered to the body 22. Further, the wafer carrier 30 can also access the third processing unit group G3 in the processing station 12.

The inspection device 40a is for detecting defects generated in the resist film formed on the wafer W, and is a device provided with an image recognition means such as a CCD camera, which is not shown, for example. In addition, the inspection device 40b is configured to recognize the shape of the resist pattern, for example, the line width, by pattern matching or the like.

As shown in FIG. 1, the processing station 12
The third processing unit section G3, the fourth processing unit section G4, and the fifth processing unit section G5 are arranged from the cassette station 10 side on the rear side of the apparatus (upper side in the drawing). Unit part G3 and 4th
The first main wafer transfer device A1 is provided between the first main wafer transfer device A1 and the processing unit part G4. As will be described later, in the first main wafer transfer device A1, the first main wafer transfer body 16 includes a first processing unit section G1, a third processing unit section G3, a fourth processing unit section G4, and the like. Are installed to allow selective access to. Further, a second main wafer transfer apparatus A2 is provided between the fourth processing unit section G4 and the fifth processing unit section G5, and the second main wafer transfer apparatus A2 is the same as the first main wafer transfer apparatus A2. The second main wafer carrier 17 is installed so as to selectively access the second processing unit section G2, the fourth processing unit section G4, the fifth processing unit section G5, and the like.

Further, a heat treatment system unit is installed on the back side of the first main wafer transfer device A1. For example, an adhesion unit (AD) 110 for hydrophobizing the wafer W and a wafer W are provided. Heating unit for heating (H
As shown in FIG. 3, P) 113 are stacked in two steps in order from the bottom. In addition, the adhesion unit (AD)
May further include a mechanism for controlling the temperature of the wafer W. On the back side of the second main wafer transfer device A2, there is a peripheral exposure device (W that selectively exposes only the edge portion of the wafer W).
EE) 120 and a film thickness inspection device 119 for inspecting the film thickness of the resist applied to the wafer W are provided in multiple stages. A heat treatment unit (HP) 113 may be arranged on the back side of the second main wafer transfer apparatus A2 as in the back side of the first main wafer transfer apparatus A1.

As shown in FIG. 3, in the third processing unit section G3, a processing unit of a heat treatment system for mounting a wafer W on a mounting table and performing a predetermined processing, for example, a high temperature for performing a predetermined heating processing on the wafer W. A heating processing unit (BAKE), a cooling processing unit (CPL) for performing cooling processing on the wafer W with accurate temperature control, and a transition unit (transfer unit for transferring the wafer W from the wafer carrier 22 to the main wafer carrier 16). TRS), and a transfer / cooling processing unit (TCP), which is separately arranged in the upper and lower two stages of the transfer part and the cooling part, is stacked in order from the top, for example, in ten stages. In the third processing unit section G3, the third stage from the bottom is provided as a spare space in this embodiment. Also in the fourth processing unit section G4, for example, a post-baking unit (POST), a transition unit (TRS) that serves as a wafer transfer section, a pre-baking unit (PAB) that heat-treats the wafer W after the resist film formation, and a cooling processing unit. (CPL) are stacked, for example, in 10 steps from the top. Further, in the fifth processing unit section G5, for example, a post-exposure baking unit (PEB) for performing a heating process on the exposed wafer W, a cooling processing unit (CPL), and a wafer W.
Transition units (TRSs) that serve as a transfer part of the are stacked in, for example, 10 stages from the top.

In FIG. 1, a first processing unit section G1 and a second processing unit section G2 are provided side by side in the Y direction on the front side (downward in the figure) of the processing station 12. Between the first processing unit section G1 and the cassette station 10 and between the second processing unit section G2 and the interface section 14, as shown in FIG. 2, the respective processing unit sections G1 and G2 supply. Liquid temperature control pumps 24 and 25 used for temperature control of the processing liquid are provided respectively, and further, clean air from an air conditioner (not shown) provided outside the coating and developing processing apparatus 1 is supplied to each processing unit section. G
1 to G5 are provided with ducts and the like (not shown) for supplying the inside.

As shown in FIG. 2, in the first processing unit section G1, five spinner type processing units for carrying out predetermined processing by placing the wafer W on the spin chuck in the cup CP,
For example, a resist coating processing unit (COT) that forms a resist film on a wafer has three stages, and a bottom coating unit (BARC) that forms an antireflection film to prevent reflection of light at the time of exposure has two stages from below. They are stacked in five steps in order. Similarly, in the second processing unit section G2, five spinner type processing units, for example, development processing units (DEV) are stacked in five stages. In the resist coating processing unit (COT), draining of the resist solution is troublesome both mechanically and in terms of maintenance. Therefore, it is preferable to arrange the resist solution in the lower stage. However, it is also possible to arrange them in the upper stage if necessary.

Further, the first and second processing unit sections G1
At the bottom of G2 and G2, there are processing unit sections G1 and G2.
The chemical chamber (CH
M) 26 and 27 are provided respectively.

A portable pickup cassette CR and a stationary buffer cassette BR are arranged in two stages on the front surface of the interface section 14, and the wafer carrier 2 is arranged in the central portion.
7 is provided. This wafer carrier 27 is composed of X, Z
By moving in the direction, both cassettes CR and BR can be accessed. Further, the wafer carrier 27 is configured to be rotatable in the θ direction so that it can also access the fifth processing unit section G5. Further, as shown in FIG. 3, a plurality of cooling processing units (CPL) are provided on the back surface of the interface section 14, for example, two cooling stages are provided. The wafer carrier 27 is connected to the cooling processing unit (C
PL) is also accessible.

FIG. 4 is a perspective view showing a first main wafer transfer device A1 according to one embodiment. Since the second main wafer transfer device A2 is the same as the first main wafer transfer device A1, its description is omitted.

As shown in FIG. 1, the main wafer transfer device A1
Is surrounded by the housing 41 to prevent particles from entering. The housing 41 is not shown in FIG. 4 for the sake of clarity.

As shown in FIG. 4, poles 33 are vertically provided at both ends of the main wafer transfer device A1, and the main wafer transfer body 16 (17) extends vertically (Z direction) along the poles 33. It is arranged to be movable. The wafer W is held on the carrier base 55 of the main wafer carrier 16 3
Two arms 7a to 7c are provided, and these arms 7a to 7c are configured to be movable in the horizontal direction by a drive mechanism (not shown) built in the transport base 55. A support body 45 that supports the transport base 55 is connected to a lower portion of the transport base 55 via a rotating member 46 that is rotatable in the θ direction. As a result, the wafer carrier 16 can rotate in the θ direction. A flange portion 45a is formed on the support body 45, and the flange portion 45a is formed on the pole 33.
Is slidably engaged with a groove 33a provided in the pole 33 and is slidably provided by a belt drive mechanism built in the pole 33. As a result, the main wafer carrier 1
6 is movable in the vertical direction along the pole 33.

At the bottom of the main wafer transfer device A1,
For example, four fans 36 for controlling the atmospheric pressure and temperature / humidity inside the transport device A1 are provided.

5 and 6 are a plan view and a sectional view showing a resist coating unit (COT) according to an embodiment of the present invention.

In this unit, a fan filter unit F for taking in clean air is attached above the casing 41 ', and in the lower part, near the center of the unit bottom plate 151 smaller than the width of the casing 41' in the Y direction. An annular cup CP is arranged in the. The spin chuck 142 is disposed inside the cup CP, and the spin chuck 142 is configured to rotate by the rotational driving force of the drive motor 143 while the wafer W is fixed and held by vacuum suction. The drive motor 143 is controlled in its rotation speed, rotation time, etc. by the control of the rotation condition controller 34.

A pin 148 for transferring the wafer W is provided in the cup CP so that the pin 148 can be moved up and down by a driving device 147. As a result, the wafer can be transferred to and from the arm 7a through the opening 41'a while the openable / closable shutter 43 is open. A drain port 145 for waste liquid is provided at the bottom of the cup CP. A waste liquid pipe 141 is connected to the drain port 145, and the waste liquid pipe 141 communicates with a waste liquid port (not shown) below by utilizing the space N between the unit bottom plate 151 and the casing 41 ′.

As shown in FIG. 5, a resist nozzle 135 for supplying resist to the surface of the wafer W is provided with a liquid supply mechanism (FIG. 2) in a chemical chamber (CHM) 26 (FIG. 2) via a resist supply pipe 134. Connected (not shown). The resist nozzle 135 is detachably attached to the tip of the nozzle scan arm 136 by a nozzle standby portion 146 arranged outside the cup CP, and is moved to a predetermined resist ejection position (centering position described later). Has become. The nozzle scan arm 136 is attached to an upper end portion of a vertical support member 149 that is horizontally movable on a guide rail 144 laid in one direction (Y direction) on the unit bottom plate 151, and is not shown, for example, a belt by a motor. It is configured to move in the Y direction integrally with the vertical support member 149 by a drive mechanism or the like.

The nozzle scan arm 136 is also movable in the X direction at right angles to the Y direction in order to selectively attach the resist nozzle 135 in the nozzle standby portion 146 according to the type of resist, and an X direction drive mechanism (not shown). It also moves in the X direction.

The amount of movement of the nozzle scan arm 136 by the X and Y moving mechanism is controlled by the nozzle scan arm controller 53.

Further, a drain cup 138 is provided between the cup CP and the nozzle standby portion 146, and the resist nozzle 135 is washed at this position before the resist is supplied to the wafer W, or as described later, the resist is used. Dummy dispensing is being performed.

On the guide rail 144, a vertical support member 149 for supporting the nozzle scan arm 136 described above.
In addition, a vertical support member that supports the rinse nozzle scan arm 139 and is movable in the Y direction is also provided.
A rinse nozzle 140 for side rinse is attached to the tip of the rinse nozzle scan arm 139.
The rinse nozzle scan arm 139 and the rinse nozzle 140 are connected to the cup C by a Y-direction drive mechanism (not shown).
It moves between the nozzle standby position set to the side of P and the rinse liquid discharge position set right above the peripheral edge of the wafer W placed on the spin chuck 142.

With reference to FIG. 6, a detector 44 for detecting the centering state of the resist nozzle 135 on the wafer is arranged above the cup CP. This detector 44
It is preferable that it can be recognized as a digital signal by using, for example, a CCD camera.

Next, with reference to FIGS. 7 and 8, the resist liquid supply system will be described. FIG. 7 is a schematic view of the air operation valve and suck back valve interposed in the resist supply pipe 134, and FIG. 8 is a sectional view of the suck back valve.

As shown in FIG. 7, a resist supply pipe 134
The air operation valve 130 (supply pipe 134
And a suck back valve 131 are integrally provided. Air operation valve 13
0 opens and closes a valve element (not shown) by the air supplied from the air supply pipe 132, and switches outflow and stop of the resist solution in the resist supply pipe 134. Further, the opening / closing speed of the valve body (not shown) can be adjusted by adjusting the speed controller 130a provided in the air operation valve 130.

As shown in FIG. 7, the suck back valve 131 has a housing 1 to which an air supply pipe 133 is connected.
37, a valve body 1 is provided in the housing 137.
21 is slidably interposed. This valve body 121 is
The spring 122 biases the resist solution in the resist supply pipe 134 in the direction of drawing (rightward in FIG. 8).

A switching valve (not shown) provided in the air supply pipe 133 switches between the supply of air into the housing 137 and the discharge of air from the housing 137.

Therefore, when the air supplied into the housing 137 is discharged, the urging force of the spring 122 moves the valve body 121 to the right, so that the resist solution in the resist supply pipe 134 enters the housing 137. It is drawn in and a predetermined amount of resist liquid is sucked back. On the other hand, when air is supplied into the housing 137 from the air supply pipe 133, the valve body 121 is pressed leftward against the biasing force of the spring 122 by the air, and the resist liquid sucked back causes the resist supply pipe 134 to move. Returned to.

The suck back amount of the resist solution is defined by the moving amount of the valve body 121, and the suck back amount can be adjusted by adjusting the moving amount of the valve body 121. In addition, the suck back speed is determined by the air supply pipe 13
This can be performed by adjusting the air discharge speed of the switching valve No. 3 (not shown) and adjusting the moving speed of the valve body 121. Specifically, an electromagnetic speed controller 131a provided on the suck back valve 131 (FIG. 7)
The suck back speed can be adjusted by adjusting.

Further, the resist supply pipe 134 is provided with a sensor 28 for detecting bubbles in the supply pipe 134 and particles in the resist liquid. As the sensor 28, a capacitance sensor or the like may be used. Is preferred.

The air operation valve 1 described above
As shown in FIG. 6, the air operation valve controller 51 and the suck back valve controller 52 control the suction valve 30 and the suck back valve 131, respectively. Also, these air operation valve controller 51 and suck back valve controller 52,
Further, the nozzle scan arm controller 53 and the rotation condition controller 54 are integrally controlled by the coating processing unit controller 50.

FIG. 9 is a sectional view showing a development processing unit (DEV) according to one embodiment of the present invention. Since this developing processing unit (DEV) has a similar configuration to the resist coating processing unit (COT), the same components as those in the resist coating processing unit (COT) are the same in FIG. The reference numerals will be given and the description thereof will be omitted.

The developing solution nozzle 153 for supplying the developing solution to the surface of the wafer W has substantially the same length as the diameter of the wafer W, and a plurality of holes for ejecting the developing solution are formed although not shown. There is. Alternatively, a nozzle having a slit-shaped discharge port may be used. Further, a rinse nozzle (not shown) for washing off the developing solution on the wafer is also movably provided on the wafer W.

A developing solution supply pipe 47 for supplying a developing solution from a supply source (not shown) is connected to the developing solution nozzle 153. An air operation valve (not shown) similar to the above resist coating processing unit (COT) is interposed in the supply pipe 47, and the supply amount of the developing solution is controlled by the air operation valve controller 61 for the developing solution. It is supposed to be. An air operation valve 65 for the rinse liquid is also provided in a supply pipe (not shown) connected to the rinse nozzle, and the supply amount and supply speed of the rinse liquid are controlled by the air operation valve controller 63. It is like this.

Further, the developing time controller 64 controls the developing time from when the developing solution is deposited on the wafer W to when the rinsing process is performed.

A particle counter 42 for detecting particles in the unit is provided in the unit. The number of particles adhering to the wafer is detected. Further, the fan filter unit controller 62 controls the amount of clean air in the fan filter unit F.

The above air operated valve controller 61,
The fan filter unit controller 63 and the fan filter unit controller 62 are integrally controlled by the development processing unit controller 60.

FIG. 10 is a plan view of a pre-baking unit (PAB), a post-exposure baking unit (PEB), and a post-baking unit (POST) for thermally treating the wafer W. Each of these baking units only differs in processing temperature.

These units are surrounded by a casing 75, and on the back side in the processing chamber 35, a wafer W is placed under the control of the heating plate controller 31 and heat-treated at, for example, about 100 ° C. A heating plate 86 is provided, and a temperature control plate 71 for mounting the wafer W and controlling the temperature is provided on the front side. Heating plate controller 3
1 controls the heating temperature, heating time, etc. of the heating plate 86. A pin 85 for supporting the wafer W is provided below the heating plate 86 so that the pin 85 can be moved up and down by an elevating cylinder 82. Further, a cover member (not shown) that covers the heating plate 86 at the time of heat treatment is arranged above the heating plate 86.

As the temperature adjusting mechanism of the temperature adjusting plate 71, for example, cooling water or a Peltier element is used to control the temperature of the wafer W to a predetermined temperature, for example, about 40 ° C., by the temperature adjusting plate controller 32. It is like this. As shown in FIG. 9, the temperature control plate 71 is formed with a notch 71 a, and the elevating pin 84 buried under the temperature control plate 71 is provided with an elevating cylinder 81.
It is possible to appear and disappear from the surface of the temperature control plate.
In addition, for example, a motor 79a is provided on the temperature control plate 71.
This allows the wafer to be moved along the rails 77, whereby the wafer is delivered to the heating plate 86 while controlling the temperature of the wafer.

The heating plate controller 31, the temperature control plate controller 32, etc. are the heat treatment unit controller 7
It is controlled by 0.

Regarding the processing steps of the coating and developing processing apparatus 1 configured as described above, first, in the cassette station 10, the wafer carrier 22 is placed on the cassette mounting table 20.
The cassette CR containing the unprocessed wafer W is accessed to take out one wafer W from the cassette CR. Then, the wafer W is transferred to the first main transfer device A1 via the transfer / cooling processing unit (TCP) and transferred to the bottom coating unit (BARC). Then, here, an antireflection film is formed in order to prevent reflection of exposure light from the wafer during exposure.

Next, the wafer W is transferred to the baking processing unit in the third processing unit section G3, subjected to predetermined heating processing at, for example, 120 ° C., and subjected to predetermined cooling processing in the cooling processing unit (CPL). Wafer W
A desired resist film is formed in the resist coating unit (COT).

After the resist film is formed, the wafer W is transferred to the prebaking unit (P) by the first main carrier A1.
It is transported to AB). Here, first, the wafer W is placed on the temperature control plate 71 shown in FIG. 10, and the wafer W is moved to the heating plate 86 side while the temperature is controlled. And wafer W
Is placed on the heating plate 86, and a predetermined heat treatment is performed at about 100 ° C., for example. When this heat treatment is completed, the temperature control plate 71 again accesses the heating plate 86 side, and the wafer W is transferred to the temperature control plate 71.
Moves to the original position as shown in FIG. 10, and the wafer W stands by until it is taken out by the first main carrier A1.

Next, the wafer W is cooled by the cooling processing unit (CP
L) is cooled at a predetermined temperature. After this, the wafer W
May be taken out by the second main transfer device A2 and transferred to the film thickness inspection device 119 to measure a predetermined resist film thickness. Then, the wafer W is transferred to the exposure apparatus 100 via the transition unit (TRS) in the fifth processing unit section G5 and the interface section 14 and is subjected to the exposure processing there.

Next, the wafer W has an interface section 14
Further, after being transferred to the second main transfer device A2 via the transition unit (TRS) in the fifth processing unit section G5, it is transferred to the post-exposure baking unit (PEB). After the exposure process, the wafer W
May be temporarily stored in the buffer cassette BR at the interface unit 14. In the post-exposure baking unit (PEB), the predetermined heating process and temperature control process are performed by the same operation as that of the pre-baking unit (PAB).

Next, the wafer W is processed by the development processing unit (DE
V) and the developing process is performed. In this development processing unit (DEV), when the wafer W is conveyed to a position directly above the cup CP, first, the pin 148 moves up to receive the wafer W and then moves down, so that the wafer W is placed on the spin chuck 142. It is placed and vacuum-adsorbed. Then, the nozzle 135 waiting in the nozzle waiting portion moves to a position above the peripheral position of the wafer W and ejects the developing solution while moving on the wafer W, so that the developing solution is deposited on the wafer W and development is performed. . After that, a rinse liquid is supplied onto the wafer to wash away the developer, and the wafer is rotated to shake off and dry.

Next, the wafer W is taken out by the second main transfer device A2, the transition unit (TRS) in the fourth processing unit section G4, the first main transfer device A2.
The wafer is returned to the wafer cassette CR in the cassette station 10 through the first and third transition unit (TRS) units and the wafer carrier 22.

Next, a resist coating unit (CO
The process in T) will be described in detail.

This resist coating unit (COT)
Then, when the wafer W is conveyed to a position directly above the cup CP, first, the pin 148 moves up to receive the wafer W and then moves down, and the wafer W is placed on the spin chuck 142 and vacuum sucked. It Then, the nozzle 135 waiting in the nozzle waiting portion moves to above the center position of the wafer W. Then, after the predetermined resist liquid is discharged to the center of the wafer W, the drive motor 143 causes the resist liquid to flow, for example,
The resist is applied by rotating at 00 rpm and diffusing the resist solution over the entire surface of the wafer W by the centrifugal force.

When discharge of the resist solution from the resist nozzle 135 is started, as shown in FIG. 11A, the speed controller 130a of the air operation valve 130 is adjusted so as not to entrap air bubbles from the tip portion 135a of the nozzle. To do.

At the end of the discharge of the resist solution, as shown in FIG.
As shown in (b), the air operation valve 130
By adjusting the opening / closing speed of the valve element (not shown) by adjusting the speed controller 130a of No. 1, the height of the liquid surface of the resist solution is measured from the nozzle tip to, for example, 0.
Pull up to a height of 5-1 mm.

As a result, the resist liquid 58 existing at the tip of the nozzle 135 at the end of the resist discharge is drawn into the nozzle 135 and prevented from dropping on the wafer W. Therefore, it is possible to effectively prevent uneven application of the resist solution and uneven film thickness.

Then, the liquid level of the resist liquid 58 is adjusted by adjusting the suck back amount of the suck back valve 131 within a predetermined time, for example, 2 seconds from the end of the discharge of the resist liquid, as shown in FIG. 11C. The height is further raised so that the height is, for example, 2 to 3 mm from the tip of the nozzle 135.

By pulling up the resist liquid surface in the second step, the resist liquid is prevented from being dried when the resist nozzle 135 is moved, and is prevented from being dropped carelessly. . Therefore, the generation of particles due to the resist liquid can be effectively prevented.

After completion of dropping the resist solution, the wafer W is rotated at a predetermined rotation speed to adjust the film thickness. Then, the rotation speed of the wafer W is accelerated, the remaining resist solution is shaken off and dried, and a resist film having a predetermined thickness is formed. By decelerating the rotation speed of the wafer W for a predetermined time when adjusting the film thickness, the discharged resist liquid can be left on the outer peripheral portion of the wafer W to the same extent as the central portion. Even in the case of the resist-saving method in which the amount of the dropped resist solution is small, the resist film thickness can be made uniform.

Thereafter, the nozzle scan arm 136 is returned to the home position, the rotation of the wafer W is stopped, and the coating process is completed.

The resist nozzle 135 is 2 to 3 m from the nozzle tip by the suck back valve 131 as described above.
When the resist solution surface is lifted up to the height of m and the resist solution is discharged onto the subsequent wafer W,
It is moved to the center of the wafer W again. In the next discharge of the resist liquid, the resist liquid surface is not changed and is discharged as it is, so that the careless dropping of the resist liquid can be prevented during the movement. Also,
Until the resist solution is discharged onto the subsequent wafer W, the liquid level of the resist solution is, for example, 0.5 to 1 mm from the tip of the nozzle.
It may be lowered to some extent. As a result, it is possible to prevent an error in the amount of resist liquid due to the lift of the resist liquid surface of the suck back valve 131.

As described above, the application unevenness of the resist solution and the non-uniformity of the film thickness are prevented. However, local application unevenness may occur due to various causes. Also, in the exposure process, the development process, and the heat treatment, the desired process may not be performed due to some factors, and a desired resist pattern may be obtained. Since it is not easy to understand these factors, in the present embodiment, the defect factors of the wafer are specified as follows,
The necessary initial settings will be described below.

First, the inspection device 40a detects defects, for example, after the resist film is formed and the heat treatment is completed. On the other hand, the inspection device 40b detects a defect after the development process is completed.

FIG. 12 is a diagram showing a control system of the coating and developing treatment apparatus 1. The centralized control device 200 of the apparatus 1 includes a coating processing unit controller 50, a development processing unit controller 60, and a heat treatment unit controller 70.
The transport mechanism controller 80 and the exposure processing controller 90 that controls the exposure apparatus 100 are collectively controlled. Here, the transport mechanism controller 80
Controls the main wafer transfer devices A1 and A2, for example. Further, the centralized control device 200 is adapted to send a command to each controller based on the information from the inspection devices 40a and 40b.

The defect phenomenon storage unit 56 includes the inspection devices 40a and 4a.
Store the resulting wafer defect phenomenon, which was inspected by 0b. The defect factor storage unit 57 stores a plurality of factors for the defect phenomena stored in the defect phenomenon storage unit 56, roughly classified into processing factors and detailed generation factors. Also,
The treatment method storage unit 59 stores the defect elimination treatment corresponding to the occurrence factor stored in the defect factor storage unit 57.

Specifically, the defect phenomenon storage unit 56 stores the following data.

(1) Defects on the wafer detected by the CCD camera or the like are, for example, uneven coating in which the resist solution is locally thinly or thickly applied to an intermediate portion between the center and the outer edge of the wafer W. Coating unevenness in which the resist solution is thinly or thickly applied to the elongated shape extending in the radial direction of the wafer W, coating unevenness in which the resist solution is locally thinly or thickly applied to the peripheral portion of the wafer W, On the outer edge portion, there are coating unevenness and the like in which many local spots where the resist solution is not coated appear.

(2) Defects on the wafer (defects in the resist pattern) detected by the pattern matching by the inspection device 40b are, for example, locally formed on the wafer where the line width or pitch of the pattern is not formed to a desired value. In particular, the value of the line width or the like is not a desired value, or the pattern collapses.

Next, the defect factors when the defects in (1) and (2) are detected will be described with reference to FIG. In the present embodiment, first, which process is being performed is specified as the first factor, and then the cause of the defect in the specified process is individually and specifically grasped as the second factor. It is a thing. In FIG. 13, (1) to (2) to (1) to (2) to (1) to (2) above, respectively.

For example, the above defect (1) is considered to have occurred during the resist coating process or the heat treatment, and particularly during the resist coating process.

The cause of the phenomenon in the defect (1) is that the centering deviation of the resist nozzle 135 is
Secondly, the resist supply amount, supply speed, suck back failure, etc. may be considered. As a measure against the first cause,
For example, C for detecting the centering state of the nozzle 135
After confirming the centering deviation of the nozzle with the CD camera 44, the moving amount of the nozzle scan arm 136 is adjusted and the centering deviation is adjusted. As a measure against the second cause, the air operation valve 130 or the suck back valve 131 is adjusted.

The cause of the phenomenon is considered to be the resist supply amount, supply speed, suck back failure, and the like. The treatment in this case is as described above.

The cause of the phenomenon is considered to be firstly the resist supply amount, supply speed, suck back failure, secondly bubbles in the resist supply pipe 134, or the presence of particles in the resist solution. The measure for the first cause is as described above, and the measure for the second cause is the dummy dispense of the resist solution by the resist nozzle 135.

The cause of the phenomenon is, firstly, the centering deviation of the resist nozzle 135. However, by adding a deceleration step for decelerating the rotation of the wafer after the resist solution is discharged, it should basically disappear. As a measure against the first cause, the centering adjustment of the nozzle may be performed. However, if uneven coating occurs even if the centering state is adjusted, the rotation speed of the deceleration step is about 500 rpm or It can be considered that the temperature is lowered to the following level, and the second cause is a misalignment of the wafer on the heating plate 86 during prebaking (PAB). In this case, the movement amount of the transfer arm of the main wafer transfer device A1 or A2 is adjusted.

It is considered that the above defect (2) occurred during the exposure process or the development process.

The cause of the phenomenon in the defect of (2) is, firstly, the supply amount of the developing solution, the developing time is defective, the second is the exposure amount, the exposure focus value is defective, and a reticle different from the predetermined reticle is installed. Can be considered. As a measure against the first cause, the air operation valve and the developing time are adjusted. As a measure against the second occurrence factor, the exposure amount,
The exposure focus value is adjusted and a predetermined reticle is installed.

The cause of the phenomenon is considered to be firstly the presence of air bubbles in the developing solution supply pipe 47, the presence of particles in the developing solution, and secondly the presence of particles on the wafer before the developing solution is discharged. As a measure against the first cause, a dummy dispense of the developing solution is performed. As a measure against the second cause, the fan filter unit F in the development processing unit is adjusted to adjust the amount of clean air to be introduced.

The cause of the phenomenon is the amount of rinse liquid supplied,
It is conceivable that the discharge speed or the like is poor, or the surface tension of the rinse liquid is larger than a predetermined value. As measures against this, the supply amount of the rinse liquid or the like is adjusted, or a surfactant or the like is introduced into the rinse liquid to lower the surface tension.

As described above, after the defect phenomenon, the first factor and the second factor are stored in advance in each of the storage units 56, 57 and 59 and the initial setting is completed, the actual product wafer is used for manufacturing. Then, in the actual manufacturing stage, for example, the inspection devices 40a and 40b detect defects for each predetermined number of processed substrates, and based on the data stored in the storage units 56, 57, and 59, each controller performs The defect can be eliminated easily and quickly. Therefore, the yield can be improved.

Further, in the present embodiment, since the inspection devices 40a and 40b are included in the coating and developing treatment device 1 and are in-line, all the wafer defects can be detected automatically and quickly, and the yield is improved and the throughput is improved. It is possible to improve.

The present invention is not limited to the embodiment described above, and various modifications can be made.

For example, in the above-described embodiment, as shown in FIG. 13, the processing factor (2) is the exposure process or the development process. However, in addition to these, the heat treatment by the post-exposure baking unit (PEB) is performed. Time can also be a factor. This is because the line width of the resist pattern formed after the development process may be affected depending on the heating temperature and heating time of this heating process.

Further, as factors of defects such as the line width in the resist pattern, the concentration of the developing solution at the time of the developing process,
By including the temperature of the developing solution and the like, the defect factor can be specified with higher accuracy.

Particles in the resist coating processing unit (COT) may be taken into consideration as a factor causing the above resist coating processing. In this case, as in the case of the development processing, the particle counter 42 provided in the development processing unit (DEV) can be used.

Further, in the above embodiment, the case where the semiconductor wafer is used has been described, but the present invention is not limited to this and the present invention can be applied to a glass substrate used for a liquid crystal display or the like.

[0102]

As described above, according to the present invention,
It is possible to easily and quickly identify the cause of the substrate defect, improve the yield, and improve the throughput.

[Brief description of drawings]

FIG. 1 is a plan view of a coating and developing treatment apparatus according to an embodiment of the present invention.

FIG. 2 is a front view of the coating and developing treatment apparatus shown in FIG.

FIG. 3 is a rear view of the coating and developing treatment apparatus shown in FIG.

FIG. 4 is a perspective view showing a main wafer transfer device according to one embodiment.

FIG. 5 is a plan view showing a resist coating processing unit according to one embodiment.

6 is a cross-sectional view showing the resist coating processing unit shown in FIG.

FIG. 7 is a schematic view showing an air operation valve and a suck back valve.

8 is a schematic cross-sectional view of the suck back valve shown in FIG.

FIG. 9 is a cross-sectional view showing a development processing unit according to one embodiment.

FIG. 10 is a plan view showing a pre-baking unit, a post-exposure baking unit, or a post-baking unit according to an embodiment.

FIG. 11 is a cross-sectional view showing the action of the tip portion of the resist nozzle.

FIG. 12 is a block diagram showing a control system of the coating and developing treatment apparatus.

FIG. 13 is a list of first and second factors of a substrate defect phenomenon and respective treatment methods corresponding thereto.

[Explanation of symbols]

W ... Semiconductor wafer F: Fan filter unit 1. Coating and developing treatment device 28 ... Capacitance sensor 30 ... Wafer carrier 31 ... Heating plate controller 32 ... Temperature control plate controller 34 ... Rotation condition controller 40a, 40b ... Inspection device 42 ... Particle counter 44 ... CCD camera 47 ... Developer supply pipe 50 ... Coating processing unit controller 51-54 ... Each controller 56 ... Defect phenomenon storage section 57 ... Defect factor storage section 59 ... Treatment storing section 60 ... Development processing unit controller 61-64 ... Each controller 70 ... Heat treatment unit controller 90 ... Exposure processing controller 100 ... Exposure equipment 130 ... Air operation valve 131 ... suck back valve 134 ... Resist supply pipe 135 ... Resist nozzle 136 ... Nozzle scan arm 143 ... Drive motor 153 ... Developer nozzle 200 ... Centralized control device

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI Theme Coat (reference) H01L 21/30 567 569A 514E 502V (72) Inventor Takashi Aiuchi 5-3-6 Akasaka, Minato-ku, Tokyo TBS Transport Center Tokyo Electron Limited F-term (reference) 2H096 AA25 AA27 CA14 DA01 GA02 GA17 GA21 5F046 JA02 JA13 KA04 LA18

Claims (12)

[Claims] 1. In a substrate processing method in which a resist film is applied on a substrate and then a heat treatment is performed, a defect of the resist film formed on the substrate occurs at any one of the above processes. Or a step of pre-storing such a factor as a first factor group; a step of extracting a plurality of factors causing the defect for each processing in the first factor group and pre-storing these as a second factor group; A step of pre-storing a measure for eliminating the above for each of the plurality of occurrence factors, a step of detecting a defect in the resist film formed on the substrate, and a step of In addition to identifying which of the above processes caused a defect,
A step of identifying the occurrence factor from the second factor group and performing a treatment to eliminate it. 2. The substrate processing method according to claim 1, wherein the identification of the first factor is performed by image recognition of a substrate surface. 3. The substrate processing method according to claim 1, wherein, as a result of the detection, when the first factor is specified to be the resist film coating process, the second factor group is (a) Deviation of centering of the resist nozzle for discharging the resist on the substrate, (b) Presence of air bubbles in the resist supply pipe connected to the resist nozzle, or particles in the resist, (c) Supply amount and supply speed of the resist Alternatively, the substrate processing method is characterized by including a defect in suck back, and (d) a defect in a rotating state when the substrate is rotated to form a resist film. 4. The substrate processing method according to claim 3, wherein in the case of (a), the treatment for eliminating the defect is to detect the position of the resist nozzle and adjust the centering deviation, In the case of (b), the bubbles or particles are detected to perform the dummy dispensing of the resist nozzle, and in the case of (c), the resist supply adjustment valve or suck back valve interposed in the supply pipe is adjusted. In the case of (d) above, a motor for rotating the substrate is adjusted. 5. The substrate processing method according to claim 1, wherein after the coating process and the heat treatment, a resist pattern is formed by further performing an exposure process and a development process on the substrate, and the resist formed on the substrate. A step of extracting a plurality of causes of pattern defects and storing them as the second factor group, and a process for eliminating defects during the exposure process or the development process are performed in advance for each of the plurality of factors. A step of storing, a step of detecting a defect of the resist pattern formed on the substrate, a step of specifying the cause of occurrence from the second factor group based on the detection result, and performing a treatment for eliminating the cause. A substrate processing method comprising: 6. The substrate processing method according to claim 5, wherein, as a result of the detection, when the first factor is specified to be during the exposure process, the second factor group is (a) the exposure amount. Defective, (b) defective exposure focus value, and (c) reticle installation different from a predetermined reticle. 7. The substrate processing method according to claim 6, wherein in the case of (a), the exposure amount is adjusted, and in the case of (b), the exposure focus value is adjusted to eliminate the defect. And in the case of (c), a predetermined reticle is installed. 8. The substrate processing method according to claim 5, wherein, as a result of the detection, the second factor group when the first factor is specified to be the time of the developing process is (a) the developing solution. Presence of bubbles in the supply pipe connected to the developing solution nozzle to be discharged or particles in the developing solution, (b) defective supply amount of the developing solution, or poor development time, (c) on the substrate before discharging the developing solution The method for treating a substrate is characterized by including the presence of particles. 9. The substrate processing method according to claim 8, wherein in the case of (a), the action for eliminating the defect is
Dummy dispensing of the developing solution nozzle is performed by detecting the bubbles or particles, and in the case of (b), the developing solution supply adjusting valve interposed in the supply pipe is adjusted, or the developing time is adjusted, In the case of (c), the substrate processing method is characterized in that the amount of clean air during the development processing is adjusted. 10. A substrate processing apparatus comprising a coating processing unit for coating a resist film on a substrate and a heat treatment unit for performing heat treatment on the substrate, when a defect of the resist film formed on the substrate occurs. A first factor group storage unit that stores in advance which one of the processes is being performed as a first factor group, and extracts a plurality of factors that cause the defect for each process in the first factor group. A second factor group storage unit that stores in advance as a second factor group, a treatment storage unit that stores in advance a treatment for eliminating the defect for each of the plurality of generation factors, and a resist pattern formed on the substrate. And an inspection device for detecting the defect, and based on the detection result, which one of the first factor groups has caused the defect, and
A substrate processing apparatus, comprising: a treatment unit that identifies the cause of occurrence from the second factor group and performs a treatment to eliminate the factor. 11. The substrate processing apparatus according to claim 10, further comprising: a means for transferring the coated and heat-treated substrate to an exposure apparatus, and a development processing unit for performing development processing on the substrate to form a resist pattern. Means for extracting a plurality of factors causing the defects of the resist pattern formed on the substrate and storing these factors as the second factor group, and for eliminating the defects during the exposure process or the development process. Means for pre-storing the above-mentioned measures for each of the plurality of occurrence factors, means for detecting defects in the resist pattern formed on the substrate, and the occurrence factors identified from the second factor group based on the detection results. Then, the substrate processing apparatus is provided with a means for performing a treatment to solve the problem. 12. The substrate processing apparatus according to claim 10, wherein at least the coating processing unit, the heat treatment unit,
The substrate processing apparatus further comprising a transfer mechanism that transfers the substrate between the development processing unit and the inspection apparatus.