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JP2003324939A - Starter circuit - Google Patents

Starter circuit

Info

Publication number
JP2003324939A
JP2003324939A JP2002126197A JP2002126197A JP2003324939A JP 2003324939 A JP2003324939 A JP 2003324939A JP 2002126197 A JP2002126197 A JP 2002126197A JP 2002126197 A JP2002126197 A JP 2002126197A JP 2003324939 A JP2003324939 A JP 2003324939A
Authority
JP
Japan
Prior art keywords
voltage
output
output voltage
pulse
digital
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002126197A
Other languages
Japanese (ja)
Inventor
Etsushi Sato
悦士 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2002126197A priority Critical patent/JP2003324939A/en
Publication of JP2003324939A publication Critical patent/JP2003324939A/en
Pending legal-status Critical Current

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a starter circuit which limits a drive current flowing through a coil when an output voltage abruptly rises without using an outside attaching time constant setting capacitor and which can arbitrarily set a starting speed. <P>SOLUTION: The set voltage of a variable reference voltage generating means 27 connected to a digital-analog converter 26, the stepwise rising waveform set by a pulse converter/counter 25, and the reference wave of a reference wave oscillator 14, are compared by a pulse width modulator circuit 13, the on-duty of the output pulse is gradually increased, and the output voltage of an output terminal 3 is risen so as to be raised in response to the increase in the pulse width. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、携帯電話・携帯情
報端末等に用いる定電圧出力回路装置のスタータ回路に
関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a starter circuit of a constant voltage output circuit device used for mobile phones, personal digital assistants, and the like.

【0002】[0002]

【従来の技術】従来の定電圧回路装置の一例である直流
―直流変換器(バックコンバータ)の構成を図3に示
す。この回路においてLSIのコイル駆動端子8は電源
端子1との間にPチャネル型MOSトランジスタ9(以
降Pch−MOS)が接続され、接地端子11との間に
Nチャネル型MOSトランジスタ10(以降Nch−M
OS)とショットキーダイオード7が接続され、出力端
子3との間にコイル2が接続される。出力端子3は接地
端子11との間に出力容量4と負帰還抵抗5と負帰還抵
抗6が接続され、上記負帰還抵抗5と負帰還抵抗6によ
る出力電圧の抵抗分割値は誤差増幅器15の反転入力端
子に負帰還接続端子20を介して負帰還入力され、基準
電圧21と比較する。上記誤差増幅器15は容量18と
抵抗19により積分器を構成し、その出力電圧はパルス
幅変調回路13の反転増幅端子17に入力される。上記
パルス幅変調回路13の反転増幅端子16には上記電源
端子1から構成される定電流源22と容量接続端子23
が接続され、容量接続端子23には時定数設定容量24
が接続される。また、上記パルス幅変調回路13の非反
転増幅端子には基準発振器14が接続され、パルス幅変
調回路13の出力電圧は出力MOSトランジスタ駆動回
路12によりPch−MOSとNch−MOSのゲート
端子にそれぞれ入力される。
2. Description of the Related Art FIG. 3 shows the configuration of a DC-DC converter (buck converter) which is an example of a conventional constant voltage circuit device. In this circuit, a P-channel MOS transistor 9 (hereinafter Pch-MOS) is connected between the coil drive terminal 8 of the LSI and the power supply terminal 1, and an N-channel MOS transistor 10 (hereinafter Nch-) is connected between the coil drive terminal 8 and the ground terminal 11. M
OS) and the Schottky diode 7, and the coil 2 is connected between the output terminal 3 and the Schottky diode 7. An output capacitance 4, a negative feedback resistance 5 and a negative feedback resistance 6 are connected between the output terminal 3 and a ground terminal 11, and the resistance division value of the output voltage by the negative feedback resistance 5 and the negative feedback resistance 6 is the error amplifier 15 to the inverting input terminal via a negative feedback connection terminal 20 is a negative feedback input, with the reference voltage 21. The error amplifier 15 forms an integrator with the capacitor 18 and the resistor 19, and the output voltage thereof is input to the inverting amplification terminal 17 of the pulse width modulation circuit 13. The inverting amplification terminal 16 of the pulse width modulation circuit 13 has a constant current source 22 composed of the power supply terminal 1 and a capacitance connection terminal 23.
Is connected to the capacitance connection terminal 23 and the time constant setting capacitance 24
Are connected. Further, the reference oscillator 14 is connected to the non-inverting amplification terminal of the pulse width modulation circuit 13, and the output voltage of the pulse width modulation circuit 13 is output to the gate terminals of the Pch-MOS and the Nch-MOS by the output MOS transistor drive circuit 12, respectively. Is entered.

【0003】次に図4を用いてある任意の時間Aにこの
回路を立ち上げた時の動作について説明する。回路を立
ち上げたと同時にまず容量接続端子23の電圧は時定数
設定容量24により接地端子11の電圧から任意な設定
電圧までリニアに上昇する。上記容量接続端子23の電
圧は、V1=I1×t/C(ここでV1は容量接続端子
23の電圧、I1は定電流回路22の電流値、tは任意
の時間、Cは容量接続端子23に接続される時定数設定
容量24のコンダクタンス)で表される。ここで容量接
続端子23の電圧が基準となる三角波発振器14の最低
電圧値に達するまでの時間をT1とする。誤差増幅器1
5の出力電圧は、出力端子3の電圧の負帰還抵抗5と負
帰還抵抗6との抵抗分割値が基準電圧21に対して低い
ため、時間Bからは三角波発振器14の出力電圧と容量
接続端子23の電圧とを比較しパルス幅変調回路13に
よってパルスが出力される。上記パルス幅変調回路13
の出力パルス幅は容量接続端子23の電圧の上昇率によ
り次第にオンデューティ(パルスのオン時間)が大きく
なる。作成されたパルスは出力MOSトランジスタ駆動
回路12により同時にONすることのないようP−MO
S9とN−MOS10をオン/オフ制御しコイル2を駆
動する。コイル駆動端子8には接地端子11の電圧また
は電源電圧1が与えられるが、パルス幅変調回路13の
出力パルスのオンデューティが次第に大きくなることに
より電源電圧1が与えられる時間は次第に大きくなる。
コイル2の駆動電流はI2=(Vin−Vout)×t
on/L(ここでI2はコイルの駆動電流、Vinは電
源電圧1、Voutは出力端子3の電圧、tonはパル
スのオンデューティ、Lはコイルのインダクタンス)で
表され、次第に駆動電流が上昇するため出力端子3の電
圧も次第に上昇を始める。出力端子3の電圧の負帰還抵
抗5と負帰還抵抗6による抵抗分割値が基準電圧21と
ほぼ等しくなった時(=時間C)、誤差増幅器15の出
力電圧は電圧降下を始め、時間D(誤差増幅器15の出
力電圧が三角波発振器14の出力電圧の最高電圧と等し
くなる時間)から時間E(誤差増幅器15の出力電圧が
三角波発振器14の出力電圧の最低電圧以下となる時
間)の間に容量接続端子23の電圧と誤差増幅器15の
電位が逆転する。ここで時間B(容量接続端子23の電
圧が三角波発振器14の出力電圧の最低電圧値と等しく
なる時間)から時間C(出力端子3の電圧の負帰還抵抗
5と負帰還抵抗6による抵抗分割値が基準電圧21とほ
ぼ等しくなるまでの時間)をT2とする。容量接続端子
23の電圧と誤差増幅器15の出力電圧が逆転した後は
誤差増幅器15の出力電圧と三角波発振器14の出力電
圧を比較しパルス幅変調回路13がパルスを生成する。
定常状態安定時Fでは負帰還抵抗5と負帰還抵抗6と基
準電圧21により設定される任意の電圧にて出力端子3
電圧は安定する。ここで時間Cから時間FまでをT3と
する。
Next, the operation when this circuit is started at an arbitrary time A will be described with reference to FIG. At the same time when the circuit is started up, the voltage of the capacitance connection terminal 23 first linearly rises from the voltage of the ground terminal 11 to an arbitrary set voltage by the time constant setting capacitance 24. The voltage of the capacitance connection terminal 23 is V1 = I1 × t / C (where V1 is the voltage of the capacitance connection terminal 23, I1 is the current value of the constant current circuit 22, t is an arbitrary time, and C is the capacitance connection terminal 23). Is expressed by the conductance of the time constant setting capacitance 24 connected to. Here, the time until the voltage of the capacitance connection terminal 23 reaches the minimum voltage value of the triangular wave oscillator 14 serving as a reference is set to T1. Error amplifier 1
In the output voltage of 5, the resistance division value of the negative feedback resistor 5 and the negative feedback resistor 6 of the voltage of the output terminal 3 is lower than the reference voltage 21, so from time B, the output voltage of the triangular wave oscillator 14 and the capacitance connection terminal The voltage is compared with the voltage of 23 and the pulse is output by the pulse width modulation circuit 13. The pulse width modulation circuit 13
With respect to the output pulse width of, the on-duty (pulse on-time) gradually increases depending on the rising rate of the voltage of the capacitance connection terminal 23. The generated pulse is controlled by the output MOS transistor drive circuit 12 so that it is not turned on at the same time by the P-MO.
The coil 2 is driven by controlling ON / OFF of S9 and the N-MOS 10. The coil drive terminal 8 is supplied with the voltage of the ground terminal 11 or the power supply voltage 1, but the on-duty of the output pulse of the pulse width modulation circuit 13 is gradually increased, so that the time for supplying the power supply voltage 1 is gradually increased.
The drive current of the coil 2 is I2 = (Vin−Vout) × t
On / L (where I2 is the coil drive current, Vin is the power supply voltage 1, Vout is the voltage of the output terminal 3, ton is the pulse on-duty, L is the coil inductance), and the drive current gradually increases. Therefore, the voltage of the output terminal 3 also gradually starts to rise. When the resistance division value of the voltage of the output terminal 3 by the negative feedback resistance 5 and the negative feedback resistance 6 becomes substantially equal to the reference voltage 21 (= time C), the output voltage of the error amplifier 15 starts to drop and time D ( Between the time when the output voltage of the error amplifier 15 is equal to the maximum voltage of the output voltage of the triangular wave oscillator 14) to the time E (time when the output voltage of the error amplifier 15 is less than or equal to the minimum voltage of the output voltage of the triangular wave oscillator 14) The voltage of the connection terminal 23 and the potential of the error amplifier 15 are reversed. Here, from time B (time when the voltage of the capacitor connection terminal 23 becomes equal to the minimum voltage value of the output voltage of the triangular wave oscillator 14) to time C (resistance division value of the voltage of the output terminal 3 by the negative feedback resistor 5 and the negative feedback resistor 6). T2 is the time until the voltage becomes substantially equal to the reference voltage 21. After the voltage of the capacitance connection terminal 23 and the output voltage of the error amplifier 15 are reversed, the output voltage of the error amplifier 15 and the output voltage of the triangular wave oscillator 14 are compared and the pulse width modulation circuit 13 generates a pulse.
In the steady state stable state F, the output terminal 3 is set to an arbitrary voltage set by the negative feedback resistor 5, the negative feedback resistor 6 and the reference voltage 21.
The voltage stabilizes. Here, T3 is from time C to time F.

【0004】以上のように、スタータ回路は、容量接続
端子23に接続される時定数設定容量24のコンダクタ
ンスと定電流源22の電流値によって設定される時定数
によりパルスのオンデューティを次第に増加させ、出力
電圧の急激な上昇とコイル2に流れる駆動電流を制限す
る回路構成を取っていた。
As described above, the starter circuit gradually increases the on-duty of the pulse by the conductance of the time constant setting capacitance 24 connected to the capacitance connection terminal 23 and the time constant set by the current value of the constant current source 22. The circuit configuration is such that the output voltage suddenly rises and the drive current flowing through the coil 2 is limited.

【0005】[0005]

【発明が解決しようとする課題】携帯電話機および携帯
情報端末はセットの軽量化や部品点数削減によるコスト
メリットの抽出が不可欠となってきている。直流電源
(または交流電源)から直流電圧に変換する直流―直流
変換器(または交流―直流変換器)では、集積化(LS
I化)を進めるなかで部品数の削減と集積回路(LS
I)ピンの削減が課題となる。また、出力電圧の急激な
上昇とコイルに流れる駆動電流を制限しつつ出力電圧を
上昇させることは安全性・信頼性の面で欠かすことので
きない機能である。また、従来の時定数設定容量24を
用いた場合のT1時間(容量接続端子23が接地端子1
1の電圧から基準となる三角波発振器14の出力電圧の
最低電圧値に達するまでの時間)は動作立ち上げに関係
のない立ち上げ時間の無駄となっている。
For mobile phones and personal digital assistants, it is indispensable to extract the cost merit by reducing the weight of the set and reducing the number of parts. In a DC-DC converter (or AC-DC converter) that converts a DC power supply (or AC power supply) to a DC voltage, integration (LS
Reduction of the number of parts and integrated circuit (LS)
I) Reduction of pins is an issue. Further, increasing the output voltage while limiting the abrupt increase in the output voltage and the drive current flowing through the coil is an essential function in terms of safety and reliability. Further, when the conventional time constant setting capacitance 24 is used, T1 time (the capacitance connecting terminal 23 is the ground terminal 1
The time from the voltage of 1 to the minimum voltage value of the output voltage of the triangular wave oscillator 14 serving as the reference) is a waste of the startup time irrelevant to the startup of the operation.

【0006】外付け時定数設定容量を用いないこととす
れば、集積回路(LSI)ピンを削減でき、部品点数の
削減にも貢献することができる。
If the external time constant setting capacitance is not used, the number of integrated circuit (LSI) pins can be reduced and the number of parts can be reduced.

【0007】本発明は上記従来の課題を解決するもので
あり、本来の機能である出力電圧の急激な上昇とコイル
に流れる駆動電流を制限し、かつ外付け時定数設定容量
を用いずに実現し、さらに任意に立ち上がり速度を設定
する動作を実現するスタータ回路の提供を目的とする。
The present invention solves the above-mentioned conventional problems, and realizes the original function of limiting abrupt increase of output voltage and drive current flowing in a coil and without using an external time constant setting capacity. In addition, an object of the present invention is to provide a starter circuit that realizes an operation of arbitrarily setting the rising speed.

【0008】[0008]

【課題を解決するための手段】請求項1記載のスタータ
回路は、直流電源または交流電源から直流電圧に変換す
る直流―直流変換器(または交流―直流変換器)におい
て、出力電圧の急激な立ち上がりと前記直流電源または
交流電源からの突入電流を制限・抑制するために、基準
発振器と、次第に上昇する出力電圧を発生する手段と、
前記基準発振器の信号に対して前記出力電圧を比較して
パルス幅が次第に増加するパルスを出力するパルス幅変
調回路を有し、そのパルスに基づいて次第に上昇する出
力電圧を立ち上げるようにしたスタータ回路であって、
前記手段を、デジタル信号をアナログ信号に変換して出
力電圧が階段状に上昇するデジタル/アナログ変換器に
より構成し、前記パルス幅変調回路は前記基準発振器の
信号に対して前記デジタル/アナログ変換器の出力電圧
を比較することによりパルス幅が段階的に増加するパル
スを出力することを特徴とするものである。
A starter circuit according to claim 1 is a DC-DC converter (or AC-DC converter) for converting a DC power supply or an AC power supply into a DC voltage, and the output voltage rapidly rises. And a reference oscillator for limiting and suppressing the inrush current from the DC power supply or the AC power supply, and means for generating an output voltage that gradually increases,
A starter that has a pulse width modulation circuit that compares the output voltage with respect to the signal of the reference oscillator and outputs a pulse whose pulse width gradually increases, and starts a gradually increasing output voltage based on the pulse. A circuit,
The means is configured by a digital / analog converter that converts a digital signal into an analog signal and the output voltage rises stepwise, and the pulse width modulation circuit is the digital / analog converter with respect to the signal of the reference oscillator. It is characterized in that a pulse whose pulse width is increased stepwise is output by comparing the output voltages of.

【0009】請求項1記載のスタータ回路によれば、従
来の定電流源と時定数設定容量によって設定されるリニ
ア上昇電圧のかわりに、例えばパルスカウンタと可変基
準電圧を持つデジタル/アナログ変換器により出力電圧
の分割値、最低電圧、最大電圧と出力電圧上昇変化時間
を任意に設定することで作成される階段状上昇電圧を用
いる。三角波発振器の出力電圧と階段状上昇電圧とを比
較することでパルス幅変調回路のパルス出力は段階的に
オンデューティが増加する。
According to the starter circuit of the first aspect, instead of the conventional constant current source and the linear rising voltage set by the time constant setting capacity, for example, a digital / analog converter having a pulse counter and a variable reference voltage is used. A stepwise rising voltage created by arbitrarily setting the divided value of the output voltage, the minimum voltage, the maximum voltage and the output voltage rising change time is used. By comparing the output voltage of the triangular wave oscillator and the stepwise rising voltage, the on-duty of the pulse output of the pulse width modulation circuit is increased stepwise.

【0010】この結果、従来必要とされていた外付け時
定数設定容量を用いずに、直流電源(または交流電源)
から直流電圧に変換する直流―直流変換器(または交流
―直流変換器)において出力電圧の急激な上昇とコイル
に流れる駆動電流を制限することができる。
As a result, a DC power supply (or AC power supply) can be used without using the externally set time constant setting capacity that has been conventionally required.
In a DC-DC converter (or an AC-DC converter) that converts a DC voltage into a DC voltage, a sudden increase in output voltage and a drive current flowing through a coil can be limited.

【0011】請求項2記載のスタータ回路は、請求項1
において、デジタル/アナログ変換器は、その出力電圧
を階段状に上昇させるための可変基準電圧発生手段と、
前記デジタル/アナログ変換器にデジタル信号を出力す
るパルスカウンタを有するものである。
According to a second aspect of the present invention, there is provided a starter circuit according to the first aspect.
In the digital / analog converter, a variable reference voltage generating means for increasing its output voltage stepwise,
A pulse counter for outputting a digital signal to the digital / analog converter is provided.

【0012】請求項2記載のスタータ回路によれば、請
求項1と同様な効果のほか、設定電圧、設定時間、分解
能を任意に設定でき、任意に立ち上がり速度を設定する
ことが出来る。すなわち、デジタル/アナログ変換器は
可変基準電圧を持つため任意の出力電圧・分解能を生成
することができ、パルスカウンタによりデジタル/アナ
ログ変換器の出力電圧上昇時間を任意に設定できる。
According to the starter circuit of the second aspect, in addition to the same effect as the first aspect, the set voltage, the set time, and the resolution can be arbitrarily set, and the rising speed can be arbitrarily set. That is, since the digital / analog converter has a variable reference voltage, an arbitrary output voltage / resolution can be generated, and the output voltage rise time of the digital / analog converter can be arbitrarily set by the pulse counter.

【0013】[0013]

【発明の実施の形態】以上本発明の一実施の形態につい
て、図面を参照しながら一例を説明する。図1は本発明
の一実施の形態における従来必要とされていた外付け時
定数設定容量を用いずに出力電圧の急激な上昇とコイル
に流れる駆動電流を制限しつつ出力電圧を上昇させるス
タータ回路で、図2は本発明の一実施の形態における回
路立ち上げ時の動作波形を示す。図1の回路においてL
SIのコイル駆動端子8は電源端子1との間にPチャネ
ル型MOSトランジスタ9(以降Pch−MOS)が接
続され、接地端子11との間にNチャネル型MOSトラ
ンジスタ10(以降Nch−MOS)とショットキーダ
イオード7が接続され、出力端子3との間にコイル2が
接続される。出力端子3は接地端子11との間に出力容
量4と負帰還抵抗5と負帰還抵抗6が接続され、負帰還
抵抗5と負帰還抵抗6による出力電圧の抵抗分割値は誤
差増幅器15の反転入力端子に負帰還接続端子20を介
して負帰還接続され、基準電圧21と比較する。誤差増
幅器15は容量18と抵抗19により積分器を構成し、
その出力電圧はパルス幅変調回路13の反転増幅端子1
7に接続される。パルス幅変調回路13の反転増幅端子
16には三角波発振器14の出力電圧をカウントするパ
ルス変換器・カウンタ25と可変基準電圧発生手段27
を持つデジタル/アナログ変換器26の出力が接続され
る。また、パルス幅変調回路13の非反転増幅端子には
基準発振器14が接続され、パルス幅変調回路13の出
力電圧は出力MOSトランジスタ駆動回路12によりP
ch−MOSとNch−MOSのゲート端子にそれぞれ
入力される。
BEST MODE FOR CARRYING OUT THE INVENTION One embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a starter circuit according to an embodiment of the present invention, which raises the output voltage while limiting the driving current flowing through the coil and the sudden rise of the output voltage without using the conventionally required external time constant setting capacity. Then, FIG. 2 shows operation waveforms at the time of circuit startup in the embodiment of the present invention. L in the circuit of FIG.
A P-channel MOS transistor 9 (hereinafter Pch-MOS) is connected between the SI coil drive terminal 8 and the power supply terminal 1, and an N-channel MOS transistor 10 (hereinafter Nch-MOS) is connected between the SI terminal and the ground terminal 11. The Schottky diode 7 is connected, and the coil 2 is connected between the Schottky diode 7 and the output terminal 3. An output capacitance 4, a negative feedback resistor 5 and a negative feedback resistor 6 are connected between the output terminal 3 and a ground terminal 11, and the resistance division value of the output voltage by the negative feedback resistor 5 and the negative feedback resistor 6 is the inversion of the error amplifier 15. Negative feedback connection is made to the input terminal via the negative feedback connection terminal 20, and the voltage is compared with the reference voltage 21. The error amplifier 15 comprises an integrator with a capacitor 18 and a resistor 19,
The output voltage is the inverting amplification terminal 1 of the pulse width modulation circuit 13.
Connected to 7. At the inverting amplification terminal 16 of the pulse width modulation circuit 13, a pulse converter / counter 25 for counting the output voltage of the triangular wave oscillator 14 and a variable reference voltage generating means 27.
Is connected to the output of the digital / analog converter 26. Further, the reference oscillator 14 is connected to the non-inverting amplification terminal of the pulse width modulation circuit 13, and the output voltage of the pulse width modulation circuit 13 is P by the output MOS transistor drive circuit 12.
It is input to the gate terminals of the ch-MOS and the Nch-MOS, respectively.

【0014】次に図2を用いてある任意の時間Aにこの
回路を立ち上げた時の動作について説明する。回路を立
ち上げたと同時にまずデジタル/アナログ変換器26の
出力電圧は可変基準電圧発生手段27により、三角波発
振器14の出力電圧の最低電圧以下に設定され、パルス
変換器・カウンタ25により設定される変化時間により
階段上に電圧上昇を始める。デジタル/アナログ変換器
26の電圧は、V2=(Vmax−Vmin)×N/2
n(ここでV2はデジタル/アナログ変換器26の電
圧、Vmaxは可変基準電圧発生手段27の最高電圧、
Vminは可変基準電圧発生手段27の最低電圧、Nは
パルス変換器・カウンタ25のパルスカウント回数、n
はデジタル/アナログ変換器26のビット数)で表され
る。ここでデジタル/アナログ変換器26の電圧が基準
となる三角波発振器14の最低電圧値に達するまでの時
間をT1とする。誤差増幅器15の出力電圧は、出力端
子3の電圧の負帰還抵抗5と負帰還抵抗6との抵抗分割
値が基準電圧21に対して低いため、時間Bからは三角
波発振器14の出力電圧とデジタル/アナログ変換器2
6の電圧とを比較しパルス幅変調回路13によってパル
スが出力される。パルス幅出力回路13の出力パルス幅
はデジタル/アナログ変換器26の電圧の上昇率により
次第にオンデューティ(パルスのオン時間)が大きくな
る。作成されたパルスは出力MOSトランジスタ駆動回
路12により同時にONすることのないようP−MOS
9とN−MOS10をオン/オフ制御しコイル2を駆動
する。コイル駆動端子8には接地端子11の電圧または
電源端子1の電圧が与えられるが、パルス幅変調回路1
3の出力パルスのオンデューティが次第に大きくなるこ
とにより電源電圧1が与えられる時間は次第に大きくな
る。コイル2の駆動電流はI2=(Vin−Vout)
*ton/L(ここでVinは電源端子1の電圧、Vo
utは出力端子3の電圧、tonはパルスのオンデュー
ティ、Lはコイルのインダクタンス)で表され、次第に
駆動電流が上昇するため出力端子3電圧も次第に上昇を
始める。出力端子3の電圧の負帰還抵抗5と負帰還抵抗
6による抵抗分割値が基準電圧21とほぼ等しくなった
時(=時間C)、誤差増幅器15の出力電圧は電圧降下
を始め、時間D(誤差増幅器15出力電圧が三角波発振
器14出力電圧の最高電圧と等しくなる時間)から時間
E(誤差増幅器15の出力電圧が三角波発振器14の出
力電圧の最低電圧以下となる時間)の間にデジタル/ア
ナログ変換器26電圧と誤差増幅器15の電位が逆転す
る。ここで時間B(デジタル/アナログ変換器26の電
圧が三角波発振器14の出力電圧の最低電圧値と等しく
なる時間)から時間C(出力端子3の電圧の負帰還抵抗
5と負帰還抵抗6による抵抗分割値が基準電圧21とほ
ぼ等しくなるまでの時間)をT2とする。デジタル/ア
ナログ変換器26の電圧と誤差増幅器15の出力電圧が
逆転した後は誤差増幅器15の出力電圧と三角波発振器
14の出力電圧を比較しパルス幅変調回路13がパルス
を生成する。定常状態安定時Fでは負帰還抵抗5と負帰
還抵抗6と基準電圧21により設定される任意の電圧に
て出力端子3の電圧は安定する。ここで時間Cから時間
FまでをT3とする。
Next, the operation when this circuit is started up at an arbitrary time A will be described with reference to FIG. At the same time when the circuit is started up, the output voltage of the digital / analog converter 26 is first set by the variable reference voltage generating means 27 to be equal to or lower than the minimum voltage of the output voltage of the triangular wave oscillator 14, and changed by the pulse converter / counter 25. The voltage starts to rise on the stairs depending on the time. The voltage of the digital / analog converter 26 is V2 = (Vmax−Vmin) × N / 2
n (here, V2 is the voltage of the digital / analog converter 26, Vmax is the maximum voltage of the variable reference voltage generating means 27,
Vmin is the minimum voltage of the variable reference voltage generating means 27, N is the number of pulse counts of the pulse converter / counter 25, n
Is represented by the number of bits of the digital / analog converter 26). Here, the time required for the voltage of the digital / analog converter 26 to reach the minimum voltage value of the triangular wave oscillator 14 serving as the reference is set to T1. As for the output voltage of the error amplifier 15, since the resistance division value of the negative feedback resistor 5 and the negative feedback resistor 6 of the voltage of the output terminal 3 is lower than the reference voltage 21, from the time B, the output voltage of the triangular wave oscillator 14 and the digital voltage / Analog converter 2
The pulse width modulation circuit 13 compares the voltage with the voltage of 6 and outputs a pulse. The on-duty (pulse on-time) of the output pulse width of the pulse-width output circuit 13 gradually increases depending on the rising rate of the voltage of the digital / analog converter 26. The generated pulse is controlled by the output MOS transistor drive circuit 12 so that it is not turned on at the same time by the P-MOS.
9 and N-MOS 10 are turned on / off to drive the coil 2. Although the voltage of the ground terminal 11 or the voltage of the power supply terminal 1 is applied to the coil drive terminal 8, the pulse width modulation circuit 1
As the on-duty of the output pulse of No. 3 gradually increases, the time during which the power supply voltage 1 is applied gradually increases. The drive current of the coil 2 is I2 = (Vin−Vout)
* Ton / L (where Vin is the voltage of power supply terminal 1, Vo
ut is represented by the voltage of the output terminal 3, ton is represented by the on-duty of the pulse, and L is the inductance of the coil. Since the drive current gradually increases, the voltage of the output terminal 3 also gradually increases. When the resistance division value of the voltage of the output terminal 3 by the negative feedback resistance 5 and the negative feedback resistance 6 becomes substantially equal to the reference voltage 21 (= time C), the output voltage of the error amplifier 15 starts to drop and time D ( Between the time when the output voltage of the error amplifier 15 is equal to the maximum voltage of the output voltage of the triangular wave oscillator 14) and the time E (time when the output voltage of the error amplifier 15 is less than or equal to the minimum voltage of the output voltage of the triangular wave oscillator 14) The voltage of the converter 26 and the potential of the error amplifier 15 are reversed. Here, from time B (time when the voltage of the digital / analog converter 26 becomes equal to the minimum voltage value of the output voltage of the triangular wave oscillator 14) to time C (resistance of the negative feedback resistor 5 and the negative feedback resistor 6 of the voltage of the output terminal 3). The time until the divided value becomes substantially equal to the reference voltage 21) is T2. After the voltage of the digital / analog converter 26 and the output voltage of the error amplifier 15 are reversed, the output voltage of the error amplifier 15 and the output voltage of the triangular wave oscillator 14 are compared and the pulse width modulation circuit 13 generates a pulse. In the steady state stable state F, the voltage of the output terminal 3 stabilizes at an arbitrary voltage set by the negative feedback resistor 5, the negative feedback resistor 6 and the reference voltage 21. Here, T3 is from time C to time F.

【0015】以上のようにデジタル/アナログ変換器2
6の電圧に接続される可変基準電圧発生手段27の設定
電圧とパルスカウンタ25によって設定される階段状上
昇波形によりパルスのオンデューティを次第に増加さ
せ、出力電圧の急激な上昇とコイル2に流れる駆動電流
を制限しつつ出力端子3電圧を上昇させる。
As described above, the digital / analog converter 2
The on-duty of the pulse is gradually increased by the set voltage of the variable reference voltage generating means 27 connected to the voltage of 6 and the stepwise rising waveform set by the pulse counter 25, and the output voltage is rapidly increased and the coil 2 is driven to flow. The voltage of the output terminal 3 is increased while limiting the current.

【0016】ここでデジタル/アナログ変換器26、パ
ルスカウンタ25、可変基準電圧27が集積回路外にあ
り、またコイル駆動端子8と電源端子1との間に接続さ
れるPチャネル型MOSトランジスタ9(以降Pch−
MOS)、接地端子11との間に接続されるNチャネル
型MOSトランジスタ10(以降Nch−MOS)のか
わりにNPNトランジスタ・PNPトランジスタ・Pチ
ャネル型MOSトランジスタ・Nチャネル型MOSトラ
ンジスタを任意に組み合わせた回路構成の直流−直流変
換器または交流−直流変換器においても、同様の効果を
得ることができる。
Here, the digital / analog converter 26, the pulse counter 25, and the variable reference voltage 27 are outside the integrated circuit, and the P-channel type MOS transistor 9 (which is connected between the coil drive terminal 8 and the power supply terminal 1) After that Pch-
Instead of the N-channel type MOS transistor 10 (hereinafter referred to as Nch-MOS) connected between the MOS) and the ground terminal 11, an NPN transistor / PNP transistor / P-channel type MOS transistor / N-channel type MOS transistor is arbitrarily combined. Similar effects can be obtained also in a DC-DC converter or an AC-DC converter having a circuit configuration.

【0017】[0017]

【発明の効果】請求項1記載のスタータ回路によれば、
従来必要とされていた外付け時定数設定容量を用いず
に、直流電源(または交流電源)から直流電圧に変換す
る直流―直流変換器(または交流―直流変換器)におい
て出力電圧の急激な上昇とコイルに流れる駆動電流を制
限することができる。
According to the starter circuit of the first aspect,
Sudden rise in output voltage in a DC-DC converter (or AC-DC converter) that converts from a DC power supply (or AC power supply) to a DC voltage without using the externally set time constant setting capacity that was conventionally required The drive current flowing in the coil can be limited.

【0018】請求項2記載のスタータ回路によれば、請
求項1と同様な効果のほか、設定電圧、設定時間、分解
能を任意に設定でき、任意に立ち上がり速度を設定する
ことが出来る。
According to the starter circuit of the second aspect, in addition to the same effect as the first aspect, the set voltage, the set time, and the resolution can be arbitrarily set, and the rising speed can be arbitrarily set.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施の形態におけるスタータ回路で
ある。
FIG. 1 is a starter circuit according to an embodiment of the present invention.

【図2】本発明の一実施の形態における回路立ち上げ時
の動作波形図である。
FIG. 2 is an operation waveform diagram at the time of starting the circuit in the embodiment of the present invention.

【図3】従来の外付け時定数設定容量を用いたスタータ
回路図である。
FIG. 3 is a starter circuit diagram using a conventional external time constant setting capacitance.

【図4】従来の外付け容量を用いた回路立ち上げ時の動
作波形図である。
FIG. 4 is an operation waveform diagram at the time of starting a circuit using a conventional external capacitor.

【符号の説明】[Explanation of symbols]

1 電源端子 2 コイル 3 出力端子 4 出力容量 5 出力電圧負帰還抵抗 6 出力電圧負帰還抵抗 7 ショットキーダイオード 8 コイル駆動端子 9 出力Pチャネル型MOSトランジスタ 10 出力Nチャネル型MOSトランジスタ 11 接地端子 12 出力MOSトランジスタ駆動回路 13 パルス幅変調回路 14 三角波発振器 15 誤差増幅器 16 誤差増幅器反転入力端子 17 誤差増幅器反転入力端子 18 積分容量 19 積分抵抗 20 負帰還接続端子 21 基準電圧 22 定電流回路 23 容量接続端子 24 時定数設定容量 25 パルス変換器・カウンタ 26 デジタル/アナログ変換器 27 可変基準電圧発生手段 1 power supply terminal 2 coils 3 output terminals 4 output capacity 5 Output voltage negative feedback resistance 6 Output voltage negative feedback resistor 7 Schottky diode 8 coil drive terminals 9-output P-channel MOS transistor 10-output N-channel MOS transistor 11 Ground terminal 12 output MOS transistor drive circuit 13 Pulse width modulation circuit 14 Triangular wave oscillator 15 Error amplifier 16 Error amplifier inverting input terminal 17 Error amplifier inverting input terminal 18 Integral capacity 19 Integral resistance 20 Negative feedback connection terminal 21 Reference voltage 22 constant current circuit 23 Capacitance connection terminal 24 time constant setting capacity 25 pulse converter / counter 26 Digital / Analog Converter 27 Variable reference voltage generating means

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 直流電源または交流電源から直流電圧に
変換する直流―直流変換器(または交流―直流変換器)
において、出力電圧の急激な立ち上がりと前記直流電源
または交流電源からの突入電流を制限・抑制するため
に、基準発振器と、次第に上昇する出力電圧を発生する
手段と、前記基準発振器の信号に対して前記出力電圧を
比較してパルス幅が次第に増加するパルスを出力するパ
ルス幅変調回路を有し、そのパルスに基づいて次第に上
昇する出力電圧を立ち上げるようにしたスタータ回路で
あって、 前記手段を、デジタル信号をアナログ信号に変換して出
力電圧が階段状に上昇するデジタル/アナログ変換器に
より構成し、前記パルス幅変調回路は前記基準発振器の
信号に対して前記デジタル/アナログ変換器の出力電圧
を比較することによりパルス幅が段階的に増加するパル
スを出力することを特徴とするスタータ回路。
1. A DC-DC converter (or AC-DC converter) for converting a DC power supply or an AC power supply into a DC voltage.
In order to limit and suppress the sudden rise of the output voltage and the inrush current from the DC power supply or the AC power supply, a reference oscillator, a means for generating an gradually increasing output voltage, and a signal of the reference oscillator. A starter circuit that has a pulse width modulation circuit that outputs a pulse whose pulse width gradually increases by comparing the output voltages, and is a starter circuit that raises the gradually increasing output voltage based on the pulse, , A digital / analog converter that converts a digital signal into an analog signal and the output voltage rises stepwise, and the pulse width modulation circuit outputs the output voltage of the digital / analog converter with respect to the signal of the reference oscillator. A starter circuit, which outputs a pulse whose pulse width increases stepwise by comparing
【請求項2】 デジタル/アナログ変換器は、その出力
電圧を階段状に上昇させるための可変基準電圧発生手段
と、前記デジタル/アナログ変換器にデジタル信号を出
力するパルスカウンタを有する請求項1記載のスタータ
回路。
2. The digital / analog converter has a variable reference voltage generating means for increasing its output voltage stepwise, and a pulse counter for outputting a digital signal to the digital / analog converter. Starter circuit.
JP2002126197A 2002-04-26 2002-04-26 Starter circuit Pending JP2003324939A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002126197A JP2003324939A (en) 2002-04-26 2002-04-26 Starter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002126197A JP2003324939A (en) 2002-04-26 2002-04-26 Starter circuit

Publications (1)

Publication Number Publication Date
JP2003324939A true JP2003324939A (en) 2003-11-14

Family

ID=29540685

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002126197A Pending JP2003324939A (en) 2002-04-26 2002-04-26 Starter circuit

Country Status (1)

Country Link
JP (1) JP2003324939A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006059705A1 (en) * 2004-12-03 2006-06-08 Rohm Co., Ltd Switching power supply and its control circuit, and electronic apparatus employing such switching power supply
WO2006068012A1 (en) * 2004-12-21 2006-06-29 Rohm Co., Ltd Switching regulator
JP2007049889A (en) * 2005-07-12 2007-02-22 Brother Ind Ltd Power supply apparatus and image forming apparatus
JP2008131763A (en) * 2006-11-21 2008-06-05 Rohm Co Ltd Voltage generation circuit, switching regulator control circuit employing it and electronic apparatus
US7579817B2 (en) 2005-04-21 2009-08-25 Ricoh Company, Ltd. Constant-voltage circuit capable of reducing time required for starting, semiconductor apparatus including constant-voltage circuit, and control method of constant-voltage circuit
JP2010028951A (en) * 2008-07-17 2010-02-04 Ricoh Co Ltd Switching power supply circuit

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006059705A1 (en) * 2004-12-03 2006-06-08 Rohm Co., Ltd Switching power supply and its control circuit, and electronic apparatus employing such switching power supply
US7579784B2 (en) 2004-12-03 2009-08-25 Rohm Co., Ltd. Switching power supply and its control circuit, and electronic apparatus employing such switching power supply
WO2006068012A1 (en) * 2004-12-21 2006-06-29 Rohm Co., Ltd Switching regulator
US7675279B2 (en) 2004-12-21 2010-03-09 Rohm Co., Ltd. Switching regulator soft start circuitry using a D/A converter
JP4808635B2 (en) * 2004-12-21 2011-11-02 ローム株式会社 Switching regulator
US7579817B2 (en) 2005-04-21 2009-08-25 Ricoh Company, Ltd. Constant-voltage circuit capable of reducing time required for starting, semiconductor apparatus including constant-voltage circuit, and control method of constant-voltage circuit
JP2007049889A (en) * 2005-07-12 2007-02-22 Brother Ind Ltd Power supply apparatus and image forming apparatus
JP2008131763A (en) * 2006-11-21 2008-06-05 Rohm Co Ltd Voltage generation circuit, switching regulator control circuit employing it and electronic apparatus
JP2010028951A (en) * 2008-07-17 2010-02-04 Ricoh Co Ltd Switching power supply circuit

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