JP2004047411A - Light emitting device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve reliability of a light emitting device where a TFT is coupled with an organic light emitting element. <P>SOLUTION: A thin-film transistor and a light emitting element are provided. A second inorganic insulator layer is provided on the upper layer side of a gate electrode. A first organic insulator layer is provided on the second inorganic insulator layer. A third inorganic insulator layer is provided on the first organic insulator layer. An anode layer is formed on the third inorganic insulator layer. A second organic insulator layer overlaps, at a tilt angle of 35-45°, with the end of the wiring layer. A fourth inorganic insulator layer is formed on the front surface and the side surface of the second organic insulator layer, and comprises an opening on the anode layer. An organic compound layer is formed to contact the anode layer, and the fourth inorganic insulator layer and comprises a light emitting body. A cathode layer is formed to contact the organic compound layer containing the light emitting body. The third inorganic insulator layer and the fourth inorganic insulator layer are formed from silicon nitride or aluminum. <P>COPYRIGHT: (C)2004,JPO

Description

【００５５】
スパッタガスとして用いるＡｒは、基板を加熱するためのガスとして基板裏面側に吹き付けるように導入され、最終的にＮ_２と混合されてスパッタに寄与する。また、表１に示す成膜条件は、代表的な条件であってここに示す数値に限定されるものではなく、成膜されたＳｉＮ膜の物性パラメータが後に表４において示す物性パラメータの範囲内に入る限り、実施者が適宜変更しても良い。
【００５６】
ここで上記高周波スパッタ法により窒化珪素膜を成膜するにあたって使用するスパッタ装置の概略図を図３０に示す。図３０において、３０はチャンバー壁、３１は磁場を形成するための可動式マグネット、３２は単結晶シリコンターゲット、３３は防護シャッター、３４は被処理基板、３６ａ及び３６ｂはヒーター、３７は基板チャック機構、３８は防着板、３９はバルブ（コンダクタンスバルブもしくはメインバルブ）である。また、チャンバー壁３０に設置されたガス導入管４０、４１は、それぞれＮ_２（もしくはＮ_２と希ガスの混合ガス）及び希ガスの導入管である。
【００５７】
また、比較例として従来のプラズマＣＶＤ法により形成される窒化珪素膜の成膜条件を表２に示す。尚、表中の「ＰＣＶＤ−ＳｉＮ」とは、プラズマＣＶＤ法により形成された窒化珪素膜を指す。
【００５８】
【表２】

【００５９】
次に、表１の成膜条件で成膜された窒化珪素膜と表２の成膜条件で成膜された窒化珪素膜の代表的な物性値（物性パラメータ）について、比較した結果を表３にまとめる。尚、「ＲＦＳＰ−ＳｉＮ（Ｎｏ．１）」と「ＲＦＳＰ−ＳｉＮ（Ｎｏ．２）」との違いは、成膜装置による違いであり、本発明のバリア膜として用いる窒化珪素膜としての機能を損なうものではない。また、内部応力は、圧縮応力か引っ張り応力かで数値の正負の符号が変わるが、ここでは絶対値のみを取り扱う。
【００６０】
【表３】

【００６１】
表３に示すように、これらＲＦＳＰ−ＳｉＮ（Ｎｏ．１）及びＲＦＳＰ−ＳｉＮ（Ｎｏ．２）に共通の特徴点は、ＰＣＶＤ−ＳｉＮ膜と比較して、エッチング速度（ＬＡＬ５００を用いて２０℃でエッチングした際のエッチング速度をいう。以下、同じ。）が遅く、水素濃度が低い点が挙げられる。尚、「ＬＡＬ５００」とは、橋本化成株式会社製「ＬＡＬ５００　ＳＡバッファードフッ酸」であり、ＮＨ_４ＨＦ_２（７．１３％）とＮＨ_４Ｆ（１５．４％）の水溶液である。また、内部応力は、プラズマＣＶＤ法で成膜された窒化珪素膜よりも絶対値で比較して小さい値となっている。
【００６２】
ここで本発明者らが表１の成膜条件によって成膜した窒化珪素膜の諸物性のパラメータを表４にまとめる。
【００６３】
【表４】

【００６４】
また、当該窒化珪素膜をＳＩＭＳ（質量二次イオン分析）により調べた結果を図２４に、そのＦＴ−ＩＲの結果を図２５に、その透過率を図２６に示す。尚、図２６には表２の成膜条件で成膜した窒化珪素膜についても併せて表記する。透過率については、従来のＰＣＶＤ−ＳｉＮ膜と比べて遜色はない。
【００６５】
本発明の無機絶縁層として用いる窒化珪素膜においては、表４に示すパラメータを満たす窒化珪素膜が望ましい。即ち、無機絶縁層として、▲１▼エッチング速度が９ｎｍ／ｍｉｎ以下（好ましくは、０．５〜３．５ｎｍ／ｍｉｎ以下）である窒化珪素膜を用いること、▲２▼水素濃度が１×１０^２１ａｔｏｍｓ／ｃｍ^３以下（好ましくは、５×１０^２０ａｔｏｍｓ／ｃｍ^３以下）であること、▲３▼水素濃度が１×１０^２１ａｔｏｍｓ／ｃｍ^３以下（好ましくは、５×１０^２０ａｔｏｍｓ／ｃｍ^３以下）で、かつ、酸素濃度が５×１０^１８〜５×１０^２１ａｔｏｍｓ／ｃｍ^３（好ましくは、１×１０^１９〜１×１０^２１ａｔｏｍｓ／ｃｍ^３）であること、▲４▼エッチング速度が９ｎｍ／ｍｉｎ以下（好ましくは、０．５〜３．５ｎｍ／ｍｉｎ以下）で、かつ、水素濃度が１×１０^２１ａｔｏｍｓ／ｃｍ^３以下（好ましくは、５×１０^２０ａｔｏｍｓ／ｃｍ^３以下）であること、▲５▼エッチング速度が９ｎｍ／ｍｉｎ以下（好ましくは、０．５〜３．５ｎｍ／ｍｉｎ以下）で、かつ、水素濃度が１×１０^２１ａｔｏｍｓ／ｃｍ^３以下（好ましくは、５×１０^２０ａｔｏｍｓ／ｃｍ^３以下）で、かつ、酸素濃度が５×１０^１８〜５×１０^２１ａｔｏｍｓ／ｃｍ^３（好ましくは、１×１０^１９〜１×１０^２１ａｔｏｍｓ／ｃｍ^３）であること、のいずれかを満たすことが望ましい。
【００６６】
また、内部応力の絶対値は、２×１０^１０ｄｙｎ／ｃｍ^２以下、好ましくは５×１０^９ｄｙｎ／ｃｍ^２以下、さらに好ましくは５×１０^８ｄｙｎ／ｃｍ^２以下とすると良い。内部応力を小さくすれば、他の膜との界面における準位の発生を低減できる。さらに、内部応力による膜はがれを防止できる。
【００６７】
また、本実施の形態に示した表１の成膜条件による窒化珪素膜は、Ｎａ、Ｌｉその他の周期表の１族もしくは２族に属する元素に対するブロッキング効果が極めて強く、これらの可動イオン等の拡散を効果的に抑制することができる。例えば、本実施の形態に用いる陰極層としては、アルミニウムに０．２〜１．５ｗｔ％（好ましくは０．５〜１．０ｗｔ％）のリチウムを添加した金属膜が電荷注入性その他の点で好適であるが、この場合において、リチウムの拡散によってトランジスタの動作に害を及ぼすことが懸念される。しかしながら、本実施の形態では、無機絶縁層で完全に保護されることとなるため、リチウムのトランジスタ方向への拡散は気にする必要がない。
【００６８】
この事実を示すデータを図２７〜２９に示す。図２７は、表２の成膜条件で成膜した窒化珪素膜（ＰＣＶＤ−ＳｉＮ膜）を誘電体としたＭＯＳ構造のＢＴストレス試験前後におけるＣ−Ｖ特性の変化を示す図である。試料の構造は、図２９（Ａ）に示す通りであり、表面電極にＡｌ−Ｌｉ（リチウムを添加したアルミニウム）電極を用いることによりリチウム拡散による影響の有無を確かめることができる。図２７によれば、ＢＴストレス試験によりＣ−Ｖ特性が大きくシフトし、表面電極からのリチウムの拡散による影響が顕著に現れていることが確認できる。
【００６９】
次に、図２８（Ａ）、（Ｂ）は、表１の成膜条件で成膜した窒化珪素膜を誘電体としたＭＯＳ構造のＢＴストレス試験前後におけるＣ−Ｖ特性である。図２８（Ａ）、（Ｂ）の違いは、図２８（Ａ）が表面電極にＡｌ−Ｓｉ（シリコンを添加したアルミニウム膜）電極を用いるのに対し、図２８（Ｂ）が表面電極にＡｌ−Ｌｉ（リチウムを添加したアルミニウム膜）電極を用いる点である。尚、図２８（Ｂ）の結果は、図２９（Ｂ）に示すＭＯＳ構造の測定結果である。ここで熱酸化膜との積層構造としたのは、窒化珪素膜とシリコン基板との間の界面準位の影響を低減するためである。
【００７０】
図２８（Ａ）、（Ｂ）の両グラフを比較すると、両グラフともにＢＴストレス試験前後におけるＣ−Ｖ特性のシフトは殆ど差がなく、リチウム拡散の影響が現れていないこと、即ち、表１の成膜条件で成膜した窒化珪素膜が効果的にブロッキング膜として機能していることが確認できる。
【００７１】
このように、本発明に用いる無機絶縁層は、非常に緻密でＮａやＬｉといった可動元素に対するブロッキング効果が高いため、平坦化膜からの脱ガス成分の拡散を抑制すると共に、Ａｌ−Ｌｉ電極等からのＬｉ拡散を効果的に抑制することで信頼性の高い表示装置を実現することができる。緻密である理由として、本発明者らは、単結晶シリコンターゲットの表面で薄い窒化シリコン膜が形成され、その窒化シリコン膜が基板へ積層されて成膜されるため、膜中にシリコンクラスタが混入されにくくなった結果として緻密になるのではないかと推測している。
【００７２】
また、室温から２００℃程度の低温下のスパッタ法で成膜されるため、本発明のバリア膜として用いる場合のように、樹脂膜の上に成膜できる点においてプラズマＣＶＤ法よりも有利である。尚、上述した窒化珪素膜は、ゲート絶縁膜を積層膜で形成する場合において、その一部に用いることもできる。
【００７３】
【実施例】
［実施例１］
本実施例は図１に示す発光装置を作製する工程について、図面を参照しながら詳細に説明する。
【００７４】
図８（Ａ）において、基板１０１はガラス基板、石英基板、セラミック基板などを用いることができる。また、珪素基板、金属基板又はステンレス基板の表面に絶縁膜を形成したものを用いても良い。また、本実施例の処理温度に耐えうる耐熱性を有するプラスチック基板を用いてもよい。
【００７５】
基板１０１上に酸化珪素膜、窒化珪素膜又は酸化窒化珪素膜（ＳｉＯ_ｘＮ_ｙ）等の絶縁膜から成る第１無機絶縁体層１０２を形成する。代表的な一例は２層構造を有し、ＳｉＨ_４、ＮＨ_３、及びＮ_２Ｏを反応ガスとして成膜される第１酸化窒化珪素膜を５０ｎｍ、ＳｉＨ_４、及びＮ_２Ｏを反応ガスとして成膜される第２酸化窒化珪素膜を１００ｎｍの厚さに積層形成する構造とする。
【００７６】
活性層とする半導体膜は、第１無機絶縁体層１０２上に形成した非晶質半導体膜を結晶化して得る。非晶質半導体膜は３０〜６０ｎｍの厚さで形成し、加熱処理やレーザー光の照射により結晶化させる。非晶質半導体膜の材料に限定はないが、好ましくは珪素又はシリコンゲルマニウム（Ｓｉ_１−ｘＧｅ_ｘ；０＜ｘ＜１、代表的には、ｘ＝０．００１〜０．０５）合金などで形成すると良い。
【００７７】
代表的な一例は、プラズマＣＶＤ法によりＳｉＨ_４ガスを用いて、非晶質珪素膜を５４ｎｍの厚さに形成する。結晶化は、パルス発振型又は連続発振型のエキシマレーザーや、Ｃｒ、Ｎｄ、Ｅｒ、Ｈｏ、Ｃｅ、Ｃｏ、Ｔｉ又はＴｍをドーピングしたＹＡＧレーザー、ＹＶＯ_４レーザー、ＹＬＦレーザーを用いることができる。ＹＡＧレーザー、ＹＶＯ_４レーザー、ＹＬＦレーザーを用いる場合には、その第２高調波〜第４高調波を利用する。これらのレーザーを用いる場合には、レーザー発振器から放出されたレーザー光を光学系で線状に集光し半導体膜に照射する方法を用いると良い。結晶化の条件は、実施者が適宜選択すればよい。
【００７８】
結晶化法として、ニッケルなどの半導体の結晶化に対し触媒作用のある金属元素を添加して結晶化させても良い。例えば、ニッケルを含有する溶液を非晶質珪素膜上に保持させた後、脱水素化（５００℃、１時間）続けて熱結晶化（５５０℃、４時間）を行い、更に結晶性を向上させるためＹＡＧレーザー、ＹＶＯ_４レーザー、ＹＬＦレーザーから選ばれた連続発振レーザー光の第２高調波を照射する。
【００７９】
その後、得られた結晶性半導体膜をフォトマスク（１）を用いて写真蝕刻法により所望の形状にエッチング処理し、島状に分離された半導体層１０３〜１０７を形成する。尚、図１２はこの段階における画素の上面図を示している。
【００８０】
また、非晶質半導体膜を結晶化した後、ＴＦＴのしきい値を制御するためにｐ型を付与する不純物元素を添加してもよい。半導体に対してｐ型を付与する不純物元素には、ボロン（Ｂ）、アルミニウム（Ａｌ）、ガリウム（Ｇａ）など周期律第１３族元素が知られている。
【００８１】
次いで、図８（Ｂ）で示すように、島状に分離された半導体層１０３〜１０７を覆うゲート絶縁膜１０８を形成する。ゲート絶縁膜１０８はプラズマＣＶＤ法やスパッタ法で、酸化珪素又は酸化窒化珪素などの無機絶縁体材料を用いて形成し、その厚さを４０〜１５０ｎｍとして珪素を含む絶縁膜で形成する。勿論、このゲート絶縁膜は、珪素を含む絶縁膜を単層或いは積層構造として用いることができる。
【００８２】
ゲート絶縁膜１０８上には、ゲート電極を形成する目的で、膜厚１０〜５０ｎｍの窒化タンタル（ＴａＮ）から成る第１導電膜１０と、膜厚１００〜４００ｎｍのタングステン（Ｗ）から成る第２導電膜１１とを積層形成する。ゲート電極を形成するための導電性材料としてはＴａ、Ｗ、Ｔｉ、Ｍｏ、Ａｌ、Ｃｕから選ばれた元素、又は当該元素を主成分とする合金材料もしくは化合物材料で形成する。また、リン等の不純物元素をドーピングした多結晶珪素膜に代表される半導体膜を用いてもよい。また、第１導電膜をタンタル（Ｔａ）膜で形成し、第２導電膜をＷ膜とする組み合わせ、第１導電膜を窒化タンタル（ＴａＮ）膜で形成し、第２導電膜をＡｌ膜とする組み合わせ、第１導電膜を窒化タンタル（ＴａＮ）膜で形成し、第２導電膜をＣｕ膜とする組み合わせとしてもよい。
【００８３】
次に、図８（Ｃ）に示すようにフォトマスク（２）を用い、写真蝕刻法によりゲート電極パターンが形成されるマスク１２を形成する。その後、ドライエッチング法により第１エッチング処理を行う。エッチングには例えばＩＣＰ（Ｉｎｄｕｃｔｉｖｅｌｙ　Ｃｏｕｐｌｅｄ　Ｐｌａｓｍａ：誘導結合型プラズマ）エッチング法が適用される。エッチング用ガスに限定はないが、ＷやＴａＮのエッチングにはＣＦ_４とＣｌ_２とＯ_２とを用いると良い。第１エッチング処理では、基板側には所定のバイアス電圧を印加して、形成される電極パターン１３〜１７の側面に１５〜５０度の傾斜角を持たせる。第１エッチング処理によりこの絶縁膜表面の露出している領域は同時にエッチングが進み１０〜３０ｎｍ程度薄くなる領域が形成される。
【００８４】
この後、第２エッチング条件に変え、エッチング用ガスにＳＦ_６とＣｌ_２とＯ_２とを用い、基板側に印加するバイアス電圧を所定の値として、Ｗ膜の異方性エッチングを行う。こうして、ゲート電極１１０〜１１３及び、入力端子部の配線１０９を形成する。その後、マスク１２は除去する。第２エッチング処理によりこの絶縁膜表面の露出している領域は同時にエッチングが進みさらに１０〜３０ｎｍ程度薄くなる領域が形成される。尚、図１３はこの段階における画素の上面図を示している。
【００８５】
ゲート電極が形成された後、図９（Ａ）で示すように第１ドーピング処理を行い、半導体層に第１ｎ型不純物領域１８〜２２を形成する。この第１ｎ型不純物領域はゲート電極がマスクとなり自己整合的に形成されるものである。ドーピング条件は適宜設定すれば良いが、水素希釈５％のＰＨ_３を用い、５０ｋＶ、６×１０^１３／ｃｍ^２のドーズ量で注入する。
【００８６】
次いで、図９（Ｂ）に示すように、フォトマスク（３）を用い、写真蝕刻法によりマスク２３を形成し第２ドーピング処理を行う。第２ドーピング処理は水素希釈５％のＰＨ_３を用い、６５ｋＶ、３×１０^１５／ｃｍ^２のドーズ量で行い、第２ｎ型不純物領域２４、２５と第３ｎ型不純物領域２６を形成する。半導体層１０３にはゲート電極がマスクとなり自己整合的に形成されるものであり、ゲート電極の外側に形成される第２ｎ型不純物領域２４と、ゲート電極と重なる位置に形成される第３ｎ型不純物領域２６が形成される。半導体層１０５にはマスク２３により形成される第２ｎ型不純物領域２５が形成される。
【００８７】
図９（Ｃ）では、フォトマスク（４）を用い、写真蝕刻法によりマスク２７を形成し第３ドーピング処理を行う。第３のドーピング処理は、水素希釈５％のＢ_２Ｈ_６を用い、８０ｋＶ、２×１０^１６／ｃｍ^２のドーズ量で行い、半導体層１０４、１０６、１０７にｐ型不純物領域２８〜３０を形成する。
【００８８】
以上までの工程でそれぞれの半導体層にｎ型又はｐ型の導電型を有する不純物領域が形成される。図１０（Ａ）で示すように、半導体層１０３において第２ｎ型不純物領域２４はソース又はドレイン領域、第３ｎ型不純物領域２６はＬＤＤ領域として機能する。半導体層１０４においてｐ型不純物領域２８はソース又はドレイン領域として機能する。半導体層１０５において、第２ｎ型不純物領域２５はソース又はドレイン領域として機能し、第１ｎ型不純物領域２０はＬＤＤ領域として機能する。半導体層１０６において、ｐ型不純物領域２９はソース又はドレイン領域として機能する。
【００８９】
そして、ほぼ全面を覆う第２無機絶縁体層１１４を形成する。第２無機絶縁体層１１４は、プラズマＣＶＤ法又はスパッタ法を用い、厚さを１００〜２００ｎｍとして珪素と水素を含む無機絶縁体材料で形成する。その好適な一例は、プラズマＣＶＤ法によりＳｉＨ_４、Ｎ_２Ｏ、ＮＨ_３、Ｈ_２を用いて形成する膜厚１００ｎｍの酸化窒化珪素膜である。その後、窒素雰囲気中にて４１０℃で１時間の熱処理を行う。この熱処理は酸化窒化珪素膜を水素の供給源とする水素化処理を目的としている。
【００９０】
次いで、図１０（Ｂ）に示すように、第２無機絶縁体層１１４上に第１有機絶縁体層１１５を０．５〜１μｍの厚さで形成する。有機絶縁体材料としては熱硬化型のアクリル材料を用い、スピン塗布後、２５０℃で焼成することにより平坦性のある被膜を形成することができる。さらにその上に、第３無機絶縁体層１１６を５０〜１００ｎｍの厚さで形成する。
【００９１】
第３無機絶縁体層１１６を形成するに当たっては、第２有機絶縁体層１１４が形成された基板を減圧下において８０〜２００℃で加熱処理を行い脱水処理をする。第３無機絶縁体層１１６はを形成するのに適した材料の一例は、珪素をターゲットとして用い、スパッタリング法により作製される窒化珪素膜である。成膜条件は適宜選択すれば良いが、特に好ましくはスパッタガスには窒素（Ｎ_２）又は窒素とアルゴンの混合ガスを用い、高周波電力を印加してスパッタリングを行う。基板温度は室温〜２００℃の範囲で行うことができる。
【００９２】
次いで、図１０（Ｃ）に示すように、フォトマスク（５）を用い、写真蝕刻によりマスクパターンを形成し、ドライエッチングによりコンタクトホール３０及び入力端子部の開口３１を形成する。ドライエッチングの条件は、ＣＦ_４、Ｏ_２、Ｈｅを用いて第３無機絶縁体層１１６と第１有機絶縁体層１１５とをエッチングし、その後、ＣＨＦ_３を用いて第２無機絶縁体層とゲート絶縁膜をエッチングする。
【００９３】
その後、図１１（Ａ）で示すように、Ａｌ、Ｔｉ、Ｍｏ、Ｗなどを用いて配線及び画素電極を形成する。配線の形成にはフォトマスク（６）を用いる。例えば、膜厚５０〜２５０ｎｍのＴｉ膜と、膜厚３００〜５００ｎｍの合金膜（ＡｌとＴｉとの合金膜）との積層膜を用いる。こうして、配線１１７〜１２５を形成する。そして、３０〜１２０ｎｍのＩＴＯをスパッタリング法で形成し、フォトマスク（７）を用いて写真蝕刻により所定のパターンに形成する。これにより、発光素子の陽極層１２６が形成され、また、入力端子部において配線上にＩＴＯ膜１２７が形成される。尚、図１４はこの段階における画素の上面図を示している。
【００９４】
さらに図１１（Ｂ）で示すように、第２有機絶縁体層１２８を形成する。これは第１有機絶縁体層１１５と同様にアクリル材料を用いて形成する。そして、フォトマスク（８）を用いて陽極層１２６上、陰極層の接続部３１０、及び入力端子部に開口部を形成する。第２有機絶縁体層１２８は、陽極層１２６の端部を覆うように形成しその側壁の傾斜角を４０度とする。
【００９５】
有機絶縁体材料は吸湿性があり、水分を吸蔵する性質を持っている。水分の吸蔵及び再放出を防ぐため、第２有機絶縁体層１２８の上に第４無機絶縁体層１２９を１０〜１００ｎｍの厚さで形成する。第４無機絶縁体層１２９は窒化物で成る無機絶縁体材料をもって形成する。第４無機絶縁体層１２９は、スパッタリング法により作製される窒化珪素膜を用いる。これは第３無機絶縁体層１１６と同様なものが適用される。第４無機絶縁体層１２９は、第２有機絶縁体層１２８の上面及び側面を覆って形成され、陽極層１２６に重なる端部をテーパー形状となるように形成する。入力端子部において、第２有機絶縁体層１２８に形成した開口の側面部に回り込ませてこの第４無機絶縁体層１２９を形成することにより、この部分からの水分のしみ込みを防止することができる。
【００９６】
その後、発光体を含む有機化合物層１３０を形成する。発光体を含む有機化合物層上には、スパッタリング法又は抵抗加熱蒸着法により陰極層１３１を形成する。陰極材料としてフッ化カルシウム又はフッ化セシウムを真空蒸着法により被着させ、陰極層１３１を形成する。
【００９７】
陰極１３１は仕事関数が３．５ｅＶ以下の材料であるフッ化リチウムと、アルミニウムの積層構造とする。スパッタリング法では、スパッタガスに希ガス（代表的にはアルゴン）を用いる。スパッタガスのイオンは電界で加速されてターゲットと衝突するものの他に、基板側に生じる弱いシース電界でも加速されて、陰極の下地にある発光体を含む有機化合物層１３０に注入される。その希ガス元素は、有機化合物層の格子間に位置することで、有機化合物中の分子又は原子が変位するのを防ぎ、有機化合物の安定性を向上する。また、陰極１３１上に形成する第５無機絶縁体層１３２は、窒化珪素膜やＤＬＣ膜で形成する。これも同様にスパッタリング法で形成する場合、希ガス（代表的にはアルゴン）のイオンが基板側にある弱いシース電界により加速され、陰極１３１を通過してその下層にある有機化合物層１３０に注入される。そして、有機化合物の安定性が向上する効果を得ることが可能となる。
【００９８】
最後に、シールパターンなどを形成し、封止板を固着することにより図１で示す発光装置を作製することができる。
【００９９】
［実施例２］
本実施例は、画素部の構成が実施例１と異なる態様を図３１と図３２に例示する。尚、本実施例では図１で示す第３無機絶縁体層１１６、配線１２３、陽極層１２６までは同じ工程で形成する。
【０１００】
図３１（Ａ）は陽極層１２６の端部を覆う第２有機絶縁体層１８０を感光性でネガ型のアクリル樹脂で形成する。これにより、第２有機絶縁体層１８０が配線１２６と接する端部は図で示すように曲率を有する傾斜面となり、その形状は少なくとも２つの曲率Ｒ１、Ｒ２で表すことができる。ここでＲ１は中心点が配線の上層側にあり、Ｒ２は下層側にあることになる。この形状は露光条件によっても若干変化するが、膜厚は１．５μｍであり、Ｒ１、Ｒ２の値は０．２〜２μｍとなる。いずれにしても連続的に曲率が変化する傾斜面が形成される。
【０１０１】
その後、図３１（Ｂ）で示すようにこのなだらかな曲率を有する傾斜面に沿って第４無機絶縁体層１２９、有機化合物層１３０、陰極層１３１、第５無機絶縁体層１３２を形成する。この第２有機絶縁体層１８０の断面形状は、応力を緩和する作用（特に図中点線で囲む、陽極層１２６、第４無機絶縁体層１２９、有機化合物層１３０が重なる領域）があり、これにより発光素子がこの端部から劣化するのを抑えること可能となる。即ち画素の周辺から劣化して非発光領域が拡大する進行性の劣化を抑制することができる。
【０１０２】
図３２（Ａ）は、感光性のネガ型アクリル樹脂に換えて、感光性のポジ型アクリル樹脂で第２有機絶縁体層１８１を形成した例であり、この場合端部における断面形状が異なっている。曲率半径Ｒ３は０．２〜２が得られ、その中心点は陽極層１２６の下層側に位置する。これを形成した後、図３２（Ｂ）に示すように曲率を有する傾斜面の沿って第４無機絶縁体層１２９、陰有機化合物層１３０、陰極層１３１、第５無機絶縁体層１３２を形成する。この場合も同様な効果を得ることができる。
【０１０３】
本実施例は実施例１及び２と組み合わせて実施することができる。
【０１０４】
［実施例３］
実施例１又は２において、発光素子３０９における有機化合物層の構成に特段の限定事項はなく、公知の構成を用いることができる。有機化合物層１３０は、発光層、正孔注入層、電子注入層、正孔輸送層、電子輸送層等が含まれ、これらの層が積層された形態又はこれらの層を形成する材料の一部又は全部が混合された形態をとることができる。具体的に、発光層、正孔注入層、電子注入層、正孔輸送層、電子輸送層等が含まれる。基本的にＥＬ素子は、陽極／発光層／陰極が順に積層された構造を有しており、この構造に加えて、陽極／正孔注入層／発光層／陰極や、陽極／正孔注入層／発光層／電子輸送層／陰極等の順に積層した構造を有していても良い。
【０１０５】
発光層は典型的には有機化合物を用いて形成するが、有機化合物又は無機化合物を含む電荷注入輸送物質及び発光材料で形成され、その分子数から低分子系有機化合物、中分子系有機化合物、高分子系有機化合物から選ばれた一種又は複数種の層を含み、電子注入輸送性又は正孔注入輸送性の無機化合物と組み合わせても良い。尚、中分子とは昇華性を有さず、分子数が２０以下、又は連鎖する分子の長さが１０μｍ以下の有機化合物を指していう。
【０１０６】
発光材料は、低分子系有機化合物としてトリス−８−キノリノラトアルミニウム錯体やビス（ベンゾキノリノラト）ベリリウム錯体等の金属錯体をはじめ、フェニルアントラセン誘導体、テトラアリールジアミン誘導体、ジスチリルベンゼン誘導体等が適用可能であり、これをホスト物質としてクマリン誘導体、ＤＣＭ、キナクリドン、ルブレン等が適用され、その他公知の材料を適用することが可能である。高分子系有機化合物としては、ポリパラフェニレンビニレン系、ポリパラフェニレン系、ポリチオフェン系、ポリフルオレン系等があり、ポリ（パラフェニレンビニレン）（ｐｏｌｙ（ｐ−ｐｈｅｎｙｌｅｎｅ　ｖｉｎｙｌｅｎｅ））：（ＰＰＶ）、ポリ（２，５−ジアルコキシ−１，４−フェニレンビニレン）（ｐｏｌｙ（２，５−ｄｉａｌｋｏｘｙ−１，４−ｐｈｅｎｙｌｅｎｅ　ｖｉｎｙｌｅｎｅ））：（ＲＯ−ＰＰＶ）、ポリ（２−（２’−エチル−ヘキソキシ）−５−メトキシ−１，４−フェニレンビニレン）（ｐｏｌｙ［２−（２’−ｅｔｈｙｌｈｅｘｏｘｙ）−５−ｍｅｔｈｏｘｙ−１，４−ｐｈｅｎｙｌｅｎｅ　ｖｉｎｙｌｅｎｅ］）：（ＭＥＨ−ＰＰＶ）、ポリ（２−（ジアルコキシフェニル）−１，４−フェニレンビニレン）（ｐｏｌｙ［２−（ｄｉａｌｋｏｘｙｐｈｅｎｙｌ）−１，４−ｐｈｅｎｙｌｅｎｅ　ｖｉｎｙｌｅｎｅ］）：（ＲＯＰｈ−ＰＰＶ）、ポリパラフェニレン（ｐｏｌｙ［ｐ−ｐｈｅｎｙｌｅｎｅ］）：（ＰＰＰ）、ポリ（２，５−ジアルコキシ−１，４−フェニレン）（ｐｏｌｙ（２，５−ｄｉａｌｋｏｘｙ−１，４−ｐｈｅｎｙｌｅｎｅ））：（ＲＯ−ＰＰＰ）、ポリ（２，５−ジヘキソキシ−１，４−フェニレン）（ｐｏｌｙ（２，５−ｄｉｈｅｘｏｘｙ−１，４−ｐｈｅｎｙｌｅｎｅ））、ポリチオフェン（ｐｏｌｙｔｈｉｏｐｈｅｎｅ）：（ＰＴ）、ポリ（３−アルキルチオフェン）（ｐｏｌｙ（３−ａｌｋｙｌｔｈｉｏｐｈｅｎｅ））：（ＰＡＴ）、ポリ（３−ヘキシルチオフェン）（ｐｏｌｙ（３−ｈｅｘｙｌｔｈｉｏｐｈｅｎｅ））：（ＰＨＴ）、ポリ（３−シクロヘキシルチオフェン）（ｐｏｌｙ（３−ｃｙｃｌｏｈｅｘｙｌｔｈｉｏｐｈｅｎｅ））：（ＰＣＨＴ）、ポリ（３−シクロヘキシル−４−メチルチオフェン）（ｐｏｌｙ（３−ｃｙｃｌｏｈｅｘｙｌ−４−ｍｅｔｈｙｌｔｈｉｏｐｈｅｎｅ））：（ＰＣＨＭＴ）、ポリ（３，４−ジシクロヘキシルチオフェン）（ｐｏｌｙ（３，４−ｄｉｃｙｃｌｏｈｅｘｙｌｔｈｉｏｐｈｅｎｅ））：（ＰＤＣＨＴ）、ポリ［３−（４−オクチルフェニル）−チオフェン］（ｐｏｌｙ［３−（４ｏｃｔｙｌｐｈｅｎｙｌ）−ｔｈｉｏｐｈｅｎｅ］）：（ＰＯＰＴ）、ポリ［３−（４−オクチルフェニル）−２，２ビチオフェン］（ｐｏｌｙ［３−（４−ｏｃｔｙｌｐｈｅｎｙｌ）−２，２−ｂｉｔｈｉｏｐｈｅｎｅ］）：（ＰＴＯＰＴ）、ポリフルオレン（ｐｏｌｙｆｌｕｏｒｅｎｅ）：（ＰＦ）、ポリ（９，９−ジアルキルフルオレン）（ｐｏｌｙ（９，９−ｄｉａｌｋｙｌｆｌｕｏｒｅｎｅ）：（ＰＤＡＦ）、ポリ（９，９−ジオクチルフルオレン）（ｐｏｌｙ（９，９−ｄｉｏｃｔｙｌｆｌｕｏｒｅｎｅ）：（ＰＤＯＦ）等が挙げられる。
【０１０７】
無機化合物材料を電荷注入輸送層に適用しても良く、ダイヤモンド状カーボン（ＤＬＣ）、Ｓｉ、Ｇｅ、及びこれらの酸化物又は窒化物であり、Ｐ、Ｂ、Ｎ等が適宜ドーピングされていても良い。またアルカリ金属又はアルカリ土類金属の、酸化物、窒化物又はフッ化物や、当該金属と少なくともＺｎ、Ｓｎ、Ｖ、Ｒｕ、Ｓｍ、Ｉｎの化合物又は合金であっても良い。
【０１０８】
以上に掲げる材料は一例であり、これらを用いて正孔注入輸送層、正孔輸送層、電子注入輸送層、電子輸送層、発光層、電子ブロック層、正孔ブロック層等の機能性の各層を適宜積層することで発光素子を形成することができる。また、これらの各層を合わせた混合層又は混合接合を形成しても良い。エレクトロルミネッセンスには一重項励起状態から基底状態に戻る際の発光（蛍光）と三重項励起状態から基底状態に戻る際の発光（リン光）とがあるが、本発明に係るエレクトロルミネセンス素子はいずれか一方の発光を用いていても良いし、又は両方の発光を用いていても良い。
【０１０９】
本実施例は実施例１〜３と組み合わせて実施することができる。
【０１１０】
［実施例４］
実施例１において発光素子３０９の陽極層１２６と陰極層１３１を反転させた構成とすることもできる。この場合、積層順は陰極層１２６、有機化合物層１３０、陽極層１３１という順番になる。陽極層１２６としてはＩＴＯの他、仕事関数が４ｅＶ以上の窒化物金属（例えば、窒化チタン）を１０〜３０ｎｍの厚さで形成して透光性を持たせることで代用することもできる。また、陰極層１３１の構成としては１０〜３０ｎｍのアルミニウム層上に０．５〜５ｎｍのフッ化リチウム層を形成しても良い。
【０１１１】
本実施例は実施例１〜４と組み合わせて実施することができる。
【０１１２】
［実施例５］
本実施例は、実施例１でＴＦＴに適用する半導体層の作製方法の一実施例を図１８を用いて説明する。本実施例は、絶縁表面上に形成された非晶質珪素膜に連続発振レーザー光を走査して結晶化させるものである。
【０１１３】
図１８（Ａ）において、ガラス基板４０１上に１００ｎｍの酸化窒化珪素膜でなるバリア層４０２が形成されている。その上にプラズマＣＶＤ法で形成された非晶質珪素膜４０３が５４ｎｍの厚さに形成されている。
【０１１４】
レーザー光はＮｄ：ＹＶＯ_４レーザー発振装置から連続発振により放射される連続光であり、波長変換素子により得られる第２高調波（５３２ｎｍ）である。連続発振レーザー光は光学系により長楕円形状に集光され、基板４０１とレーザー光４０５の照射位置を相対的に移動させることにより非晶質珪素膜４０３を結晶化させ結晶性珪素膜４０４を形成する。光学系としてはＦ２０のシリンドリカルレンズが適用され、これによりΦ２．５ｍｍのレーザー光を照射面において長軸２．５ｍｍ、短軸２０μｍの長楕円形状とすることができる。
【０１１５】
勿論、レーザー発振装置としては他を適用することも可能であり、連続発振の固体レーザー発振装置としてはＹＡＧ、ＹＶＯ_４、ＹＬＦ、ＹＡｌＯ_３などの結晶にＣｒ、Ｎｄ、Ｅｒ、Ｈｏ、Ｃｅ、Ｃｏ、Ｔｉ又はＴｍをドープした結晶を使ったレーザー発振装置を適用することができる。
【０１１６】
Ｎｄ：ＹＶＯ_４レーザー発振装置の第２高調波（５３２ｎｍ）を用いる場合、当該波長はガラス基板４０１及びバリア層４０２を透過するので、図１８（Ｂ）で示すようにガラス基板４０１側からレーザー光４０６を照射しても良い。
【０１１７】
こうして、レーザー光４０５が照射された領域から結晶化が進み、結晶性珪素膜４０４を形成することができる。レーザー光の走査は一方向のみの走査でなく、往復走査をしても良い。往復走査する場合には１回の走査毎にレーザーエネルギー密度を変えて、段階的に結晶成長をさせることも可能である。また、非晶質珪素膜を結晶化させる場合にしばしば必要となる水素出しの処理を兼ねることも可能であり、最初に低エネルギー密度で走査し、水素を放出した後、エネルギー密度を上げて２回目の走査で結晶化を完遂させても良い。このような作製方法によっても同様にレーザー光の走査方向に結晶粒が延在する結晶性半導体膜を得ることができる。その後、島状に分割した半導体層を形成し、実施例１に適用することができる。
【０１１８】
尚、本実施例で示す構成は一例であり、同様な効果が得られるものであれば他のレーザー発振装置や光学系との組み合わせを適用しても良い。
【０１１９】
［実施例６］
本実施例は、実施例１でＴＦＴに適用する半導体層の作製方法の一実施例を図１９を用いて説明する。本実施例は、絶縁表面上に形成された非晶質珪素膜を予め結晶化しておき、さらに連続発振レーザー光により結晶の大粒径化を図るものである。
【０１２０】
図１９（Ａ）に示すように、実施例１と同様にガラス基板５０１上にブロッキング層５０２、非晶質珪素膜５０３を形成する。その後、結晶化温度の低温化と結晶成長を促進させる金属元素としてＮｉを添加するため、酢酸ニッケル塩が５ｐｐｍの水溶液をスピン塗布して触媒元素含有層５０４を形成する。
【０１２１】
その後、図１９（Ｂ）で示すように５８０℃、４時間の加熱処理により非晶質珪素膜を結晶化させる。結晶化はＮｉの作用により非晶質珪素膜中にシリサイドを形成しながら拡散してそれと同時に結晶成長する。こうして形成された結晶性珪素膜５０６は棒状又は針状の結晶が集合して成り、その各々の結晶は巨視的にはある特定の方向性をもって成長しているため結晶方位が揃っている。また、（１１０）面の配向率が高いという特徴がある。
【０１２２】
その後、図１９（Ｃ）で示すように連続発振レーザー光５０８を走査して結晶性珪素膜５０６の結晶性を向上させる。レーザー光の照射により結晶性珪素膜は溶融し再結晶化する。この再結晶化に伴って、レーザー光の走査方向に結晶粒が延在するように結晶成長が成される。この場合、予め結晶面が揃った結晶性珪素膜が形成されているので、異なる面の結晶の析出や転位の発生を防ぐことができる。その後、島状に分割した半導体層を形成し、実施例１に適用することができる。
【０１２３】
［実施例７］
本実施例は、実施例１でＴＦＴに適用する半導体層の作製方法の一実施例を図２０を用いて説明する。
【０１２４】
図２０（Ａ）に示すように、実施例１と同様にガラス基板５１１上にブロッキング層５１２、非晶質珪素膜５１３を形成する。その上にマスク絶縁膜５１４として１００ｎｍの酸化珪素膜をプラズマＣＶＤ法で形成し、開口部５１５を設ける。その後、触媒元素としてＮｉを添加するため、酢酸ニッケル塩が５ｐｐｍの水溶液をスピン塗布する。Ｎｉは開口部５１５で非晶質珪素膜と接する。
【０１２５】
その後、図２０（Ｂ）で示すように５８０℃、４時間の加熱処理により非晶質珪素膜を結晶化させる。結晶化は触媒元素の作用により、開口部５１５から基板表面と平行な方向に成長する。こうして形成された結晶性珪素膜５１７は棒状又は針状の結晶が集合して成り、その各々の結晶は巨視的にはある特定の方向性をもって成長しているため、結晶方位が揃っている。また、特定方位の配向率が高いという特徴がある。
【０１２６】
加熱処理が終了したらマスク絶縁膜５１４をエッチング除去することにより図２０（Ｃ）で示すような結晶性珪素膜５１７を得ることができる。その後、島状に分割した半導体層を形成し、実施例１に適用することができる。
【０１２７】
［実施例８］
実施例６又は７において、結晶性珪素膜５０７又は５１７を形成した後、膜中に１０^１９ａｔｏｍｓ／ｃｍ^３以上の濃度で残存する触媒元素をゲッタリングにより除去する工程を加えても良い。
【０１２８】
図２１で示すように、結晶性珪素膜５０７上に、薄い酸化珪素膜で成るバリア層５０９を形成し、その上にゲッタリングサイト５１０としてアルゴン又はリンが１×１０^２０ａｔｏｍｓ／ｃｍ^３〜１×１０^２１ａｔｏｍｓ／ｃｍ^３添加された非晶質珪素膜をスパッタリング法で形成する。
【０１２９】
その後、ファーネスアニール炉による６００℃、１２時間の加熱処理、又はランプ光又は加熱された気体を加熱手段とするＲＴＡにより６５０〜８００℃、３０〜６０分の加熱処理により、触媒元素として添加されているＮｉをゲッタリングサイト５１０に偏析させることができる。この処理により結晶性珪素膜５０７の触媒元素濃度は１０^１７ａｔｏｍｓ／ｃｍ^３以下とすることができる。
【０１３０】
同様な条件で行われるゲッタリング処理は実施例５で作製される結晶性珪素膜に対しても有効である。非晶質珪素膜にレーザー光を照射して形成される結晶性珪素膜中に含まれる微量の金属元素をこのゲッタリング処理で除去することができる。
【０１３１】
［実施例９］
実施例１に例示した、画素部と駆動回路部とがガラス基板上に一体形成されたＥＬパネルをモジュール化する一形態を図２３に示す。図２３（Ａ）は当該ＥＬパネルに電源回路等を含むＩＣが実装された状態にあるＥＬモジュールを示している。
【０１３２】
図２３（Ａ）において、ＥＬパネル８００には、発光素子が各画素に設けられた画素部６０３と、前記画素部８０３が有する画素を選択する走査線駆動回路８０４と、選択された画素にビデオ信号を供給する信号線駆動回路８０５とが設けられている。またプリント基板８０６にはコントローラ８０１、電源回路８０２が設けられており、コントローラ８０１又は電源回路８０２から出力された各種信号及び電源電圧は、ＦＰＣ８０７を介してＥＬパネル８００の画素部８０３、走査線駆動回路８０４、信号線駆動回路８０５に供給される。
【０１３３】
プリント基板８０６への電源電圧及び各種信号は、複数の入力端子が配置されたインターフェース（Ｉ／Ｆ）部８０８を介して供給される。なお、本実施例ではＥＬパネル８００にプリント基板８０６がＦＰＣを用いて実装されているが、必ずしもこの構成に限定されない。ＣＯＧ（Ｃｈｉｐ　ｏｎ　Ｇｌａｓｓ）方式を用い、コントローラ８０１、電源回路８０２をＥＬパネル８００に直接実装させるようにしても良い。また、プリント基板８０６において、引きまわしの配線間に形成される容量や配線自体が有する抵抗等によって、電源電圧や信号にノイズが入り、信号の立ち上がりが鈍ったりすることがある。そこで、プリント基板８０６にコンデンサ、バッファ等の各種素子を設けて、電源電圧や信号にノイズがのったり、信号の立ち上がりが鈍ったりするのを防ぐようにしても良い。
【０１３４】
図２３（Ｂ）に、プリント基板８０６の構成をブロック図で示す。インターフェース８０８に供給された各種信号と電源電圧は、コントローラ８０１と、電源電圧８０２に供給される。コントローラ８０１は、Ａ／Ｄコンバータ８０９と、位相ロックドループ（ＰＬＬ：Ｐｈａｓｅ　Ｌｏｃｋｅｄ　Ｌｏｏｐ）８１０と、制御信号生成部８１１と、ＳＲＡＭ（Ｓｔａｔｉｃ　Ｒａｎｄｏｍ　Ａｃｃｅｓｓ　Ｍｅｍｏｒｙ）８１２、８１３とを有している。なお本実施例ではＳＲＡＭを用いているが、ＳＲＡＭの代わりに、ＳＤＲＡＭや、高速でデータの書き込みや読み出しが可能であるならばＤＲＡＭ（Ｄｙｎａｍｉｃ　Ｒａｎｄｏｍ　Ａｃｃｅｓｓ　Ｍｅｍｏｒｙ）も用いることが可能である。
【０１３５】
インターフェース８０８を介して供給されたビデオ信号は、Ａ／Ｄコンバータ８０９においてパラレル−シリアル変換され、Ｒ、Ｇ、Ｂの各色に対応するビデオ信号として制御信号生成部８１１に入力される。また、インターフェース８０８を介して供給された各種信号をもとに、Ａ／Ｄコンバータ８０９においてＨｓｙｎｃ信号、Ｖｓｙｎｃ信号、クロック信号ＣＬＫ、交流電圧（ＡＣ　Ｃｏｎｔ）が生成され、制御信号生成部８１１に入力される。
【０１３６】
位相ロックドループ８１０では、インターフェース８０８を介して供給される各種信号の周波数と、制御信号生成部８１１の動作周波数の位相とを合わせる機能を有している。制御信号生成部８１１の動作周波数は、インターフェース８０８を介して供給された各種信号の周波数と必ずしも同じではないが、互いに同期するように制御信号生成部８１１の動作周波数を位相ロックドループ８１０において調整する。制御信号生成部８１１に入力されたビデオ信号は、一旦ＳＲＡＭ８１２、８１３に書き込まれ、保持される。制御信号生成部８１１では、ＳＲＡＭ８１２に保持されている全ビットのビデオ信号のうち、全画素に対応するビデオ信号を１ビット分づつ読み出し、ＥＬパネル８００の信号線駆動回路８０５に供給する。
【０１３７】
また制御信号生成部８１１では、各ビット毎の、発光素子が発光する期間に関する情報を、ＥＬパネル８００の走査線駆動回路８０４に供給する。電源回路８０２は所定の電源電圧をＥＬパネル８００の信号線駆動回路８０５、走査線駆動回路８０４及び画素部８０３に供給する。
【０１３８】
このようなＥＬモジュールを組み込んだ電子機器の一例を図２２に示す。
【０１３９】
図２２（Ａ）はこのＥＬモジュールをテレビ受像器に組み込んだ一例であり、筐体３００１、支持台３００２、表示部３００３等により構成されている。本発明により作製されるＴＦＴ基板は表示部３００３に適用され、本発明によりテレビ受像器を完成させることができる。
【０１４０】
図２２（Ｂ）はこのＥＬモジュールでビデオカメラを作製する一例であり、本体３０１１、表示部３０１２、音声入力部３０１３、操作スイッチ３０１４、バッテリー３０１５、受像部３０１６等により構成されている。本発明により作製されるＴＦＴ基板は表示部３０１２に適用され、本発明によりビデオカメラを完成させることができる。
【０１４１】
図２２（Ｃ）はこのＥＬモジュールをノート型のパーソナルコンピュータに組み込んだ一例であり、本体３０２１、筐体３０２２、表示部３０２３、キーボード３０２４等により構成されている。本発明により作製されるＴＦＴ基板は表示部３０２３に適用され、本発明によりパーソナルコンピュータを完成させることができる。
【０１４２】
図２２（Ｄ）はこのＥＬモジュールでＰＤＡ（Ｐｅｒｓｏｎａｌ　Ｄｉｇｉｔａｌ　Ａｓｓｉｓｔａｎｔ）を作製する一例であり、本体３０３１、スタイラス３０３２、表示部３０３３、操作ボタン３０３４、外部インターフェース３０３５等により構成されている。本発明により作製されるＴＦＴ基板は表示部３０３３に適用され、本発明によりＰＤＡを完成させることができる。
【０１４３】
図２２（Ｅ）はこのＥＬモジュールで車載用のオーディオ装置の表示部に組み入れた一例であり、本体３０４１、表示部３０４２、操作スイッチ３０４３、３０４４等により構成されている。本発明により作製されるＴＦＴ基板は表示部３０４２に適用され、本発明によりオーディオ装置を完成させることができる。
【０１４４】
図２２（Ｆ）はこのＥＬモジュールを用いてデジタルカメラを作製する一例であり、本体３０５１、表示部（Ａ）３０５２、接眼部３０５３、操作スイッチ３０５４、表示部（Ｂ）３０５５、バッテリー３０５６等により構成されている。本発明により作製されるＴＦＴ基板は表示部（Ａ）３０５２および表示部（Ｂ）３０５５に適用され、本発明によりデジタルカメラを完成させることができる。
【０１４５】
図２２（Ｇ）は携帯電話にこのＥＬモジュールを組み込む一例であり、本体３０６１、音声出力部３０６２、音声入力部３０６３、表示部３０６４、操作スイッチ３０６５、アンテナ３０６６等により構成されている。本発明により作製されるＴＦＴ基板は表示部３０６４に適用され、本発明により携帯電話を完成させることができる。
【０１４６】
尚、ここで示す装置はごく一例であり、これらの用途に限定するものではなく様々な電子機器に本発明を適用することができる。
【０１４７】
【発明の効果】
また、本発明により、ＴＦＴの主要構成要素である半導体膜、ゲート絶縁膜及びゲート電極は、その下層側及び上層側を窒化珪素、酸化窒化珪素、酸化窒化アルミニウム、酸化アルミニウム、窒化アルミニウムから選択される無機絶縁物材料で囲むことにより、アルカリ金属や有機物の汚染を防ぐ構造を有している。一方有機発光素子はアルカリ金属を一部に含み、窒化珪素、酸化窒化珪素、酸化窒化アルミニウム、窒化アルミニウム、ＤＬＣから選択される無機絶縁物材料によって囲むことにより外部から酸素や水分が浸入することを防ぐ構造を実現する。そして、発光装置の信頼性を向上させることができる。
【図面の簡単な説明】
【図１】本発明の発光装置の構造を説明する断面図。
【図２】本発明の発光装置の画素部の構造を説明する上面図。
【図３】本発明の発光装置の画素部の構造を説明する断面図。
【図４】本発明の発光装置の画素部の構造を説明する断面図。
【図５】本発明の発光装置の発光装置の構成要素を具備する基板の外観図。
【図６】マザーガラス上に形成された発光装置を構成する基板と分断位置を説明する図。
【図７】本発明の発光装置における入力端子部の構成を説明する図。
【図８】本発明の発光装置の作製工程を説明する断面図。
【図９】本発明の発光装置の作製工程を説明する断面図。
【図１０】本発明の発光装置の作製工程を説明する断面図。
【図１１】本発明の発光装置の作製工程を説明する断面図。
【図１２】本発明の発光装置の作製工程を説明する上面図。
【図１３】本発明の発光装置の作製工程を説明する上面図。
【図１４】本発明の発光装置の作製工程を説明する上面図。
【図１５】本発明の発光装置の画素部の構造を説明する上面図。
【図１６】本発明の発光装置の画素部の構造を説明する上面図。
【図１７】画素の等価回路図。
【図１８】本発明の発光装置を構成するＴＦＴに適用する半導体層を作製する工程の一例を説明する図。
【図１９】本発明の発光装置を構成するＴＦＴに適用する半導体層を作製する工程の一例を説明する図。
【図２０】本発明の発光装置を構成するＴＦＴに適用する半導体層を作製する工程の一例を説明する図。
【図２１】本発明の発光装置を構成するＴＦＴに適用する半導体層を作製する工程の一例を説明する図。
【図２２】本発明の応用例を示す図。
【図２３】ＥＬモジュールの一形態を示す図。
【図２４】窒化珪素膜のＳＩＭＳ（質量二次イオン分析）測定データ。
【図２５】窒化珪素膜のＦＴ−ＩＲ測定データ。
【図２６】窒化珪素膜の透過率測定データ。
【図２７】ＭＯＳ構造のＢＴストレス試験前後におけるＣ−Ｖ特性。
【図２８】ＭＯＳ構造のＢＴストレス試験前後におけるＣ−Ｖ特性。
【図２９】ＭＯＳ構造について説明する図。
【図３０】スパッタ装置について説明する図。
【図３１】本発明の発光装置の構造を説明する断面図。
【図３２】本発明の発光装置の構造を説明する断面図。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a light emitting device including a light emitting element that emits light by fluorescence or phosphorescence. In particular, the present invention relates to a light emitting device including an active element such as an insulated gate transistor or a thin film transistor and a light emitting element connected thereto.
[0002]
[Prior art]
A display device using a liquid crystal uses a backlight or a front light as a typical mode, and displays images using the light. 2. Description of the Related Art Liquid crystal display devices have been employed as image display means in various electronic devices, but have drawbacks due to their narrow viewing angle. On the other hand, a display device using a luminous body capable of obtaining electroluminescence as a display means has attracted attention as a next-generation display device because of its wide viewing angle and excellent visibility.
[0003]
The mechanism of light emission by electroluminescence is that electrons injected from the cathode and holes injected from the anode recombine in a layer (light-emitting layer) composed of a light-emitting body to form excitons, and the excitons return to the ground state. It is considered a phenomenon that emits light when returning. Electroluminescence includes fluorescence and phosphorescence, which are understood as light emission from a singlet state in an excited state (fluorescence) and light emission from a triplet state (phosphorescence). Luminance due to light emission is several thousand to tens of thousands cd / m ² Therefore, it is considered that application to a display device or the like is possible in principle.
[0004]
As an example of a combination of a thin film transistor (hereinafter, referred to as a TFT) and a light emitting element, a configuration in which an organic electroluminescence layer is formed over a TFT using polycrystalline silicon via an insulating film made of silicon dioxide is disclosed. (See Patent Document 1). A passivation layer having a tapered end on the anode is located below the organic electroluminescent layer. As the cathode, a material having a work function lower than 4 eV is selected, and a material obtained by alloying a metal such as silver or aluminum with magnesium is applied.
[0005]
[Patent Document 1]
JP-A-8-241047
[0006]
[Problems to be solved by the invention]
Known methods for forming the organic electroluminescent layer include a vacuum deposition method, a printing method, and a spin coating method. However, it has been difficult to form a predetermined pattern of the organic electroluminescent layer by using a photolithography technique as in a semiconductor element manufacturing technique. Therefore, in order to form a display screen by arranging the light emitting elements in a matrix, as described in the above-mentioned publication, a special structure that separates and separates each pixel with an insulator material is required.
[0007]
In the first place, it has been pointed out that an organic compound constituting a light emitting element and an alkali metal or an alkaline earth metal used as an electrode are deteriorated by reacting with water or oxygen.
[0008]
The causes of deterioration of the organic light emitting device include (1) chemical change of the organic compound, (2) melting of the organic compound due to heat generation during driving, (3) dielectric breakdown caused by macro defects, (4) electrode or Deterioration of the interface between the organic compound layer including the electrode and the luminous body, (5) deterioration due to instability in the amorphous structure of the organic compound, and (6) irreversible destruction due to stress or strain due to the element structure. You can think.
[0009]
The above (1) is caused by a chemical change through an excited state, a chemical change by a gas or a vapor corrosive to an organic compound, and the like. (2) and (3) degrade when the organic light emitting device is driven. Heat generation is inevitably generated by converting current flowing through the element into Joule heat. When the melting point or the glass transition temperature of the organic compound is low, the organic compound is melted, and the electric field is concentrated on the portion due to the presence of pinholes and cracks, causing dielectric breakdown. (4) and (5) deteriorate even when stored at room temperature. (4) is known as a dark spot and is caused by oxidation of the cathode and reaction with moisture. In (5), all organic compounds used in the organic light-emitting device are amorphous materials, and it is considered that there are few compounds that can be stored stably for a long period of time, change with time, or heat, and stably store the amorphous structure. . In the case of (6), defects such as cracks and breaks of the coating film occur due to the strain generated due to the difference in the thermal expansion coefficients of the components. Further, a progressive defect such as a dark spot occurs from the portion.
[0010]
Although the dark spot has been considerably suppressed by the improvement of the sealing technique, the actual deterioration is caused by a combination of the above-mentioned factors, which makes the prevention measures difficult. As a typical sealing technique, a method has been devised in which an organic light emitting element formed on a substrate is sealed with a sealing material and a desiccant such as barium oxide is provided in the space. However, even if such various measures are taken, it has not been possible to reduce the deterioration of the light emitting device to a practically usable degree.
[0011]
The present invention has been made in view of the above problems, and has as its object to improve the reliability of a light emitting device configured by combining a TFT and an organic light emitting element.
[0012]
[Means for Solving the Problems]
In order to solve the above problem, the structure of the present invention is a light emitting device having a pixel in which a TFT and a light emitting element are electrically connected, in which an anode layer and a cathode layer, and a layer containing a light emitter are interposed therebetween. A structure in which the upper and lower portions and side portions of the light-emitting element formed by lamination are surrounded by an inorganic insulating layer, and each of the anode layer, the cathode layer, and the layer including the light-emitting body is in contact with the inorganic insulating layer. I do. The inorganic insulating layer is formed using silicon nitride or oxynitride such as a silicon nitride film or a silicon oxynitride film, or aluminum nitride or oxynitride such as aluminum nitride or aluminum oxynitride. Particularly preferably, a silicon nitride film formed by high-frequency sputtering at 13.56 to 120 MHz using silicon as a target is used.
[0013]
As the silicon nitride film produced by the high-frequency sputtering, "(1) a silicon nitride film having an etching rate of 9 nm / min or less (preferably 0.5 to 3.5 nm / min or less) is used; ▼ Hydrogen concentration is 1 × 10 ²¹ atoms / cm ³ Below (preferably 5 × 10 ²⁰ atoms / cm ³ (3) The hydrogen concentration is 1 × 10 ²¹ atoms / cm ³ Below (preferably 5 × 10 ²⁰ atoms / cm ³ Below) and the oxygen concentration is 5 × 10 ¹⁸ ~ 5 × 10 ²¹ atoms / cm ³ (Preferably 1 × 10 ¹⁹ ~ 1 × 10 ²¹ atoms / cm ³ (4) The etching rate is 9 nm / min or less (preferably, 0.5 to 3.5 nm / min or less) and the hydrogen concentration is 1 × 10 ²¹ atoms / cm ³ Below (preferably 5 × 10 ²⁰ atoms / cm ³ (5) The etching rate is 9 nm / min or less (preferably, 0.5 to 3.5 nm / min or less) and the hydrogen concentration is 1 × 10 ²¹ atoms / cm ³ Below (preferably 5 × 10 ²⁰ atoms / cm ³ Below) and the oxygen concentration is 5 × 10 ¹⁸ ~ 5 × 10 ²¹ atoms / cm ³ (Preferably 1 × 10 ¹⁹ ~ 1 × 10 ²¹ atoms / cm ³ ), The blocking property of blocking extrinsic impurities is increased, and the effect of suppressing the deterioration of the light emitting element is obtained.
[0014]
In a configuration in which light-emitting elements are arranged in a matrix to form a display screen, the most preferable form of the insulating layer that partitions each pixel is a positive or negative photosensitive organic resin material, and the end of the pattern is used. The portion has a radius of curvature of 0.2 to 2 μm, or a radius of curvature that varies continuously in this range, and has an inclined surface having an inclination angle of 10 to 75 degrees, preferably 35 to 45 degrees. . In the pixel structure of the light emitting device according to the present invention, a layer including a light emitting body is formed by forming an insulating layer that covers an end of an individual electrode (on the anode or cathode side) of a pixel connected to the TFT and partitions the pixel. In addition, by forming one of the anode layer and the cathode layer over the pixel electrode and the insulating layer, stress at the edge of the pixel electrode is particularly reduced, and deterioration of the light-emitting element can be suppressed.
[0015]
The light emitting device of the present invention can have the following configuration.
[0016]
A thin film transistor including a semiconductor layer, a gate insulating film, and a gate electrode; a light-emitting element including an organic compound layer including a light-emitting body between a cathode layer and an anode layer; and a second inorganic insulator layer on an upper layer side of the gate electrode. A first organic insulator layer on the second inorganic insulator layer, a third inorganic insulator layer on the first organic insulator layer, an anode layer formed on the third inorganic insulator layer, and an anode layer A second organic insulator layer overlapping the end of the second organic insulator layer and having a tilt angle of 35 to 45 degrees; a fourth inorganic insulator layer formed on the surface and side surfaces of the second organic insulator layer and having an opening on the anode layer; An organic compound layer including a light emitting body formed in contact with the anode layer and the fourth inorganic insulator layer, and a cathode layer formed in contact with the organic compound layer including the light emitting body. The layer and the fourth inorganic insulator layer are formed of silicon nitride or aluminum nitride. Is shall.
[0017]
A thin film transistor having a semiconductor layer, a gate insulating film, and a gate electrode; a pixel portion having a light-emitting element having an organic compound layer containing a light-emitting body between an anode layer and a cathode layer; a semiconductor layer, a gate insulating film, and a gate electrode A driving circuit portion formed of a thin film transistor having the following structure. The driving circuit portion is a light emitting device formed in a peripheral region of the pixel portion, wherein a first inorganic insulator layer and a gate are provided below the semiconductor layer. A second inorganic insulator layer on the upper side of the electrode, a first organic insulator layer on the second inorganic insulator layer, a third inorganic insulator layer on the first organic insulator layer, and a third inorganic insulator An anode layer formed on the layer, a second organic insulator layer overlapping the end of the anode layer and having an inclination angle of 35 to 45 degrees, and an anode layer formed on the surface and side surfaces of the second organic insulator layer. A fourth inorganic insulator layer having an opening at A third inorganic insulator layer and a fourth inorganic insulating layer having an organic compound layer including a light emitting body formed in contact with the organic insulator layer and a cathode layer formed in contact with the organic compound layer including the light emitting body. The body layer is formed of silicon nitride or aluminum nitride, a seal pattern is formed on the fourth inorganic insulating layer, and the seal pattern is formed so as to partially or entirely overlap the driving circuit portion. It is.
[0018]
A configuration in which a fifth inorganic insulator layer is formed on the cathode layer may be used, and the fifth inorganic insulator layer is formed using silicon nitride or aluminum nitride.
[0019]
It is assumed that the third inorganic insulating layer to the fifth inorganic insulating layer have a hydrogen concentration and an oxygen concentration within the ranges described in addition to the etching characteristics described above. By reducing the density of N—H bonds, Si—H bonds, and Si—O bonds in the silicon nitride film, thermal stability can be increased and the film can be densified.
[0020]
A thin film transistor having a semiconductor layer, a gate insulating film, and a gate electrode; a pixel portion having a light-emitting element having an organic compound layer containing a light-emitting body between an anode layer and a cathode layer; a semiconductor layer, a gate insulating film, and a gate electrode A driving circuit portion formed of a thin film transistor having a driving circuit portion, wherein the driving circuit portion is a light emitting device formed in a peripheral region of the pixel portion, and a partition layer formed of an organic insulator layer is driven in the pixel portion. An inorganic insulating layer made of silicon nitride or aluminum nitride is formed on the upper surface and side surfaces of the partition layer, and a seal pattern is formed on the inorganic insulating layer; Is partially or wholly overlapped with the drive circuit portion, and a connection portion between the cathode layer and a wiring formed thereunder is provided inside the seal pattern.
[0021]
A first thin film transistor including a semiconductor layer, a gate insulating film, and a gate electrode; a pixel portion including a light-emitting element including an organic compound layer including a light-emitting body between an anode layer and a cathode layer; a semiconductor layer, a gate insulating film, and A driving circuit portion formed of a second thin film transistor having a gate electrode, wherein the driving circuit portion is a light emitting device formed in a peripheral region of the pixel portion, wherein the driving portion is formed of an organic insulator layer in the pixel portion. A partition layer extends over the drive circuit portion, an inorganic insulator layer made of silicon nitride or aluminum nitride is formed on the upper surface and side surfaces of the partition layer, and a seal pattern is formed over the inorganic insulator layer. The first thin film transistor is formed inside the seal pattern, and the second thin film transistor is formed so as to partially or entirely overlap the seal pattern, and is formed of a cathode layer and a wiring formed thereunder. Connection part is what is provided inside the seal pattern.
[0022]
The inorganic insulator layer is silicon nitride formed by a high-frequency sputtering method, and has a range in which the hydrogen concentration and the oxygen concentration are described in addition to the etching characteristics described above.
[0023]
A method for manufacturing a light-emitting device of the present invention can have the following structure.
[0024]
A thin film transistor having a semiconductor layer, a gate insulating film, and a gate electrode; a pixel portion having a light-emitting element having an organic compound layer containing a light-emitting body between an anode layer and a cathode layer; a semiconductor layer, a gate insulating film, and a gate electrode And a driving circuit portion formed of a thin film transistor having the following structure. The driving circuit portion is a method for manufacturing a light-emitting device formed in a peripheral region of a pixel portion, in which a first inorganic insulator layer is formed over a substrate. Forming a semiconductor layer made of crystalline silicon on the first inorganic insulator layer, forming a gate insulating film and a gate electrode on the semiconductor layer, and forming the semiconductor layer of one conductivity type or a conductivity type opposite thereto. Forming an impurity region, forming a second inorganic insulating layer on the gate electrode, forming a first organic insulating layer on the second inorganic insulating layer, and forming a third inorganic insulating layer on the second organic insulating layer; Forming body layer Forming an anode layer in contact with the body layer, forming a second organic insulator layer having an inclination angle of 35 to 45 degrees overlapping an end portion of the anode layer, and forming a second organic insulator layer on the surface and side surface of the second organic insulator layer; Forming a fourth inorganic insulator layer having an opening on the anode layer, forming an organic compound layer including a light emitter that is formed in contact with the anode layer and having a side edge overlapping the fourth inorganic insulator layer; And a cathode layer formed in contact with the organic compound layer including the third inorganic insulator layer and the fourth inorganic insulator layer, wherein the third inorganic insulator layer and the fourth inorganic insulator layer are silicon nitride or aluminum nitride by a high frequency sputtering method. Is formed.
[0025]
Another structure is a pixel portion including a thin film transistor including a semiconductor layer, a gate insulating film, and a gate electrode; a pixel portion including a light-emitting element including an organic compound layer including a light-emitting body between an anode layer and a cathode layer; And a driving circuit portion formed of a thin film transistor having a gate insulating film and a gate electrode. The driving circuit portion is a method for manufacturing a light-emitting device formed in a peripheral region of a pixel portion. An inorganic insulator layer is formed, a semiconductor layer made of crystalline silicon is formed over the first inorganic insulator layer, and a gate insulating film and a gate electrode are formed over the semiconductor layer. An impurity region of the opposite conductivity type is formed, a second inorganic insulator layer is formed on the gate electrode, a first organic insulator layer is formed on the second inorganic insulator layer, and a second organic insulator layer is formed on the second inorganic insulator layer. A third inorganic insulator layer on the layer Forming an anode layer in contact with the third inorganic insulator layer, forming a second organic insulator layer overlapping the end of the wiring layer and having a tilt angle of 35 to 45 degrees, and forming a second organic insulator layer Forming a fourth inorganic insulator layer formed on the surface and side surfaces of the anode and having an opening on the anode layer, forming an organic layer including the luminous body formed in contact with the anode layer and having a side edge overlapping the fourth inorganic insulator layer; Forming a compound layer and a cathode layer formed in contact with the organic compound layer including the light-emitting body, and forming a seal pattern on the fourth inorganic insulator layer at a position where a part or the whole of the driving circuit portion overlaps with the driving circuit portion; Forming and attaching a sealing plate in accordance with a seal pattern. The third inorganic insulating layer and the fourth inorganic insulating layer form silicon nitride or aluminum nitride by a high frequency sputtering method. Process.
[0026]
In the above structure of the invention, the third inorganic insulator layer and the fourth inorganic insulator layer are formed of silicon nitride by a high-frequency sputtering method using silicon as a target and using only nitrogen as a sputtering gas. Further, after forming the first organic insulator layer, heat treatment is performed under reduced pressure, dehydration treatment is performed, and a third inorganic insulator layer is formed while maintaining the reduced pressure state. Alternatively, after the second organic insulator layer is formed, heat treatment is performed under reduced pressure, dehydration treatment is performed, and the fourth inorganic insulator layer is formed while the reduced pressure is maintained.
[0027]
Note that a light-emitting device refers to any device that emits light using electroluminescence. For the purpose, a light-emitting device includes a TFT substrate in which a circuit is formed using TFTs on a substrate, and a light-emitting element formed using an electroluminescent material on the TFT substrate. An EL panel in which an EL panel is combined with an external circuit is also included. The light emitting device of the present invention can be incorporated in various electronic devices such as a mobile phone, a personal computer, and a television receiver.
[0028]
BEST MODE FOR CARRYING OUT THE INVENTION
Embodiments of the present invention will be described in detail with reference to the drawings. In the following description, the same elements are denoted by the same reference numerals.
[0029]
FIG. 1 illustrates an example of a structure of a light-emitting device using an active matrix driving method. The TFT is provided in a pixel portion 302 and a driving circuit portion 301 formed in a peripheral portion thereof. As a semiconductor layer forming a channel formation region of a TFT, amorphous silicon, polycrystalline silicon, or the like can be selected, and any of the present invention may be employed.
[0030]
As the substrate 101, a glass substrate or an organic resin substrate is employed. The organic resin material is lighter in weight than the glass material, and effectively acts to reduce the weight of the light emitting device itself. As a material that can be used for manufacturing a light-emitting device, an organic resin material such as polyimide, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyether sulfone (PES), or aramid can be used. As the glass substrate, barium borosilicate glass or aluminoborosilicate glass, which is called non-alkali glass, is desirably used. A glass substrate having a thickness of 0.5 to 1.1 mm is adopted, but it is necessary to reduce the thickness for the purpose of weight reduction. To further reduce the weight, the density is 2.37 g / cm. ³ It is desirable to use small glass.
[0031]
In FIG. 1, an n-channel TFT 303 and a p-channel TFT 304 are formed in a driver circuit portion 301, and a first n-channel TFT 305, a fourth p-channel TFT 306, and a capacitor portion 307 are formed in a pixel portion 302. The fourth TFT 306 is connected to the anode layer 126 of the light emitting element 309.
[0032]
These TFTs include semiconductor layers 103 to 106, a gate insulating film 108, and gate electrodes 110 to 113 on a first inorganic insulator layer 102 made of silicon nitride or silicon oxynitride. A second inorganic insulator layer 114 made of silicon nitride or silicon oxynitride containing hydrogen is formed over the gate electrode, and impurities such as moisture and metal are added to the semiconductor layer in combination with the first inorganic insulator layer 102. Is functioning as a protective film for preventing diffusion and contamination.
[0033]
On the second inorganic insulator layer 114, a first organic insulator layer 115 selected from polyimide, polyamide, polyimide amide, acrylic, and BCB is formed as a flattening film with a thickness of 0.5 to 1 μm. . The first organic insulator layer 115 is formed by applying the organic compound by a spin coating method and then firing. Organic insulator materials are hygroscopic and have the property of absorbing moisture. When the moisture is re-emitted, oxygen is supplied to the organic compound of the light emitting element formed in the upper layer, which causes deterioration of the organic light emitting element. In order to prevent occlusion and re-release of moisture, a third inorganic insulator layer 116 is formed on the first organic insulator layer 115 to a thickness of 50 to 200 nm. The third inorganic insulator layer 116 needs to be a dense film from the viewpoint of adhesion to the base and barrier properties, and is preferably formed by a sputtering method such as silicon nitride, silicon oxynitride, aluminum oxynitride, or aluminum nitride. Formed of an inorganic insulating material selected from the group consisting of:
[0034]
The organic light emitting element 309 is formed on the third inorganic insulator layer 116. In a light-emitting device that emits light emitted through the substrate 101, an ITO (indium tin oxide) layer is formed as the anode layer 126 over the third inorganic insulator layer 116. Zinc oxide or gallium may be added to ITO for the purpose of planarization and low resistance. The wirings 117 to 125 are formed before the anode layer 126 and are overlapped on the third inorganic insulator layer 116 to form an electrical connection.
[0035]
The second organic insulator layer (partition layer) 128 for separating each pixel is formed of a material selected from polyimide, polyamide, polyimide amide, acrylic, and benzocyclobutene (BCB). For these, a thermosetting or photocurable material can be applied. The second organic insulator layer (partition layer) 128 is formed by forming the organic insulator material over the entire surface to a thickness of 0.5 to 2 μm, and then forming an opening corresponding to the anode layer 126. In this case, the anode layer 126 is formed so as to cover the end, and the inclination angle of the side wall is 35 to 45 degrees. The second organic insulator layer (partition layer) 128 is formed so as to extend not only over the pixel portion 302 but also over the drive circuit portion 301, and functions as an interlayer insulating film when formed over the wirings 117 to 124. It also has.
[0036]
Organic insulator materials are hygroscopic and have the property of absorbing moisture. When the water is released again, the water is supplied to the organic compound of the light emitting element 309 to cause deterioration of the organic light emitting element. In order to prevent occlusion and re-release of moisture, a fourth inorganic insulator layer 129 is formed on the second organic insulator layer 128 to a thickness of 10 to 100 nm. The fourth inorganic insulator layer 129 is formed using an inorganic insulator material made of nitride. Specifically, it is formed using an inorganic insulating material selected from silicon nitride, aluminum nitride, and aluminum nitride oxide. The fourth inorganic insulator layer 129 is formed so as to cover the upper surface and side surfaces of the second organic insulator layer 128, and is formed so that an end overlapping the anode layer 126 has a tapered shape.
[0037]
The organic light-emitting element 309 includes an anode layer 126, a cathode layer 131 containing an alkali metal or an alkaline earth metal, and an organic compound layer 130 containing a light-emitting body formed therebetween. The organic compound layer 130 including the light emitting body is formed by laminating one or more layers. Each layer is referred to as a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, an electron injection layer, or the like, depending on its purpose and function. These can be formed from any of a low molecular weight organic compound material, a medium molecular weight organic compound material, and a high molecular weight organic compound material, or a suitable combination of both. Further, a mixed layer in which an electron transporting material and a hole transporting material are appropriately mixed, or a mixed junction in which a mixed region is formed at each bonding interface may be formed.
[0038]
The cathode layer 131 is formed of an alkali metal or an alkaline earth metal having a small work function, and uses a material containing magnesium (Mg), lithium (Li), or calcium (Ca). Preferably, an electrode made of MgAg (a material in which Mg and Ag are mixed at a ratio of Mg: Ag = 10: 1) may be used. Other examples include a MgAgAl electrode, a LiAl electrode, and a LiFAl electrode. Alternatively, it may be formed by combining a fluoride of an alkali metal or an alkaline earth metal with a low-resistance metal such as aluminum. The cathode layer 131 is formed as a common electrode over a plurality of pixels, is connected to the wiring 120 outside the pixel portion 302 or between the pixel portion 302 and the driving circuit portion 301, and is led to an external terminal. In FIG. 1, the connecting portion 310 is indicated by a region surrounded by a dotted line.
[0039]
Further, as the upper layer, the fifth inorganic insulator layer 132 may be formed of a material selected from silicon nitride, diamond-like carbon (DLC), aluminum oxynitride, aluminum oxide, aluminum nitride, and the like. In particular, the DLC film is made of oxygen, CO, CO ₂ , H ₂ It is known that gas barrier properties of O and the like are high. After the cathode 131 is formed, the fifth inorganic insulator layer 132 is preferably formed continuously without opening to the atmosphere. A buffer layer of silicon nitride may be provided below the fifth inorganic insulator layer 132 to improve adhesion.
[0040]
Although not shown, a sixth inorganic insulator layer may be formed at the interface between the anode layer 126 and the organic compound layer 130 including the luminous body with a thickness of 0.5 to 5 nm and a thickness such that a tunnel current flows. . This has an effect of preventing a short circuit due to unevenness on the surface of the anode and suppressing diffusion of an alkali metal or the like used for the cathode to the lower layer side.
[0041]
The second organic insulator layer 128 formed in the pixel portion 302 extends on the drive circuit portion 301, and the seal pattern 133 is formed on the fourth inorganic insulator layer 129 formed on the second organic insulator layer 128. It is formed. The seal pattern 133 is provided so as to partially or entirely overlap the driving circuit portion 301 and the wiring 117 connecting the driving circuit portion 301 to an input terminal, and reduces the area of a frame region (a peripheral region of a pixel portion) of the light-emitting device. Has been reduced.
[0042]
The sealing plate 134 is fixed via the seal pattern 133. Metal such as stainless steel or aluminum can be used for the sealing plate 134. Further, a glass substrate or the like may be used. A desiccant 135 such as barium oxide is sealed in the inside surrounded by the seal pattern 133 and the sealing plate 134 to prevent deterioration due to moisture. The thickness of the sealing plate may be made flexible by using an organic resin material having a thickness of about 30 to 120 μm. A film made of an inorganic insulator such as DLC or silicon nitride may be formed on the surface as a gas barrier layer. An example of a material used for the seal pattern is an epoxy-based adhesive. By covering the side surface with a coating made of an inorganic insulator, it is possible to prevent water vapor permeating from that portion.
[0043]
In FIG. 1, the first TFT 305 has a multi-gate structure, and a low-concentration drain (LDD) is provided to reduce off-state current. An impurity region overlapping with the gate electrode is provided in the p-channel type fourth TFT 306.
[0044]
A top view of one pixel in a pixel portion provided with these TFTs is shown in FIG. In FIG. 2, the patterns of the light emitting element 309, the second organic insulator layer 128, and the fourth inorganic insulator layer 129 are omitted to clearly show the arrangement of each TFT. One pixel is provided with a first TFT 305, a second TFT 311, a third TFT 312, a fourth TFT 306, and a capacitor portion 307. FIG. 17 shows an equivalent circuit diagram thereof. In FIG. 2, a cross-sectional structure corresponding to line AA ′ is shown in FIG. FIG. 3 shows a cross-sectional structure taken along the line BB ′, and FIG. 4 shows a cross-sectional structure taken along the line CC ′.
[0045]
In addition, an example of the configuration of the second organic insulator layer 128 and the fourth inorganic insulator layer 129 in the pixel portion can be such that both cover the periphery of the anode layer 126 as shown in FIG. Alternatively, as shown in FIG. 16, the second organic insulator layer 128 covers only two sides of the anode layer 126, and the fourth inorganic insulator layer 129 covers the entire periphery of the anode layer 126. Of course, the pixel configuration shown here is an example, and is not an essential requirement for configuring the present invention.
[0046]
In FIG. 1, the circuit configuration of the drive circuit portion 301 is different between the gate signal side drive circuit and the data signal side drive circuit, but is omitted here. Wirings 118 and 119 are connected to the n-channel TFT 303 and the p-channel TFT 304, and a shift register, a latch circuit, a buffer circuit, and the like can be formed using these TFTs.
[0047]
The input terminal portion 308 is formed using a wiring formed in the same layer as the gate electrode or a wiring formed over the third inorganic insulating layer 116. FIG. 1 shows an example in which the gate electrode is formed using the same layer as the gate electrode, which is formed using conductive layers 109 and 127. The conductive layer 127 is formed at the same time as the anode layer 126, and is formed of an oxide conductive material. In practice, by covering the portion exposed on the surface with this oxide conductive material, an increase in surface resistance due to an oxidation reaction is prevented. FIG. 7 is a diagram illustrating details of the input terminal unit 308. FIG. 7A shows a top view thereof, and FIGS. 7B and 7C show cross-sectional structures corresponding to lines DD ′ and EE ′. In any case, the conductive layers 109 and 127 are provided. It is formed with.
[0048]
As shown in FIG. 1, a first inorganic insulator layer 102 and a second inorganic insulator layer 114 are formed so as to surround the semiconductor layers 105 and 106. On the other hand, the organic light-emitting element 309 is surrounded by the third inorganic insulator layer 116, the fifth inorganic insulator layer 132, and the fourth inorganic insulator layer 129. That is, the semiconductor layer and the light emitting element of the TFT have a structure in which they are respectively covered with the inorganic insulator layer. The inorganic insulator layer is a silicon nitride or silicon oxynitride film, and uses a material having a barrier property against water vapor and ionic impurities.
[0049]
The substrate 101 and the organic light emitting element 309 can be considered as a source of contamination of the first TFT 305 and the fourth TFT 306 with an alkali metal such as sodium; however, it can be prevented by surrounding the first TFT 305 and the fourth TFT 306 with the first inorganic insulator layer 102 and the second inorganic insulator layer 114. Can be. On the other hand, since the organic light emitting element 309 dislikes oxygen and moisture most, the third inorganic insulator layer 116, the fourth inorganic insulator layer 129, and the fifth inorganic insulator layer 132 are formed of an inorganic insulator material in order to prevent them. It prevents that pollution. These also have a function of keeping the alkali metal element included in the organic light-emitting element 309 from outside.
[0050]
FIG. 5 is an external view of a substrate including components of the light-emitting device described with reference to FIGS. The substrate 101 includes a pixel portion 302, gate signal side driving circuits 301a and 301b, a data signal side driving circuit 301c, a connection portion 310 of a cathode layer, an input / output terminal portion 308, and a wiring or a wiring group 117. The seal pattern 133 is provided so as to partially or entirely overlap with the gate signal side driver circuits 301a and 301b, the data signal side driver circuit 301c, and a wiring or a wiring group 117 connecting the driver circuit portion and an input terminal. The area of the frame region (peripheral region of the pixel portion) is reduced. The connecting portion 310 of the cathode layer is not provided at one place as shown in FIG. 5, but may be provided anywhere in the peripheral region of the pixel portion 302 as long as the driving circuit portion does not interfere with the 301a to 301c.
[0051]
As shown in FIG. 6, a plurality of substrates 101 (101 a to 101 d) having such a configuration are formed on the mother glass 201, after the formation of the fourth inorganic insulator layer, the formation of the cathode layer, or the fifth inorganic substrate. After formation of the insulator layer or after formation of the sealing plate, the substrate is cut along the cutting line 202. The cutting is performed with a diamond cutter, a laser cutter, or the like. In order to facilitate the cutting at this time, the third to fifth inorganic insulator layers and the first and second organic insulator layers are removed on the cutting line 202. It is desirable.
[0052]
As described above, a pixel portion is formed by combining a TFT and a light-emitting element, so that a light-emitting device can be completed. In such a light-emitting device, a driver circuit using a TFT can be formed over the same substrate as a pixel portion. As shown in FIG. 1, a semiconductor film, a gate insulating film, and a gate electrode, which are main components of a TFT, are surrounded by a blocking layer and a protective film made of silicon nitride or silicon oxynitride on the lower and upper sides thereof. It has a structure that prevents contamination of alkali metals and organic substances. On the other hand, the organic light-emitting device is partially surrounded by an alkali metal, and is surrounded by a protective film made of silicon nitride or silicon oxynitride or a DLC film, and a gas barrier layer made of an insulating film containing silicon nitride or carbon as a main component. It has a structure to prevent oxygen and moisture from entering.
[0053]
Note that in this embodiment, a film made of silicon nitride (silicon nitride film) which can be used for the inorganic insulating layer has extremely dense film quality formed by a high-frequency sputtering method. It is formed under conditions (representative examples are also described). Note that “RFSP-SiN” in the table indicates a silicon nitride film formed by a high frequency sputtering method. “T / S” is the distance between the target and the substrate.
[0054]
[Table 1]

[0055]
Ar used as a sputtering gas is introduced as a gas for heating the substrate so as to be sprayed on the back side of the substrate, and finally N 2 ₂ And contributes to sputtering. Further, the film forming conditions shown in Table 1 are typical conditions and are not limited to the numerical values shown here, and the physical property parameters of the formed SiN film fall within the range of the physical property parameters shown in Table 4 later. As long as it falls, the practitioner may change it as appropriate.
[0056]
FIG. 30 is a schematic view of a sputtering apparatus used for forming a silicon nitride film by the high frequency sputtering method. In FIG. 30, 30 is a chamber wall, 31 is a movable magnet for forming a magnetic field, 32 is a single crystal silicon target, 33 is a protective shutter, 34 is a substrate to be processed, 36a and 36b are heaters, and 37 is a substrate chuck mechanism. Reference numeral 38 denotes a deposition prevention plate, and reference numeral 39 denotes a valve (conductance valve or main valve). The gas introduction pipes 40 and 41 installed on the chamber wall 30 are respectively N ₂ (Or N ₂ And a rare gas mixed gas) and a rare gas introduction pipe.
[0057]
Table 2 shows conditions for forming a silicon nitride film formed by a conventional plasma CVD method as a comparative example. Note that “PCVD-SiN” in the table indicates a silicon nitride film formed by a plasma CVD method.
[0058]
[Table 2]

[0059]
Next, the results of comparison of typical physical property values (physical property parameters) of the silicon nitride film formed under the film forming conditions of Table 1 and the silicon nitride film formed under the film forming conditions of Table 2 are shown in Table 3. Put together. Note that the difference between “RFSP-SiN (No. 1)” and “RFSP-SiN (No. 2)” is a difference depending on the film forming apparatus, and functions as a silicon nitride film used as a barrier film of the present invention. It doesn't hurt. Although the sign of the numerical value of the internal stress changes depending on the compressive stress or the tensile stress, here, only the absolute value is handled.
[0060]
[Table 3]

[0061]
As shown in Table 3, a feature common to these RFSP-SiN (No. 1) and RFSP-SiN (No. 2) is that the etching rate (at 20 ° C. using LAL500) is higher than that of the PCVD-SiN film. The etching rate at the time of etching is referred to as follows. The same applies hereinafter.) And the hydrogen concentration is low. Note that "LAL500" is "LAL500 SA buffered hydrofluoric acid" manufactured by Hashimoto Kasei Co., Ltd. ₄ HF ₂ (7.13%) and NH ₄ It is an aqueous solution of F (15.4%). Further, the internal stress is smaller in absolute value than that of the silicon nitride film formed by the plasma CVD method.
[0062]
Here, Table 4 summarizes parameters of various physical properties of the silicon nitride film formed by the present inventors under the film forming conditions shown in Table 1.
[0063]
[Table 4]

[0064]
FIG. 24 shows the result of SIMS (mass secondary ion analysis) of the silicon nitride film, FIG. 25 shows the result of FT-IR, and FIG. 26 shows the transmittance. FIG. 26 also shows a silicon nitride film formed under the film forming conditions shown in Table 2. The transmittance is comparable to that of the conventional PCVD-SiN film.
[0065]
As the silicon nitride film used as the inorganic insulating layer of the present invention, a silicon nitride film satisfying the parameters shown in Table 4 is preferable. That is, (1) a silicon nitride film having an etching rate of 9 nm / min or less (preferably, 0.5 to 3.5 nm / min or less) is used as the inorganic insulating layer, and (2) a hydrogen concentration of 1 × 10 ²¹ atoms / cm ³ Below (preferably 5 × 10 ²⁰ atoms / cm ³ (3) The hydrogen concentration is 1 × 10 ²¹ atoms / cm ³ Below (preferably 5 × 10 ²⁰ atoms / cm ³ Below) and the oxygen concentration is 5 × 10 ¹⁸ ~ 5 × 10 ²¹ atoms / cm ³ (Preferably 1 × 10 ¹⁹ ~ 1 × 10 ²¹ atoms / cm ³ And (4) the etching rate is 9 nm / min or less (preferably 0.5 to 3.5 nm / min or less) and the hydrogen concentration is 1 × 10 ²¹ atoms / cm ³ Below (preferably 5 × 10 ²⁰ atoms / cm ³ (5) The etching rate is 9 nm / min or less (preferably, 0.5 to 3.5 nm / min or less) and the hydrogen concentration is 1 × 10 ²¹ atoms / cm ³ Below (preferably 5 × 10 ²⁰ atoms / cm ³ Below) and the oxygen concentration is 5 × 10 ¹⁸ ~ 5 × 10 ²¹ atoms / cm ³ (Preferably 1 × 10 ¹⁹ ~ 1 × 10 ²¹ atoms / cm ³ ) Is desirable.
[0066]
The absolute value of the internal stress is 2 × 10 ¹⁰ dyn / cm ² Below, preferably 5 × 10 ⁹ dyn / cm ² Hereinafter, more preferably, 5 × 10 ⁸ dyn / cm ² It is better to do the following. If the internal stress is reduced, generation of a level at the interface with another film can be reduced. Further, film peeling due to internal stress can be prevented.
[0067]
In addition, the silicon nitride film formed under the film formation conditions in Table 1 described in this embodiment has a very strong blocking effect on Na, Li, and other elements belonging to Group 1 or 2 of the periodic table, and has an effect of removing these mobile ions and the like. Diffusion can be effectively suppressed. For example, as the cathode layer used in the present embodiment, a metal film obtained by adding 0.2 to 1.5 wt% (preferably 0.5 to 1.0 wt%) of lithium to aluminum has a charge injection property and other points. Although preferable, in this case, there is a concern that the operation of the transistor may be harmed by diffusion of lithium. However, in this embodiment mode, the diffusion is prevented in the transistor direction because lithium is completely protected by the inorganic insulating layer.
[0068]
Data showing this fact are shown in FIGS. FIG. 27 is a diagram showing changes in CV characteristics before and after a BT stress test of a MOS structure using a silicon nitride film (PCVD-SiN film) formed under the film forming conditions of Table 2 as a dielectric. The structure of the sample is as shown in FIG. 29A. By using an Al—Li (aluminum to which lithium is added) electrode as the surface electrode, the presence or absence of the influence of lithium diffusion can be confirmed. According to FIG. 27, it can be confirmed that the CV characteristics are significantly shifted by the BT stress test, and the influence of the diffusion of lithium from the surface electrode is remarkable.
[0069]
Next, FIGS. 28A and 28B show CV characteristics before and after a BT stress test of a MOS structure using a silicon nitride film formed under the film forming conditions in Table 1 as a dielectric. The difference between FIGS. 28A and 28B is that FIG. 28A uses an Al—Si (aluminum film to which silicon is added) electrode as the surface electrode, while FIG. -Li (aluminum film added with lithium) electrode. Note that the result of FIG. 28B is a measurement result of the MOS structure shown in FIG. Here, the laminated structure with the thermal oxide film is used to reduce the influence of the interface state between the silicon nitride film and the silicon substrate.
[0070]
Comparing the two graphs of FIGS. 28A and 28B, there is almost no difference between the CV characteristics before and after the BT stress test in both graphs, and the effect of lithium diffusion does not appear, that is, Table 1. It can be confirmed that the silicon nitride film formed under the above film forming conditions effectively functions as a blocking film.
[0071]
As described above, since the inorganic insulating layer used in the present invention is very dense and has a high blocking effect on mobile elements such as Na and Li, the diffusion of outgassing components from the flattening film is suppressed, and the Al-Li electrode and the like are used. A highly reliable display device can be realized by effectively suppressing the diffusion of Li from the substrate. The reason for the denseness is that the present inventors formed a thin silicon nitride film on the surface of a single-crystal silicon target and deposited the silicon nitride film on a substrate. I guess it is likely that the result will be more elaborate as a result.
[0072]
Further, since the film is formed by a sputtering method at a low temperature from room temperature to about 200 ° C., it is more advantageous than the plasma CVD method in that the film can be formed on a resin film as in the case of using as a barrier film of the present invention. . Note that the above-described silicon nitride film can be used as a part of the gate insulating film in the case where the gate insulating film is formed using a stacked film.
[0073]
【Example】
[Example 1]
In this embodiment, steps for manufacturing the light-emitting device shown in FIG. 1 will be described in detail with reference to the drawings.
[0074]
In FIG. 8A, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used for the substrate 101. Alternatively, a silicon substrate, a metal substrate, or a stainless steel substrate on which an insulating film is formed may be used. Further, a plastic substrate having heat resistance enough to withstand the processing temperature of this embodiment may be used.
[0075]
A silicon oxide film, a silicon nitride film, or a silicon oxynitride film (SiO _x N _y The first inorganic insulator layer 102 made of an insulating film is formed. A typical example has a two-layer structure, ₄ , NH ₃ , And N ₂ The first silicon oxynitride film formed using O as a reaction gas is ₄ , And N ₂ A structure in which a second silicon oxynitride film formed with O as a reaction gas is stacked to a thickness of 100 nm is employed.
[0076]
The semiconductor film serving as an active layer is obtained by crystallizing an amorphous semiconductor film formed over the first inorganic insulator layer 102. The amorphous semiconductor film is formed with a thickness of 30 to 60 nm, and is crystallized by heat treatment or laser light irradiation. The material of the amorphous semiconductor film is not limited, but is preferably silicon or silicon germanium (Si _1-x Ge _x 0 <x <1, typically x = 0.001 to 0.05).
[0077]
A typical example is SiH by a plasma CVD method. ₄ Using a gas, an amorphous silicon film is formed to a thickness of 54 nm. Crystallization is performed by pulse oscillation type or continuous oscillation type excimer laser, YAG laser doped with Cr, Nd, Er, Ho, Ce, Co, Ti or Tm, YVO ₄ Laser and YLF laser can be used. YAG laser, YVO ₄ When a laser or a YLF laser is used, the second to fourth harmonics are used. In the case of using these lasers, a method in which laser light emitted from a laser oscillator is linearly condensed by an optical system and applied to a semiconductor film is preferably used. The crystallization conditions may be appropriately selected by the practitioner.
[0078]
As a crystallization method, a metal element having a catalytic action on crystallization of a semiconductor such as nickel may be added for crystallization. For example, after a nickel-containing solution is held on an amorphous silicon film, dehydrogenation (500 ° C., 1 hour) and thermal crystallization (550 ° C., 4 hours) are performed to further improve crystallinity. YAG laser, YVO ₄ A second harmonic of continuous wave laser light selected from a laser and a YLF laser is irradiated.
[0079]
Thereafter, the obtained crystalline semiconductor film is etched into a desired shape by photolithography using a photomask (1) to form semiconductor layers 103 to 107 separated into islands. FIG. 12 shows a top view of the pixel at this stage.
[0080]
After the amorphous semiconductor film is crystallized, an impurity element imparting p-type may be added in order to control the threshold value of the TFT. As an impurity element that imparts p-type to a semiconductor, an element belonging to Group 13 of the periodic table such as boron (B), aluminum (Al), and gallium (Ga) is known.
[0081]
Next, as shown in FIG. 8B, a gate insulating film 108 which covers the semiconductor layers 103 to 107 separated in an island shape is formed. The gate insulating film 108 is formed using an inorganic insulating material such as silicon oxide or silicon oxynitride by a plasma CVD method or a sputtering method, and has a thickness of 40 to 150 nm and is formed using an insulating film containing silicon. Of course, as the gate insulating film, an insulating film containing silicon can be used as a single layer or a stacked structure.
[0082]
On the gate insulating film 108, a first conductive film 10 made of tantalum nitride (TaN) having a thickness of 10 to 50 nm and a second conductive film 10 made of tungsten (W) having a thickness of 100 to 400 nm are formed for the purpose of forming a gate electrode. The conductive film 11 and the conductive film 11 are stacked. As a conductive material for forming the gate electrode, an element selected from Ta, W, Ti, Mo, Al, and Cu, or an alloy material or a compound material containing the element as a main component is used. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. The first conductive film is formed of a tantalum (Ta) film, the second conductive film is formed of a W film, the first conductive film is formed of a tantalum nitride (TaN) film, and the second conductive film is formed of an Al film. Alternatively, the first conductive film may be formed of a tantalum nitride (TaN) film, and the second conductive film may be formed of a Cu film.
[0083]
Next, as shown in FIG. 8C, using a photomask (2), a mask 12 on which a gate electrode pattern is formed by photolithography is formed. After that, a first etching process is performed by a dry etching method. For example, an ICP (Inductively Coupled Plasma) etching method is applied to the etching. There is no limitation on the etching gas, but CF for etching W or TaN is used. ₄ And Cl ₂ And O ₂ It is better to use In the first etching process, a predetermined bias voltage is applied to the substrate side so that the side surfaces of the formed electrode patterns 13 to 17 have a tilt angle of 15 to 50 degrees. By the first etching process, the region where the surface of the insulating film is exposed is simultaneously etched to form a region having a thickness of about 10 to 30 nm.
[0084]
Thereafter, the etching conditions are changed to the second etching condition, and SF is used as the etching gas. ₆ And Cl ₂ And O ₂ The W film is subjected to anisotropic etching with the bias voltage applied to the substrate side set to a predetermined value. Thus, the gate electrodes 110 to 113 and the wiring 109 of the input terminal portion are formed. After that, the mask 12 is removed. By the second etching process, the region where the insulating film surface is exposed is simultaneously etched, and a region which is further thinned by about 10 to 30 nm is formed. FIG. 13 shows a top view of the pixel at this stage.
[0085]
After the gate electrode is formed, a first doping process is performed as shown in FIG. 9A to form first n-type impurity regions 18 to 22 in the semiconductor layer. The first n-type impurity region is formed in a self-aligned manner using the gate electrode as a mask. The doping condition may be set as appropriate, but the pH of the diluted hydrogen is 5%. ₃ 50 kV, 6 × 10 ¹³ / Cm ² At a dose of.
[0086]
Next, as shown in FIG. 9B, using a photomask (3), a mask 23 is formed by photolithography, and a second doping process is performed. The second doping process is 5% PH diluted with hydrogen. ₃ 65 kV, 3 × 10 ^Fifteen / Cm ² The second n-type impurity regions 24 and 25 and the third n-type impurity region 26 are formed. The semiconductor layer 103 is formed in a self-aligned manner using the gate electrode as a mask, and the second n-type impurity region 24 formed outside the gate electrode and the third n-type impurity region formed at a position overlapping the gate electrode. A region 26 is formed. In the semiconductor layer 105, a second n-type impurity region 25 formed by the mask 23 is formed.
[0087]
In FIG. 9C, using a photomask (4), a mask 27 is formed by photolithography, and a third doping process is performed. The third doping treatment is a hydrogen dilution of 5% B ₂ H ₆ 80 kV, 2 × 10 ¹⁶ / Cm ² The p-type impurity regions 28 to 30 are formed in the semiconductor layers 104, 106, and 107.
[0088]
Through the above steps, an impurity region having n-type or p-type conductivity is formed in each semiconductor layer. As shown in FIG. 10A, in the semiconductor layer 103, the second n-type impurity region 24 functions as a source or drain region, and the third n-type impurity region 26 functions as an LDD region. In the semiconductor layer 104, the p-type impurity region 28 functions as a source or drain region. In the semiconductor layer 105, the second n-type impurity region 25 functions as a source or drain region, and the first n-type impurity region 20 functions as an LDD region. In the semiconductor layer 106, the p-type impurity region 29 functions as a source or drain region.
[0089]
Then, a second inorganic insulator layer 114 covering almost the entire surface is formed. The second inorganic insulator layer 114 is formed using a plasma CVD method or a sputtering method and has a thickness of 100 to 200 nm and is made of an inorganic insulator material containing silicon and hydrogen. One preferred example is SiH by plasma CVD. ₄ , N ₂ O, NH ₃ , H ₂ Is a 100-nm-thick silicon oxynitride film formed by using After that, heat treatment is performed at 410 ° C. for 1 hour in a nitrogen atmosphere. This heat treatment is intended for hydrogenation using the silicon oxynitride film as a hydrogen supply source.
[0090]
Next, as shown in FIG. 10B, a first organic insulator layer 115 is formed on the second inorganic insulator layer 114 with a thickness of 0.5 to 1 μm. A thermosetting acrylic material is used as the organic insulator material, and a coating with flatness can be formed by baking at 250 ° C. after spin coating. Further, a third inorganic insulator layer 116 is formed thereon with a thickness of 50 to 100 nm.
[0091]
In forming the third inorganic insulator layer 116, the substrate on which the second organic insulator layer 114 is formed is subjected to a heat treatment at 80 to 200 ° C. under reduced pressure to perform a dehydration treatment. An example of a material suitable for forming the third inorganic insulator layer 116 is a silicon nitride film formed by a sputtering method using silicon as a target. The film forming conditions may be appropriately selected, but it is particularly preferable to use nitrogen (N ₂ ) Or sputtering using a mixed gas of nitrogen and argon and applying high frequency power. The substrate temperature can be in the range of room temperature to 200 ° C.
[0092]
Next, as shown in FIG. 10C, a mask pattern is formed by photolithography using a photomask (5), and a contact hole 30 and an opening 31 of an input terminal portion are formed by dry etching. Dry etching conditions are CF ₄ , O ₂ , He is used to etch the third inorganic insulator layer 116 and the first organic insulator layer 115, and then CHF ₃ Is used to etch the second inorganic insulator layer and the gate insulating film.
[0093]
After that, as shown in FIG. 11A, wirings and pixel electrodes are formed using Al, Ti, Mo, W, or the like. A photomask (6) is used for forming the wiring. For example, a laminated film of a Ti film having a thickness of 50 to 250 nm and an alloy film (an alloy film of Al and Ti) having a thickness of 300 to 500 nm is used. Thus, the wirings 117 to 125 are formed. Then, ITO of 30 to 120 nm is formed by a sputtering method, and a predetermined pattern is formed by photolithography using a photomask (7). Thus, the anode layer 126 of the light emitting element is formed, and the ITO film 127 is formed on the wiring in the input terminal portion. FIG. 14 shows a top view of the pixel at this stage.
[0094]
Further, as shown in FIG. 11B, a second organic insulator layer 128 is formed. This is formed using an acrylic material as in the case of the first organic insulator layer 115. Then, openings are formed on the anode layer 126, the connection portion 310 of the cathode layer, and the input terminal portion using the photomask (8). The second organic insulator layer 128 is formed so as to cover the end of the anode layer 126, and the side wall has an inclination angle of 40 degrees.
[0095]
Organic insulator materials are hygroscopic and have the property of absorbing moisture. In order to prevent occlusion and re-release of moisture, a fourth inorganic insulator layer 129 is formed on the second organic insulator layer 128 to a thickness of 10 to 100 nm. The fourth inorganic insulator layer 129 is formed using an inorganic insulator material made of nitride. As the fourth inorganic insulator layer 129, a silicon nitride film formed by a sputtering method is used. For this, the same as the third inorganic insulator layer 116 is applied. The fourth inorganic insulator layer 129 is formed so as to cover the upper surface and side surfaces of the second organic insulator layer 128, and is formed so that an end overlapping the anode layer 126 has a tapered shape. By forming the fourth inorganic insulator layer 129 around the side surface of the opening formed in the second organic insulator layer 128 in the input terminal portion, it is possible to prevent moisture seepage from this portion. it can.
[0096]
After that, an organic compound layer 130 including a light emitting body is formed. The cathode layer 131 is formed over the organic compound layer including the light-emitting body by a sputtering method or a resistance heating evaporation method. Calcium fluoride or cesium fluoride is deposited as a cathode material by a vacuum evaporation method to form a cathode layer 131.
[0097]
The cathode 131 has a stacked structure of lithium fluoride, which is a material having a work function of 3.5 eV or less, and aluminum. In the sputtering method, a rare gas (typically, argon) is used as a sputtering gas. The ions of the sputtering gas are accelerated by the electric field and collide with the target, and are also accelerated by the weak sheath electric field generated on the substrate side, and are injected into the organic compound layer 130 including the luminescent material under the cathode. The rare gas element is located between the lattices of the organic compound layer, thereby preventing the molecules or atoms in the organic compound from being displaced and improving the stability of the organic compound. The fifth inorganic insulator layer 132 formed on the cathode 131 is formed using a silicon nitride film or a DLC film. Similarly, when formed by a sputtering method, ions of a rare gas (typically, argon) are accelerated by a weak sheath electric field on the substrate side, pass through the cathode 131, and are injected into the organic compound layer 130 therebelow. Is done. Then, the effect of improving the stability of the organic compound can be obtained.
[0098]
Finally, a light emitting device shown in FIG. 1 can be manufactured by forming a seal pattern and the like and fixing a sealing plate.
[0099]
[Example 2]
This embodiment exemplifies a mode in which the configuration of the pixel portion is different from that of the first embodiment in FIGS. In this embodiment, the third inorganic insulator layer 116, the wiring 123, and the anode layer 126 shown in FIG. 1 are formed in the same process.
[0100]
In FIG. 31A, the second organic insulator layer 180 covering the end of the anode layer 126 is formed of a photosensitive negative acrylic resin. Thus, the end of the second organic insulator layer 180 in contact with the wiring 126 becomes an inclined surface having a curvature as shown in the drawing, and the shape can be represented by at least two curvatures R1 and R2. Here, R1 has the center point on the upper layer side of the wiring, and R2 has the center point on the lower layer side. Although this shape slightly changes depending on the exposure conditions, the film thickness is 1.5 μm, and the values of R1 and R2 are 0.2 to 2 μm. In any case, an inclined surface whose curvature continuously changes is formed.
[0101]
After that, as shown in FIG. 31B, a fourth inorganic insulator layer 129, an organic compound layer 130, a cathode layer 131, and a fifth inorganic insulator layer 132 are formed along the inclined surface having a gentle curvature. The cross-sectional shape of the second organic insulator layer 180 has a function of relieving stress (particularly, a region surrounded by a dotted line in the figure where the anode layer 126, the fourth inorganic insulator layer 129, and the organic compound layer 130 overlap). Accordingly, it is possible to suppress the light emitting element from being deteriorated from this end. That is, it is possible to suppress the progressive deterioration in which the non-light-emitting area is expanded from the periphery of the pixel and expanded.
[0102]
FIG. 32A shows an example in which the second organic insulator layer 181 is formed of a photosensitive positive acrylic resin instead of a photosensitive negative acrylic resin. In this case, the cross-sectional shape at the end differs. I have. A radius of curvature R3 of 0.2 to 2 is obtained, and its center point is located on the lower layer side of the anode layer 126. After this is formed, a fourth inorganic insulator layer 129, a negative organic compound layer 130, a cathode layer 131, and a fifth inorganic insulator layer 132 are formed along an inclined surface having a curvature as shown in FIG. I do. In this case, a similar effect can be obtained.
[0103]
This embodiment can be implemented in combination with the first and second embodiments.
[0104]
[Example 3]
In Example 1 or 2, the structure of the organic compound layer in the light-emitting element 309 is not particularly limited, and a known structure can be used. The organic compound layer 130 includes a light-emitting layer, a hole-injection layer, an electron-injection layer, a hole-transport layer, an electron-transport layer, and the like, in which these layers are stacked or a part of a material forming these layers. Alternatively, it can be in the form of a mixture of all. Specifically, it includes a light emitting layer, a hole injection layer, an electron injection layer, a hole transport layer, an electron transport layer, and the like. Basically, an EL element has a structure in which an anode / light-emitting layer / cathode is laminated in this order. In addition to this structure, an anode / hole injection layer / light-emitting layer / cathode or an anode / hole injection layer is provided. / Light-emitting layer / electron transport layer / cathode and the like.
[0105]
The light-emitting layer is typically formed using an organic compound; however, the light-emitting layer is formed using a charge injection / transport substance and a light-emitting material containing an organic compound or an inorganic compound, and a low-molecular organic compound, a medium-molecular organic compound, It may include one or more layers selected from high molecular organic compounds, and may be combined with an inorganic compound having an electron injecting / transporting property or a hole injecting / transporting property. The term “medium molecule” refers to an organic compound having no sublimability and having a number of molecules of 20 or less or a chain of molecules having a length of 10 μm or less.
[0106]
Light emitting materials include metal complexes such as tris-8-quinolinolato aluminum complex and bis (benzoquinolinolato) beryllium complex as low molecular weight organic compounds, phenylanthracene derivatives, tetraaryldiamine derivatives, distyrylbenzene derivatives and the like. Coumarin derivatives, DCM, quinacridone, rubrene, and the like can be used as a host substance, and other known materials can be used. Examples of the high molecular organic compound include polyparaphenylene vinylene, polyparaphenylene, polythiophene, and polyfluorene. Poly (p-phenylene vinylene) (poly (p-phenylene vinylene)): (PPV), poly (2,5-dialkoxy-1,4-phenylenevinylene) (poly (2,5-dialkoxy-1,4-phenylene vinylene)): (RO-PPV), poly (2- (2′-ethyl-hexoxy) ) -5-Methoxy-1,4-phenylenevinylene) (poly [2- (2′-ethylhexoxy) -5-methoxy-1,4-phenylene vinylene]): (MEH-PPV), poly (2- (di Alkoxyphenyl) -1,4-phenylenevinylene) poly [2- (dialkoxyphenyl) -1,4-phenylene vinylene]): (ROP-PPV), polyparaphenylene (poly [p-phenylene]): (PPP), poly (2,5-dialkoxy-1, 4-phenylene) (poly (2,5-dialkyl-1,4-phenylene)): (RO-PPP), poly (2,5-dihexoxy-1,4-phenylene) (poly (2,5-dihexoxy-)) 1,4-phenylene)), polythiophene: (PT), poly (3-alkylthiophene) (poly (3-alkylthiophene)): (PAT), poly (3-hexylthiophene) (poly (3-hexylthiophene) ): (PHT), poly (3-cyclohexylthiophene): (PCHT), poly (3-cyclohexyl-4-methylthiophene) (poly (3-cyclohexyl-4-methylthiophene)): (PCHMT), poly (3,4-dicyclohexylthiophene): (PDCHT), poly [3- (4-octylphenyl) -thiophene] (poly [3- (4octylphenyl)- thiophene]): (POPT), poly [3- (4-octylphenyl) -2,2-bithiophene] (poly [3- (4-octylphenyl) -2,2-bithiophene]): (PTOP), polyfluorene (polyfluorene): (PF), poly (9,9-dialkylfluorene) (poly (9,9-dialkylfluorene): (PDAF), poly (9,9-dioctylfluorene) (poly (9) , 9-dioctylfluorene): (PDOF) and the like.
[0107]
An inorganic compound material may be applied to the charge injection / transport layer, and may be diamond-like carbon (DLC), Si, Ge, or an oxide or nitride thereof, and may be appropriately doped with P, B, N, or the like. good. Further, it may be an oxide, a nitride or a fluoride of an alkali metal or an alkaline earth metal, or a compound or alloy of the metal and at least Zn, Sn, V, Ru, Sm, and In.
[0108]
The materials listed above are examples, and using these materials, a functional layer such as a hole injecting and transporting layer, a hole transporting layer, an electron injecting and transporting layer, an electron transporting layer, a light emitting layer, an electron blocking layer, and a hole blocking layer are used. Can be formed to form a light-emitting element. Further, a mixed layer or a mixed junction of these layers may be formed. Electroluminescence includes light emission (fluorescence) when returning from the singlet excited state to the ground state and light emission (phosphorescence) when returning from the triplet excited state to the ground state. The electroluminescent device according to the present invention Either light emission may be used, or both light emissions may be used.
[0109]
This embodiment can be implemented in combination with the first to third embodiments.
[0110]
[Example 4]
In Embodiment 1, the anode layer 126 and the cathode layer 131 of the light emitting element 309 can be inverted. In this case, the lamination order is the cathode layer 126, the organic compound layer 130, and the anode layer 131. In addition to ITO, the anode layer 126 may be formed by forming a nitride metal (for example, titanium nitride) having a work function of 4 eV or more with a thickness of 10 to 30 nm so as to have a light-transmitting property. As the configuration of the cathode layer 131, a lithium fluoride layer of 0.5 to 5 nm may be formed on an aluminum layer of 10 to 30 nm.
[0111]
This embodiment can be implemented in combination with the first to fourth embodiments.
[0112]
[Example 5]
In this embodiment, one embodiment of a method for manufacturing a semiconductor layer applied to a TFT in Embodiment 1 will be described with reference to FIGS. In this embodiment, an amorphous silicon film formed on an insulating surface is crystallized by scanning with a continuous wave laser beam.
[0113]
In FIG. 18A, a barrier layer 402 including a 100-nm-thick silicon oxynitride film is formed over a glass substrate 401. An amorphous silicon film 403 formed by a plasma CVD method is formed thereon with a thickness of 54 nm.
[0114]
Laser light is Nd: YVO ₄ This is continuous light emitted from the laser oscillation device by continuous oscillation, and is the second harmonic (532 nm) obtained by the wavelength conversion element. The continuous wave laser light is condensed into an elliptical shape by the optical system, and the irradiation position of the substrate 401 and the laser light 405 is relatively moved to crystallize the amorphous silicon film 403 to form a crystalline silicon film 404. I do. As the optical system, a cylindrical lens of F20 is applied, whereby a laser beam of Φ2.5 mm can be formed into a long elliptical shape with a major axis of 2.5 mm and a minor axis of 20 μm on the irradiation surface.
[0115]
Of course, other laser oscillators can be applied, and as a continuous oscillation solid laser oscillator, YAG or YVO can be used. ₄ , YLF, YAlO ₃ A laser oscillation device using a crystal in which Cr, Nd, Er, Ho, Ce, Co, Ti, or Tm is doped into such a crystal can be used.
[0116]
Nd: YVO ₄ In the case of using the second harmonic (532 nm) of the laser oscillation device, the wavelength passes through the glass substrate 401 and the barrier layer 402, so that the laser light 406 is emitted from the glass substrate 401 side as illustrated in FIG. May be.
[0117]
Thus, crystallization proceeds from the region irradiated with the laser light 405, and the crystalline silicon film 404 can be formed. The scanning with the laser beam is not limited to scanning in one direction, but may be reciprocating scanning. In the case of reciprocating scanning, it is also possible to change the laser energy density for each scanning and to grow crystals stepwise. Further, it is also possible to serve also as a process of dehydrating which is often required when crystallizing an amorphous silicon film. First, scanning is performed at a low energy density, and after releasing hydrogen, the energy density is increased. Crystallization may be completed in the second scan. Even with such a manufacturing method, a crystalline semiconductor film in which crystal grains extend in the scanning direction of laser light can be obtained. After that, a semiconductor layer divided into islands is formed, and can be applied to the first embodiment.
[0118]
The configuration shown in this embodiment is an example, and a combination with another laser oscillation device or optical system may be applied as long as a similar effect can be obtained.
[0119]
[Example 6]
In this embodiment, one embodiment of a method for manufacturing a semiconductor layer applied to a TFT in Embodiment 1 will be described with reference to FIGS. In this embodiment, an amorphous silicon film formed on an insulating surface is crystallized in advance, and the crystal size is increased by continuous oscillation laser light.
[0120]
As shown in FIG. 19A, a blocking layer 502 and an amorphous silicon film 503 are formed over a glass substrate 501 as in the first embodiment. Thereafter, in order to lower the crystallization temperature and add Ni as a metal element that promotes crystal growth, an aqueous solution containing 5 ppm of nickel acetate is spin-coated to form the catalyst element-containing layer 504.
[0121]
Thereafter, as shown in FIG. 19B, the amorphous silicon film is crystallized by a heat treatment at 580 ° C. for 4 hours. In the crystallization, Ni is diffused while forming silicide in the amorphous silicon film by the action of Ni, and at the same time, crystal grows. The crystalline silicon film 506 thus formed is made up of a collection of rod-shaped or needle-shaped crystals, each of which is macroscopically grown with a specific direction, and thus has a uniform crystal orientation. Further, it is characterized in that the orientation ratio of the (110) plane is high.
[0122]
After that, as shown in FIG. 19C, the continuous oscillation laser beam 508 is scanned to improve the crystallinity of the crystalline silicon film 506. The irradiation of the laser beam causes the crystalline silicon film to melt and recrystallize. Along with this recrystallization, crystal growth is performed so that crystal grains extend in the scanning direction of the laser beam. In this case, since a crystalline silicon film having a uniform crystal plane is formed in advance, precipitation of crystals on different planes and generation of dislocations can be prevented. After that, a semiconductor layer divided into islands is formed, and can be applied to the first embodiment.
[0123]
[Example 7]
In this embodiment, one embodiment of a method for manufacturing a semiconductor layer applied to a TFT in Embodiment 1 will be described with reference to FIGS.
[0124]
As shown in FIG. 20A, a blocking layer 512 and an amorphous silicon film 513 are formed over a glass substrate 511 as in the first embodiment. A 100-nm-thick silicon oxide film is formed thereover as a mask insulating film 514 by a plasma CVD method, and an opening 515 is provided. Then, in order to add Ni as a catalyst element, an aqueous solution containing nickel acetate of 5 ppm is spin-coated. Ni contacts the amorphous silicon film at the opening 515.
[0125]
Thereafter, as shown in FIG. 20B, the amorphous silicon film is crystallized by heat treatment at 580 ° C. for 4 hours. Crystallization grows from the opening 515 in a direction parallel to the substrate surface by the action of the catalytic element. The crystalline silicon film 517 thus formed is composed of a collection of rod-shaped or needle-shaped crystals, each of which is macroscopically grown with a specific direction, and thus has a uniform crystal orientation. Another feature is that the orientation ratio in a specific direction is high.
[0126]
After the heat treatment, the mask insulating film 514 is removed by etching, so that a crystalline silicon film 517 as shown in FIG. 20C can be obtained. After that, a semiconductor layer divided into islands is formed, and can be applied to the first embodiment.
[0127]
Example 8
In Example 6 or 7, after forming the crystalline silicon film 507 or 517, 10 ¹⁹ atoms / cm ³ A step of removing the catalyst element remaining at the above concentration by gettering may be added.
[0128]
As shown in FIG. 21, a barrier layer 509 made of a thin silicon oxide film is formed on a crystalline silicon film 507, and 1 × 10 ²⁰ atoms / cm ³ ~ 1 × 10 ²¹ atoms / cm ³ The added amorphous silicon film is formed by a sputtering method.
[0129]
Then, it is added as a catalytic element by a heat treatment at 600 ° C. for 12 hours in a furnace annealing furnace or a heat treatment at 650 to 800 ° C. for 30 to 60 minutes by RTA using a lamp light or a heated gas as a heating means. Can be segregated at the gettering site 510. By this treatment, the concentration of the catalytic element in the crystalline silicon film 507 becomes 10 ¹⁷ atoms / cm ³ It can be:
[0130]
The gettering process performed under the same conditions is also effective for the crystalline silicon film manufactured in the fifth embodiment. Trace amounts of metal elements contained in the crystalline silicon film formed by irradiating the amorphous silicon film with laser light can be removed by this gettering treatment.
[0131]
[Example 9]
FIG. 23 illustrates an embodiment in which an EL panel in which a pixel portion and a driver circuit portion are integrated with a glass substrate as exemplified in Embodiment 1 is modularized. FIG. 23A shows an EL module in which an IC including a power supply circuit and the like is mounted on the EL panel.
[0132]
In FIG. 23A, an EL panel 800 includes a pixel portion 603 in which a light-emitting element is provided for each pixel, a scan line driver circuit 804 for selecting a pixel included in the pixel portion 803, and a video signal for a selected pixel. A signal line driver circuit 805 for supplying a signal is provided. A printed circuit board 806 is provided with a controller 801 and a power supply circuit 802. Various signals and a power supply voltage output from the controller 801 or the power supply circuit 802 are supplied to the pixel portion 803 of the EL panel 800 via the FPC 807, The signal is supplied to the circuit 804 and the signal line driver circuit 805.
[0133]
A power supply voltage and various signals to the printed circuit board 806 are supplied via an interface (I / F) unit 808 in which a plurality of input terminals are arranged. Although the printed circuit board 806 is mounted on the EL panel 800 using the FPC in this embodiment, the present invention is not necessarily limited to this configuration. The controller 801 and the power supply circuit 802 may be directly mounted on the EL panel 800 using a COG (Chip on Glass) method. Further, in the printed circuit board 806, noise may be input to a power supply voltage or a signal due to a resistance formed in the wiring between the wiring and the wiring itself, and the rising of the signal may be slowed down. Therefore, various elements such as a capacitor and a buffer may be provided on the printed circuit board 806 to prevent noise on the power supply voltage and the signal and to prevent the signal from rising slowly.
[0134]
FIG. 23B is a block diagram illustrating a structure of the printed board 806. The various signals and the power supply voltage supplied to the interface 808 are supplied to the controller 801 and the power supply voltage 802. The controller 801 includes an A / D converter 809, a phase locked loop (PLL) 810, a control signal generation unit 811, and SRAMs (Static Random Access Memory) 812 and 813. Although an SRAM is used in this embodiment, an SDRAM or a DRAM (Dynamic Random Access Memory) can be used instead of the SRAM if data can be written or read at high speed.
[0135]
The video signal supplied via the interface 808 is subjected to parallel-serial conversion in the A / D converter 809, and is input to the control signal generation unit 811 as a video signal corresponding to each of R, G, and B colors. An A / D converter 809 generates an Hsync signal, a Vsync signal, a clock signal CLK, and an AC voltage (AC Cont) based on various signals supplied via the interface 808, and inputs the generated signals to the control signal generation unit 811. Is done.
[0136]
The phase locked loop 810 has a function of matching the frequency of various signals supplied via the interface 808 with the phase of the operation frequency of the control signal generation unit 811. The operating frequency of the control signal generator 811 is not necessarily the same as the frequency of various signals supplied via the interface 808, but the operating frequency of the control signal generator 811 is adjusted in the phase locked loop 810 so as to be synchronized with each other. . The video signal input to the control signal generation unit 811 is temporarily written to the SRAMs 812 and 813 and held. The control signal generation unit 811 reads out video signals corresponding to all the pixels, one bit at a time, from among the video signals of all bits held in the SRAM 812 and supplies the video signals to the signal line driving circuit 805 of the EL panel 800.
[0137]
In addition, the control signal generation unit 811 supplies information on a period during which the light emitting element emits light for each bit to the scanning line driving circuit 804 of the EL panel 800. The power supply circuit 802 supplies a predetermined power supply voltage to the signal line driving circuit 805, the scanning line driving circuit 804, and the pixel portion 803 of the EL panel 800.
[0138]
FIG. 22 shows an example of an electronic device incorporating such an EL module.
[0139]
FIG. 22A illustrates an example in which this EL module is incorporated in a television receiver, which includes a housing 3001, a support 3002, a display portion 3003, and the like. The TFT substrate manufactured according to the present invention is applied to the display portion 3003, and a television receiver can be completed according to the present invention.
[0140]
FIG. 22B illustrates an example of manufacturing a video camera with this EL module, which includes a main body 3011, a display portion 3012, an audio input portion 3013, operation switches 3014, a battery 3015, an image receiving portion 3016, and the like. A TFT substrate manufactured according to the present invention is applied to the display portion 3012, and a video camera can be completed according to the present invention.
[0141]
FIG. 22C illustrates an example in which this EL module is incorporated in a notebook personal computer, which includes a main body 3021, a housing 3022, a display portion 3023, a keyboard 3024, and the like. The TFT substrate manufactured according to the present invention is applied to the display portion 3023, and a personal computer can be completed according to the present invention.
[0142]
FIG. 22D shows an example of manufacturing a PDA (Personal Digital Assistant) using this EL module, which includes a main body 3031, a stylus 3032, a display portion 3033, operation buttons 3034, an external interface 3035, and the like. The TFT substrate manufactured according to the present invention is applied to the display portion 3033, and a PDA can be completed according to the present invention.
[0143]
FIG. 22E shows an example in which this EL module is incorporated in a display unit of a vehicle-mounted audio device, and includes a main body 3041, a display unit 3042, operation switches 3043, 3044, and the like. The TFT substrate manufactured according to the present invention is applied to the display portion 3042, and an audio device can be completed according to the present invention.
[0144]
FIG. 22F illustrates an example of manufacturing a digital camera using this EL module. A main body 3051, a display portion (A) 3052, an eyepiece portion 3053, operation switches 3054, a display portion (B) 3055, a battery 3056, and the like are provided. It consists of. The TFT substrate manufactured according to the present invention is applied to the display portion (A) 3052 and the display portion (B) 3055, and a digital camera can be completed according to the present invention.
[0145]
FIG. 22G illustrates an example in which this EL module is incorporated in a mobile phone, which includes a main body 3061, an audio output portion 3062, an audio input portion 3063, a display portion 3064, operation switches 3065, an antenna 3066, and the like. The TFT substrate manufactured according to the present invention is applied to the display portion 3064, and a mobile phone can be completed according to the present invention.
[0146]
It should be noted that the device shown here is merely an example, and the present invention is not limited to these applications, but can be applied to various electronic devices.
[0147]
【The invention's effect】
According to the present invention, a semiconductor film, a gate insulating film, and a gate electrode, which are main components of a TFT, have their lower and upper layers selected from silicon nitride, silicon oxynitride, aluminum oxynitride, aluminum oxide, and aluminum nitride. It has a structure that prevents contamination with alkali metals and organic substances by being surrounded by an inorganic insulating material. On the other hand, the organic light-emitting element contains an alkali metal in part, and is surrounded by an inorganic insulating material selected from silicon nitride, silicon oxynitride, aluminum oxynitride, aluminum nitride, and DLC to prevent oxygen and moisture from entering from the outside. Achieve a structure to prevent. Then, the reliability of the light emitting device can be improved.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view illustrating a structure of a light emitting device of the present invention.
FIG. 2 is a top view illustrating a structure of a pixel portion of a light emitting device of the present invention.
FIG. 3 is a cross-sectional view illustrating a structure of a pixel portion of a light-emitting device of the present invention.
FIG. 4 is a cross-sectional view illustrating a structure of a pixel portion of a light-emitting device of the present invention.
FIG. 5 is an external view of a substrate including components of the light emitting device of the light emitting device of the present invention.
FIG. 6 is a diagram illustrating a substrate constituting a light emitting device formed on mother glass and a separation position.
FIG. 7 illustrates a configuration of an input terminal portion in a light emitting device of the present invention.
FIG. 8 is a cross-sectional view illustrating a manufacturing process of a light-emitting device of the present invention.
FIG. 9 is a cross-sectional view illustrating a manufacturing process of a light-emitting device of the present invention.
FIG. 10 is a cross-sectional view illustrating a manufacturing process of a light-emitting device of the present invention.
FIG. 11 is a cross-sectional view illustrating a manufacturing process of a light-emitting device of the present invention.
FIG. 12 is a top view illustrating a manufacturing process of a light-emitting device of the present invention.
FIG. 13 is a top view illustrating a manufacturing process of a light-emitting device of the present invention.
FIG. 14 is a top view illustrating a manufacturing process of a light-emitting device of the present invention.
FIG. 15 is a top view illustrating a structure of a pixel portion of a light-emitting device of the present invention.
FIG. 16 is a top view illustrating a structure of a pixel portion of a light-emitting device of the present invention.
FIG. 17 is an equivalent circuit diagram of a pixel.
FIG. 18 illustrates an example of a process for manufacturing a semiconductor layer applied to a TFT included in a light-emitting device of the present invention.
FIG. 19 illustrates an example of a process for manufacturing a semiconductor layer applied to a TFT included in a light-emitting device of the present invention.
FIG. 20 illustrates an example of a process for manufacturing a semiconductor layer applied to a TFT included in a light-emitting device of the present invention.
FIG. 21 illustrates an example of a process for manufacturing a semiconductor layer applied to a TFT included in a light-emitting device of the present invention.
FIG. 22 is a diagram showing an application example of the present invention.
FIG 23 illustrates an embodiment of an EL module.
FIG. 24 shows SIMS (mass secondary ion analysis) measurement data of a silicon nitride film.
FIG. 25 shows FT-IR measurement data of a silicon nitride film.
FIG. 26 shows transmittance measurement data of a silicon nitride film.
FIG. 27 shows CV characteristics before and after a BT stress test of a MOS structure.
FIG. 28 shows CV characteristics before and after a BT stress test of a MOS structure.
FIG. 29 illustrates a MOS structure.
FIG. 30 illustrates a sputtering apparatus.
FIG. 31 is a cross-sectional view illustrating a structure of a light-emitting device of the present invention.
FIG. 32 is a cross-sectional view illustrating a structure of a light-emitting device of the present invention.

Claims (15)

A thin film transistor having a semiconductor layer, a gate insulating film, and a gate electrode, and a light-emitting element having an organic compound layer containing a light-emitting substance between a cathode layer and an anode layer,
A first inorganic insulator layer on a lower layer side of the semiconductor layer, a second inorganic insulator layer on an upper layer side of the gate electrode, a first organic insulator layer on the second inorganic insulator layer, A third inorganic insulator layer on the organic insulator layer, an anode layer formed on the third inorganic insulator layer, a second organic insulator layer having an inclined surface overlapping an end of the anode layer, A fourth inorganic insulator layer formed on a surface and a side surface of the second organic insulator layer and having an opening on the anode layer; and the light emission formed in contact with the anode layer and the fourth inorganic insulator layer. An organic compound layer including a body, the cathode layer formed in contact with the organic compound layer including the light-emitting body, and a fifth inorganic insulator layer formed on the cathode layer,
The light emission of the luminous body is visible through the third inorganic insulator layer, and the third inorganic insulator layer and the fourth inorganic insulator layer are silicon nitride or aluminum nitride. Light emitting device. A thin film transistor having a semiconductor layer, a gate insulating film, and a gate electrode; a pixel portion having a light-emitting element having an organic compound layer containing a light-emitting body between an anode layer and a cathode layer; a semiconductor layer, a gate insulating film, and a gate electrode And a driving circuit portion formed of a thin film transistor having:
The drive circuit unit is a light emitting device formed in a peripheral region of the pixel unit, wherein a first inorganic insulator layer is provided below the semiconductor layer, and a second inorganic insulator layer is provided above the gate electrode. A first organic insulator layer on the second inorganic insulator layer, a third inorganic insulator layer on the first organic insulator layer, and an anode layer formed on the third inorganic insulator layer. A second organic insulator layer overlapping the end of the anode layer and having an inclination angle of 35 to 45 degrees, and a second organic insulator layer formed on the surface and side surfaces of the second organic insulator layer and having an opening on the anode layer. (4) an inorganic insulator layer, an organic compound layer including the light emitting body formed in contact with the anode layer and the fourth inorganic insulating layer, and a cathode formed in contact with the organic compound layer including the light emitting body A layer and a fifth inorganic insulator layer formed on the cathode layer,
Light emission of the luminous body is visible through the third inorganic insulator layer,
The third inorganic insulating layer and the fourth inorganic insulating layer are formed of a nitride of silicon or a nitride of aluminum, and a seal pattern is formed on the fourth inorganic insulating layer. A light-emitting device, which partially or entirely overlaps with the light-emitting device. 3. The device according to claim 1, wherein the second organic insulator layer is formed on the drive circuit unit, and a fourth inorganic insulator layer is formed on an upper surface and a side surface of the second organic insulator layer. 4. A seal pattern is formed on the inorganic insulator layer, and the seal pattern partially or entirely overlaps with the drive circuit portion, and a connection portion between the cathode layer and a wiring formed thereunder is formed of the seal pattern. A light-emitting device provided inside of a light-emitting device. 4. The light-emitting device according to claim 1, wherein the third to fifth inorganic insulator layers are silicon nitride formed by a high-frequency sputtering method. 5. 4. The light-emitting device according to claim 1, wherein the third inorganic insulating layer to the fifth inorganic insulating layer are silicon nitride having an etching rate of 9 nm / min or less. 5. 4. The semiconductor device according to claim 1, wherein the third to fifth inorganic insulating layers are made of silicon nitride having a hydrogen concentration of 1 × 10 ²¹ atoms / cm ³ or less. 5. Light emitting device. 4. The third inorganic insulating layer to the fifth inorganic insulating layer according to claim 1, wherein the third inorganic insulating layer to the fifth inorganic insulating layer have an etching rate of 9 nm / min or less and a hydrogen concentration of 1 × 10 ²¹ atoms / cm ³ or less. A light emitting device characterized by being silicon nitride. 4. The third inorganic insulating layer to the fifth inorganic insulating layer according to claim 1, wherein the third inorganic insulating layer to the fifth inorganic insulating layer have a hydrogen concentration of 1 × 10 ²¹ atoms / cm ³ or less and an oxygen concentration of 5 × 10 ^18. A light-emitting device comprising silicon nitride of up to 5 × 10 ²¹ atoms / cm ³ . 4. The third inorganic insulating layer to the fifth inorganic insulating layer according to claim 1, wherein the third inorganic insulating layer to the fifth inorganic insulating layer have an etching rate of 9 nm / min or less and a hydrogen concentration of 1 × 10 ²¹ atoms / cm ³ or less. And a silicon nitride having an oxygen concentration of 5 × 10 ^{18 to} 5 × 10 ²¹ atoms / cm ³ . A thin film transistor having a semiconductor layer, a gate insulating film, and a gate electrode; a pixel portion having a light-emitting element having an organic compound layer containing a light-emitting body between an anode layer and a cathode layer; a semiconductor layer, a gate insulating film, and a gate electrode And a driving circuit portion formed of a thin film transistor having: and wherein the driving circuit portion is a method for manufacturing a light-emitting device formed in a peripheral region of the pixel portion,
Forming a first inorganic insulator layer on a substrate, forming a semiconductor layer made of crystalline silicon on the first inorganic insulator layer, forming a gate insulating film and a gate electrode on the semiconductor layer, Forming an impurity region of one conductivity type or an opposite conductivity type in the layer, forming a second inorganic insulator layer on the gate electrode, and forming a first organic insulator layer on the second inorganic insulator layer; Forming, forming a third inorganic insulator layer on the second organic insulator layer, forming an anode layer in contact with the third inorganic insulator layer, and having an inclined surface overlapping an end of the anode layer. Forming a second organic insulator layer, forming a fourth inorganic insulator layer having openings on the anode layer formed on the surface and side surfaces of the second organic insulator layer, and forming the fourth inorganic insulator layer in contact with the anode layer; An organic compound layer including the luminous body, the side end of which overlaps with the fourth inorganic insulator layer; Consist each forming a said cathode layer formed in contact with the organic compound layer including a light emitting element,
The method for manufacturing a light-emitting device, wherein the third inorganic insulator layer and the fourth inorganic insulator layer are formed by forming silicon nitride or aluminum nitride by a high-frequency sputtering method. A thin film transistor having a semiconductor layer, a gate insulating film, and a gate electrode; a pixel portion having a light-emitting element having an organic compound layer containing a light-emitting body between an anode layer and a cathode layer; a semiconductor layer, a gate insulating film, and a gate electrode And a driving circuit portion formed of a thin film transistor having: and wherein the driving circuit portion is a method for manufacturing a light-emitting device formed in a peripheral region of the pixel portion,
Forming a first inorganic insulating layer on a substrate, forming a semiconductor layer made of crystalline silicon on the first inorganic insulating layer, forming a gate insulating film and a gate electrode on the semiconductor layer, An impurity region of one conductivity type or an opposite conductivity type is formed in the semiconductor layer, a second inorganic insulator layer is formed on the gate electrode, and a first organic insulator layer is formed on the second inorganic insulator layer. A third inorganic insulator layer is formed on the second organic insulator layer, an anode layer is formed in contact with the third inorganic insulator layer, and an inclined surface overlapping with the end of the wiring layer is formed. Forming a second organic insulator layer having a fourth inorganic insulator layer formed on the surface and side surfaces of the second organic insulator layer and having an opening on the anode layer, in contact with the anode layer; An organic compound layer that is formed and includes the luminous body, the side end of which overlaps with the fourth inorganic insulator layer; Forming the cathode layer formed in contact with the organic compound layer including the light-emitting body, and forming a seal pattern on the fourth inorganic insulator layer at a position where the driving circuit portion partially or entirely overlaps; Forming and attaching each sealing plate in accordance with the seal pattern,
The method for manufacturing a light-emitting device, wherein the third inorganic insulator layer and the fourth inorganic insulator layer are formed using silicon nitride or aluminum nitride by a high-frequency sputtering method. 12. The semiconductor device according to claim 10, wherein the third inorganic insulating layer and the fourth inorganic insulating layer are formed of silicon nitride by a high-frequency sputtering method using silicon as a target and using only nitrogen as a sputtering gas. Method for manufacturing a light emitting device. 12. The single-crystal silicon target according to claim 10, wherein the third inorganic insulator layer and the fourth inorganic insulator layer have a back pressure of 1 × 10 ⁻³ Pa or less using a turbo molecular pump or a cryopump. 13. By sputtering with N ₂ gas or a mixed gas of N ₂ and a rare gas. 14. The method according to claim 10, wherein after the first organic insulator layer is formed, a heat treatment is performed under reduced pressure, a dehydration treatment is performed, and the third organic insulator layer is dehydrated. A method for manufacturing a light-emitting device, comprising forming an inorganic insulator layer. 14. The method according to claim 10, wherein after forming the second organic insulator layer, a heat treatment is performed under reduced pressure, a dehydration treatment is performed, and the fourth organic insulator layer is dehydrated. A method for manufacturing a light-emitting device, comprising forming an inorganic insulator layer.

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