JP2004063878A - Charge-detecting apparatus and solid-state image pickup device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a charge-detecting apparatus in which a charge detection sensitivity is improved and microfabrication is made possible. <P>SOLUTION: A charge-detecting part has an n+ type FD region 1, which is formed continuous to the embedded channel of a horizontal CCD transfer part, and a potential change in the FD region 1 is transmitted to a gate electrode 70 of a drive transistor of a first stage via aluminum wiring 3 and electrode wiring 71. Impurity concentration in a (p)-type impurity region 90 in a lower portion of electrode wiring 71 is set low, such that its surface becomes a depletion layer, which is depleted when operating the charge-detecting apparatus. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a charge detection device having a floating diffusion portion, and more particularly to a charge detection device used in a solid-state imaging device that transfers signal charges by a CCD transfer portion.
[0002]
[Prior art]
A CCD solid-state imaging device that transfers signal charges from a photoelectric conversion unit by a CCD transfer unit is a plurality of vertical CCDs that vertically transfer signal charges read from photoelectric conversion elements (pixels) arranged two-dimensionally in a matrix. A transfer unit; a horizontal CCD transfer unit that horizontally transfers signal charges for one line transferred from the vertical CCD transfer unit; and a charge detection unit that converts the signal charges transferred by the horizontal CCD transfer unit into electrical signals and outputs the signals. And have.
[0003]
The charge detection unit of this CCD image pickup apparatus has an FD amplifier configuration for detecting a potential change in a floating diffusion (hereinafter, also referred to as “FD”) part to which signal charges from the horizontal CCD transfer unit are transferred. It has become.
[0004]
FIG. 3 is a plan view showing a schematic configuration of a main part of a charge detection unit of a conventional CCD image pickup device, and FIG. 4 shows a potential distribution of an AA cross section of FIG. 3 and a region along AA. FIG. FIG. 3 shows an end of a horizontal CCD transfer unit including an n-type buried channel functioning as a charge transfer channel (a line 60 indicates an end of the buried channel), final stage transfer electrodes 61a and 61b, and an output gate electrode 62. The parts are shown. The charge detection unit includes an n + type FD region 1 formed continuously in the embedded channel of the horizontal CCD transfer unit, a reset gate unit including a reset gate electrode 81, and a reset drain 82. The charge detection unit includes a first-stage drive transistor including a source 51, an output drain 52, and a gate electrode 70, and a contact unit that connects the electrode wiring 71 extended from the gate electrode and the FD region 1 with an aluminum wiring 3. 2 is included. The gate electrode 70 and the electrode wiring 71 are made of poly-Si. Therefore, since the gate electrode 70 is connected to the FD region 1 through the aluminum wiring 3 and the electrode wiring 71, the gate electrode 70 has substantially the same potential as the FD region 1.
[0005]
A field oxide film 41 is formed in the element isolation region around the FD portion (a line 4 in FIG. 3 indicates an end portion of the field oxide film). The field oxide film 41 is a thick oxide film formed by LOCOS as shown in FIG. 4A, and a p-type impurity region 42 is formed below the field oxide film 41. In FIG. 4A, the description of the planarizing film on the surface, the contact hole provided in the planarizing film, the aluminum wiring above the planarizing film, etc. is omitted. The above-described solid-state imaging device is formed in a p ⁻ well on an n ⁻ type semiconductor substrate.
[0006]
The thickness of the field oxide film 41 and the impurity concentration of the p-type impurity region 42 are set to values such that the p-type impurity region 42 is not inverted by the operating voltage of the charge detection unit. For example, when the voltage applied to the reset drain is 15 V, the thickness of the field oxide film is 600 nm and the impurity concentration is about 1 × 10 ¹⁸ / cm ³ . Further, since LOCOS has an inclined portion (bird's beak) at its end, a width of about 1.2 μm is required to obtain a field oxide film having a necessary thickness. FIG. 4B shows the potential distribution in that case. The line 100a is the potential distribution when the FD portion is reset, and the line 100b is the potential distribution when charge is transferred to the FD portion. . As shown in FIG. 4, the element isolation region is at the ground potential regardless of the potential of the FD portion.
[0007]
The principle of signal charge detection by the charge detection unit as shown in FIGS. 3 and 4 is that the change in charge amount ΔQ in the capacitor having the capacitance C and the change in voltage ΔV generated at both ends of the capacitor are ΔQ = C · ΔV. Is used to convert the signal charge into a voltage. The converted output voltage is output via a source follower circuit including a first stage drive transistor.
[0008]
Specifically, the reset pulse voltage applied to the reset gate electrode 81 via the terminal RS is set to the high level to reset the FD region 1, the reset pulse voltage is set to the low level, and then the final stage is set via the terminal H1L. The change in potential when the transfer pulse applied to the transfer electrodes 61a and 61b is set to low to transfer the signal charge from the horizontal CCD transfer unit to the FD region 1 is detected.
[0009]
In the solid-state imaging device, there is an increasing demand for higher sensitivity of the charge detection unit as the pixel size is reduced. However, the detection sensitivity of the charge detection unit configured as shown in FIGS. As is clear from FIG. 4, since it is proportional to the reciprocal of the total capacitance C of the FD portion, it is required to make the total capacitance C of the FD portion as small as possible. The capacitance C of the FD section includes the junction capacitance C1 of the FD section, the coupling capacity C2 of the FD section and the reset gate electrode 81, the coupling capacity C3 of the FD section and the output gate electrode 62, and the gate of the FD section and the first stage drive transistor. Are represented by the sum of the parasitic capacitance C4 of the wiring section 71, the gate capacitance C5 of the first-stage drive transistor, and the coupling capacitance C6 between the gate electrode 70 of the first-stage drive transistor and the output drain.
[0010]
Conventionally, in order to improve the charge detection sensitivity, each capacitor has been devised to be small. However, the size of the gate electrode of the first stage drive transistor, such as the parasitic capacitance C4, the gate capacitance C5, and the coupling capacitance C6, and the wiring to the gate electrode It is difficult to reduce the capacity depending on the size of the sensor, and this is a bottleneck for high detection sensitivity.
[0011]
That is, as described above, in order not to invert the p-type impurity region below the wiring portion connecting the FD portion and the gate electrode of the first stage drive transistor, the thickness of the field oxide film formed by LOCOS is set to a certain value or more. Therefore, the length L of the wiring portion cannot be reduced. Further, when the field oxide film is formed of a thick oxide film having an inclination at the end, it is difficult to reduce the width W of the gate electrode of the first-stage drive transistor because of the inclined part of the field oxide film.
[0012]
[Problems to be solved by the invention]
The present invention has been made in view of the above problems, and an object of the present invention is to provide a charge detection device that can improve charge detection sensitivity and can be miniaturized. It is another object of the present invention to provide a solid-state imaging device that can increase the number of pixels by using such a charge detection device as an output unit.
[0013]
[Means for Solving the Problems]
The charge detection device of the present invention is a charge detection device having a floating diffusion portion, and the surface of the semiconductor substrate in the element isolation region in the vicinity of the wiring for transmitting the potential change of the floating diffusion portion to another element during operation. This is a depleted layer that is depleted. With such a configuration, the width of the element isolation region in the vicinity of the wiring for transmitting the potential change of the floating diffusion portion to other elements can be reduced, so that the elements can be miniaturized. In addition, since the length of the wiring is reduced, the capacitance of the FD portion is reduced and the charge detection sensitivity is improved.
[0014]
The charge detection device of the present invention is a charge detection device having a floating diffusion portion, and includes a device isolation region in the vicinity of the wiring for transmitting a potential change of the floating diffusion portion to another element. The surface of the semiconductor substrate in the element isolation region is a depleted layer that is depleted during operation.
[0015]
In the charge detection device of the present invention, the surface of the semiconductor substrate in the element isolation region around the other element to which the wiring is connected is a depletion layer that is depleted during operation.
[0016]
The other element in the charge detection device of the present invention is a first-stage drive transistor of a source follower circuit that detects a potential change in the floating diffusion portion.
[0017]
The depletion layer in the charge detection device of the present invention is formed of a semiconductor layer having a conductivity type opposite to that of the floating diffusion portion.
[0018]
In the charge detection device of the present invention, the thickness of the oxide film on the surface of the opposite conductivity type semiconductor layer is substantially the same as the thickness of the oxide film in the active region of the charge detection device.
[0019]
The solid-state imaging device of the present invention includes the above-described charge detection device. Therefore, high output can be obtained even if the pixel area is miniaturized, and the number of pixels can be increased.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0021]
(First embodiment)
FIG. 1 is a diagram showing a schematic configuration of a charge detection device according to a first embodiment of the present invention. The charge detection device of FIG. 1 is used as a charge detection unit of a CCD image pickup device, and FIG. 1 (a) shows a cross section of a portion corresponding to FIG. 4 (a), and FIG. Indicates the potential distribution of the corresponding region.
[0022]
In the charge detection device of FIG. 1, the distance between the FD portion and the first stage drive transistor is reduced, the field oxide film 41 due to LOCOS below the electrode wiring 71 is not present, and the p-type impurity region below the electrode wiring 71. The structure is similar to that shown in FIGS. 3 and 4 except that the impurity concentration of 90 is lowered. Further, the oxide film between the electrode wiring 71 and the p-type impurity region 90 has the same thickness as the oxide film on the surface of the active region such as the FD portion or the first stage drive transistor.
[0023]
The surface of the p-type impurity region 90 becomes a depletion layer that is depleted during operation of the charge detection device. As described above, when the applied voltage to the reset drain is 15 V, the surface is about 1 × 10 ¹⁵ / cm ³ . . Therefore, when the FD region 1 is reset, a potential distribution as shown by a line 10a in FIG. That is, since p type impurity region 90 is depleted, it forms a potential barrier that separates the FD portion and the channel of the first stage drive transistor. The potential barrier height is ³ to 5 V when viewed from the channel side when the impurity concentration of the channel region of the first-stage drive transistor is about 1 × 10 ¹² / cm ³ .
[0024]
When the signal charge is transferred to the FD region 1, the potential of the FD region 1 is lowered, and at the same time, the potentials of the electrode 70 and the electrode wiring 71 are also lowered. Therefore, although the channel potential of the first-stage drive transistor is lowered, the potential of the depletion layer of the p-type impurity region 90 is also lowered (because the thickness of the insulating film is the same and changes with the same modulation factor). The length is almost maintained (see line 10b in FIG. 1B). Therefore, the FD portion and the first stage drive transistor are separated from each other.
[0025]
Since the width of the p-type impurity region 90 can theoretically be reduced to the manufacturing limit, the length L of the electrode wiring 71 is shortened. Further, since there is no thick field oxide film, the width W of the electrode 70 can be shortened. Therefore, the parasitic capacitance C4 of the wiring portion 71, the capacitance C5 of the gate of the first stage drive transistor, and the coupling capacitance C6 between the gate electrode 70 of the first stage drive transistor and the output drain can be reduced, and the charge detection sensitivity is improved. Although the capacitance between the gate electrode 70 and the electrode wiring 71 and the substrate increases as the thickness of the oxide film below the electrode wiring 71 decreases, the potential of the depletion layer changes with a high degree of modulation. Therefore, the substantial capacity increase is small.
[0026]
Further, since the substrate surface around the FD portion is flat, the coating thickness of the photoresist at the time of manufacturing the FD portion can be made uniform, and the FD region 1 can be easily miniaturized. Therefore, the junction capacitance C1 of the FD portion can be reduced, and the charge detection sensitivity can be improved.
[0027]
(Second Embodiment)
FIG. 2 is a diagram showing a schematic configuration of the charge detection device according to the second embodiment of the present invention. The charge detection device of FIG. 2 is used as a charge detection unit of a CCD image pickup device in the same manner as the charge detection device of FIG. 1, and FIG. 2A shows a cross-section of a portion corresponding to FIG. FIG. 2B shows the potential distribution of the corresponding region.
[0028]
The charge detection device of FIG. 2 is obtained by changing the configuration of the element isolation region around the FD portion and around the first-stage drive transistor. That is, the field oxide film 41 by LOCOS is eliminated, the thickness is made the same as the oxide film on the surface of the active region, the impurity concentration of the p-type impurity region 90 on the surface is lowered, and the element isolation region in the vicinity of the electrode wiring 71 in FIG. The configuration is the same.
[0029]
With such a configuration, a depletion layer is formed around the FD portion and the entire periphery of the first-stage drive transistor, resulting in a potential distribution as shown in FIG. In FIG. 2B, a line 11a is a potential distribution at the time of resetting the FD portion, and a line 11b is a potential distribution at the time of signal charge transfer. As is clear from the figure, since the depletion layer spreads, the overall capacitance decreases.
[0030]
Further, since the thick field oxide film 41 is eliminated and the gate electrode 70 can be flattened, the width W can be reduced to substantially the same as the channel width. Therefore, the capacitance C5 of the gate of the first stage drive transistor and the coupling capacitance C6 between the gate electrode 70 of the first stage drive transistor and the output drain can be reduced, and the charge detection sensitivity is further improved.
[0031]
In FIG. 2, the configurations of the element isolation regions around the FD portion and the first stage drive transistor are both changed, but either one of the element isolation regions is changed so that the other element isolation region is thick. The field oxide film 41 may be left. In the first and second embodiments, not only the field oxide film 41 by LOCOS but also a field oxide film in which an inclined portion is provided at the end of a thick oxide film may be used.
[0032]
【The invention's effect】
As is apparent from the above description, according to the present invention, it is possible to provide a charge detection device that can improve charge detection sensitivity and can be miniaturized. In addition, when such a charge detection device is used as an output unit, a solid-state imaging device capable of increasing the number of pixels can be provided.
[Brief description of the drawings]
FIG. 1 is a diagram showing a schematic configuration of a charge detection device according to a first embodiment of the present invention. FIG. 2 is a diagram showing a schematic configuration of a charge detection device according to a second embodiment of the present invention. FIG. 4 is a plan view showing a schematic configuration of a main part of a charge detection unit of a conventional CCD image pickup device. FIG. 4 is a cross-sectional view taken along the line AA in FIG.
DESCRIPTION OF SYMBOLS 1 ... Floating diffusion area | region 2 ... Contact part 3 ... Aluminum wiring 4 ... End part 41 of field oxide film ... Field oxide film 42 ... P-type impurity region 51 ... Source 52
52 ... Output drains 61a, 61b ... Last transfer electrode 62 ... Output gate electrode 70 ... Gate electrode 71 ... Electrode wiring 81 ... Reset gate electrode 82 ... Reset drain 90 ... P-type impurity regions

Claims (7)

A charge detection device having a floating diffusion part,
A charge detection device in which a semiconductor substrate surface in an element isolation region in the vicinity of a wiring for transmitting a potential change of the floating diffusion portion to another element is a depletion layer that is depleted during operation. A charge detection device having a floating diffusion part,
Charge that is a depletion layer that depletes the semiconductor substrate surface in the element isolation region around the floating diffusion portion including the element isolation region in the vicinity of the wiring for transmitting the potential change of the floating diffusion portion to another element during operation Detection device. The charge detection device according to claim 1 or 2,
Furthermore, the charge detection device wherein the surface of the semiconductor substrate in the element isolation region around the other element to which the wiring is connected is a depletion layer that is depleted during operation. The charge detection device according to any one of claims 1 to 3,
The other element is a charge detection device that is a first-stage drive transistor of a source follower circuit that detects a potential change in the floating diffusion portion. The charge detection device according to any one of claims 1 to 4,
The depletion layer is a charge detection device formed by a semiconductor layer having a conductivity type opposite to that of the floating diffusion portion. 6. The charge detection device according to claim 5, wherein the thickness of the oxide film on the surface of the opposite conductivity type semiconductor layer is substantially the same as the thickness of the oxide film in the active region of the charge detection device. A solid-state imaging device comprising the charge detection device according to claim 1.

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