JP2004088134A - Semiconductor light emitting device and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a semiconductor light emitting device having good light emitting characteristics, high reliability and long life.
A plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure is grown on a nitride III-V compound semiconductor substrate, comprising: a nitride III-V compound semiconductor substrate; There is at least one second region at the end face or corner of the.
[Selection] Figure 8

Description

The present invention relates to a semiconductor light emitting device and a semiconductor device, and is suitable for application to, for example, a semiconductor laser, a light emitting diode, or an electron transit device using a nitride III-V compound semiconductor.

Conventionally, when manufacturing a semiconductor element, a method of processing after a desired semiconductor layer is grown on a suitable substrate has been widely used. In general, the characteristics of a semiconductor layer change very sensitively depending on the substrate information such as the lattice constant. Therefore, it is most desirable to employ a substrate of the same quality as the semiconductor layer to be grown to epitaxially grow the semiconductor layer. Is the method.

Therefore, the substrate of the semiconductor element is required to be formed of the same material as the semiconductor used for the element and have a low defect density such as dislocation. This is because defects in the substrate often propagate as they are to the semiconductor layer thereabove, leading to deterioration in device characteristics.

By the way, nitride-based III-V group compound semiconductors represented by GaN have a large band gap, and therefore, as light emitting elements in a wavelength region that is difficult to obtain with other semiconductors such as ultraviolet to purple, and further blue and green. Development of the LED has progressed and light emitting diodes (LEDs) and semiconductor lasers (LDs) have already been put into practical use.

However, bulk growth is difficult with nitride III-V compound semiconductors, and it is difficult to obtain a substrate with few defects that can be used as a substrate for a semiconductor device. Therefore, in most cases, crystal growth of a nitride III-V compound semiconductor must be performed on a substrate that is not homogeneous with a nitride III-V compound semiconductor such as sapphire or SiC, and a low-temperature buffer layer is introduced. Such a method is necessary. However, even a nitride III-V compound semiconductor obtained by performing growth using such a technique has a very high defect density, and the influence on device characteristics cannot be ignored. Become.

Accordingly, as a substrate for producing a nitride III-V compound semiconductor device having good characteristics, a substrate of the same quality, that is, a nitride III-V compound semiconductor and having a low defect density is desired. ing.

Up to now, as a method of manufacturing a nitride-based III-V compound semiconductor substrate having a low defect density, the growth surface of vapor phase growth is not in a planar state but has a three-dimensional facet structure, and has a facet structure. A method of manufacturing a single crystal GaN substrate has been proposed in which dislocations are reduced by growing without embedding a facet structure (Patent Document 1).
JP 2001-102307 A

However, since the technique disclosed in Patent Document 1 reduces threading dislocations in other regions by concentrating threading dislocations in a region where a growth layer is present, the obtained single crystal GaN substrate includes A low defect density region and a high defect density region coexist, and the position where the high defect density region is generated cannot be controlled and is generated randomly. Therefore, when a semiconductor device such as a semiconductor laser is manufactured by growing a nitride III-V compound semiconductor layer on the single crystal GaN substrate, a high defect density region is formed in the light emitting region. Inevitably, the emission characteristics and reliability of the semiconductor laser are reduced.

Therefore, the problem to be solved by the present invention is to provide a semiconductor light emitting device having good characteristics such as light emission characteristics, high reliability, and long life.

More generally, the problem to be solved by the present invention is to provide a semiconductor element having good characteristics, high reliability and long life.

The present inventor has intensively studied to solve the above problems. The outline is as follows.

The inventor has succeeded in controlling the position of the high defect density region generated in the low defect density region as a result of improving the technique disclosed in Patent Document 1. According to this, it is possible to obtain a substrate in which high defect density regions are regularly arranged in the low defect density region, for example, periodically, and the arrangement pattern of the high defect density regions can be freely changed.

When manufacturing a semiconductor light emitting device such as a semiconductor laser using such a substrate, more generally, a semiconductor device eliminates or reduces the adverse effect of a high defect density region present on the substrate on the device. It is necessary to let As a result of various studies on the method for that purpose, the following method was found to be effective.

That is, in the above substrate, since the high defect density region can be regularly arranged, the element size, the element arrangement, or the active region of the element (for example, in the case of a light emitting element) The position of the light emitting region can be designed. With this design, it is possible to prevent a high defect density region from being included in a region (hereinafter referred to as an “element region”) or an active region of the element that will ultimately become a chip by scribing the substrate. In this way, even if defects propagate from the high defect density region of the base substrate to the semiconductor layer grown on the substrate, it is possible to prevent the adverse effect thereof from affecting the element region or the active region. It is possible to prevent deterioration of device characteristics and reliability due to defects.

The above technique is also effective for manufacturing a semiconductor device using a semiconductor other than a nitride III-V compound semiconductor when it is difficult to obtain a substrate having the same quality and low defect density as the semiconductor used for the device. is there. More generally, when it is difficult to obtain a substrate having the same quality and low defect density as the material used for the element, it is effective for manufacturing such an element.
This invention has been devised as a result of further studies based on the above studies by the present inventors.

That is, in order to solve the above problem, the first invention of the present invention is:
A nitride system in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a light emitting device structure on a III-V compound semiconductor substrate,
The element region is defined on the nitride-based III-V compound semiconductor substrate so that the second region is not substantially included.

Here, “the second region is not substantially included” not only means that the contour line of the element region completely includes the second region, but also the contour line includes the second region. This also includes the case where the second region remains on the end face or corner of the chip obtained after scribing the substrate (the same applies hereinafter).

Specifically, the size and arrangement of the element region are determined so that the second region is not substantially included. The plurality of second regions are typically provided periodically, specifically, for example, in a hexagonal lattice shape, a rectangular lattice shape, or a square lattice shape. These two or more kinds of arrangement patterns may be mixed. Furthermore, a portion where the second region is provided in a periodic arrangement and a portion where the second region is provided in a regular but non-periodic arrangement may be mixed.

The element region is typically a rectangle or a square, and from the viewpoint of good cleaving, the pair of opposite sides is preferably parallel to the <1-100> direction, and the other A pair of opposing sides is parallel to the <11-20> direction.

The interval between the two second regions adjacent to each other or the arrangement period of the second regions is selected according to the size of the element and the like, but is generally 20 μm or more, 50 μm or more, or 100 μm or more. The upper limit of the interval between the second regions or the arrangement period of the second regions is not necessarily clear, but is generally about 1000 μm. This second region typically penetrates the nitride III-V compound semiconductor substrate. The second region typically has an indefinite polygonal column shape. A third region having a third average dislocation density higher than the first average dislocation density and lower than the second average dislocation density exists as a transition region between the first region and the second region. In this case, the element region is most preferably defined so that the second region and the third region are not substantially included.

The diameter of the second region is typically 10 μm to 100 μm, more typically 20 μm to 50 μm. When the third region is present, its diameter is typically 20 μm or more and 200 μm or less, more typically 40 μm or more and 160 μm or less, and most typically 60 μm or more than the diameter of the second region. Larger than 140 μm.

The average dislocation density in the second region is generally at least 5 times the dislocation density in the first region. Typically, the average dislocation density in the first region is 2 × 10 ⁶ cm ⁻² or less, and the average dislocation density in the second region is 1 × 10 ⁸ cm ⁻² or more. If the third region is present, the average dislocation density that is typically less than 1 × 10 ⁸ cm ^-2, greater than 2 × 10 ⁶ cm ^-2.

The light emitting region of the semiconductor light emitting device is separated from the second region by 1 μm or more, preferably 10 μm or more, more preferably 100 μm or more in order to prevent adverse effects due to the second region having a high average dislocation density. When the third region exists, it is most preferable that the light emitting region of the semiconductor light emitting element does not include the second region and the third region. More specifically, the semiconductor light emitting element is a semiconductor laser or a light emitting diode. However, in the case of the former semiconductor laser, the region where the drive current flows through the stripe electrode is preferably 1 μm or more from the second region, More preferably, it is 10 μm or more, and more preferably 100 μm or more. When the third region exists, it is most preferable that the region through which the driving current flows through the stripe electrode does not include the second region and the third region. One or a plurality of stripe-shaped electrodes, that is, laser stripes may be provided, and the width thereof may be selected as necessary.

The outline of the element region is an area where the second region is not substantially included in the element region, and the substrate area is efficiently used according to the arrangement pattern of the second region, their interval or arrangement period, etc. Typically, it is selected so as to include a straight line connecting at least two second regions adjacent to each other. In the scribing process for forming a chip, a nitride III-V compound semiconductor layer is preferably grown along a contour line including a straight line connecting at least two second regions adjacent to each other. The scribing of the nitride III-V compound semiconductor substrate is performed. This scribing is typically performed by cleavage, but may be performed using other methods such as a diamond saw or a laser beam. In particular, when scribing is performed by cleavage, if the contour line of the element region includes a straight line connecting at least two second regions adjacent to each other, the second region having a higher average dislocation density than the first region has mechanical strength. Is lower than the first region, it has the advantage that it can be cleaved easily and satisfactorily. This is particularly advantageous when obtaining a good cavity end face in a semiconductor laser. The outline of the element region may be selected so as not to pass through any second region. In this case, in order to minimize the adverse effect of the second region, the contour line of the element region is preferably separated from the second region by 1 μm or more. Then, in the scribing step, the nitride III-V compound semiconductor substrate on which the nitride III-V compound semiconductor layer is grown along the contour line that is 1 μm or more inward from the second region. Do scribing.

Nitride III-V compound semiconductor substrate or the nitride III-V compound semiconductor layer, most commonly _{Al X B y Ga 1-xyz} In z As u N 1-uv P v ( where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, 0 ≦ u ≦ 1, 0 ≦ v ≦ 1, 0 ≦ x + y + z <1, 0 ≦ u + v <1), and more specifically, Al _{X y y} Ga _1-xyz In _z N (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, 0 ≦ x + y + z <1), typically Al _x Ga _1-xz In _z N (where 0 ≦ x ≦ 1, 0 ≦ z ≦ 1). The nitride-based III-V compound semiconductor substrate is most typically made of GaN.
What has been described in relation to the first invention of the present invention is also valid for the following inventions as long as it is not contrary to the nature thereof.

The second invention of this invention is:
A nitride system in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. Growing a nitride III-V compound semiconductor layer forming a light emitting device structure on the III-V compound semiconductor substrate;
Scribing a nitride III-V compound semiconductor substrate on which a nitride III-V compound semiconductor layer is grown along a contour line including a straight line connecting at least two second regions adjacent to each other. A semiconductor light emitting device manufactured by the method described above.

The third invention of the present invention is:
A nitride system in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure is grown on a III-V compound semiconductor substrate,
The nitride-based III-V group compound semiconductor substrate is characterized in that at least one second region is present on the end face or corner portion.

The fourth invention of the present invention is:
A nitride system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a light emitting device structure on a III-V compound semiconductor substrate,
The element region is defined on the nitride-based III-V compound semiconductor substrate so that the second region is not substantially included.

The fifth invention of the present invention is:
A nitride system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. Growing a nitride III-V compound semiconductor layer forming a light emitting device structure on the III-V compound semiconductor substrate;
Scribing a nitride III-V compound semiconductor substrate on which a nitride III-V compound semiconductor layer is grown along a contour line including a straight line connecting at least two second regions adjacent to each other. A semiconductor light emitting device manufactured by the method described above.

The sixth invention of the present invention is:
A nitride system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure is grown on a III-V compound semiconductor substrate,
The nitride-based III-V group compound semiconductor substrate is characterized in that at least one second region is present on the end face or corner portion.

In the fourth, fifth, and sixth inventions of the present invention, the “average defect density” means the average density of all the lattice defects that adversely affect the characteristics and reliability of the element, and the defects include dislocations and laminations. Anything such as defects and point defects is included (the same applies hereinafter).

The seventh invention of the present invention is:
A light emitting device structure is formed on a nitride III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystal A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer.
The element region is defined so that the second region is not substantially included.

The eighth invention of the present invention is:
A light emitting device structure is formed on a nitride III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystal A nitride III-V compound semiconductor layer is grown;
Scribing a nitride III-V compound semiconductor substrate on which a nitride III-V compound semiconductor layer is grown along a contour line including a straight line connecting at least two second regions adjacent to each other. A semiconductor light emitting device manufactured by the method described above.

The ninth aspect of the present invention is:
A light emitting device structure is formed on a nitride III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystal A semiconductor light emitting device in which a nitride III-V compound semiconductor layer is grown,
The nitride-based III-V group compound semiconductor substrate is characterized in that at least one second region is present on the end face or corner portion.

In the seventh, eighth and ninth inventions of the present invention, typically, the first region made of a crystal is a single crystal, and the second region having lower crystallinity than the first region is a single crystal. , Polycrystalline or amorphous, or a mixture of two or more thereof (the same applies hereinafter). This corresponds to the case where the average dislocation density or average defect density in the second region is higher than the average dislocation density or average defect density in the first region.

The tenth aspect of the present invention is:
A nitride system in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate,
The element region is defined on the nitride-based III-V compound semiconductor substrate so that the second region is not substantially included.

The eleventh aspect of the present invention is:
A nitride system in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. Growing a nitride-based III-V compound semiconductor layer forming an element structure on the III-V compound semiconductor substrate;
Scribing a nitride III-V compound semiconductor substrate on which a nitride III-V compound semiconductor layer is grown along a contour line including a straight line connecting at least two second regions adjacent to each other. This is a semiconductor device manufactured by the method described above.

The twelfth aspect of the present invention is
A nitride system in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate is grown,
The nitride-based III-V group compound semiconductor substrate is characterized in that at least one second region is present on the end face or corner portion.

The thirteenth invention of the present invention is
A nitride system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate,
The element region is defined on the nitride-based III-V compound semiconductor substrate so that the second region is not substantially included.

The fourteenth aspect of the present invention is:
A nitride system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. Growing a nitride-based III-V compound semiconductor layer forming an element structure on the III-V compound semiconductor substrate;
Scribing a nitride III-V compound semiconductor substrate on which a nitride III-V compound semiconductor layer is grown along a contour line including a straight line connecting at least two second regions adjacent to each other. This is a semiconductor device manufactured by the method described above.

The fifteenth aspect of the present invention is:
A nitride system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate is grown,
The nitride-based III-V group compound semiconductor substrate is characterized in that at least one second region is present on the end face or corner portion.

The sixteenth invention of the present invention is
An element structure is formed on a nitride III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride III-V compound semiconductor layer,
The element region is defined so that the second region is not substantially included.

The seventeenth aspect of the present invention is:
An element structure is formed on a nitride III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals. Growing a nitride III-V compound semiconductor layer;
Scribing a nitride III-V compound semiconductor substrate on which a nitride III-V compound semiconductor layer is grown along a contour line including a straight line connecting at least two second regions adjacent to each other. This is a semiconductor device manufactured by the method described above.

According to an eighteenth aspect of the present invention,
An element structure is formed on a nitride III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals. A semiconductor device in which a nitride III-V compound semiconductor layer is grown,
The nitride-based III-V group compound semiconductor substrate is characterized in that at least one second region is present on the end face or corner portion.

In the tenth to eighteenth aspects of the present invention, the semiconductor element includes a light emitting element such as a light emitting diode and a semiconductor laser, a light receiving element, a field effect transistor (FET) such as a high electron mobility transistor, and a heterogeneous element. An electron transit device such as a junction bipolar transistor (HBT) is included (the same applies hereinafter).

In the tenth to eighteenth aspects of the present invention, the active region of the semiconductor element is preferably 1 μm or more from the second region, more preferably, in order to prevent adverse effects due to the second region having a high average dislocation density. Is 10 μm or more, more preferably 100 μm or more. When the third region exists, it is most preferable that the active region of the semiconductor element does not include the second region and the third region. Here, the active region means a light emitting region in a semiconductor light emitting device, a light receiving region in a semiconductor light receiving device, and a region in which electrons travel in an electron traveling device (the same applies hereinafter).

The nineteenth invention of the present invention is
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer forming a light emitting device structure on the substrate,
The device region is defined on the semiconductor substrate so that the second region is not substantially included.

The twentieth invention of the present invention is
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor layer forming a light emitting element structure is grown on
A semiconductor light emitting device manufactured by scribing a semiconductor substrate on which a semiconductor layer is grown, along a contour line including a straight line connecting at least two second regions adjacent to each other.

The twenty-first aspect of the present invention is
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor light emitting device in which a semiconductor layer forming a light emitting device structure is grown,
The semiconductor substrate is characterized in that at least one second region exists on an end face or a corner of the semiconductor substrate.

According to a twenty-second aspect of the present invention,
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer forming a light emitting device structure on the substrate,
The device region is defined on the semiconductor substrate so that the second region is not substantially included.

The twenty-third aspect of the present invention provides
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density A semiconductor layer forming a light emitting element structure is grown on
A semiconductor light emitting device manufactured by scribing the semiconductor substrate on which a semiconductor layer has been grown, along a contour line including a straight line connecting at least two second regions adjacent to each other.

The twenty-fourth aspect of the present invention provides
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density A semiconductor light emitting device in which a semiconductor layer forming a light emitting device structure is grown,
The semiconductor substrate is characterized in that at least one second region exists on an end face or a corner of the semiconductor substrate.

According to a twenty-fifth aspect of the present invention,
By growing a semiconductor layer forming a light emitting element structure on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals A method for manufacturing a semiconductor light emitting device, for manufacturing a semiconductor light emitting device,
The element region is defined so that the second region is not substantially included.

According to a twenty-sixth aspect of the present invention,
A semiconductor layer for forming a light emitting element structure is grown on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystal;
A semiconductor light emitting device manufactured by scribing a semiconductor substrate on which a semiconductor layer is grown, along a contour line including a straight line connecting at least two second regions adjacent to each other.

According to a twenty-seventh aspect of the present invention,
A semiconductor in which a semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals A light emitting device,
The semiconductor substrate is characterized in that at least one second region exists on an end face or a corner of the semiconductor substrate.

According to a twenty-eighth aspect of the present invention,
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing a semiconductor layer forming an element structure on the substrate,
The device region is defined on the semiconductor substrate so that the second region is not substantially included.

The 29th aspect of the present invention is:
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor layer forming an element structure is grown on
A semiconductor device manufactured by scribing a semiconductor substrate on which a semiconductor layer has been grown, along a contour line including a straight line connecting at least two second regions adjacent to each other.

The 30th invention of the present invention is
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor element on which a semiconductor layer forming an element structure is grown,
The semiconductor substrate is characterized in that at least one second region exists on an end face or a corner of the semiconductor substrate.

The thirty-first aspect of the present invention is
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing a semiconductor layer forming an element structure on the substrate,
The device region is defined on the semiconductor substrate so that the second region is not substantially included.

The thirty-second invention of the present invention is
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density A semiconductor layer forming an element structure is grown on
A semiconductor device manufactured by scribing a semiconductor substrate on which a semiconductor layer has been grown, along a contour line including a straight line connecting at least two second regions adjacent to each other.

The thirty-third invention of the present invention
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density A semiconductor element on which a semiconductor layer forming an element structure is grown,
The semiconductor element is characterized in that at least one second region exists in an end face or a corner of the semiconductor substrate.

The 34th invention of the present invention is
A semiconductor layer is formed by growing a semiconductor layer forming an element structure on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals. A method for manufacturing a semiconductor light-emitting device in which an element is manufactured,
The element region is defined so that the second region is not substantially included.

The 35th invention of the present invention is
A semiconductor layer for forming an element structure is grown on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystal;
A semiconductor device manufactured by scribing a semiconductor substrate on which a semiconductor layer has been grown, along a contour line including a straight line connecting at least two second regions adjacent to each other.

The thirty-sixth aspect of the present invention provides
A semiconductor element in which a semiconductor layer forming an element structure is grown on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals Because
The semiconductor substrate is characterized in that at least one second region exists on an end face or a corner of the semiconductor substrate.

In the nineteenth to thirty-sixth aspects of the present invention, the material of the semiconductor substrate or semiconductor layer may be a nitride III-V compound semiconductor, a wurtzit structure, or more generally a hexagonal crystal system. Other semiconductors having a crystal structure, such as ZnO, α-ZnS, α-CdS, α-CdSe, and the like, and various semiconductors having other crystal structures may be used.

The thirty-seventh aspect of the present invention provides
On a substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A device manufacturing method for manufacturing a device by growing a layer forming a device structure,
The device region is defined on the substrate so that the second region is not substantially included.

The thirty-eighth aspect of the present invention is
On a substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. Grow the layers that form the device structure,
The device is manufactured by scribing a substrate on which a layer has been grown along a contour line including a straight line connecting at least two second regions adjacent to each other.

The 39th invention of this invention is
On a substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A device in which a layer forming a device structure is grown,
The substrate is characterized in that at least one second region is present on an end face or a corner of the substrate.

The 40th invention of this invention is
On a substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A device manufacturing method for manufacturing a device by growing a layer forming a device structure,
The device region is defined on the substrate so that the second region is not substantially included.

The forty-first aspect of the present invention is
On a substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. Grow the layers that form the device structure,
The device is manufactured by scribing a substrate on which a layer has been grown along a contour line including a straight line connecting at least two second regions adjacent to each other.

The forty-second invention of this invention
On a substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A device in which a layer forming a device structure is grown,
The substrate is characterized in that at least one second region is present on an end face or a corner of the substrate.

The 43rd invention of the present invention is
A device is manufactured by growing a layer for forming a device structure on a substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals. A method for manufacturing an element that includes:
The element region is defined so that the second region is not substantially included.

The 44th aspect of the present invention is
A layer for forming an element structure is grown on a substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystal;
The device is manufactured by scribing a substrate on which a layer has been grown along a contour line including a straight line connecting at least two second regions adjacent to each other.

The 45th aspect of the present invention provides
A device in which a layer for forming a device structure is grown on a substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystal. ,
The substrate is characterized in that at least one second region is present on an end face or a corner of the substrate.

In the thirty-seventh to forty-fifth aspects of the present invention, the element is a semiconductor element (light emitting element, light receiving element, electron transit element, etc.), piezoelectric element, pyroelectric element, optical element (secondary using a nonlinear optical crystal). Harmonic generating elements), dielectric elements (including ferroelectric elements), superconducting elements, and the like. In this case, as the material of the substrate or layer, various semiconductors as described above can be used in the semiconductor element, and in the piezoelectric element, pyroelectric element, optical element, dielectric element, superconducting element, etc., for example, oxide Various materials can be used. There are many oxide materials such as those disclosed in Journal of the Society of Japan Vol. 103, No. 11 (1995) pp. 1099-1111 and Materials Science and Engineering B41 (1996) 166-173. There is.

The 46th aspect of the present invention is
A nitride system in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a light emitting device structure on a III-V compound semiconductor substrate,
The device region is defined on the nitride III-V compound semiconductor substrate so that the second region is not included in the light emitting region of the semiconductor light emitting device.

The 47th aspect of the present invention is
A nitride system in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure is grown on a III-V compound semiconductor substrate,
The nitride-based III-V compound semiconductor substrate has at least one second region in the interior, end face, or corner, and the second region is not included in the light emitting region of the semiconductor light emitting device. To do.

The 48th aspect of the present invention is
A nitride system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a light emitting device structure on a III-V compound semiconductor substrate,
The device region is defined on the nitride III-V compound semiconductor substrate so that the second region is not included in the light emitting region of the semiconductor light emitting device.

The 49th aspect of the present invention is
A nitride system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure is grown on a III-V compound semiconductor substrate,
The nitride-based III-V compound semiconductor substrate has at least one second region in the interior, end face, or corner, and the second region is not included in the light emitting region of the semiconductor light emitting device. To do.

The 50th aspect of the present invention is
A light emitting device structure is formed on a nitride III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystal A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer.
The element region is defined so that the second region is not included in the light emitting region of the semiconductor light emitting device.

The fifty-first aspect of the present invention is
A light emitting device structure is formed on a nitride III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystal A semiconductor light emitting device in which a nitride III-V compound semiconductor layer is grown,
The nitride-based III-V compound semiconductor substrate has at least one second region in the interior, end face, or corner, and the second region is not included in the light emitting region of the semiconductor light emitting device. To do.

The 52nd aspect of the present invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. Light emitting device on nitride III-V compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a structure,
Nitride-based III-V group compound semiconductor substrate so that substantially no seven or more rows of second regions in the second direction are included, and the second region is not included in the light emitting region of the semiconductor light emitting device. The element region is defined on the top.

The 53rd invention of the present invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. Light emitting device on nitride III-V compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a structure is grown,
The nitride-based III-V compound semiconductor substrate substantially does not include seven or more columns of second regions in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by.

According to a 54th aspect of the present invention,
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. Light emitting device on nitride III-V compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a structure,
Nitride-based III-V group compound semiconductor substrate so that substantially no seven or more rows of second regions in the second direction are included, and the second region is not included in the light emitting region of the semiconductor light emitting device. The element region is defined on the top.

According to a 55th aspect of the present invention,
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. Light emitting device on nitride III-V compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a structure is grown,
The nitride-based III-V compound semiconductor substrate substantially does not include seven or more columns of second regions in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by.

The 56th aspect of the present invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. Nitride III-V compound semiconductor layer forming a light emitting device structure on a nitride III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction 2 A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing
Nitride-based III-V group compound semiconductor substrate so that substantially no seven or more rows of second regions in the second direction are included, and the second region is not included in the light emitting region of the semiconductor light emitting device. The element region is defined on the top.

According to a 57th aspect of the present invention,
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. Nitride III-V compound semiconductor layer forming a light emitting device structure on a nitride III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction 2 Is a grown semiconductor light emitting device,
The nitride-based III-V compound semiconductor substrate substantially does not include seven or more columns of second regions in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by.

The 58th invention of this invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. Light emitting device on nitride III-V compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a structure,
Nitride-based so that the first interval is 50 μm or more, one or more rows of second regions in the second direction are included, and the second region is not included in the light emitting region of the semiconductor light emitting device. The element region is defined on the III-V compound semiconductor substrate.

The 59th aspect of the present invention is:
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. Light emitting device on nitride III-V compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a structure is grown,
The first interval is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more columns of second regions in the second direction, and the second region is a semiconductor light emitting device. It is not included in the light emitting area.

The 60th aspect of the present invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. Light emitting device on nitride III-V compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a structure,
Nitride-based so that the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the light emitting region of the semiconductor light emitting device. The element region is defined on the III-V compound semiconductor substrate.

The 61st invention of this invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. Light emitting device on nitride III-V compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a structure is grown,
The first interval is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more columns of second regions in the second direction, and the second region is a semiconductor light emitting device. It is not included in the light emitting area.

The 62nd aspect of the present invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. Nitride III-V compound semiconductor layer forming a light emitting device structure on a nitride III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction 2 A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing
Nitride-based so that the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the light emitting region of the semiconductor light emitting device. The element region is defined on the III-V compound semiconductor substrate.

The 63rd invention of the present invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. Nitride III-V compound semiconductor layer forming a light emitting device structure on a nitride III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction 2 Is a grown semiconductor light emitting device,
The first interval is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more columns of second regions in the second direction, and the second region is a semiconductor light emitting device. It is not included in the light emitting area.

The 64th aspect of the present invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. Semiconductor light-emitting device for manufacturing a semiconductor light-emitting device by growing a nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a nitride-based III-V group compound semiconductor substrate A method for manufacturing an element, comprising:
The element region is defined on the nitride-based III-V compound semiconductor substrate so that the second region is substantially not included in seven or more and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by doing so.

The 65th aspect of the present invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure is grown on a nitride-based III-V compound semiconductor substrate,
The nitride-based III-V compound semiconductor substrate is substantially free of seven or more second regions, and the second region is not included in the light emitting region of the semiconductor light emitting device. .

The 66th invention of this invention is
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. Semiconductor light-emitting device for manufacturing a semiconductor light-emitting device by growing a nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a nitride-based III-V group compound semiconductor substrate A method for manufacturing an element, comprising:
The element region is defined on the nitride-based III-V compound semiconductor substrate so that the second region is substantially not included in seven or more and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by doing so.

The 67th aspect of the present invention provides
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure is grown on a nitride-based III-V compound semiconductor substrate,
The nitride-based III-V compound semiconductor substrate is substantially free of seven or more second regions, and the second region is not included in the light emitting region of the semiconductor light emitting device. .

The 68th aspect of the present invention is
A nitride-based III-V group compound in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystals A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a light emitting device structure on a semiconductor substrate,
The element region is defined on the nitride-based III-V compound semiconductor substrate so that the second region is substantially not included in seven or more and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by doing so.

The 69th aspect of the present invention provides
A nitride-based III-V group compound in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystals A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure on a semiconductor substrate is grown,
The nitride-based III-V compound semiconductor substrate is substantially free of seven or more second regions, and the second region is not included in the light emitting region of the semiconductor light emitting device. .

The 70th invention of this invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. Semiconductor light-emitting device for manufacturing a semiconductor light-emitting device by growing a nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a nitride-based III-V group compound semiconductor substrate A method for manufacturing an element, comprising:
Nitride-based III-V compound so that the distance between the second regions is 50 μm or more, one or more second regions are included, and the second region is not included in the light emitting region of the semiconductor light emitting device The element region is defined on the semiconductor substrate.

The 71st invention of this invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure is grown on a nitride-based III-V compound semiconductor substrate,
The interval between the second regions is 50 μm or more, one or more second regions are included in the nitride-based III-V compound semiconductor substrate, and the second region is included in the light emitting region of the semiconductor light emitting device. It is characterized by not.

The 72nd aspect of the present invention is
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. Semiconductor light-emitting device for manufacturing a semiconductor light-emitting device by growing a nitride-based III-V compound semiconductor layer forming a light-emitting device structure on a nitride-based III-V group compound semiconductor substrate A method for manufacturing an element, comprising:
Nitride-based III-V compound so that the distance between the second regions is 50 μm or more, one or more second regions are included, and the second region is not included in the light emitting region of the semiconductor light emitting device The element region is defined on the semiconductor substrate.

The 73rd invention of this invention is
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure is grown on a nitride-based III-V compound semiconductor substrate,
The interval between the second regions is 50 μm or more, one or more second regions are included in the nitride-based III-V compound semiconductor substrate, and the second region is included in the light emitting region of the semiconductor light emitting device. It is characterized by not.

The 74th aspect of the present invention is
A nitride-based III-V group compound in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystals A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a nitride III-V compound semiconductor layer forming a light emitting device structure on a semiconductor substrate,
Nitride-based III-V compound so that the distance between the second regions is 50 μm or more, one or more second regions are included, and the second region is not included in the light emitting region of the semiconductor light emitting device The element region is defined on the semiconductor substrate.

The 75th aspect of the present invention provides
A nitride-based III-V group compound in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystals A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure on a semiconductor substrate is grown,
The interval between the second regions is 50 μm or more, one or more second regions are included in the nitride-based III-V compound semiconductor substrate, and the second region is included in the light emitting region of the semiconductor light emitting device. It is characterized by not.

The 76th aspect of the present invention is
A nitride system in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate,
The device region is defined on the nitride-based III-V compound semiconductor substrate so that the second region is not included in the active region of the semiconductor device.

The 77th aspect of the present invention is
A nitride system in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate is grown,
The nitride-based III-V group compound semiconductor substrate has at least one second region in the inside, end face, or corner portion, and the second region is not included in the active region of the semiconductor element. Is.

The 78th invention of this invention is
A nitride system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate,
The device region is defined on the nitride-based III-V compound semiconductor substrate so that the second region is not included in the active region of the semiconductor device.

The 79th invention of this invention is
A nitride system in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate is grown,
The nitride-based III-V group compound semiconductor substrate has at least one second region in the inside, end face, or corner portion, and the second region is not included in the active region of the semiconductor element. Is.

The 80th invention of the present invention is
An element structure is formed on a nitride III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals. A method of manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride III-V compound semiconductor layer,
The element region is defined so that the second region is not included in the active region of the semiconductor element.

The 81st invention of this invention is
An element structure is formed on a nitride III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals. A semiconductor device in which a nitride III-V compound semiconductor layer is grown,
The nitride-based III-V group compound semiconductor substrate has at least one second region in the inside, end face, or corner portion, and the second region is not included in the active region of the semiconductor element. Is.

The 82nd invention of the present invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. Device structure on nitride-based III-V group compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A method for manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride III-V compound semiconductor layer forming
On the nitride-based III-V compound semiconductor substrate, the row of the second region in the second direction is not substantially included in seven or more, and the second region is not included in the active region of the semiconductor element. This is characterized in that the element region is defined.

The 83rd invention of this invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. Device structure on nitride-based III-V group compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A nitride-based III-V compound semiconductor layer that forms a semiconductor element,
The nitride-based III-V compound semiconductor substrate includes substantially no seven or more columns of second regions in the second direction, and the second region is not included in the active region of the semiconductor element. It is a feature.

The 84th invention of the present invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. Device structure on nitride-based III-V group compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A method for manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride III-V compound semiconductor layer forming
On the nitride-based III-V compound semiconductor substrate, the row of the second region in the second direction is not substantially included in seven or more, and the second region is not included in the active region of the semiconductor element. This is characterized in that the element region is defined.

The 85th aspect of the present invention provides
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. Device structure on nitride-based III-V group compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A nitride-based III-V compound semiconductor layer that forms a semiconductor element,
The nitride-based III-V compound semiconductor substrate includes substantially no seven or more columns of second regions in the second direction, and the second region is not included in the active region of the semiconductor element. It is a feature.

The 86th invention of the present invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. A nitride III-V compound semiconductor layer forming an element structure on a nitride III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction 2; A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing,
On the nitride-based III-V compound semiconductor substrate, the row of the second region in the second direction is not substantially included in seven or more, and the second region is not included in the active region of the semiconductor element. This is characterized in that the element region is defined.

The 87th invention of this invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. A nitride III-V compound semiconductor layer forming an element structure on a nitride III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction 2; A grown semiconductor device comprising:
The nitride-based III-V compound semiconductor substrate includes substantially no seven or more columns of second regions in the second direction, and the second region is not included in the active region of the semiconductor element. It is a feature.

The 88th invention of this invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. Device structure on nitride-based III-V group compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A method for manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride III-V compound semiconductor layer forming
The nitride system III is such that the first interval is 50 μm or more, one or more columns of the second regions in the second direction are included, and the second region is not included in the active region of the semiconductor element. The element region is defined on the group V compound semiconductor substrate.

The 89th invention of the present invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. Device structure on nitride-based III-V group compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A nitride-based III-V compound semiconductor layer that forms a semiconductor element,
The first interval is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more columns of second regions in the second direction, and the second region is an activity of the semiconductor element. It is not included in the area.

The 90th aspect of the present invention provides
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. Device structure on nitride-based III-V group compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A method for manufacturing a semiconductor device, wherein a semiconductor device is manufactured by growing a nitride III-V compound semiconductor layer forming
The nitride system III is such that the first interval is 50 μm or more, one or more columns of the second regions in the second direction are included, and the second region is not included in the active region of the semiconductor element. The element region is defined on the group V compound semiconductor substrate.

The 91st invention of this invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. Device structure on nitride-based III-V group compound semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction A nitride-based III-V compound semiconductor layer that forms a semiconductor element,
The first interval is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more columns of second regions in the second direction, and the second region is an activity of the semiconductor element. It is not included in the area.

The 92nd aspect of the present invention is:
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. A nitride III-V compound semiconductor layer forming an element structure on a nitride III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction 2; A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing,
The nitride system III is such that the first interval is 50 μm or more, one or more columns of the second regions in the second direction are included, and the second region is not included in the active region of the semiconductor element. The element region is defined on the group V compound semiconductor substrate.

The 93rd invention of the present invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. A nitride III-V compound semiconductor layer forming an element structure on a nitride III-V compound semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction 2; A grown semiconductor device comprising:
The first interval is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more columns of second regions in the second direction, and the second region is an activity of the semiconductor element. It is not included in the area.

The 94th aspect of the present invention is:
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. Of a semiconductor device manufactured by growing a nitride-based III-V compound semiconductor layer forming a device structure on a nitride-based III-V compound semiconductor substrate that is arranged in an ordered manner A method,
The device region is defined on the nitride-based III-V compound semiconductor substrate so that the second region is substantially not included in seven or more and the second region is not included in the active region of the semiconductor device. It is characterized by that.

The 95th aspect of the present invention is:
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A nitride-based III-V compound semiconductor layer is formed on a nitride-based III-V compound semiconductor substrate, and a nitride III-V compound semiconductor layer is grown on the semiconductor device,
The nitride-based III-V group compound semiconductor substrate is substantially free of seven or more second regions, and the second region is not included in the active region of the semiconductor element.

The 96th aspect of the present invention is
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. Of a semiconductor device manufactured by growing a nitride-based III-V compound semiconductor layer forming a device structure on a nitride-based III-V compound semiconductor substrate that is arranged in an ordered manner A method,
The device region is defined on the nitride-based III-V compound semiconductor substrate so that the second region is substantially not included in seven or more and the second region is not included in the active region of the semiconductor device. It is characterized by that.

The 97th aspect of the present invention is:
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A nitride-based III-V compound semiconductor layer is formed on a nitride-based III-V compound semiconductor substrate, and a nitride III-V compound semiconductor layer is grown on the semiconductor device,
The nitride-based III-V group compound semiconductor substrate is substantially free of seven or more second regions, and the second region is not included in the active region of the semiconductor element.

The 98th aspect of the present invention is:
A nitride-based III-V group compound in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystals A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing a nitride III-V compound semiconductor layer forming an element structure on a semiconductor substrate,
The device region is defined on the nitride-based III-V compound semiconductor substrate so that the second region is substantially not included in seven or more and the second region is not included in the active region of the semiconductor device. It is characterized by that.

The 99th aspect of the present invention is:
A nitride-based III-V group compound in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystals A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a semiconductor substrate is grown,
The nitride-based III-V group compound semiconductor substrate is substantially free of seven or more second regions, and the second region is not included in the active region of the semiconductor element.

The 100th invention of the present invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. Of a semiconductor device manufactured by growing a nitride-based III-V compound semiconductor layer forming a device structure on a nitride-based III-V compound semiconductor substrate that is arranged in an ordered manner A method,
The nitride-based III-V group compound semiconductor has an interval between the second regions of 50 μm or more, one or more second regions are included, and the second region is not included in the active region of the semiconductor element. The device region is defined on the substrate.

The 101st aspect of the present invention is:
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A nitride-based III-V compound semiconductor layer is formed on a nitride-based III-V compound semiconductor substrate, and a nitride III-V compound semiconductor layer is grown on the semiconductor device,
The interval between the second regions is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more second regions, and the second region is not included in the active region of the semiconductor element. It is characterized by this.

The 102nd aspect of the present invention is:
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. Of a semiconductor device manufactured by growing a nitride-based III-V compound semiconductor layer forming a device structure on a nitride-based III-V compound semiconductor substrate that is arranged in an ordered manner A method,
The nitride-based III-V group compound semiconductor has an interval between the second regions of 50 μm or more, one or more second regions are included, and the second region is not included in the active region of the semiconductor element. The device region is defined on the substrate.

The 103rd aspect of the present invention is:
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A nitride-based III-V compound semiconductor layer is formed on a nitride-based III-V compound semiconductor substrate, and a nitride III-V compound semiconductor layer is grown on the semiconductor device,
The interval between the second regions is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more second regions, and the second region is not included in the active region of the semiconductor element. It is characterized by this.

The 104th invention of the present invention is
A nitride-based III-V group compound in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystals A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing a nitride III-V compound semiconductor layer forming an element structure on a semiconductor substrate,
The nitride-based III-V group compound semiconductor has an interval between the second regions of 50 μm or more, one or more second regions are included, and the second region is not included in the active region of the semiconductor element. The device region is defined on the substrate.

The 105th aspect of the present invention is:
A nitride-based III-V group compound in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystals A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a semiconductor substrate is grown,
The interval between the second regions is 50 μm or more, the nitride-based III-V compound semiconductor substrate includes one or more second regions, and the second region is not included in the active region of the semiconductor element. It is characterized by this.

The 106th aspect of the present invention is:
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer forming a light emitting device structure on the substrate,
The device region is defined on the semiconductor substrate so that the second region is not included in the light emitting region of the semiconductor light emitting device.

The 107th aspect of the present invention is:
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor light emitting device in which a semiconductor layer forming a light emitting device structure is grown,
The semiconductor substrate is characterized in that at least one second region exists in the inside, end face, or corner of the semiconductor substrate, and the second region is not included in the light emitting region of the semiconductor light emitting element.

The 108th invention of the present invention is
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer forming a light emitting device structure on the substrate,
The device region is defined on the semiconductor substrate so that the second region is not included in the light emitting region of the semiconductor light emitting device.

The 109th aspect of the present invention is:
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density A semiconductor light emitting device in which a semiconductor layer forming a light emitting device structure is grown,
The semiconductor substrate is characterized in that at least one second region exists in the inside, end face, or corner of the semiconductor substrate, and the second region is not included in the light emitting region of the semiconductor light emitting element.

The 110th invention of the present invention is
By growing a semiconductor layer forming a light emitting element structure on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals A method for manufacturing a semiconductor light emitting device, for manufacturing a semiconductor light emitting device,
The element region is defined so that the second region is not included in the light emitting region of the semiconductor light emitting device.

The 111th invention of this invention is
A semiconductor in which a semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals A light emitting device,
The semiconductor substrate is characterized in that at least one second region exists in the inside, end face, or corner of the semiconductor substrate, and the second region is not included in the light emitting region of the semiconductor light emitting element.

The 112th invention of the present invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. A semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor light emitting device, wherein the semiconductor light emitting device is manufactured by:
A device region is defined on the semiconductor substrate so that substantially no seven or more columns of second regions in the second direction are included, and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by that.

The 113th aspect of the present invention is:
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. A semiconductor layer forming a light emitting element structure grows on a semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A semiconductor light emitting device,
The semiconductor substrate is substantially free of seven or more columns of second regions in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting element.

The 114th invention of the present invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. A semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor light emitting device, wherein the semiconductor light emitting device is manufactured by:
A device region is defined on the semiconductor substrate so that substantially no seven or more columns of second regions in the second direction are included, and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by that.

The 115th invention of the present invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. A semiconductor layer forming a light emitting element structure grows on a semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A semiconductor light emitting device,
The semiconductor substrate is substantially free of seven or more columns of second regions in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting element.

The 116th invention of the present invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. Semiconductor light emitting device for manufacturing a semiconductor light emitting device by growing a semiconductor layer forming a light emitting device structure on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2 A method for manufacturing an element, comprising:
A device region is defined on the semiconductor substrate so that substantially no seven or more columns of second regions in the second direction are included, and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by that.

The 117th aspect of the present invention is:
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. A semiconductor light emitting device in which a semiconductor layer forming a light emitting device structure is grown on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2;
The semiconductor substrate is substantially free of seven or more columns of second regions in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting element.

The 118th invention of the present invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. A semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor light emitting device, wherein the semiconductor light emitting device is manufactured by:
On the semiconductor substrate, the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the light emitting region of the semiconductor light emitting element. This is characterized in that the element region is defined.

The 119th invention of the present invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. A semiconductor layer forming a light emitting element structure grows on a semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A semiconductor light emitting device,
The first interval is 50 μm or more, the semiconductor substrate includes one or more columns of the second region in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting element. It is a feature.

The 120th aspect of the present invention is:
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. A semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor light emitting device, wherein the semiconductor light emitting device is manufactured by:
On the semiconductor substrate, the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the light emitting region of the semiconductor light emitting element. This is characterized in that the element region is defined.

The 121st invention of this invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. A semiconductor layer forming a light emitting element structure grows on a semiconductor substrate regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A semiconductor light emitting device,
The first interval is 50 μm or more, the semiconductor substrate includes one or more columns of the second region in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting element. It is a feature.

According to a 122nd aspect of the present invention,
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. Semiconductor light emitting device for manufacturing a semiconductor light emitting device by growing a semiconductor layer forming a light emitting device structure on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2 A method for manufacturing an element, comprising:
On the semiconductor substrate, the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the light emitting region of the semiconductor light emitting element. This is characterized in that the element region is defined.

The 123rd invention of the present invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. A semiconductor light emitting device in which a semiconductor layer forming a light emitting device structure is grown on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2;
The first interval is 50 μm or more, the semiconductor substrate includes one or more columns of the second region in the second direction, and the second region is not included in the light emitting region of the semiconductor light emitting element. It is a feature.

According to a 124th aspect of the present invention,
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer that forms a light emitting device structure on a semiconductor substrate that is arranged in a sequential manner,
The element region is defined on the semiconductor substrate so that the second region is not substantially included in seven or more, and the second region is not included in the light emitting region of the semiconductor light emitting device. Is.

According to a 125th aspect of the present invention,
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A semiconductor light-emitting device in which a semiconductor layer forming a light-emitting device structure is grown on a semiconductor substrate that is regularly arranged,
The semiconductor substrate substantially does not include seven or more second regions, and the second region is not included in the light emitting region of the semiconductor light emitting element.

According to a 126th aspect of the present invention,
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer that forms a light emitting device structure on a semiconductor substrate that is arranged in a sequential manner,
The element region is defined on the semiconductor substrate so that the second region is not substantially included in seven or more, and the second region is not included in the light emitting region of the semiconductor light emitting device. Is.

According to the 127th aspect of the present invention,
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A semiconductor light-emitting device in which a semiconductor layer forming a light-emitting device structure is grown on a semiconductor substrate that is regularly arranged,
The semiconductor substrate substantially does not include seven or more second regions, and the second region is not included in the light emitting region of the semiconductor light emitting element.

The 128th invention of the present invention is
A light emitting device structure is formed on a semiconductor substrate in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystal. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer to be formed.
The element region is defined on the semiconductor substrate so that the second region is not substantially included in seven or more, and the second region is not included in the light emitting region of the semiconductor light emitting device. Is.

The 129th invention of the present invention is
A light emitting device structure is formed on a semiconductor substrate in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystal. A semiconductor light emitting device in which a semiconductor layer to be formed is grown,
The semiconductor substrate substantially does not include seven or more second regions, and the second region is not included in the light emitting region of the semiconductor light emitting element.

The 130th invention of the present invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer that forms a light emitting device structure on a semiconductor substrate that is arranged in a sequential manner,
An element region is defined on the semiconductor substrate such that the interval between the second regions is 50 μm or more, one or more second regions are included, and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by doing so.

The 131st invention of this invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A semiconductor light-emitting device in which a semiconductor layer forming a light-emitting device structure is grown on a semiconductor substrate that is regularly arranged,
The interval between the second regions is 50 μm or more, the semiconductor substrate includes one or more second regions, and the second region is not included in the light emitting region of the semiconductor light emitting device. is there.

The 132nd invention of the present invention is
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A method of manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer that forms a light emitting device structure on a semiconductor substrate that is arranged in a sequential manner,
An element region is defined on the semiconductor substrate such that the interval between the second regions is 50 μm or more, one or more second regions are included, and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by doing so.

The 133rd invention of this invention is
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A semiconductor light-emitting device in which a semiconductor layer forming a light-emitting device structure is grown on a semiconductor substrate that is regularly arranged,
The interval between the second regions is 50 μm or more, the semiconductor substrate includes one or more second regions, and the second region is not included in the light emitting region of the semiconductor light emitting device. is there.

The 134th invention of the present invention is
A light emitting device structure is formed on a semiconductor substrate in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystal. A method for manufacturing a semiconductor light emitting device, wherein a semiconductor light emitting device is manufactured by growing a semiconductor layer to be formed.
An element region is defined on the semiconductor substrate such that the interval between the second regions is 50 μm or more, one or more second regions are included, and the second region is not included in the light emitting region of the semiconductor light emitting device. It is characterized by doing so.

The 135th aspect of the present invention is
A light emitting device structure is formed on a semiconductor substrate in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystal. A semiconductor light emitting device in which a semiconductor layer to be formed is grown,
The interval between the second regions is 50 μm or more, the semiconductor substrate includes one or more second regions, and the second region is not included in the light emitting region of the semiconductor light emitting device. is there.

The 136th aspect of the present invention is:
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing a semiconductor layer forming an element structure on the substrate,
The device region is defined on the semiconductor substrate so that the second region is not included in the active region of the semiconductor device.

The 137th aspect of the present invention is
On a semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor element on which a semiconductor layer forming an element structure is grown,
The semiconductor substrate is characterized in that at least one second region exists in the inside, end face, or corner of the semiconductor substrate, and the second region is not included in the active region of the semiconductor element.

The 138th invention of the present invention is
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing a semiconductor layer forming an element structure on the substrate,
The device region is defined on the semiconductor substrate so that the second region is not included in the active region of the semiconductor device.

The 139th invention of the present invention is
On a semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density A semiconductor element on which a semiconductor layer forming an element structure is grown,
The semiconductor substrate is characterized in that at least one second region exists in the inside, end face, or corner of the semiconductor substrate, and the second region is not included in the active region of the semiconductor element.

The 140th invention of the present invention is
A semiconductor layer is formed by growing a semiconductor layer forming an element structure on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals. A method for manufacturing a semiconductor device in which an element is manufactured,
The element region is defined so that the second region is not included in the active region of the semiconductor element.

The 141st invention of the present invention is
A semiconductor element in which a semiconductor layer forming an element structure is grown on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals Because
The semiconductor substrate is characterized in that at least one second region exists in the inside, end face, or corner of the semiconductor substrate, and the second region is not included in the active region of the semiconductor element.

The 142nd aspect of the present invention is:
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. A semiconductor layer forming an element structure is grown on a semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor element by manufacturing a semiconductor element,
A device region is defined on the semiconductor substrate so that substantially no more than seven columns of second regions in the second direction are included, and the second region is not included in the active region of the semiconductor device. It is characterized by that.

The 143rd invention of the present invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. A semiconductor layer forming an element structure is grown on a semiconductor substrate that is regularly arranged and regularly arranged in a second direction orthogonal to the first direction at a second interval smaller than the first interval. A semiconductor element,
The semiconductor substrate is substantially free of seven or more columns of second regions in the second direction, and the second region is not included in the active region of the semiconductor element.

The 144th invention of the present invention is:
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. A semiconductor layer forming an element structure is grown on a semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor element by manufacturing a semiconductor element,
A device region is defined on the semiconductor substrate so that substantially no more than seven columns of second regions in the second direction are included, and the second region is not included in the active region of the semiconductor device. It is characterized by that.

The 145th invention of this invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. A semiconductor layer forming an element structure is grown on a semiconductor substrate that is regularly arranged and regularly arranged in a second direction orthogonal to the first direction at a second interval smaller than the first interval. A semiconductor element,
The semiconductor substrate is substantially free of seven or more columns of second regions in the second direction, and the second region is not included in the active region of the semiconductor element.

The 146th invention of the present invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. A semiconductor device is manufactured by growing a semiconductor layer forming an element structure on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2. A method,
A device region is defined on the semiconductor substrate so that substantially no more than seven columns of second regions in the second direction are included, and the second region is not included in the active region of the semiconductor device. It is characterized by that.

The 147th invention of the present invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. A semiconductor element in which a semiconductor layer forming an element structure is grown on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2;
The semiconductor substrate is substantially free of seven or more columns of second regions in the second direction, and the second region is not included in the active region of the semiconductor element.

The 148th invention of this invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. A semiconductor layer forming an element structure is grown on a semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor element by manufacturing a semiconductor element,
On the semiconductor substrate, the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the active region of the semiconductor element. This is characterized in that the element region is defined.

The 149th invention of this invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. A semiconductor layer forming an element structure is grown on a semiconductor substrate that is regularly arranged and regularly arranged in a second direction orthogonal to the first direction at a second interval smaller than the first interval. A semiconductor element,
The first interval is 50 μm or more, the semiconductor substrate includes one or more columns of second regions in the second direction, and the second region is not included in the active region of the semiconductor element. It is what.

The 150th invention of the present invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. A semiconductor layer forming an element structure is grown on a semiconductor substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction. A method for manufacturing a semiconductor element by manufacturing a semiconductor element,
On the semiconductor substrate, the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the active region of the semiconductor element. This is characterized in that the element region is defined.

The 151st invention of the present invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. A semiconductor layer forming an element structure is grown on a semiconductor substrate that is regularly arranged and regularly arranged in a second direction orthogonal to the first direction at a second interval smaller than the first interval. A semiconductor element,
The first interval is 50 μm or more, the semiconductor substrate includes one or more columns of second regions in the second direction, and the second region is not included in the active region of the semiconductor element. It is what.

The 152th aspect of the present invention provides
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. A semiconductor device is manufactured by growing a semiconductor layer forming an element structure on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2. A method,
On the semiconductor substrate, the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the active region of the semiconductor element. This is characterized in that the element region is defined.

The 153rd invention of the present invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. A semiconductor element in which a semiconductor layer forming an element structure is grown on a semiconductor substrate regularly arranged at a second interval smaller than the first interval in the direction of 2;
The first interval is 50 μm or more, the semiconductor substrate includes one or more columns of second regions in the second direction, and the second region is not included in the active region of the semiconductor element. It is what.

The 154th invention of the present invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing a semiconductor layer forming an element structure on a semiconductor substrate that is arranged in a mechanical manner,
The element region is defined on the semiconductor substrate so that the second region is not substantially included in seven or more and the second region is not included in the active region of the semiconductor element. It is.

The 155th invention of the present invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A semiconductor device in which a semiconductor layer for forming an element structure is grown on a semiconductor substrate that is regularly arranged,
The semiconductor substrate is substantially free of seven or more second regions, and the second region is not included in the active region of the semiconductor element.

The 156th invention of the present invention is
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing a semiconductor layer forming an element structure on a semiconductor substrate that is arranged in a mechanical manner,
The element region is defined on the semiconductor substrate so that the second region is not substantially included in seven or more and the second region is not included in the active region of the semiconductor element. It is.

The 157th invention of the present invention is
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A semiconductor device in which a semiconductor layer for forming an element structure is grown on a semiconductor substrate that is regularly arranged,
The semiconductor substrate is substantially free of seven or more second regions, and the second region is not included in the active region of the semiconductor element.

The 158th invention of the present invention is
An element structure is formed on a semiconductor substrate in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystal A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing a semiconductor layer to be manufactured,
The element region is defined on the semiconductor substrate so that the second region is not substantially included in seven or more and the second region is not included in the active region of the semiconductor element. It is.

The 159th invention of this invention is
An element structure is formed on a semiconductor substrate in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystal A semiconductor element having a semiconductor layer grown thereon,
The semiconductor substrate is substantially free of seven or more second regions, and the second region is not included in the active region of the semiconductor element.

The 160th aspect of the present invention is:
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing a semiconductor layer forming an element structure on a semiconductor substrate that is arranged in a mechanical manner,
An element region is defined on the semiconductor substrate so that the interval between the second regions is 50 μm or more, one or more second regions are included, and the second region is not included in the active region of the semiconductor element. It is characterized by doing so.

The 161st invention of this invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A semiconductor device in which a semiconductor layer for forming an element structure is grown on a semiconductor substrate that is regularly arranged,
The interval between the second regions is 50 μm or more, the semiconductor substrate includes at least one second region, and the second region is not included in the active region of the semiconductor element. .

The 162nd aspect of the present invention is:
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing a semiconductor layer forming an element structure on a semiconductor substrate that is arranged in a mechanical manner,
An element region is defined on the semiconductor substrate so that the interval between the second regions is 50 μm or more, one or more second regions are included, and the second region is not included in the active region of the semiconductor element. It is characterized by doing so.

The 163rd invention of this invention is
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A semiconductor device in which a semiconductor layer for forming an element structure is grown on a semiconductor substrate that is regularly arranged,
The interval between the second regions is 50 μm or more, the semiconductor substrate includes at least one second region, and the second region is not included in the active region of the semiconductor element. .

The 164th invention of this invention is
An element structure is formed on a semiconductor substrate in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystal A method for manufacturing a semiconductor element, wherein a semiconductor element is manufactured by growing a semiconductor layer to be manufactured,
An element region is defined on the semiconductor substrate so that the interval between the second regions is 50 μm or more, one or more second regions are included, and the second region is not included in the active region of the semiconductor element. It is characterized by doing so.

The 165th invention of the present invention is
An element structure is formed on a semiconductor substrate in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystal A semiconductor element having a semiconductor layer grown thereon,
The interval between the second regions is 50 μm or more, the semiconductor substrate includes at least one second region, and the second region is not included in the active region of the semiconductor element. .

The 166th invention of the present invention is
On a substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A device manufacturing method for manufacturing a device by growing a layer forming a device structure,
The device region is defined on the substrate so that the second region is not included in the active region of the device.

The 167th invention of this invention is
On a substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A device in which a layer forming a device structure is grown,
The substrate is characterized in that at least one second region exists in the inside, end face, or corner of the substrate, and the second region is not included in the active region of the element.

The 168th invention of this invention is
On a substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A device manufacturing method for manufacturing a device by growing a layer forming a device structure,
The device region is defined on the substrate so that the second region is not included in the active region of the device.

The 169th invention of the present invention is
On a substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A device in which a layer forming a device structure is grown,
The substrate is characterized in that at least one second region exists in the inside, end face, or corner of the substrate, and the second region is not included in the active region of the element.

The 170th invention of this invention is
A device is manufactured by growing a layer for forming a device structure on a substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals. A method for manufacturing an element that includes:
The device region is defined so that the second region is not included in the active region of the device.

The 171st invention of this invention is
A device in which a layer for forming a device structure is grown on a substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystal. ,
The substrate is characterized in that at least one second region exists in the inside, end face, or corner of the substrate, and the second region is not included in the active region of the element.

The 172nd aspect of the present invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. By growing a layer that forms an element structure on a substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction An element manufacturing method for manufacturing an element,
The element region is defined on the substrate so that the row of the second region in the second direction is not substantially included in seven or more and the second region is not included in the active region of the element. It is characterized by.

The 173rd invention of this invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. A device in which a layer forming a device structure is grown on a substrate that is regularly arranged and regularly arranged in a second direction perpendicular to the first direction at a second interval smaller than the first interval. Because
The substrate is substantially free of seven or more rows of second regions in the second direction, and the second region is not included in the active region of the element.

The 174th invention of the present invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. By growing a layer that forms an element structure on a substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction An element manufacturing method for manufacturing an element,
The element region is defined on the substrate so that the row of the second region in the second direction is not substantially included in seven or more and the second region is not included in the active region of the element. It is characterized by.

The 175th invention of this invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. A device in which a layer forming a device structure is grown on a substrate that is regularly arranged and regularly arranged in a second direction perpendicular to the first direction at a second interval smaller than the first interval. Because
The substrate is substantially free of seven or more rows of second regions in the second direction, and the second region is not included in the active region of the element.

The 176th invention of the present invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. An element manufacturing method in which an element is manufactured by growing a layer for forming an element structure on a substrate regularly arranged at a second interval smaller than the first interval in two directions. ,
The element region is defined on the substrate so that the row of the second region in the second direction is not substantially included in seven or more and the second region is not included in the active region of the element. It is characterized by.

The 177th invention of this invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. An element in which a layer forming an element structure is grown on a substrate regularly arranged at a second interval smaller than the first interval in the direction of 2;
The substrate is substantially free of seven or more rows of second regions in the second direction, and the second region is not included in the active region of the element.

The 178th invention of the present invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. By growing a layer that forms an element structure on a substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction An element manufacturing method for manufacturing an element,
An element region on the substrate such that the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the active region of the element. It is characterized in that it is defined.

The 179th invention of this invention is
A plurality of second regions having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density at a first interval in the first direction. A device in which a layer forming a device structure is grown on a substrate that is regularly arranged and regularly arranged in a second direction perpendicular to the first direction at a second interval smaller than the first interval. Because
The first distance is 50 μm or more, the substrate includes one or more columns of second regions in the second direction, and the second region is not included in the active region of the element. Is.

The 180th invention of the present invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. By growing a layer that forms an element structure on a substrate that is regularly arranged and regularly arranged at a second interval smaller than the first interval in a second direction orthogonal to the first direction An element manufacturing method for manufacturing an element,
An element region on the substrate such that the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the active region of the element. It is characterized in that it is defined.

The 181st invention of this invention is
A plurality of second regions having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density at a first interval in the first direction. A device in which a layer forming a device structure is grown on a substrate that is regularly arranged and regularly arranged in a second direction perpendicular to the first direction at a second interval smaller than the first interval. Because
The first distance is 50 μm or more, the substrate includes one or more columns of second regions in the second direction, and the second region is not included in the active region of the element. Is.

The 182nd invention of the present invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. An element manufacturing method in which an element is manufactured by growing a layer for forming an element structure on a substrate regularly arranged at a second interval smaller than the first interval in two directions. ,
An element region on the substrate such that the first interval is 50 μm or more, one or more columns of the second region in the second direction are included, and the second region is not included in the active region of the element. It is characterized in that it is defined.

The 183rd invention of the present invention is
A plurality of second regions having poorer crystallinity than the first region are regularly arranged in the first direction at a first interval in the first region made of crystals, and are perpendicular to the first direction. An element in which a layer forming an element structure is grown on a substrate regularly arranged at a second interval smaller than the first interval in the direction of 2;
The first distance is 50 μm or more, the substrate includes one or more columns of second regions in the second direction, and the second region is not included in the active region of the element. Is.

The 184th invention of the present invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A method for manufacturing an element, wherein an element is manufactured by growing a layer forming an element structure on a substrate arranged in an array,
The device region is defined on the substrate so that the second region is not substantially included in seven or more and the second region is not included in the active region of the device. .

The 185th invention of this invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A device in which a layer for forming a device structure is grown on a substrate that is arranged in a row,
The substrate is substantially free of seven or more second regions, and the second region is not included in the active region of the element.

The 186th invention of the present invention is
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A method for manufacturing an element, wherein an element is manufactured by growing a layer forming an element structure on a substrate arranged in an array,
The device region is defined on the substrate so that the second region is not substantially included in seven or more and the second region is not included in the active region of the device. .

The 187th invention of the present invention is
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A device in which a layer for forming a device structure is grown on a substrate that is arranged in a row,
The substrate is substantially free of seven or more second regions, and the second region is not included in the active region of the element.

The 188th invention of the present invention is
An element structure is formed on a substrate in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystals. A method for manufacturing a device, wherein a device is manufactured by growing a layer,
The device region is defined on the substrate so that the second region is not substantially included in seven or more and the second region is not included in the active region of the device. .

The 189th invention of this invention is
An element structure is formed on a substrate in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystals. A device in which a layer is grown,
The substrate is substantially free of seven or more second regions, and the second region is not included in the active region of the element.

The 190th invention of the present invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A method for manufacturing an element, wherein an element is manufactured by growing a layer forming an element structure on a substrate arranged in an array,
The element region is defined on the substrate so that the interval between the second regions is 50 μm or more, one or more second regions are included, and the second region is not included in the active region of the device. It is characterized by that.

The 191st invention of this invention is
A plurality of second regions extending in a straight line having a second average dislocation density higher than the first average dislocation density in the first region made of a crystal having the first average dislocation density are arranged in parallel with each other. A device in which a layer for forming a device structure is grown on a substrate that is arranged in a row,
The interval between the second regions is 50 μm or more, the substrate includes one or more second regions, and the second region is not included in the active region of the element.

The 192nd invention of the present invention is
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A method for manufacturing an element, wherein an element is manufactured by growing a layer forming an element structure on a substrate arranged in an array,
The element region is defined on the substrate so that the interval between the second regions is 50 μm or more, one or more second regions are included, and the second region is not included in the active region of the device. It is characterized by that.

The 193rd invention of the present invention is
A plurality of second regions extending in a straight line having a second average defect density higher than the first average defect density in the first region made of a crystal having the first average defect density are arranged in parallel with each other. A device in which a layer for forming a device structure is grown on a substrate that is arranged in a row,
The interval between the second regions is 50 μm or more, the substrate includes one or more second regions, and the second region is not included in the active region of the element.

The 194th invention of the present invention is
An element structure is formed on a substrate in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystals. A method for manufacturing a device, wherein a device is manufactured by growing a layer,
The element region is defined on the substrate so that the interval between the second regions is 50 μm or more, one or more second regions are included, and the second region is not included in the active region of the device. It is characterized by that.

The 195th invention of the present invention is
An element structure is formed on a substrate in which a plurality of second regions extending in a straight line having poorer crystallinity than the first region are regularly arranged in parallel with each other in the first region made of crystals. A device in which a layer is grown,
The interval between the second regions is 50 μm or more, the substrate includes one or more second regions, and the second region is not included in the active region of the element.

In the 46th to 51st, 76th to 81st, 106th to 111th, 136th to 141st, and 166th to 171st inventions of this invention, the first to What has been described in relation to the forty-fifth invention is established.

52nd to 57th, 64th to 69th, 82th to 87th, 94th to 99th, 112th to 117th, 124th to 129th, 142th to 147th, 154th to 159th of this invention In the 172nd to 177th and 184th to 189th inventions, the interval between the second regions in the first direction (first interval) or the interval between the second regions extending linearly is the present invention. This is the same as the interval between the second regions or the arrangement interval between the second regions described in relation to the first invention. 58th to 63rd, 70th to 75th, 88th to 93rd, 100th to 105th, 118th to 123rd, 130th to 135th, 148 to 153, 160th to 165th of the present invention. In the 178th to 183rd inventions, the lower limit of the interval between the second regions in the first direction (first interval) or the interval between the second regions extending linearly is 50 μm. This is the same as the interval between the second regions or the arrangement interval between the second regions described in relation to the first invention of the present invention. In the 52nd to 63rd, 82nd to 93rd, 112th to 123rd, 142th to 153th, and 172nd to 183th inventions, the interval between the second regions in the second direction is basically In general, it can be freely selected within a range smaller than the first interval, and is generally 10 μm or more and 1000 μm or less, typically 20 μm or more and 200 μm or less, depending on the size of the second region. It is.

52nd to 57th, 64th to 69th, 82th to 87th, 94th to 99th, 112th to 117th, 124th to 129th, 142th to 147th, 154th to 159th of this invention In the 172nd to 177th and 184th to 189th inventions, the upper limit of the number of second regions extending in a row or linearly in the second direction is set to seven. Considering that there may be about 7 elements in the element region in relation to the chip size of the element depending on the row of the second area in the second direction or the interval between the second areas extending linearly. It is a thing. In general, the number of second regions extending in a row or in a straight line in the second direction in the second direction is typically 3 or less in a semiconductor light emitting device having a small chip size.

In the forty-sixth to 195th aspects of the present invention, the matters other than those described above are valid in relation to the first to forty-fifth aspects of the present invention as long as they are not contrary to the nature thereof.
In the present invention configured as described above, the second region having a higher average dislocation density, higher average defect density, or lower crystallinity than the first region is substantially not included, or Since the nitride region III-V compound semiconductor substrate, or the semiconductor substrate, or the device region is defined on the substrate so that the second region is not included in the active region of the device, the light emitting device structure or device Even if defects such as dislocations propagate from the second region to the nitride III-V compound semiconductor layer, semiconductor layer, or layers made of various materials forming the structure, the chip obtained by scribing the substrate Can have almost no defects such as dislocations.

The second region is included in the active region of the element so that the second region having a higher average dislocation density, higher average defect density, or lower crystallinity than the first region is substantially not included. Since a nitride III-V compound semiconductor substrate, or a semiconductor substrate, or an element region on the substrate is defined, there are almost no defects such as dislocations in the chip obtained by scribing the substrate. Can be. For this reason, semiconductor light-emitting elements with good characteristics such as light emission characteristics and high reliability and long life, or various semiconductor elements with good characteristics and high reliability and long life, or various elements with good characteristics and high reliability and long life Can be realized.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings of the embodiments, the same or corresponding parts are denoted by the same reference numerals.
In the following embodiment, as shown in FIG. 1A, in a region A composed of a certain crystal, a region B having different crystallinity from the crystal is periodically arranged in an island shape as a substrate. A case where a semiconductor element is formed over will be described. Region B penetrates the substrate. Further, it is assumed that the region B has lower crystallinity than the region A and includes more crystal defects. FIG. 1B shows a cross-sectional view of the region B in the closest direction. Here, the region B generally has an indeterminate polygonal column shape, but in FIG. 1A, it is simplified to have a cylindrical shape (the same applies hereinafter). In order to manufacture a semiconductor laser, a semiconductor layer forming an element structure is sequentially grown on the substrate by, for example, metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxial growth, or halide vapor phase epitaxial growth (HVPE). . Thereafter, necessary processes such as electrode formation are performed, and further, the semiconductor element is manufactured by scribing the substrate and the semiconductor layer thereon by cleaving or the like.

At this time, since the crystal defect of the base substrate propagates to the semiconductor layer grown thereon, the semiconductor element formed in the element region including the region B is inferior in characteristics due to the influence of the defect. It will be. For example, in the case of a light emitting diode or a semiconductor laser, if there is a defect in the light emitting region, the light emitting characteristics and reliability are significantly impaired. Therefore, the following method is adopted so that the light emitting region, more generally, the active region is not adversely affected by the region B.

(1) The element size is designed in accordance with the period in which the region B exists.
For example, as shown in FIG. 2, when the regions B are periodically arranged in a hexagonal lattice at regular intervals, and the distance between the centers of the nearest regions B is 400 μm, the element region is 400 μm × 346 μm. Make it rectangular. The numerical value of 346 μm is 400 μm × (3 ^1/2 / 2).

(2) The arrangement of the element regions on the substrate is determined so that the element region is not substantially formed on the region B, in other words, the element region does not substantially include the region B. .
For example, by scribing the substrate along the line indicated by the broken line in FIG. 3, the element region which is a rectangle of 400 μm × 346 μm is separated into chips. By doing in this way, the area | region B comes to exist only in each chip | tip, ie, the end surface and corner | angular part of each semiconductor element.

(3) The position of the active region in the device is designed so that the active region inside the device is not formed on the region B.
For example, in the case of a semiconductor laser, the light emitting region often has a stripe shape, and thus the structure of the semiconductor laser is designed so that the stripe is not formed on the region B. FIG. 4 shows an example of such a stripe position.

By the methods described in (1) to (3) above, the element regions can be arranged in an arrangement that intentionally avoids the influence of the region B with many defects.
In addition to the above, particularly in the case of a semiconductor laser, the element region and the element structure are designed so that the resonator end face of the light emitting region is not formed on the region B.
Since the end face of a chip is used as a cavity end face in a semiconductor laser, the characteristics of the laser will be impaired if a portion to be a mirror of the cavity is formed on a region B having many crystal defects as shown in FIG. . For this reason, the position of the light emitting region and the arrangement of the element regions on the substrate are designed so that the mirror part of the resonator is not formed on the region B.
In the above (1), the rectangle of 400 μm × 346 μm is an example, and the size and shape of the element may be selected so that the conditions described in (2) and (3) are satisfied.

Now, a first embodiment of the present invention will be described. In the first embodiment, a GaN-based semiconductor layer is formed on a GaN substrate in which regions B made of crystals having a high average dislocation density are regularly arranged in regions A made of crystals having a low average dislocation density. A case where a GaN-based semiconductor laser is formed by growth will be described.

FIG. 6 is a plan view showing a GaN substrate used in the first embodiment. A perspective view and a sectional view of the GaN substrate 1 are the same as those in FIGS. 1A and 1B. The GaN substrate 1 is n-type and has a (0001) plane (C plane) orientation. However, the GaN substrate 1 may have an R-plane, A-plane, or M-plane orientation. In this GaN substrate 1, regions B made of crystals having a high average dislocation density are periodically arranged in a hexagonal lattice pattern in regions A made of crystals having a low average dislocation density. In this case, the straight line connecting the closest regions B coincides with the <1-100> direction of GaN and the equivalent direction. However, the straight line connecting the closest regions B may coincide with the <11-20> direction of GaN and the equivalent direction. Region B penetrates GaN substrate 1. The thickness of the GaN substrate 1 is, for example, 200 to 600 μm. Note that the broken lines in FIG. 6 are only for showing the relative positional relationship of the region B, and are not actual (physically meaningful) lines (the same applies hereinafter).

The arrangement period of the region B (the distance between the centers of the closest regions B) is, for example, 400 μm, and the diameter thereof is, for example, 20 μm. Further, the average dislocation density in the region A is 2 × 10 ⁶ cm ⁻² , for example, and the average dislocation density in the region B is 1 × 10 ⁸ cm ⁻² , for example. An example of the distribution of dislocation density in the radial direction from the center of region B is shown in FIG.
The GaN substrate 1 can be manufactured, for example, as follows using a crystal growth technique.
The basic crystal growth mechanism used in the manufacture of the GaN substrate 1 is to grow with a sloped facet plane, and to maintain the facet slope to grow, dislocations propagate, and gather at a predetermined position. It is something to be made. A region grown by this facet surface becomes a low-density defect region due to dislocation movement. At the lower part of the facet slope, growth is performed with a high density defect region with a clear boundary, and dislocations gather at the boundary of the high density defect region or inside, and disappear or accumulate there. To do.
The shape of the facet surface varies depending on the shape of the high-density defect region. When the defect area is dot-like, the facet surface is surrounded with the dot as the bottom, and a pit composed of the facet surface is formed. Further, when the defect region has a stripe shape, a triangular prism-shaped facet surface is formed with the stripe as a valley bottom, facet surface slopes on both sides thereof, and tilted sideways.
Thereafter, the surface of the growth layer is ground and polished, so that the surface can be flattened and used as a substrate.
In addition, the high-density defect area may have several states. For example, it may be made of polycrystal. Moreover, although it is a single crystal, it may be slightly inclined with respect to the surrounding low density defect area | region. Further, the C axis may be inverted with respect to the surrounding low density defect region. Thus, this high density defect region has a clear boundary and is distinguished from the surroundings.
By growing with this high-density defect region, the growth can proceed while maintaining the facet surface without embedding the surrounding facet surface.
This high-density defect region can be generated by previously forming seeds in a place where the high-density defect region is formed when GaN is crystal-grown on the base substrate. As the seed, an amorphous or polycrystalline layer is formed. Then, by growing GaN, a high-density defect region can be formed in that kind of region.
A specific method for manufacturing the GaN substrate 1 is as follows. First, a base substrate is prepared. Various substrates can be used as the base substrate, and a general sapphire substrate may be used, but it is preferable to use a GaAs substrate that can be easily removed in consideration of removal in a later step. Then, a seed made of, for example, a SiO ₂ film is formed on the base substrate. This type of shape can be, for example, a dot or stripe. This species is regular and can be formed in large numbers. More specifically, in this case, the seed is formed in an arrangement corresponding to the arrangement of the region B shown in FIG. Thereafter, GaN is grown in a thick film by, for example, hydride vapor phase epitaxy (HVPE). After the growth, a facet surface corresponding to the pattern shape of the seed is formed on the surface of the GaN thick film layer. In the case where the seed is a dot-like pattern as in the first embodiment, pits composed of facet surfaces are regularly formed. On the other hand, when the seed is a stripe pattern, a prismatic facet surface is formed.
Thereafter, the base substrate is removed, and the GaN thick film layer is ground and polished to flatten the surface. Thereby, the GaN substrate 1 can be manufactured. Here, the thickness of the GaN substrate 1 can be freely set.
The GaN substrate 1 manufactured in this manner has a C-plane as a main surface, and a substrate in which high-density defect regions in a dot shape (or stripe shape) of a predetermined size, that is, regions B are regularly formed. It has become. The single crystal region other than the region B, that is, the region A has a lower dislocation density than the region B.

In the first embodiment, an element region 2 (one section surrounded by a thick solid line) is defined on the GaN substrate 1 shown in FIG. 6 with the shape and arrangement as shown in FIG. Then, a GaN-based semiconductor layer for forming a laser structure is grown on the GaN substrate 1 and necessary processes such as laser stripe formation and electrode formation are performed to form the laser structure. Along with this, scribing of the GaN substrate 1 on which the laser structure is formed is performed to separate the individual GaN-based semiconductor laser chips.

In FIG. 8, a gray rectangle represents one GaN semiconductor laser, and a straight line drawn near the center is the laser stripe 3, which corresponds to the position of the light emitting region. Further, a rectangle drawn by a broken line connecting them represents the laser bar 4, and the long side of the laser bar 4 corresponds to the end face of the resonator.

In the example shown in FIG. 8, the size of the GaN-based semiconductor laser is, for example, 600 μm × 346 μm, the horizontal direction (long side direction) is along a straight line connecting the regions B, and the vertical direction (short side direction) is the region B. Each substrate is scribed along a straight line that does not pass to separate the GaN-based semiconductor lasers of that size.

In this case, since the region B exists only at the end face portion of the long side of each GaN-based semiconductor laser, the element design is made so that the laser stripe 3 is positioned in the vicinity of the straight line connecting the midpoints of the short sides. By doing so, it is possible to avoid the influence of the region B from reaching the light emitting region.
The mirror of the resonator is formed on the end face by scribing the substrate along the vertical straight line in FIG. 8 by cleaving or the like, but the straight line does not pass through the region B. Will not be affected. Therefore, it is possible to obtain a GaN-based semiconductor laser with good light emission characteristics and high reliability.

An example of a specific structure and manufacturing process of a GaN-based semiconductor laser is as follows. Here, a GaN-based semiconductor laser having a ridge structure and a SCH (Separate Confinement Heterostructure) structure will be described.

That is, as shown in FIG. 9, first, after the surface of the GaN substrate 1 is cleaned by thermal cleaning or the like, the n-type GaN buffer layer 5, the n-type AlGaN cladding layer 6, the n-type GaN are formed thereon by MOCVD. optical waveguide layer 7, undoped _{Ga 1-x in x N /} Ga 1-y in y N active layer 8 of the multi-quantum well structure, undoped InGaN deterioration preventive layer 9, p-type AlGaN cap layer 10, p-type GaN optical guide The layer 11, the p-type AlGaN cladding layer 12, and the p-type GaN contact layer 13 are sequentially epitaxially grown.

Here, the n-type GaN buffer layer 5 has a thickness of, for example, 0.05 μm and is doped with, for example, Si as an n-type impurity. The n-type AlGaN cladding layer 6 has a thickness of, for example, 1.0 μm, is doped with, for example, Si as an n-type impurity, and has an Al composition of, for example, 0.08. The n-type GaN optical waveguide layer 7 has a thickness of, for example, 0.1 μm and is doped with, for example, Si as an n-type impurity. The active layer 8 of the undoped In _x Ga _{1 -x} N / In _y Ga _{1 -y} N multiple quantum well structure has, for example, a thickness of In _x Ga _{1 -x} N layer as a well layer of 3.5 nm and x = The thickness of the In _y Ga _1-y N layer as the barrier layer is 7 nm, y = 0.02, and the number of wells is 3.

The undoped InGaN degradation preventing layer 9 has a graded structure in which the In composition gradually monotonously decreases from the surface in contact with the active layer 8 toward the surface in contact with the p-type AlGaN cap layer 9. The In composition on the surface in contact with the In layer is the same as the In composition y of the In _y Ga _1-y N layer as the barrier layer of the active layer 8, and the In composition on the surface in contact with the p-type AlGaN cap layer 10 is 0. The thickness of the undoped InGaN deterioration preventing layer 9 is, for example, 20 nm.

The p-type AlGaN cap layer 10 has a thickness of 10 nm, for example, and is doped with, for example, magnesium (Mg) as a p-type impurity. The p-type AlGaN cap layer 10 has an Al composition of 0.2, for example. The p-type AlGaN cap layer 10 prevents the In from detachment from the active layer 8 during the growth of the p-type GaN optical waveguide layer 11, the p-type AlGaN cladding layer 12, and the p-type GaN contact layer 13, and deteriorates. This is to prevent the overflow of carriers (electrons) from the active layer 8. The p-type GaN optical waveguide layer 11 has a thickness of, for example, 0.1 μm and is doped with, for example, Mg as a p-type impurity. The p-type AlGaN cladding layer 12 has a thickness of, for example, 0.5 μm, is doped with, for example, Mg as a p-type impurity, and has an Al composition of, for example, 0.08. The p-type GaN contact layer 13 has a thickness of 0.1 μm, for example, and is doped with, for example, Mg as a p-type impurity.

Further, the n-type GaN buffer layer 5, the n-type AlGaN cladding layer 6, the n-type GaN optical waveguide layer 7, the p-type AlGaN cap layer 10, the p-type GaN optical waveguide layer 11, and the p-type AlGaN cladding, which are layers not containing In. the growth temperature of the layer 12 and the p-type GaN contact layer 13 is, for example, 1000 ° C. approximately, growth of _{Ga 1-x in x N /} Ga 1-y in y N active layer 8 of the multi-quantum well structure is a layer containing in The temperature is, for example, 700 to 800 ° C., for example, 730 ° C. The growth temperature of the undoped InGaN degradation preventing layer 9 is set to, for example, 730 ° C. at the start of growth, similarly to the growth temperature of the active layer 8, and then increased, for example, linearly. The temperature is set to 835 ° C., for example.

The growth raw materials of these GaN-based semiconductor layers are, for example, trimethylgallium ((CH ₃ ) ₃ Ga, TMG) as a Ga raw material, trimethylaluminum ((CH ₃ ) ₃ Al, TMA) as an Al raw material, In As a raw material, trimethylindium ((CH ₃ ) ₃ In, TMI) is used, and as a raw material of N, NH ₃ is used. As the carrier gas, for example, H ₂ is used. As for the dopant, for example, monosilane (SiH ₄ ) is used as an n-type dopant, and bis = methylcyclopentadienylmagnesium ((CH ₃ C ₅ H ₄ ) ₂ Mg) or bis = cyclopentadienyl is used as a p-type dopant. Magnesium ((C ₅ H ₅ ) ₂ Mg) is used.

Next, the GaN substrate 1 on which the GaN-based semiconductor layer has been grown as described above is taken out from the MOCVD apparatus. Then, an SiO ₂ film (not shown) having a thickness of, for example, 0.1 μm is formed on the entire surface of the p-type GaN contact layer 13 by, for example, CVD, vacuum deposition, sputtering, or the like, and is then formed on the SiO ₂ film. A resist pattern (not shown) having a predetermined shape corresponding to the shape of the ridge portion is formed by lithography, and using this resist pattern as a mask, for example, wet etching using a hydrofluoric acid-based etching solution, or CF ₄ or CHF ₃ The SiO ₂ film is etched by the RIE method using an etching gas containing fluorine such as to have a shape corresponding to the ridge portion.

Next, etching is performed to a predetermined depth in the thickness direction of the p-type AlGaN cladding layer 12 by the RIE method using this SiO ₂ film as a mask, thereby extending in the <1-100> direction as shown in FIG. The ridge 14 to be formed is formed. The width of the ridge 14 is 3 μm, for example. As this RIE etching gas, for example, a chlorine-based gas is used.

Next, after the SiO ₂ film used as an etching mask is removed by etching, an insulating film 15 such as a SiO ₂ film having a thickness of 0.3 μm is formed on the entire surface of the substrate by, for example, CVD, vacuum deposition, sputtering, or the like. Form a film. This insulating film 15 is for electrical insulation and surface protection.

Next, a resist pattern (not shown) that covers the surface of the insulating film 15 in a region excluding the p-side electrode formation region is formed by lithography.
Next, the insulating film 15 is etched using this resist pattern as a mask to form an opening 15a.

Next, for example, a Pd film, a Pt film, and an Au film are sequentially formed on the entire surface of the substrate by, for example, a vacuum deposition method with the resist pattern remaining, and then a resist pattern is formed on the Pd film and the Pt film formed thereon. And removed together with the Au film (lift-off). As a result, the p-side electrode 16 in contact with the p-type GaN contact layer 13 through the opening 15a of the insulating film 15 is formed. Here, the thicknesses of the Pd film, the Pt film, and the Au film constituting the p-side electrode 16 are, for example, 10 nm, 100 nm, and 300 nm, respectively. Next, the alloy process for making the p-side electrode 16 ohmic contact is performed.

Next, for example, a Ti film, a Pt film, and an Au film are sequentially formed on the back surface of the GaN substrate 1 by, for example, a vacuum deposition method to form an n-side electrode 17 having a Ti / Pt / Au structure. Here, the thicknesses of the Ti film, Pt film, and Au film constituting the n-side electrode 17 are, for example, 10 nm, 50 nm, and 100 nm, respectively. Next, the alloy process for making the n side electrode 17 ohmic-contact is performed.

Next, along the contour line of the element region 2, scribing of the GaN substrate 1 on which the laser structure is formed as described above is performed by cleaving to process the laser bar 4, thereby forming both resonator end faces. Next, after end face coating is performed on the end faces of these resonators, scribing of the laser bar 4 is performed again by cleavage or the like to form chips.
As a result, as shown in FIG. 11, a GaN-based semiconductor laser having the target ridge structure and SCH structure is manufactured.

As described above, according to the first embodiment, the region B on the GaN substrate 1 in which the region B having a high average dislocation density is periodically arranged in a hexagonal lattice pattern in the region A having a low average dislocation density. The element region 2 is defined so as not to substantially contain B, and a GaN-based semiconductor layer for forming a laser structure is grown on the GaN substrate 1. Even if defects such as dislocations propagate from the region B, the GaN-based semiconductor layer on the element region 2 can be prevented from being affected. Then, after the GaN-based semiconductor layer is grown, the ridge 14 is formed, the p-side electrode 16 and the n-side electrode 17 are formed, and then the GaN having the laser structure formed along the outline of the element region 2 Since the substrate 1 is separated into individual GaN-based semiconductor laser chips by scribing, the GaN-based semiconductor laser chip has almost no dislocations inherited from the GaN substrate 1. For this reason, it is possible to realize a GaN-based semiconductor laser having good light emission characteristics, high reliability, and long life.

In addition, according to the first embodiment, the undoped InGaN deterioration preventing layer 9 is provided in contact with the active layer 8, and the p-type AlGaN cap layer 10 is provided in contact with the undoped InGaN deterioration preventing layer 9. Therefore, the undoped InGaN degradation preventing layer 9 can significantly relieve the stress generated in the active layer 8 by the p-type AlGaN cap layer 10, and Mg used as the p-type dopant of the p-type layer is added to the active layer 7. It is possible to effectively suppress diffusion.

Next explained is the second embodiment of the invention.
As shown in FIG. 12, in the second embodiment, unlike the first embodiment, the outline of the rectangular element region 2 is a straight line connecting the centers of the region B with the long side and the short side. Consists of. Also in this case, the position of the laser stripe 3 is on a line connecting the midpoints of the short sides of the element region 2. By doing so, it is possible to avoid the influence of the region B from reaching the light emitting region.

In the second embodiment, the resonator mirror is formed by scribing along the contour line of the element region 2, which is a straight line connecting the centers of the regions B, in the first embodiment. It is different from the form.
Here, it is considered that the region B is more fragile than the region A because there are many dislocations. Therefore, when scribing is performed along a straight line connecting the regions B, the region B plays a role like a perforation, and the region A is also cleaved cleanly. At this time, the end surface of the region B is not necessarily flat because there are many dislocations, but the end surface of the region A in between is flat. FIG. 13 conceptually shows the shape of the end face.

Flatness is required for the end face portion of the laser stripe 2, but if the arrangement is as shown in FIG. 12, the end face of the region B does not adversely affect the light emission characteristics.
Since other than the above is the same as that of the first embodiment, the description is omitted.
According to the second embodiment, the same advantages as those of the first embodiment can be obtained.

Next explained is the third embodiment of the invention.
In the third embodiment, as shown in FIG. 14, in the GaN substrate 1, a region B made of a crystal having a high average dislocation density is periodically arranged in a rectangular lattice pattern in a region A made of a crystal having a low average dislocation density. Are arranged. The one rectangle in which the region B is located at the four corners is defined as an element region 2. In this case, the straight line connecting the closest regions B in the long-side direction of the rectangle coincides with the <1-100> direction of GaN, and the straight line connecting the closest regions B in the short-side direction is <11- 20> direction.

The arrangement period of the region B in the long side direction of the rectangular lattice is, for example, 600 μm, and the arrangement period of the region B in the short side direction is, for example, 400 μm. In this case, the size of the element region 2 is 600 μm × 400 μm.
The laser stripe 3 in the element region 2 is on a straight line connecting the midpoints of the sides in the short side direction of the rectangular lattice.
Since other than the above is the same as that of the first embodiment, the description is omitted.
According to the third embodiment, the same advantages as those of the first embodiment can be obtained.

Next explained is the fourth embodiment of the invention.
In the fourth embodiment, as shown in FIG. 15, the regions B are periodically arranged in a hexagonal lattice pattern in the region A of the GaN substrate 1 as in the first embodiment. However, the first implementation is that a region C having an average dislocation density intermediate between the average dislocation density in region A and the average dislocation density in region B is formed as a transition region between region A and region B. Different from form. Specifically, the average dislocation density of the region A 2 × 10 ⁶ cm ^-2 or less, the average dislocation density of the regions B is 1 × 10 ⁸ cm ^-2 or more, the average dislocation density of the regions C is 1 × 10 ⁸ cm ^- less than ^2, greater than 2 × 10 ⁶ cm ^-2. The arrangement period of the region B (the distance between the centers of the closest regions B) is, for example, 300 μm, and the diameter thereof is, for example, 20 μm. Further, the diameter of the region C is, for example, 120 μm.

In this case, unlike the first embodiment, the outline of the rectangular element region 2 is a straight line connecting the centers of the region B with both the long side and the short side. The size of the element region 2 is, for example, 600 μm × 260 μm. Also in this case, the position of the laser stripe 3 is on a line connecting the midpoints of the short sides of the element region 2, but the laser stripe 3 does not include the region B and the region C. By doing so, it is possible to avoid the influence of the region B and the region C from reaching the light emitting region.
Since other than the above is the same as that of the first embodiment, the description is omitted.
According to the fourth embodiment, the same advantages as those of the first embodiment can be obtained.

Next explained is the fifth embodiment of the invention.
In the fifth embodiment, as shown in FIG. 16, the regions B are periodically arranged in a hexagonal lattice pattern in the region A of the GaN substrate 1 as in the first embodiment. However, the first implementation is that a region C having an average dislocation density intermediate between the average dislocation density in region A and the average dislocation density in region B is formed as a transition region between region A and region B. Different from form. Specifically, the average dislocation density of the region A 2 × 10 ⁶ cm ^-2 or less, the average dislocation density of the regions B is 1 × 10 ⁸ cm ^-2 or more, the average dislocation density of the regions C is 1 × 10 ⁸ cm ^- less than ^2, greater than 2 × 10 ⁶ cm ^-2. The arrangement period of the region B (the distance between the centers of the closest regions B) is, for example, 400 μm, and the diameter thereof is, for example, 20 μm. Further, the diameter of the region C is, for example, 120 μm.

In this case, unlike the first embodiment, in the first example, the outline in the short side direction of the rectangular element region 2 is a straight line connecting the centers of the regions B, but the outline in the long side direction is For example, 23 μm away from the straight line connecting the centers of the closest regions B. In this case, the size of the element region 2 is, for example, 400 μm × 300 μm. Also in this case, the position of the laser stripe 3 is on a line connecting the midpoints of the short sides of the element region 2, but the laser stripe 3 does not include the region B and the region C. By doing so, it is possible to avoid the influence of the region B and the region C from reaching the light emitting region.

On the other hand, in the second example, the long-side outline of the rectangular element region 2 is, for example, 23 μm away from the straight line connecting the centers of the closest regions B in the <1-100> direction. Is, for example, 100 μm away from the straight line connecting the centers of the closest regions B in the <11-20> direction. Also in this case, the size of the element region 2 is, for example, 400 μm × 300 μm. The position of the laser stripe 3 is on a line connecting the midpoints of the short sides of the element region 2, but the laser stripe 3 does not include the region B and the region C. By doing so, it is possible to avoid the influence of the region B and the region C from reaching the light emitting region.
Since other than the above is the same as that of the first embodiment, the description is omitted.
According to the fifth embodiment, the same advantages as those of the first embodiment can be obtained.

Next, a sixth embodiment of the present invention will be described.
In the sixth embodiment, the regions B are periodically arranged in a hexagonal lattice pattern in the region A of the GaN substrate 1 as in the first embodiment. In this case, however, FIG. As shown in FIG. 5, the interval connecting the centers of the closest regions B in the <1-100> direction is set to twice the length of the short side of the rectangular element region 2, and specifically, for example, 700 μm. Is set to The contour line in the short side direction of the element region 2 of the closest region B in the <1-100> direction is a straight line connecting the centers of the closest regions B in the <11-20> direction. The contour line is a straight line connecting the centers of the closest regions B in the <1-100> direction. In this case, the size of the element region 2 is, for example, 606 μm × 350 μm. The position of the laser stripe 3 is on a line connecting the midpoints of the short sides of the element region 2, but the laser stripe 3 does not include the region B. By doing so, it is possible to avoid the influence of the region B from reaching the light emitting region.
Since other than the above is the same as that of the first embodiment, the description is omitted.
According to the sixth embodiment, the same advantages as those of the first embodiment can be obtained.

Next explained is the seventh embodiment of the invention.
As shown in FIG. 18, in the seventh embodiment, two laser stripes 3 are formed in the element region 2 in parallel to each other. FIG. 19 shows a GaN-based semiconductor laser chip obtained by scribing along the contour line of the element region 2.
Since other than the above is the same as that of the first embodiment, the description is omitted.
According to the seventh embodiment, the same advantages as those of the first embodiment can be obtained in the multi-beam GaN-based semiconductor laser.

Next, an eighth embodiment of the invention will be described.
As shown in FIG. 20, in the eighth embodiment, the laser stripe 3 is formed in the element region 2 as in the first embodiment, but in this case, the width of the laser stripe 3 is It is selected much larger than the first embodiment. Specifically, the width of the laser stripe 3 can be a maximum when the length of the short side of the rectangular element region 2 is a and the diameter of the region B is d. 3 is preferably separated from the region B by at least 1 μm or more, and considering this, the upper limit of the width of the laser stripe 3 is ad−2 μm. For example, when a = 346 μm and d = 20 μm, the upper limit of the width of the laser stripe 3 is 346-20-2 = 324 μm. For example, the width of the laser stripe 3 is 200 μm. At this time, a GaN-based semiconductor laser chip obtained by scribing along the contour line of the element region 2 is shown in FIG.
Since other than the above is the same as that of the first embodiment, the description is omitted.
According to the eighth embodiment, an advantage similar to that of the first embodiment can be obtained in a GaN-based semiconductor laser having a very large laser stripe 3 and a very large output.

Next, a ninth embodiment of the invention will be described.
FIG. 22 is a plan view showing a GaN substrate used in the ninth embodiment. As shown in FIG. 22, in the ninth embodiment, the element region 2 is defined so that the region B is not included in the laser stripe 3. Here, the laser stripe 3 is separated from the region B by 50 μm or more. In this case, the element region 2 includes two regions B.
Since other than the above is the same as that of the first embodiment, the description is omitted.
According to the ninth embodiment, the same advantages as those of the first embodiment can be obtained.

Next explained is the tenth embodiment of the invention.
FIG. 23 is a plan view showing a GaN substrate used in the tenth embodiment. This GaN substrate 1 is n-type and has a C-plane orientation. However, the GaN substrate 1 may have an R-plane, A-plane, or M-plane orientation. In this GaN substrate 1, regions B made of crystals with a high average dislocation density are periodically arranged in the GaN <11-20> direction at intervals of 400 μm, for example, in regions A made of crystals with a low average dislocation density. For example, they are periodically arranged at intervals of 20 to 100 μm in the <1-100> direction orthogonal to the <11-20> direction. However, the <11-20> direction and the <1-100> direction may be interchanged.

In the tenth embodiment, as shown in FIG. 24, a pair of end faces parallel to the laser stripe 3 pass through the columns of the regions B in the <1-100> direction, and the laser stripes 3 The element region 2 is defined so as to be located near the center of the region between the columns. In this case, the element region 2 does not substantially include the column of the region B.
Since other than the above is the same as that of the first embodiment, the description is omitted.
According to the tenth embodiment, the same advantages as those of the first embodiment can be obtained.

Next, an eleventh embodiment of the present invention will be described.
As shown in FIG. 25, in the eleventh embodiment, a GaN substrate 1 similar to that in the tenth embodiment is used, but one end face parallel to the laser stripe 3 is a region B in the <1-100> direction. This is different from the tenth embodiment in that the other end face passes a position away from the row of the region B. In this case, the element region 2 does not substantially include the column of the region B.
Since the other than the above is the same as in the tenth and first embodiments, the description is omitted.
According to the eleventh embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a twelfth embodiment of the invention is described.
As shown in FIG. 26, in the twelfth embodiment, the same GaN substrate 1 as in the tenth embodiment is used, but the pair of end faces parallel to the laser stripe 3 are both in the <1-100> direction. It differs from the tenth embodiment in that the element region 2 is defined so that the laser stripe 3 is located in the vicinity of the center of the region between the rows of the regions B and between the rows of the regions B. . In this case, the element region 2 does not substantially include the column of the region B.
Since the other than the above is the same as in the tenth and first embodiments, the description is omitted.
According to the twelfth embodiment, the same advantages as those of the first embodiment can be obtained.

Next, a thirteenth embodiment of the invention is described.
As shown in FIG. 27, in the thirteenth embodiment, a GaN substrate 1 similar to that in the tenth embodiment is used, but one end face parallel to the laser stripe 3 is a region B in the <1-100> direction. The other end face is located between the column of the region B immediately adjacent to the column of the region B and the column of the next region B, and the laser stripe 3 is 50 μm or more from the column of the region B It differs from the tenth embodiment in that it passes through a distant position. In this case, the element region 2 includes one column of the region B.
Since the other than the above is the same as in the tenth and first embodiments, the description is omitted.
According to the thirteenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a fourteenth embodiment of the invention is described.
As shown in FIG. 28, in the fourteenth embodiment, the same GaN substrate 1 as in the tenth embodiment is used, but one end face parallel to the laser stripe 3 is a region B in the <1-100> direction. The other end face is located between the row of the region B immediately adjacent to the row of the region B and the row of the next region B, and the laser stripe 3 is located in the region B. It differs from the tenth embodiment in that it passes through a position separated by 50 μm or more from the row. In this case, the element region 2 includes one column of the region B.
Since the other than the above is the same as in the tenth and first embodiments, the description is omitted.
According to the fourteenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a fifteenth embodiment of the invention is described.
FIG. 29 is a plan view showing the GaN substrate 1 used in the fifteenth embodiment. This GaN substrate 1 is the same as the GaN substrate 1 used in the tenth embodiment, except that the regions B are periodically arranged at intervals of, for example, 200 μm in the <11-20> direction of GaN. In this case, the element region 2 includes two columns of the region B.

As shown in FIG. 29, in the fifteenth embodiment, the laser stripes 3 are located near the center of the region between adjacent columns of the region B, and a pair of end faces parallel to the laser stripe 3 are provided. Are located in the vicinity of the center of the region between the row of the region B and the row of the region B immediately outside thereof.
Since the other than the above is the same as in the tenth and first embodiments, the description is omitted.
According to the fifteenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a sixteenth embodiment of the invention is described.
FIG. 30 is a plan view showing a GaN substrate used in the sixteenth embodiment. This GaN substrate 1 is n-type and has a C-plane orientation. However, the GaN substrate 1 may have an R-plane, A-plane, or M-plane orientation. In this GaN substrate 1, a region B made of a crystal having a high average dislocation density in a region A made of a crystal having a low average dislocation density and extending linearly in the <1-100> direction of GaN is <1. For example, they are periodically arranged at intervals of 400 μm in the <11-20> direction orthogonal to the −100> direction. However, the <1-100> direction and the <11-20> direction may be interchanged.

In the sixteenth embodiment, as shown in FIG. 31, a pair of end faces parallel to the laser stripe 3 pass through the region B, and the laser stripe 3 is located near the center of the region between the regions B. Thus, the element region 2 is defined. In this case, the element region 2 does not substantially include the column of the region B.
Since other than the above is the same as that of the first embodiment, the description is omitted.
According to the sixteenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a seventeenth embodiment of the invention is described.
As shown in FIG. 32, in the seventeenth embodiment, a GaN substrate 1 similar to that in the sixteenth embodiment is used, but one end face parallel to the laser stripe 3 passes through the region B and the other end face is This is different from the sixteenth embodiment in that it passes a position away from the row of the region B. In this case, the element region 2 does not substantially include the column of the region B.
Since the other than the above is the same as in the sixteenth and first embodiments, the description is omitted.
According to the seventeenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, an eighteenth embodiment of the invention is described.
As shown in FIG. 33, in the eighteenth embodiment, the same GaN substrate 1 as in the sixteenth embodiment is used, but a pair of end faces parallel to the laser stripe 3 are located between the regions B. In addition, the difference from the sixteenth embodiment is that the element region 2 is defined so that the laser stripe 3 is located near the center of the region between the regions B. In this case, the element region 2 does not substantially include the column of the region B.
Since other than the above is the same as in the sixteenth and first embodiments, the description is omitted.
According to the eighteenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a nineteenth embodiment of the present invention is described.
As shown in FIG. 34, in the nineteenth embodiment, a GaN substrate 1 similar to that in the sixteenth embodiment is used, but one end face parallel to the laser stripe 3 passes through the region B and the other end face is This is different from the sixteenth embodiment in that it is located between the region B immediately adjacent to the column of the region B and the next region B, and the laser stripe 3 passes a position separated from the region B by 50 μm or more. . In this case, the element region 2 includes one region B.
Since the other than the above is the same as in the sixteenth and first embodiments, the description is omitted.
According to the nineteenth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a twentieth embodiment of the invention is described.
As shown in FIG. 35, in the twentieth embodiment, a GaN substrate 1 similar to that in the sixteenth embodiment is used, but one end face parallel to the laser stripe 3 passes through a position away from the region B, Sixteenth embodiment in that the other end face is located between a region B immediately adjacent to this region B and the next region B, and the laser stripe 3 passes a position separated by 50 μm or more from the region B. And different. In this case, the element region 2 includes one column of the region B.
Since the other than the above is the same as in the sixteenth and first embodiments, the description is omitted.
According to the twentieth embodiment, advantages similar to those of the first embodiment can be obtained.

Next, a twenty-first embodiment of the present invention will be described.
FIG. 36 is a plan view showing the GaN substrate 1 used in the twenty-first embodiment. This GaN substrate 1 is the same as the GaN substrate 1 used in the sixteenth embodiment, except that the regions B are periodically arranged at intervals of, for example, 200 μm in the <11-20> direction of GaN. In this case, the element region 2 includes two columns of the region B.

As shown in FIG. 36, in the twenty-first embodiment, the laser stripe 3 is located near the center of the region between the adjacent regions B, and a pair of end faces parallel to the laser stripe 3 are these regions. It is located near the center of the region between B and their immediate outer region B.
Since the other than the above is the same as in the sixteenth and first embodiments, the description is omitted.
According to the twenty-first embodiment, advantages similar to those of the first embodiment can be obtained.

The embodiment of the present invention has been specifically described above, but the present invention is not limited to the above-described embodiment, and various modifications based on the technical idea of the present invention are possible.

For example, the numerical values, structures, substrates, raw materials, processes, and the like given in the above-described embodiments are merely examples, and different numerical values, structures, substrates, raw materials, processes, and the like may be used as necessary.

Specifically, for example, in the above-described embodiment, the n-type layer forming the laser structure is first laminated on the substrate, and the p-type layer is laminated thereon, but the lamination order is reversed. The p-type layer may be first laminated on the substrate, and the n-type layer may be laminated thereon.

In the above-described embodiment, the case where the present invention is applied to the manufacture of a GaN semiconductor laser having an SCH structure has been described. However, the present invention is applicable to the manufacture of a GaN semiconductor laser having a DH (Double Heterostructure) structure, for example. Of course, it may be applied to the manufacture of GaN-based light emitting diodes, and further, nitride-based III-V compound semiconductors such as GaN-based FETs and GaN-based heterojunction bipolar transistors (HBT) are used. The present invention may be applied to a conventional electronic traveling element.

Furthermore, in the above-described embodiment, H ₂ gas is used as a carrier gas when performing growth by MOCVD, but other carrier gases such as H ₂ and N ₂ or He, Ar gas are used as necessary. A mixed gas such as may be used.
Further, in the above-described embodiment, the resonator end surface is formed by cleavage, but the resonator end surface may be formed by dry etching such as RIE.

It is the perspective view and sectional drawing for demonstrating the principal point of embodiment of this invention. It is a top view for demonstrating the principal point of embodiment of this invention. It is a top view for demonstrating the principal point of embodiment of this invention. It is a top view for demonstrating the principal point of embodiment of this invention. It is a top view for demonstrating the principal point of embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 1st Embodiment of this invention. It is a basic diagram which shows an example of distribution of the dislocation density in the vicinity of the high defect area | region of the GaN substrate used in 1st Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the GaN-type semiconductor laser by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the GaN-type semiconductor laser by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the GaN-type semiconductor laser by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the GaN-type semiconductor laser by 2nd Embodiment of this invention. It is a basic diagram which shows the end surface of the chip | tip obtained by scribing in the manufacturing method of the GaN-type semiconductor laser by 2nd Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 3rd Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 4th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 5th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 6th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 7th Embodiment of this invention. It is sectional drawing which shows the GaN-type semiconductor laser manufactured by the 7th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 8th Embodiment of this invention. It is sectional drawing which shows the GaN-type semiconductor laser manufactured by 8th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 9th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 10th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 10th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 11th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 12th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 13th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 14th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 15th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 16th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 16th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 17th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 18th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 19th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 20th Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the GaN-type semiconductor laser by 21st Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... GaN substrate, 2 ... Element area | region, 3 ... Laser stripe, 5 ... n-type GaN buffer layer, 6 ... n-type AlGaN clad layer, 7 ... n-type GaN optical waveguide layer, 8 ... Active layer, 9 ... Undoped InGaN degradation Prevention layer, 10 ... p-type AlGaN cap layer, 11 ... p-type GaN optical waveguide layer, 12 ... p-type AlGaN cladding layer, 13 ... p-type GaN contact layer, 14 ... ridge, 15 ... insulating film, 16 ... n-side electrode 17 ... p-side electrode

Claims (14)

A nitride in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure on a III-V compound semiconductor substrate is grown,
The semiconductor light-emitting device, wherein at least one second region is present on an end face or a corner of the nitride-based III-V compound semiconductor substrate. A nitride in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor light emitting device in which a nitride III-V compound semiconductor layer forming a light emitting device structure on a III-V compound semiconductor substrate is grown,
The semiconductor light-emitting device, wherein at least one second region is present on an end face or a corner of the nitride-based III-V compound semiconductor substrate. A light emitting device structure is formed on a nitride III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystal A semiconductor light emitting device in which a nitride III-V compound semiconductor layer is grown,
The semiconductor light-emitting device, wherein at least one second region is present on an end face or a corner of the nitride-based III-V compound semiconductor substrate. 4. The semiconductor light emitting device according to claim 1, wherein the nitride III-V compound semiconductor substrate is a GaN substrate. 5. The semiconductor light-emitting element according to claim 1, wherein the plurality of second regions are arranged in an island shape. A nitride in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate is grown,
At least one said 2nd area | region exists in the end surface or corner | angular part of the said nitride type III-V compound semiconductor substrate. The semiconductor element characterized by the above-mentioned. A nitride in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor device in which a nitride III-V compound semiconductor layer forming an element structure on a III-V compound semiconductor substrate is grown,
At least one said 2nd area | region exists in the end surface or corner | angular part of the said nitride type III-V compound semiconductor substrate. The semiconductor element characterized by the above-mentioned. An element structure is formed on a nitride III-V compound semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals. A semiconductor device in which a nitride III-V compound semiconductor layer is grown,
At least one said 2nd area | region exists in the end surface or corner | angular part of the said nitride type III-V compound semiconductor substrate. The semiconductor element characterized by the above-mentioned. The semiconductor element according to any one of claims 6 to 8, wherein the nitride III-V compound semiconductor substrate is a GaN substrate. The semiconductor element according to any one of claims 6 to 9, wherein the plurality of second regions are arranged in an island shape. A semiconductor substrate in which a plurality of second regions having a second average dislocation density higher than the first average dislocation density are regularly arranged in a first region made of a crystal having a first average dislocation density. A semiconductor light-emitting device in which a semiconductor layer forming a light-emitting device structure is grown,
At least one second region is present on an end face or a corner of the semiconductor substrate. A semiconductor light emitting element. A semiconductor substrate in which a plurality of second regions having a second average defect density higher than the first average defect density are regularly arranged in a first region made of a crystal having a first average defect density. A semiconductor light emitting device having a semiconductor layer formed thereon to form a light emitting device structure,
At least one second region is present on an end face or a corner of the semiconductor substrate. A semiconductor light emitting element. A semiconductor in which a semiconductor layer forming a light emitting element structure is grown on a semiconductor substrate in which a plurality of second regions having lower crystallinity than the first region are regularly arranged in the first region made of crystals A light emitting device,
At least one second region is present on an end face or a corner of the semiconductor substrate. A semiconductor light emitting element. The semiconductor light-emitting element according to claim 11, wherein the plurality of second regions are arranged in an island shape.

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