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JP2004006919A - Nitride semiconductor device - Google Patents

Nitride semiconductor device Download PDF

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Publication number
JP2004006919A
JP2004006919A JP2003170766A JP2003170766A JP2004006919A JP 2004006919 A JP2004006919 A JP 2004006919A JP 2003170766 A JP2003170766 A JP 2003170766A JP 2003170766 A JP2003170766 A JP 2003170766A JP 2004006919 A JP2004006919 A JP 2004006919A
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nitride semiconductor
layer
substrate
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semiconductor layer
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JP4371714B2 (en
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Shuji Nakamura
中村 修二
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Nichia Chemical Industries Ltd
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Nichia Chemical Industries Ltd
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Abstract

【課題】上下より電極を取り出せる構造を有する窒化物半導体素子素子を提供する。
【課題の解決手段】絶縁性基板の上にn型層、活性層、p型層を順に有する窒化物半導体層が成長されたウェーハの窒化物半導体層面に導電性基板を接着する第一の工程と、導電性基板接着後、前記ウェーハの絶縁性基板の一部、又は全部を除去して窒化物半導体層を露出させる第二の工程とを備え、露出させた窒化物半導体層と、導電性基板とに対向する電極を設ける。前記n型層上には開口部を設けた電流狭窄層を有し、該開口部には負電極が形成されている。前記電流狭窄層はサファイア、又はSiO又はTiOからなる。
【選択図】図5
An object of the present invention is to provide a nitride semiconductor device having a structure from which electrodes can be taken out from above and below.
A first step of bonding a conductive substrate to a nitride semiconductor layer surface of a wafer on which a nitride semiconductor layer having an n-type layer, an active layer, and a p-type layer sequentially grown on an insulating substrate. And a second step of removing a part or all of the insulating substrate of the wafer and exposing the nitride semiconductor layer after bonding the conductive substrate, the exposed nitride semiconductor layer, An electrode facing the substrate is provided. A current confinement layer having an opening is provided on the n-type layer, and a negative electrode is formed in the opening. The current confinement layer is made of sapphire, SiO 2 or TiO 2 .
[Selection diagram] FIG.

Description

【0001】
【産業上の利用分野】
本発明は発光ダイオード、レーザダイオード等の発光デバイス、又はフォトダイオード等の受光デバイスに使用される窒化物半導体(InXAlYGa1−X−YN、0≦X、0≦Y、X+Y≦1)よりなる素子に関する。
【0002】
【従来の技術】
窒化物半導体はそのバンドギャップエネルギーが1.9eV〜6.0eVまであるので発光素子、受光素子等の各種半導体デバイス用として注目されており、最近この材料を用いた青色LED、青緑色LEDが実用化されたばかりである。
【0003】
一般に窒化物半導体素子はMBE、MOVPE等の気相成長法を用いて、基板上にn型、p型あるいはi型等に導電型を規定した窒化物半導体を積層成長させることによって得られる。基板には例えばサファイア、スピネル、ニオブ酸リチウム、ガリウム酸ネオジウム等の絶縁性基板の他、炭化ケイ素、シリコン、酸化亜鉛、ガリウム砒素等の導電性基板が使用できることが知られているが、窒化物半導体と完全に格子整合する基板は未だ開発されておらず、現在のところ、格子定数が10%以上も異なるサファイアの上に窒化物半導体層を強制的に成長させた青色、青緑色LED素子が実用化されている。
【0004】
図6は従来の青色LED素子の構造を示す模式的な断面図である。従来のLED素子は、基本的にサファイア基板61の上に窒化物半導体よりなるn型層62と活性層63とp型層64とが順に積層されたダブルへテロ構造を有している。前記のようにサファイアは絶縁性であり基板側から電極を取り出すことができないので、同一窒化物半導体層表面に正電極65と負電極66とが設けられた、いわゆるフリップチップ方式の素子とされている。
【0005】
【発明が解決しようとする課題】
しかしながら、サファイアを基板とする従来のフリップチップ方式の素子には数々の問題点がある。まず第一に、同一面側から両方の電極を取り出すためチップサイズが大きくなり多数のチップがウェーハから得られない。第二に、負電極と正電極とが水平方向に並んでいるため電流が水平方向に流れ、その結果電流密度が局部的に高くなりチップが発熱する。第三にサファイアという非常に硬く、劈開性のない基板を使用しているので、チップ化するのに高度な技術を必要とする。さらにLDを実現しようとする際には基板の劈開性を用いた窒化物半導体の劈開面を共振面とできないので共振面の形成が非常に困難である。
【0006】
以上のような問題を回避するため、上記のように炭化ケイ素、シリコン、酸化亜鉛、ガリウム砒素、ガリウムリン等の導電性基板の上に窒化物半導体を成長する試みも成されているが、未だ成功したという報告はされていない。
【0007】
従って本発明はこのような事情を鑑み成されたものであって、その目的とするところは、主として上下より電極を取り出せる構造を有する窒化物半導体素子の製造方法、および窒化物半導体素子を提供することにある。
【0008】
【課題を解決するための手段】
本発明の窒化物半導体素子の製造方法は、n型層、活性層、p型層を順に有する窒化物半導体素子において、前記n型層上には開口部を設けた電流狭窄層を有し、該開口部には負電極が形成されていることを特徴とする。前記電流狭窄層はサファイアであることを特徴とする。前記電流狭窄層はSiO又はTiOからなることを特徴とする。
本発明の窒化物半導体素子の製造方法は、絶縁性基板の上に窒化物半導体層が成長されたウェーハの窒化物半導体層面に導電性基板を接着する第一の工程と、導電性基板接着後、前記ウェーハの絶縁性基板の一部、又は全部を除去して窒化物半導体層を露出させる第二の工程とを備えることを特徴とする。また、本発明の窒化物半導体素子は導電性基板と窒化物半導体とが接着されてなることを特徴とする。
【0009】
本発明の方法において、絶縁性基板には前記のようにサファイア、スピネル、ニオブ酸リチウム、ガリウム酸ネオジウム等が用いられ、好ましくはサファイア、スピネルの上に成長された窒化物半導体が結晶性に優れている。一方、窒化物半導体に接着する導電性基板には、導電性を有する基板材料であればどのようなものでも良く、例えばSi、SiC、GaAs、GaP、InP、ZnSe、ZnS、ZnO等を用いることができる。但し、導電性基板は窒化物半導体が積層された絶縁性基板とほぼ同じ形状を有し、さらにほぼ同じ面積か、あるいはそれよりも大きな面積を有するウェーハ状の基板を選択することはいうまでもない。
【0010】
一方、窒化物半導体層が積層されたウェーハの絶縁性基板を除去するには、例えば研磨、エッチング等の技術を用いる。通常絶縁性基板の厚さは数百μmあり、窒化物半導体層は厚くても20μm以下であるので、研磨により基板を除去する際に研磨厚が制御しにくい場合は、最初研磨で大まかな部分を除去し、その後エッチングで細かい部分を除去して、電極を形成するのに必要とする窒化物半導体面を露出させても良い。また例えばレーザ素子のように絶縁物を電流狭窄層として窒化物半導体層表面に必要とする素子を作製する場合には、絶縁性基板全てを除去せずに、選択エッチングにより窒化物半導体層を露出させるのに必要な部分のみを除去することも可能である。
【0011】
さらに本発明の方法及び素子において、窒化物半導体層に接着する導電性基板は劈開性を有することを特徴とする。この劈開性を有する導電性基板には、例えばGaAs、GaP、InP、SiC等を好ましく用いることができる。
【0012】
次に本発明の方法及び素子は窒化物半導体層面と導電性基板とを電極、又は導電性材料を介して接着することを特徴とする。この方法は導電性基板に劈開性のある基板を使用しても同様に適用可能である。接着する方法には、導電性基板の接着面と、窒化物半導体層面とを鏡面として、それら鏡面同士を張り合わせた後、熱圧着するいわゆるウェーハ接着の手法を用いてもよいが、電極又は導電性材料を介することにより簡単に接着することができる。導電性材料は窒化物半導体と導電性基板を接着できる材料であればどのようなものでも良く、例えばIn、Au、ハンダ、銀ペースト等の材料を使用することができる。
【0013】
また前記接着手法において、電極は窒化物半導体層表面に形成されたオーミック電極及び/又は導電性基板表面に形成されたオーミック電極を含むことを特徴とする。なお、オーミック電極とは、一般に窒化物半導体表面に形成される膜厚の薄いオーミック電極と、その電極の上に付けられた膜厚の厚い接着用の金属、例えばAu、In、Al等の金属を含んで本明細書ではオーミック電極と定義する。窒化物半導体層表面に形成するオーミック電極材料としては、n型層が接着面であれば例えば特開平5−291621号公報に示されたAl、Cr、Ti、Inの内の少なくとも一種の材料、特に好ましくはTiをn型層と接する側とした電極、また特開平7−45867号公報に示されたTi−Alを含む材料を挙げることができる。また接着面がp型層であれば同じく特開平5−291621号公報に示されたAu、Pt、Ag、Niの内の少なくとも一種の材料、特に好ましくはNiをp型層と接する側とした電極を挙げることができる。
【0014】
窒化物半導体はp型層が得られにくく、p型層を得るため例えば特開平3−218625号公報に開示されるような電子線照射、また特開平5−183189号公報に開示されるような熱的アニーリング処理が成長後に行われ、最表面のp型層が低抵抗化される。このため窒化物半導体ウェーハは最上層がp型層になっていることが多い。そこで、この窒化物半導体ウェーハと導電性基板を接着する際には、p型層に形成されたオーミック電極を介してp型の導電性基板とを接着することが特に望ましい。
【0015】
一方、もう片方の接着面の導電性基板に形成するオーミック電極としては例えば導電性基板がn型GaAsであれば、Ag−Sn、In−Sn、Ni−Sn、Au−Sn、Au−Si、Au−Ge等を用いることができ、p型GaAsであれば、Au−Zn、Ag−Zn、Ag−In等を用いることができる。その他SiC、Si等についても公知のオーミック電極材料を用いることができるが前記のようにp型の導電性基板をその導電性基板のオーミック電極を介して接着することが特に望ましい。
【0016】
【作用】
本発明の方法及び素子では窒化物半導体層に導電性基板を接着している。つまり、窒化物半導体が絶縁性基板の上に成長されたウェーハでは、窒化物半導体より得られる各種素子はフリップチップ形式とならざるを得ないが、導電性基板をウェーハ最上層の窒化物半導体層に接着することにより、導電性基板が電極を形成する基板となる。その後、絶縁性基板を除去すると窒化物半導体層が露出するので、露出した窒化物半導体層面にもう一方の電極を形成することができ、従来のような電極が水平方向に並んだ素子ではなく、互いの電極が対向した素子を作製することができる。
【0017】
次に接着する導電性基板に劈開性のある材料を選択すると、劈開性のない絶縁性基板の上に成長された窒化物半導体でも、接着された導電性基板の劈開性を利用してチップ状に分割できる。このためチップサイズの小さい素子が得られやすくなり、さらに窒化物半導体の劈開面を光共振面とするレーザ素子が作製できるようになる。
【0018】
また窒化物半導体層面と導電性基板とは一般にウェーハ接着と呼ばれる技術で接着する方法もあるが、特に窒化物半導体層の電極、若しくは導電性基板の電極、又は導電性材料を介して接着すると導電性基板と窒化物半導体層との間の電気的特性も安定化するため好ましい。さらにこの導電性材料としてAu、Al、Ag等の窒化物半導体の発光波長を反射できる材料を選択すれば、発光素子を作製した際、これらの導電性材料が接着した導電性基板に来る光を反射して、窒化物半導体層の側に戻す作用があるので発光素子の発光効率が向上する。
【0019】
特に接着材料として、窒化物半導体層表面に形成されたオーミック電極及び/又は導電性基板表面に形成されたオーミック電極を含めば、例えば発光素子のような発光デバイスを作製すると、抵抗値が低くなりデバイスのVfを低下させる作用がある。
【0020】
【実施例】
以下、実施例で本発明を詳説する。図1乃至図3は本発明の方法の一工程を説明するウェーハ及び導電性基板の模式的な断面図であり、図4は実施例1により得られた窒化物半導体発光素子の構造を示す模式的な断面図であり、以下これらの図を元に実施例1を述べる。
【0021】
[実施例1]
サファイア基板1の表面に窒化物半導体層2が積層されたウェーハを用意する。なお窒化物半導体層2はサファイア基板1から順にドナー不純物がドープされたAlXGa1−XN(0≦X≦1)よりなるn型層21と、InYGa1−YN(0<Y<1)よりなる活性層22と、アクセプター不純物がドープされたAlXGa1−XN(0≦X≦1)よりなるp型層23とを少なくとも有するダブルへテロ構造を有している。なお最上層のp型層23は400℃以上のアニーリングにより低抵抗化されている。
【0022】
次に図1に示すように窒化物半導体層2の表面のほぼ全面にNiとAuを含むオーミック電極30を500オングストロームの膜厚で形成する。つまり窒化物半導体層2の最上層のp型層のほぼ全面にp型層と好ましいオーミックが得られる第一のオーミック電極30を形成する。さらにそのオーミック電極30の上にに接着性を良くするためにAu薄膜を0.1μm形成する。
【0023】
一方、導電性基板として、サファイア基板1とほぼ同じ大きさを有するp型GaAs基板50を用意し、このp型GaAs基板50の表面にAu−Znよりなる第二のオーミック電極40を500オングストロームの膜厚で形成する。さらにその第二のオーミック電極40の上に接着性を良くするためにAu薄膜を0.1μm形成する。
【0024】
次に、図2に示すように第一のオーミック電極30を有する窒化物半導体ウェーハと、第二のオーミック電極40を有するp型GaAs基板50とのオーミック電極同士を貼り合わせ、加熱により圧着する。但し、圧着時ウェーハのサファイア基板1とp型GaAs基板50とは平行となるようにする。平行でないと次のサファイア基板を除去する工程において、露出される窒化物半導体層の水平面が出ないからである。また第一のオーミック電極30と第二のオーミック電極40とを接着するためにAuを使用したが、この他電極30と40との間にインジウム、錫、ハンダ、銀ペースト等の導電性材料を介して接着することも可能である。なおp型GaAs基板50を接着する際に窒化物半導体層の劈開性と、基板50との劈開方向を合わせて接着してあることは言うまでもない。
【0025】
次にp型GaAs基板50を接着したウェーハを研磨器に設置し、サファイア基板1のラッピングを行い、サファイア基板を除去して、窒化物半導体層2のn型層21を露出させる。なおこの工程において、例えばサファイア基板1を数μm程度の厚さが残るようにラッピングした後、さらに残ったサファイア基板をエッチングにより除去することも可能である。サファイア基板1除去後のウェーハの構造を図3に示す。
【0026】
最後に露出したn型層21の表面をポリシングした後、n型層にオーミック用の電極としてTi−Alよりなる負電極25を形成し、一方p型GaAs基板50には同じくオーミック電極としてAu−Znよりなる正電極55を全面に形成する。
【0027】
以上のようにして正電極および負電極が形成されたウェーハを、p型GaAs基板の劈開性を利用して200μm角の発光チップに分離する。分離後の発光チップの構造を示す模式的な断面図を図4に示す。この発光チップは電極25と55間に通電することにより、活性層22が発光するLED素子の構造を示している。この発光素子は活性層22の発光が第一のオーミック電極30とp型層23との界面で反射され、p型GaAs基板50に吸収されることがないので、従来の発光素子に比べて発光出力が50%以上増大した。
【0028】
またこの例は絶縁性基板がサファイア、導電性基板がp型GaAsについて説明したが、絶縁性基板にはサファイアの他に例えば前記したスピネル、ネオジウムガレートのような絶縁性基板を用いても良く、また導電性基板にはSi、ZnOのような基板を用いても良い。
【0029】
[実施例2]
実施例1においてサファイア基板1をラッピングする際、サファイア基板1が5μmの膜厚で残るようにラッピングする。次に残ったサファイア基板1の表面に電流狭窄層が形成できるような形状のマスクを形成し、エッチング装置でマスク開口部のサファイア基板1をエッチングにより除去し、n型層21の一部を露出させる。露出後同様にしてn型層に負電極25とp型GaAs基板50に正電極55を形成する。
【0030】
次にp型GaAs基板50の劈開性を用いて、チップ状に分離してレーザ素子とする。図5はそのレーザ素子の構造を示す模式的な断面図であり、故意に残したサファイア基板1がレーザ素子の電流狭窄層として作用している。この例は電流狭窄層としてサファイア基板を残す例を示したが、この他にレーザ素子の電流狭窄層を形成するには実施例1のようにサファイア基板1を全部除去してから、例えばSiO2、TiO2のような絶縁膜を露出した窒化物半導体層の上に形成しても良い。
【0031】
【発明の効果】
以上説明したように、本発明の方法によると導電性基板を有する窒化物半導体素子が実現できるので、チップサイズの小さい素子を提供することができる。また素子に形成した電極同士が対向しているので、電流が窒化物半導体層に均一に流れ発熱量が小さくなり、レーザ素子を実現することも可能となる。さらに容易に窒化物半導体の劈開が可能となり、その劈開面を共振器とできるためレーザ素子の作製が容易となる。さらにまた発光デバイスを実現すると、窒化物半導体層と導電性基板とを接着した電極により、窒化物半導体層の発光が電極表面で反射されるので発光出力も増大させることができる。
【0032】
従来の窒化物半導体LEDは図6に示すようにp型層64の表面のほぼ全面に光を透過する正電極65が形成されていた。これはp型層の電流が広がりにくいことによる。この正電極65により発光する光の50%以上が吸収されていた。しかし本発明の素子によると図4および図5に示すように低抵抗なn型層21が最上層となるので、従来のように全面電極を設ける必要がなくなり、小さな部分電極でよい。従って窒化物半導体層側からの光の取り出し効率が飛躍的に向上し発光出力が向上する。このように本発明は窒化物半導体を用いたデバイスを実現する上で産業上の利用価値は非常に大きい。
【図面の簡単な説明】
【図1】本発明の方法の一工程を説明する窒化物半導体ウェーハの模式断面図。
【図2】本発明の方法の一工程を説明する窒化物半導体ウェーハの模式断面図。
【図3】本発明の方法の一工程を説明する窒化物半導体ウェーハの模式断面図。
【図4】本発明の一実施例に係る窒化物半導体素子の構造を示す模式断面図。
【図5】本発明の他の実施例に係る窒化物半導体素子の構造を示す模式断面図。
【図6】従来の窒化物半導体発光素子の構造を示す模式断面図。
【符号の説明】
1・・・・サファイア基板
2・・・・窒化物半導体層
21・・・・n型層
22・・・・活性層
23・・・・p型層
30・・・・第一のオーミック電極
40・・・・第二のオーミック電極
50・・・・p型GaAs基板
25・・・・負電極
55・・・・正電極
[0001]
[Industrial applications]
The present invention relates to an element made of a nitride semiconductor (InXAlYGa1-X-YN, 0 ≦ X, 0 ≦ Y, X + Y ≦ 1) used for a light-emitting device such as a light-emitting diode or a laser diode, or a light-receiving device such as a photodiode. .
[0002]
[Prior art]
Nitride semiconductors have attracted attention for various semiconductor devices such as light-emitting elements and light-receiving elements because of their band gap energies from 1.9 eV to 6.0 eV. Recently, blue LEDs and blue-green LEDs using this material have been put to practical use. It has just been transformed.
[0003]
In general, a nitride semiconductor device is obtained by growing a nitride semiconductor having a conductivity type defined as n-type, p-type, or i-type on a substrate by using a vapor phase growth method such as MBE or MOVPE. It is known that, in addition to an insulating substrate such as sapphire, spinel, lithium niobate, and neodymium gallate, a conductive substrate such as silicon carbide, silicon, zinc oxide, and gallium arsenide can be used as the substrate. A substrate that perfectly lattice-matches with a semiconductor has not yet been developed, and at present, blue and blue-green LED devices in which a nitride semiconductor layer is forcibly grown on sapphire having a lattice constant different by 10% or more have been developed. Has been put to practical use.
[0004]
FIG. 6 is a schematic sectional view showing the structure of a conventional blue LED element. The conventional LED element basically has a double hetero structure in which an n-type layer 62 made of a nitride semiconductor, an active layer 63 and a p-type layer 64 are sequentially stacked on a sapphire substrate 61. As described above, sapphire is insulative and an electrode cannot be taken out from the substrate side, so that it is a so-called flip-chip type device in which a positive electrode 65 and a negative electrode 66 are provided on the same nitride semiconductor layer surface. I have.
[0005]
[Problems to be solved by the invention]
However, the conventional flip-chip type device using sapphire as a substrate has various problems. First, since both electrodes are taken out from the same surface side, the chip size becomes large, and a large number of chips cannot be obtained from the wafer. Second, the current flows in the horizontal direction because the negative electrode and the positive electrode are arranged in the horizontal direction. As a result, the current density is locally increased and the chip generates heat. Third, since a very hard and non-cleavable substrate called sapphire is used, a high level of technology is required to make a chip. Further, when realizing an LD, it is very difficult to form a resonance surface because the cleavage surface of the nitride semiconductor using the cleavage property of the substrate cannot be used as the resonance surface.
[0006]
In order to avoid the above problems, attempts have been made to grow a nitride semiconductor on a conductive substrate such as silicon carbide, silicon, zinc oxide, gallium arsenide, and gallium phosphide, as described above. No success has been reported.
[0007]
Accordingly, the present invention has been made in view of such circumstances, and a purpose thereof is to provide a method of manufacturing a nitride semiconductor device having a structure in which electrodes can be mainly taken out from above and below, and a nitride semiconductor device. It is in.
[0008]
[Means for Solving the Problems]
The method for manufacturing a nitride semiconductor device according to the present invention is directed to a nitride semiconductor device having an n-type layer, an active layer, and a p-type layer in that the n-type layer has a current confinement layer provided with an opening on the n-type layer; A negative electrode is formed in the opening. The current confinement layer is sapphire. The current confinement layer is made of SiO 2 or TiO 2 .
The method of manufacturing a nitride semiconductor device according to the present invention includes a first step of bonding a conductive substrate to a nitride semiconductor layer surface of a wafer on which a nitride semiconductor layer is grown on an insulating substrate; And a second step of removing part or all of the insulating substrate of the wafer to expose the nitride semiconductor layer. Further, the nitride semiconductor device of the present invention is characterized in that a conductive substrate and a nitride semiconductor are bonded.
[0009]
In the method of the present invention, sapphire, spinel, lithium niobate, neodymium gallate, or the like is used for the insulating substrate as described above. Preferably, sapphire, a nitride semiconductor grown on spinel has excellent crystallinity. ing. On the other hand, as the conductive substrate to be bonded to the nitride semiconductor, any material may be used as long as it is a conductive substrate material. For example, Si, SiC, GaAs, GaP, InP, ZnSe, ZnS, ZnO, or the like may be used. Can be. However, it is needless to say that the conductive substrate has substantially the same shape as the insulating substrate on which the nitride semiconductor is laminated, and furthermore, a wafer-like substrate having substantially the same area or an area larger than that. Absent.
[0010]
On the other hand, in order to remove the insulating substrate of the wafer on which the nitride semiconductor layers are stacked, for example, techniques such as polishing and etching are used. Normally, the thickness of the insulating substrate is several hundred μm, and the thickness of the nitride semiconductor layer is at most 20 μm or less. May be removed, and then fine portions may be removed by etching to expose a nitride semiconductor surface required for forming an electrode. In the case where an element requiring an insulator as a current confinement layer on the surface of the nitride semiconductor layer such as a laser element is manufactured, the nitride semiconductor layer is exposed by selective etching without removing the entire insulating substrate. It is also possible to remove only the parts necessary for the removal.
[0011]
Further, in the method and the device according to the present invention, the conductive substrate adhered to the nitride semiconductor layer has a cleavage property. For example, GaAs, GaP, InP, SiC, or the like can be preferably used for the conductive substrate having the cleavage.
[0012]
Next, the method and the device according to the present invention are characterized in that the surface of the nitride semiconductor layer and the conductive substrate are bonded to each other via an electrode or a conductive material. This method can be similarly applied to the case where a cleavage substrate is used as the conductive substrate. The bonding method may be a so-called wafer bonding method in which the bonding surface of the conductive substrate and the nitride semiconductor layer surface are mirror surfaces, the mirror surfaces are bonded to each other, and then thermocompression bonding is performed. Bonding can be easily achieved by using a material. As the conductive material, any material can be used as long as it can bond the nitride semiconductor and the conductive substrate. For example, a material such as In, Au, solder, and silver paste can be used.
[0013]
In the bonding method, the electrodes include an ohmic electrode formed on the surface of the nitride semiconductor layer and / or an ohmic electrode formed on the surface of the conductive substrate. Note that an ohmic electrode generally means a thin ohmic electrode formed on the surface of a nitride semiconductor and a thick bonding metal provided on the electrode, for example, a metal such as Au, In, or Al. In this specification, it is defined as an ohmic electrode. As the ohmic electrode material formed on the surface of the nitride semiconductor layer, if the n-type layer is an adhesive surface, for example, at least one of Al, Cr, Ti, and In shown in JP-A-5-291621, Particularly preferably, an electrode having Ti in contact with the n-type layer, and a material containing Ti-Al disclosed in JP-A-7-45867 can be exemplified. If the bonding surface is a p-type layer, at least one of Au, Pt, Ag, and Ni, particularly preferably Ni, described in Japanese Patent Application Laid-Open No. 5-291621, particularly preferably Ni, is used as the side in contact with the p-type layer. Electrodes can be mentioned.
[0014]
In the nitride semiconductor, a p-type layer is difficult to obtain, and to obtain a p-type layer, for example, electron beam irradiation as disclosed in JP-A-3-218625 or JP-A-5-183189 A thermal annealing process is performed after the growth, and the outermost p-type layer is reduced in resistance. For this reason, the nitride semiconductor wafer often has a p-type layer as the uppermost layer. Therefore, when bonding the nitride semiconductor wafer to the conductive substrate, it is particularly desirable to bond the nitride semiconductor wafer to the p-type conductive substrate via the ohmic electrode formed on the p-type layer.
[0015]
On the other hand, as the ohmic electrode formed on the conductive substrate on the other bonding surface, for example, if the conductive substrate is n-type GaAs, Ag-Sn, In-Sn, Ni-Sn, Au-Sn, Au-Si, Au-Ge or the like can be used, and for p-type GaAs, Au-Zn, Ag-Zn, Ag-In, or the like can be used. In addition, known ohmic electrode materials can be used for SiC, Si, and the like, but it is particularly desirable to bond a p-type conductive substrate through the ohmic electrode of the conductive substrate as described above.
[0016]
[Action]
In the method and device of the present invention, a conductive substrate is bonded to the nitride semiconductor layer. In other words, in the case of a wafer on which a nitride semiconductor is grown on an insulating substrate, various elements obtained from the nitride semiconductor must be of a flip-chip type. The conductive substrate becomes a substrate on which electrodes are formed by bonding to the substrate. After that, when the insulating substrate is removed, the nitride semiconductor layer is exposed, so that another electrode can be formed on the exposed nitride semiconductor layer surface, and is not a conventional element in which electrodes are arranged in a horizontal direction, An element in which the electrodes face each other can be manufactured.
[0017]
Next, when a material having a cleavage property is selected for the conductive substrate to be bonded, even if the nitride semiconductor is grown on an insulating substrate having no cleavage property, a chip-like material is formed by utilizing the cleavage property of the bonded conductive substrate. Can be divided into Therefore, an element having a small chip size is easily obtained, and a laser element having a cleavage plane of a nitride semiconductor as an optical resonance surface can be manufactured.
[0018]
There is also a method of bonding the surface of the nitride semiconductor layer and the conductive substrate with a technique generally called wafer bonding. In particular, when the bonding is performed via an electrode of the nitride semiconductor layer or an electrode of the conductive substrate, or a conductive material, the conductive layer is electrically conductive. It is preferable because the electrical characteristics between the conductive substrate and the nitride semiconductor layer are also stabilized. Further, if a material capable of reflecting the emission wavelength of the nitride semiconductor such as Au, Al, or Ag is selected as the conductive material, when a light emitting device is manufactured, light coming to the conductive substrate to which the conductive material is adhered is reduced. Since the light is reflected and returned to the nitride semiconductor layer, the light emitting efficiency of the light emitting element is improved.
[0019]
In particular, when an ohmic electrode formed on the surface of the nitride semiconductor layer and / or an ohmic electrode formed on the surface of the conductive substrate is included as an adhesive material, for example, when a light-emitting device such as a light-emitting element is manufactured, the resistance value becomes low. This has the effect of lowering the Vf of the device.
[0020]
【Example】
Hereinafter, the present invention will be described in detail with reference to examples. 1 to 3 are schematic cross-sectional views of a wafer and a conductive substrate for explaining one step of the method of the present invention, and FIG. 4 is a schematic view showing the structure of a nitride semiconductor light-emitting device obtained in Example 1. Embodiment 1 is described below with reference to these drawings.
[0021]
[Example 1]
A wafer having a nitride semiconductor layer 2 laminated on the surface of a sapphire substrate 1 is prepared. The nitride semiconductor layer 2 includes an n-type layer 21 made of AlXGa1-XN (0 ≦ X ≦ 1) doped with a donor impurity and an active layer made of InYGa1-YN (0 <Y <1) in order from the sapphire substrate 1. 22 and a p-type layer 23 made of AlXGa1-XN (0 ≦ X ≦ 1) doped with an acceptor impurity. The resistance of the uppermost p-type layer 23 is reduced by annealing at 400 ° C. or higher.
[0022]
Next, as shown in FIG. 1, an ohmic electrode 30 containing Ni and Au is formed on almost the entire surface of the nitride semiconductor layer 2 to a thickness of 500 Å. That is, the first ohmic electrode 30 is formed on almost the entire surface of the uppermost p-type layer of the nitride semiconductor layer 2 so as to obtain a preferable ohmic with the p-type layer. Further, an Au thin film having a thickness of 0.1 μm is formed on the ohmic electrode 30 in order to improve the adhesiveness.
[0023]
On the other hand, a p-type GaAs substrate 50 having substantially the same size as the sapphire substrate 1 is prepared as a conductive substrate, and a second ohmic electrode 40 made of Au-Zn is formed on the surface of the p-type GaAs substrate 50 by 500 angstroms. It is formed with a film thickness. Further, on the second ohmic electrode 40, an Au thin film is formed in a thickness of 0.1 μm to improve the adhesiveness.
[0024]
Next, as shown in FIG. 2, the ohmic electrodes of the nitride semiconductor wafer having the first ohmic electrode 30 and the p-type GaAs substrate 50 having the second ohmic electrode 40 are bonded to each other and pressed by heating. However, the sapphire substrate 1 and the p-type GaAs substrate 50 of the wafer at the time of pressure bonding are made parallel. If they are not parallel, a horizontal plane of the exposed nitride semiconductor layer will not be formed in the next step of removing the sapphire substrate. Although Au was used to bond the first ohmic electrode 30 and the second ohmic electrode 40, a conductive material such as indium, tin, solder, or silver paste was used between the electrodes 30 and 40. It is also possible to glue through. Needless to say, when the p-type GaAs substrate 50 is bonded, the cleavage property of the nitride semiconductor layer and the cleavage direction with the substrate 50 are matched.
[0025]
Next, the wafer to which the p-type GaAs substrate 50 has been bonded is placed on a polishing machine, the sapphire substrate 1 is wrapped, the sapphire substrate is removed, and the n-type layer 21 of the nitride semiconductor layer 2 is exposed. In this step, for example, after sapphire substrate 1 is wrapped so as to have a thickness of about several μm, it is also possible to remove the remaining sapphire substrate by etching. FIG. 3 shows the structure of the wafer after removing the sapphire substrate 1.
[0026]
After polishing the surface of the finally exposed n-type layer 21, a negative electrode 25 made of Ti-Al is formed on the n-type layer as an ohmic electrode, while the p-type GaAs substrate 50 is also made of Au- as an ohmic electrode. A positive electrode 55 made of Zn is formed on the entire surface.
[0027]
The wafer on which the positive electrode and the negative electrode are formed as described above is separated into 200 μm square light emitting chips by utilizing the cleavage of the p-type GaAs substrate. FIG. 4 is a schematic cross-sectional view showing the structure of the light emitting chip after separation. This light emitting chip shows the structure of an LED element in which the active layer 22 emits light when electricity is passed between the electrodes 25 and 55. In this light emitting device, the light emitted from the active layer 22 is reflected at the interface between the first ohmic electrode 30 and the p-type layer 23 and is not absorbed by the p-type GaAs substrate 50. The output increased by more than 50%.
[0028]
In this example, the insulating substrate is sapphire, and the conductive substrate is p-type GaAs.However, in addition to sapphire, for example, the above-described spinel, an insulating substrate such as neodymium gallate may be used. Further, a substrate such as Si or ZnO may be used as the conductive substrate.
[0029]
[Example 2]
When lapping the sapphire substrate 1 in the first embodiment, lapping is performed so that the sapphire substrate 1 remains with a thickness of 5 μm. Next, a mask having a shape capable of forming a current confinement layer is formed on the surface of the remaining sapphire substrate 1, and the sapphire substrate 1 in the mask opening is removed by etching with an etching apparatus, thereby exposing a part of the n-type layer 21. Let it. After exposure, a negative electrode 25 is formed on the n-type layer and a positive electrode 55 is formed on the p-type GaAs substrate 50 in the same manner.
[0030]
Next, using the cleavage properties of the p-type GaAs substrate 50, it is separated into chips to form a laser device. FIG. 5 is a schematic cross-sectional view showing the structure of the laser element, and the sapphire substrate 1 left intentionally acts as a current confinement layer of the laser element. This example shows an example in which a sapphire substrate is left as a current confinement layer. In addition to this, in order to form a current confinement layer of a laser device, the sapphire substrate 1 is entirely removed as in Example 1, and then, for example, SiO 2, An insulating film such as TiO2 may be formed on the exposed nitride semiconductor layer.
[0031]
【The invention's effect】
As described above, according to the method of the present invention, a nitride semiconductor device having a conductive substrate can be realized, so that a device having a small chip size can be provided. In addition, since the electrodes formed on the device are opposed to each other, the current flows uniformly in the nitride semiconductor layer and the calorific value is reduced, so that a laser device can be realized. Further, the nitride semiconductor can be easily cleaved, and the cleaved surface can be used as a resonator, thereby facilitating the manufacture of a laser device. Furthermore, when a light emitting device is realized, the light emission of the nitride semiconductor layer is reflected on the electrode surface by the electrode in which the nitride semiconductor layer and the conductive substrate are bonded, so that the light emission output can be increased.
[0032]
In a conventional nitride semiconductor LED, as shown in FIG. 6, a positive electrode 65 that transmits light is formed on almost the entire surface of the p-type layer 64. This is because the current in the p-type layer is difficult to spread. 50% or more of the light emitted by the positive electrode 65 was absorbed. However, according to the device of the present invention, the low-resistance n-type layer 21 is the uppermost layer as shown in FIGS. 4 and 5, so that there is no need to provide a full-surface electrode as in the prior art, and a small partial electrode is sufficient. Therefore, the light extraction efficiency from the nitride semiconductor layer side is dramatically improved, and the light emission output is improved. As described above, the present invention has an extremely large industrial value in realizing a device using a nitride semiconductor.
[Brief description of the drawings]
FIG. 1 is a schematic sectional view of a nitride semiconductor wafer for explaining one step of the method of the present invention.
FIG. 2 is a schematic sectional view of a nitride semiconductor wafer for explaining one step of the method of the present invention.
FIG. 3 is a schematic cross-sectional view of a nitride semiconductor wafer for explaining one step of the method of the present invention.
FIG. 4 is a schematic sectional view showing the structure of a nitride semiconductor device according to one embodiment of the present invention.
FIG. 5 is a schematic sectional view showing the structure of a nitride semiconductor device according to another embodiment of the present invention.
FIG. 6 is a schematic sectional view showing the structure of a conventional nitride semiconductor light emitting device.
[Explanation of symbols]
1 sapphire substrate 2 nitride semiconductor layer 21 n-type layer 22 active layer 23 p-type layer 30 first ohmic electrode 40 ... Second ohmic electrode 50... P-type GaAs substrate 25... Negative electrode 55.

Claims (3)

n型層、活性層、p型層を順に有する窒化物半導体素子において、前記n型層上には開口部を設けた電流狭窄層を有し、該開口部には負電極が形成されていることを特徴とする窒化物半導体素子。In a nitride semiconductor device having an n-type layer, an active layer, and a p-type layer in order, a current confinement layer having an opening is provided on the n-type layer, and a negative electrode is formed in the opening. A nitride semiconductor device characterized by the above-mentioned. 前記電流狭窄層はサファイアであることを特徴とする請求項1に記載の窒化物半導体素子。The nitride semiconductor device according to claim 1, wherein the current confinement layer is sapphire. 前記電流狭窄層はSiO又はTiOからなることを特徴とする請求項1に記載の窒化物半導体素子。The nitride semiconductor device according to claim 1 wherein the current confinement layer, characterized in that it consists of SiO 2 or TiO 2.
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