JP2004146014A - Data encoding / decoding method and apparatus - Google Patents

Abstract

A data structure for improving reliability in a recording / reproducing system using a large-capacity recording medium and a recording / reproducing system for the data structure are provided.
Kind Code: A1 A predetermined number of data is subjected to a first error correction coding for data, another data including position information is subjected to a second error correction coding, and the data is coded by a first coding and a second coding. In the error correction coding method for forming an ECC block with a plurality of coded data, a third error correction coding is performed on the data with a data sequence different from the first error correction coding. At the time of reproduction, a predetermined number of data is used as an ECC block, the predetermined number of data is decoded for the first error correction encoding, and the decoding is performed for the second error correction encoding of another data including position information. In the decoding method of the error correction code, the data of the ECC block is decoded by a third error correction encoding different from the first error correction encoding.
[Selection diagram] Fig. 1

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a system for realizing a system for reliably recording and reproducing information such as stored data, audio, and video in a large data storage capacity.
[0002]
[Prior art]
Recording media using optical disks such as CDs and DVDs have become widespread, and have begun to penetrate homes as AV devices replacing VTRs. Also, with the start of high-quality broadcasting such as digital high-definition broadcasting, demands for recording media having a larger capacity and recording / reproducing apparatuses for the recording media are increasing.
[0003]
In response, several companies have proposed more than 20 GB (gigabytes) of optical disk media standards. An optical disk system using a blue laser includes the following (for example, see Non-Patent Document 1).
[0004]
CDs were initially developed for music, and because of their large storage capacity, became widely used not only for music data but also for data distribution for use on PCs. In the music data, even if some error data occurs in the reproduction data, an error correction code enough to reproduce the sound without any trouble is added by interpolating the data before and after the error data. On the other hand, when used as a medium for PC data, the error correction code for music alone lacks the correction capability, and an additional ECC with a higher correction capability is added (for example, see Non-Patent Document 2). ). As described above, when used for a PC, it is necessary to increase reliability more than for a video or music.
[0005]
[Non-patent document 1]
"Optical Disc System for Digital Video Recording" (Jpn. J. Appl. Phys. Vol. 39 (2000) Pt. 1, No. 2B FIG. 2).
[Non-patent document 2]
Kenji Hayashi, "CD-From Audio to Personal Computers", Corona Publishing, July 1990, p94-100
[0006]
[Problems to be solved by the invention]
However, Non-Patent Document 1 mentioned above shows a data configuration for video and music data, but does not show a configuration for PC data.
[0007]
The present invention has been made in view of the above points, and an object of the present invention is to provide a data configuration for improving reliability in a recording / reproducing system using a large-capacity storage medium, and a recording / reproducing system for the same. It is in.
[0008]
[Means for Solving the Problems]
In order to solve the above-mentioned problem, in order to improve the reliability of the reproduced data, when error correction coding of the original data is performed, data compatibility should be ensured as much as possible, and further error correction codes should be used. The addition can improve the correction ability. For this purpose, in the present invention, a first encoding for performing error correction encoding on a predetermined number of data is performed on data, and a second encoding for performing error correction encoding on another data including position information is performed. In an error correction encoding method for configuring an ECC block by combining a plurality of encoded data encoded by the first encoding and the second encoding,
The data is subjected to a third encoding for performing an error correction encoding with a data sequence different from the first error correction encoding.
[0009]
Also, at the time of reproduction, a predetermined number of data is converted into an ECC block with the predetermined number of data, and the predetermined number of data is decoded in the first encoding for error correction coding, and another data including position information is decoded. In a decoding method of an error correction code for decoding the second encoding for error correction encoding,
The data of the ECC block is decoded with respect to a third coding in which error correction coding is performed with a data sequence different from the first error correction coding.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
Normally, in a recording / reproducing system, a reproduced signal contains error data. Therefore, in the recording / reproducing system, an error correction code is added to the recorded data by performing error correction coding on the original data, and even if some error occurs in the data, the reproduced data is corrected. Thus, the original data can be safely reproduced. Here, the (n, k) code indicates that an nk-byte redundant error correction code is added to the k-byte original data and is encoded into a k-byte code word. A Reed-Solomon code is represented by RS (n, k, nk + 1), where nk + 1 indicates the distance between the codes.
[0011]
The error data includes a random error of 1 bit to several bits generated by the influence of noise on the reproduction signal, and a continuous error generated by a scratch or dust on the recording medium. The data containing the error is demodulated in byte units (here, 8 bits) in accordance with the modulation scheme, resulting in a byte error, which is corrected by error correction. In the middle of the recorded data, a synchronization signal indicating the start point of data demodulation is included at predetermined intervals, and if this cannot be detected correctly, a continuous error occurs until the next synchronization signal can be detected. There is. Further, even if the unit of demodulation of the reproduction data is shifted due to a continuous error due to a scratch or the like, the subsequent data is not correctly demodulated, resulting in a continuous error.
[0012]
In the present embodiment, an optical disk recording / reproducing system will be described as an example, but there is no particular limitation on the configuration of an error correction code in a magnetic recording / reproducing system or a communication system. Hereinafter, the present invention will be described with reference to the drawings.
[0013]
First, FIG. 2 shows the configuration of an ECC block in the next-generation optical disk system described in Non-Patent Document 1. In this system, the arrangement of data in the horizontal direction is the direction of the recording data. This block is composed of 496 bytes in height, 155 bytes in width, and a synchronization signal. As a unit, 2052 bytes obtained by adding a 4-byte error check code to 2048 bytes of user data are collected into 32 units. The error correction code and the sub-code are added to the data of 64 Kbytes.
[0014]
The vertical 496 bytes indicated by the diagonally right-upward diagonal line include two RS (248, 216, 33) lines, and these two columns include two consecutive 248 bytes or data of two lines. The data may be rearranged to have a length of 496 bytes, or either method may be used. In any of the methods, the number of errors that can be corrected in one sequence is up to 16, and error data can be detected and corrected up to 32 bytes out of 496 bytes. A series of 496 bytes is arranged in 38 rows, and is composed of four sets. A 496-byte subcode is inserted between the four sets. This part is referred to as first error correction, and is referred to as LDC (Long Distance Code). FIG. 3 shows the configuration of encoded data in a state where encoding is performed on the 2052 bytes × 16 data.
[0015]
In FIG. 2, the vertical second error correction indicated by the lower right diagonal line is a subcode: BIS (Burst Indicator Subcode) 496 bytes, and includes eight RS (62, 30, 33) sequences. In this sequence, the number of errors that can be corrected is up to 16, and error data can be detected and corrected up to 128 bytes out of 496 bytes. The subcode contains address information and control information.
[0016]
Here, if a burst error has occurred, the LDC error can be erased and corrected using the error position detected in the subcode. At this time, up to 32 errors out of 248 bytes can be corrected. Generally, such a code is called a cross code.
[0017]
FIG. 4 shows the correspondence of the error position of the LDC to the error position detection in the subcode. The grids 41 and 42 shown in the figure are error positions detected in the subcode. These two error positions are on the same line when viewed from the direction of the recording data, and there is a high possibility that a burst error has occurred here. Therefore, there is a high possibility that an error has occurred in the LDC between the error positions 41 and 42, that is, also in the 43 indicated by the vertical line. In LDC error correction, if there are 17 or more errors in one sequence, erasure correction is required. In that case, erasure correction is performed on the error position estimated from the subcode error.
[0018]
In the figure, as shown by the lattice 44, if there is only one subcode error, it is unknown whether a burst error has occurred. The data 45 continuous before and after that may be erroneous, but it is difficult to estimate the error position because the start and end points of the burst error cannot be specified. Therefore, in such a case, correction is performed with the maximum value of the number of errors to be subjected to erasure correction set to 31, and it is confirmed whether an error remains after erasure correction. Such a method can prevent erroneous correction.
[0019]
Here, the method of detecting a burst error from a subcode error and estimating an error position of the LDC during the burst error has been described. However, the error can be detected by confirming the continuity of the synchronization signal sync. Therefore, it can be used for detecting a burst error like the subcode.
[0020]
FIG. 5 shows a configuration of an apparatus centering on the encoding of the recording system for performing the encoding shown in FIG. Blocks such as an optical pickup and a servo control necessary for recording are omitted. Reference numeral 51 denotes a signal input, which is compressed data such as video and audio, uncompressed data, or data used by a PC or the like. An I / F such as ATAPI or USB may be used for data input / output, but this is omitted here. The EDC adder 52 adds an error detection code (Error Detection Code) to the data in units of 2048 bytes, forms a 2052 byte data sector, and stores it in the memory 58. At 53, recording and reproduction are performed by collecting 32 sectors of data sectors of 2052 bytes into 64 bytes and making 64 kbytes as one unit on the memory 58. The LDC encoder 54 as the first error correction encoding circuit performs RS (248, 216, 33), and the BIS encoder 55 as the second error correction encoding circuit performs address information and control information. Is subjected to RS (62, 30, 33) encoding. After LDC and BIS coding, interleaving is performed, but is omitted here. These encodings are exchanged with the memory 58 to form an ECC block of the recording data. The demodulator 56 adds a synchronization signal at a predetermined interval to the head of the recording data, modulates the data, and records the data on the optical disk 57. The system control 59 controls these overall controls. Reference numeral 60 denotes an example in which the recording signal processing is integrated into an integrated circuit. The EDC addition unit, the encoding unit, and the modulation unit indicate access to the memory 58, but the memory 58 may be built in.
[0021]
FIG. 6 shows the configuration of an apparatus focusing on decoding in the recording system shown in FIG. The data read from the optical disk 57 is subjected to detection of a synchronization signal by the demodulator 61, and the data is reproduced in units of 64 kbyte ECC blocks and stored in the memory 58. Here, BIS error correction is performed by a BIS decoder 62 that is a second error decoding circuit, and LDC correction is performed by an LDC error corrector 64 that is a first error decoding circuit. In the LDC correction, if the number of chrominances in one series becomes 17 or more due to a burst error, the error position and number of BIS are confirmed, and if LDC erasure correction is possible, erasure correction is performed. The signal subjected to the error correction is output from the data output 65 as an output signal 66. The system as a whole controls a series of operations of the reproduction process by the system control 69. Reference numeral 70 denotes an example in which the reproduction signal processing is integrated into an integrated circuit. The demodulation unit, the error correction unit, and the output unit each indicate access to the memory 68, but the memory 68 may be built in.
[0022]
Next, FIG. 1 shows an example of a configuration of recording data to be recorded on the recording medium of the present invention. A right-upward diagonal line 10 indicates a new third code sequence, and indicates a data configuration in which a third error correction code is arranged in a portion 11 indicated by a horizontal line. When RS (152, 144, 9) encoding is performed using the Reed-Solomon code, 4-byte data can be corrected using only this sequence. This configuration is a so-called product code configuration. In the product code, the correction capability can be improved by performing repeated correction. However, performing the third encoding increases the redundancy by about 5%.
[0023]
The parity of the third error correction code is arranged so as to be 2 bytes at a time in 38 bytes and at an even position with respect to 38 bytes. For example, FIG. 1 shows an example in which the 37th and 38th bytes of 38 bytes are arranged, but the arrangement method is not limited to this. In the arrangement example of FIG. 1, the parities are 37th, 38th, 75th, 76th, 113th, 114th, 151st, and 152nd. This position is set as a position where the parity is arranged in advance, and the 144-byte data is encoded, and the generated parity is arranged at a predetermined position. With such a configuration of the parity arrangement, at the time of reproduction, the reproduced data can be sequentially input to the syndrome calculator to calculate the syndrome.
[0024]
FIG. 7 shows a configuration of a recording and encoding system corresponding to the data configuration shown in FIG. In this embodiment, to add the third error correction code, 4 bytes of the error check code EDC are added in units of 1940 bytes. Here, on the memory, no data is written in advance at the location where the third error correction code is arranged. After compiling the data in 64 kbytes, LDC encoding is performed and BIS encoding is performed. Thereafter, the data is further encoded by a third error correction encoder 71, modulated, and recorded on an optical disk. Here, the third encoding may be performed before the LDC encoding or before the BIS encoding. However, in the illustrated order, the small memory 72 of about 152 bytes is provided to access the memory 58. It is possible to perform the third encoding without increasing, and to directly modulate and output. The system control 59 switches whether or not to add the third error correction code by a switch SW according to the type of data and the setting from the user. Then, a flag indicating that the data is data to which the third error correction code is added is recorded in a predetermined area. The predetermined area may be, for example, an area of BIS control information, or may be represented by specifying a type of a synchronization signal, or may be an area in which management information of the entire disc is recorded. It may be recorded in. FIG. 16 shows a flow of the error correction encoding process according to the configuration of FIG. The order of LDC and BIS and the order of interleaving are examples, and are not particularly limited.
[0025]
FIG. 8 shows a configuration of a reproduction / decoding system corresponding to the data configuration shown in FIG. First, a flag indicating that the data is data to which a third error correction code is added, which is recorded in a predetermined area, is read, and the system control is performed in accordance with the flag. If the data is the data to which the third error correction code is added, the SW is switched and the third error corrector 81 performs error correction. Here, since the direction of the reproduced data matches the data direction of the third encoded sequence, the syndrome can be calculated before recording the data in the memory while reading the data from the optical disk. Thus, the number of accesses to the memory 58 can be reduced. In addition, as in the example shown in FIG. 7, by providing the small memory 82 in the third error corrector, the data after the third error correction can be written to the memory 58.
[0026]
FIG. 9 shows the correspondence between the address information of the optical disc and the position on the disc, taking a DVD-R as an example. Normally, in a recordable optical disk, a lead-in / lead-out area is provided inside and outside a user data area, and information related to disk management is recorded near the innermost circumference. Here, information indicating whether the data is data to which a third error correction code has been added may be recorded together with information on the file written on the disk. By encoding the data as shown in FIG. 1, the configuration of the ECC block is the same as the size of the ECC block shown in FIG. 2, and the correspondence with the address information on the disk can often be made equal. FIG. 10 shows a user data area, a lead-in / lead-out area, and a management information area on the optical disc. The configuration of the data area can hold the same configuration as the conventional one.
[0027]
FIG. 11 shows an example in which the parity arrangement of the third error correction code shown in FIG. Here, encoding is performed on a series of data indicated by oblique lines falling to the right. With such an arrangement, in the third encoding, the small memory 72 shown in FIG. 7 becomes unnecessary, and the circuit scale can be reduced.
[0028]
FIG. 12 shows an example in which the data sequence of the third encoding shown in FIG. 11 is formed by collecting several bytes from a plurality of rows as shown in the direction of the solid line arrow. A broken line indicates another encoded sequence. By arranging data over j rows, even when a burst-like error occurs, the errors can be distributed to j rows. As a result, when the error is reduced to the number of bytes that can be corrected due to dispersion, such a data sequence configuration is effective. However, if the value of j is too large, errors are scattered in many rows, so it is desirable to obtain j in accordance with the state of occurrence of the burst error. For example, since the number of LDC erasure corrections is up to 32, it is not desirable to increase j to 32 or more.
[0029]
FIG. 17 shows an example in which a data sequence is formed by collecting several bytes from a plurality of rows in the same manner as in FIG. 12, while shifting the turning point so that the example in FIG. 12 is completed in units of j rows. 17 illustrates an example in which the encoding is performed while shifting to the row below by one row while extending to the j rows in the example of FIG. 17. In this case, there is not enough data to be coded in the vicinity of the bottom row, so that data not coded in the top row is coded according to the same rule. By performing encoding in such an arrangement, short burst errors can be apparently dispersed.
[0030]
FIG. 13 shows a method of collecting a plurality of ECC blocks into m blocks and forming a third code there. Data at the same location from a plurality of ECC blocks is combined into one sequence, and the data is encoded. Data is grouped by p bytes from each of the m ECC blocks and encoded in a certain unit. Here, since the Galois field 2 ^ 8 power is used, the number of coded bytes is m × p bytes, and it is desirable that the number of bytes be close to 255. If the number of parities is an integer multiple of p, a parity block is added in ECC block units, and the original data block configuration can maintain the same configuration as the data configuration shown in FIG. It becomes possible.
[0031]
FIG. 14 shows the configuration of a recording and encoding system corresponding to the data configuration shown in FIG. In this embodiment, in order to add the third error correction code, m ECC blocks are collectively encoded. After compiling the data in 64 kbytes, LDC encoding is performed and BIS encoding is performed. After that, m ECC blocks are put together for the third error correction encoding, and further encoded by the third error correction encoder 165, modulated, and recorded on the optical disc. Here, the third encoding comprises a memory 170 capable of storing m ECC blocks. This memory 170 can also act as a buffer when recording on an optical disc is performed intermittently. The system control 169 switches, by a switch SW, whether to add the third error correction code according to the type of data and the setting from the user. Then, a flag indicating that the data is data to which the third error correction code is added is recorded in a predetermined area. The predetermined area may be, for example, an area of BIS control information, or may be represented by specifying the type of a synchronization signal, or may be an area in which management information of the entire disc is recorded, as well as a file type. It may be recorded in.
[0032]
FIG. 15 shows a configuration of a reproduction / decoding system corresponding to the data configuration shown in FIG. First, a flag indicating that the data is data to which a third error correction code is added, which is recorded in a predetermined area, is read, and the system control is performed in accordance with the flag. If the data has not been added with the third error correction code, the data is demodulated by the demodulator 151 and subjected to BIS decoding 152 and LDC decoding 153 to obtain ECC block data. If the data is data to which the third error correction code is added, the SW is switched and the third error corrector 154 performs error correction. Here, the data of this ECC block is stored using the memory 155. This memory 155 can also act as a buffer when intermittently transferring output data. The signal subjected to the error correction is output from the data output 156 as the output signal 157. The memory 158 stores data used for the decoding process, and controls the reproduction process by the system control 159.
[0033]
As described above, it is possible to further improve the correction capability and to increase the reliability by adding the iris M re-correction code having a different sequence to the ECC block configuration using the cross code.
[0034]
In the present embodiment, an example of the configuration is shown using a recording / reproducing system for an optical disk. However, the present invention is not limited to this, and can be applied to a transmission system or a recording medium having an error correction.
[0035]
【The invention's effect】
As described above, according to the present invention, predetermined data is subjected to error correction coding, and for data to be recorded or transmitted, while ensuring compatibility of the data configuration, a further error correction code is added. It is possible to enhance the correction capability and improve the reliability of the reproduced data.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating an ECC block configuration and an arrangement of codes according to an embodiment of the present invention.
FIG. 2 is a diagram showing an ECC block configuration according to the related art.
FIG. 3 is a diagram showing an LDC data structure according to the related art.
FIG. 4 is a diagram illustrating estimation of an error position when error data occurs.
FIG. 5 is a diagram illustrating a configuration example of a conventional ECC block encoding device.
FIG. 6 is a diagram illustrating a configuration example of a conventional ECC block decoding device.
FIG. 7 is a diagram illustrating a configuration example of an ECC block encoding device according to an embodiment of the present invention.
FIG. 8 is a diagram illustrating a configuration example of an ECC block decoding device according to an embodiment of the present invention.
FIG. 9 is a diagram showing the correspondence between addresses and data on a recordable optical disc.
FIG. 10 is a diagram showing a configuration of a recordable optical disc on a disc.
FIG. 11 is a diagram showing an ECC block configuration and a code arrangement according to another embodiment of the present invention.
FIG. 12 is a diagram showing an ECC block configuration and an arrangement of codes according to another embodiment of the present invention.
FIG. 13 is a diagram showing an ECC block configuration and a code arrangement according to another embodiment of the present invention.
FIG. 14 is a diagram illustrating a configuration example of an ECC block decoding device according to another embodiment of the present invention.
FIG. 15 is a diagram illustrating a configuration example of an ECC block encoding device according to another embodiment of the present invention.
FIG. 16 is a diagram illustrating an example of the flow of an ECC block encoding process according to an embodiment of the present invention.
FIG. 17 is a diagram showing an ECC block configuration and a code arrangement according to another embodiment of the present invention.
[Explanation of symbols]
54 LDC encoder 55 BIS encoder 56 Modulator 57 Optical disk 58 Memory 59 System control 71 Third parity adder 72 Small memory

Claims (17)

A first encoding is performed on the data for error-correction encoding of a predetermined number of data, a second encoding for error-correction encoding of another data including position information is performed, and the first encoding and the second encoding are performed. In an error correction coding method for forming an ECC block by combining a plurality of pieces of coded data coded by the coding of (2),
A data encoding method, comprising: performing a third encoding on the data with an error correction encoding using a data sequence different from the first error correction encoding. 2. The method according to claim 1, wherein the first encoding performs encoding on a data sequence different from an order in which data is output after encoding, and the third encoding is substantially equal to an order in which data is output. A data encoding method, which performs encoding on a data sequence in a direction. 2. The method according to claim 1, wherein the first encoding performs encoding on a data sequence that is different from an order in which data is output after encoding, and the third encoding performs data encoding on a plurality of rows. A data encoding method characterized in that encoding is performed as one data series. A first encoding is performed on the data for error-correction encoding of a predetermined number of data, a second encoding for error-correction encoding of another data including position information is performed, and the first encoding and the second encoding are performed. In an error correction code that constitutes an ECC block by combining a plurality of pieces of encoded data encoded by the encoding of 2,
A data encoding method, comprising: collecting a plurality of the ECC blocks; converting predetermined data from each of the ECC blocks into one series; and performing fourth error correction encoding. 5. The recording medium according to claim 1, wherein the encoded data is subjected to predetermined modulation and recorded on a recording medium. The data is used as an ECC block with a predetermined number of data, and a predetermined number of the data is subjected to error-correction-encoding first decoding, and another data including position information is error-correction-coded. In a decoding method of an error correction code for decoding the second encoding,
A data decoding method, wherein decoding is performed on a third encoding for performing error correction encoding on the data of the ECC block with a data sequence different from the first error correction encoding. 7. The method according to claim 6, wherein the first encoding is data encoded for a data sequence different from an order in which data is reproduced, and the third encoding is a direction substantially equal to the order in which data is reproduced. A data decoding method comprising: decoding data encoded with respect to the data sequence of (1). 7. The method according to claim 6, wherein the first encoding is data encoded for a data sequence different from an order in which the data is reproduced, and the third encoding is performed by combining data spanning a plurality of rows into one. A data decoding method comprising decoding data encoded as a data sequence. The data is used as an ECC block with a predetermined number of data, and a predetermined number of the data is subjected to error-correction-encoding first decoding, and another data including position information is error-correction-coded. In a decoding method of an error correction code for decoding the second encoding,
A data decoding method, further comprising: collecting a plurality of the ECC blocks and performing decoding of a fourth error correction coding in which predetermined data from each of the ECC blocks is formed into one series. A first encoding circuit for performing error correction encoding of a predetermined number of data with respect to data, and a second encoding circuit for performing error correction encoding of another data including position information; And an error correction encoding circuit that configures an ECC block by combining a plurality of encoded data encoded by the second encoding circuit and
A data encoding device, comprising: a third encoding circuit that performs error correction encoding on the data with a data sequence different from the first error correction encoding. 11. The data processing apparatus according to claim 10, wherein the first encoding circuit performs encoding on a data sequence different from an order in which data is output after encoding, and the third encoding circuit performs an order in which data is output. A data encoding device for encoding a data sequence in substantially the same direction. 12. The data processing system according to claim 11, wherein the first encoding circuit encodes a data sequence that is different from an order in which data is output after encoding, and the third encoding circuit performs data spanning a plurality of rows. A data encoding apparatus, which performs encoding as one data series. A first encoding circuit that performs error correction encoding of a predetermined number of data with respect to data; and a second encoding circuit that performs error correction encoding of another data including position information. In an error correction encoding circuit that composes an ECC block by combining a plurality of pieces of encoded data encoded by the second encoding,
A data encoding apparatus, comprising: a fourth decoding circuit that collects a plurality of the ECC blocks, sets predetermined data from each ECC block into one sequence, and performs a fourth error correction encoding. A first decoding circuit for decoding a first encoding for error correction encoding of a predetermined number of data into an ECC block with a predetermined number of data for the data, and another ECC block including position information. An error correction code decoding circuit including a second decoding circuit for decoding the second encoding for error correction encoding data,
A decoding circuit that decodes data of the ECC block with respect to a third encoding that performs error correction encoding with a data sequence different from the first error correction encoding. Data decryption device. 15. The method according to claim 14, wherein the first encoding is data encoded for a data sequence different from an order in which the data is reproduced, and the third encoding is a direction substantially equal to the order in which the data is reproduced. A data decoding device comprising a decoding circuit for decoding data encoded with respect to the data series. 15. The method according to claim 14, wherein the first encoding is data encoded with respect to a data sequence different from an order in which the data is reproduced, and the third encoding is performed by combining data spanning a plurality of rows into one. A data decoding device comprising a decoding circuit for decoding data encoded as a data sequence. An ECC block comprising a predetermined number of data for the reproduced or received data, and a decoding circuit for decoding the first encoding for error-correction coding the predetermined number of data; An error correction code decoding circuit comprising a second decoding circuit for decoding the second encoding for error correction encoding another data including the position information,
Further, a fourth decoding circuit for collecting a plurality of the ECC blocks and performing a fourth error correction coding for decoding predetermined data from each ECC block into one series is provided. Decryption device.

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