JP2004198776A - Driving method of plasma display device - Google Patents

Abstract

An object of the present invention is to stabilize the state of wall charges before a write operation, prevent unexpected unlit cells and bright spot cells from occurring, and improve image quality.
In a driving method in which all cells are initialized so as to be in a lighting state, an erasing discharge is performed in one subfield, and a sustaining light emission is performed only during a sustain period until the erasing discharge is performed. At the end of the period 23, a wall charge adjustment period 24 is provided without using a self-erasing discharge in which the wall charge state is very unstable, and the applied voltage gradually changes in a direction to reduce the wall charges on the scan electrodes and the data electrodes. A wall charge adjustment waveform is applied.
[Selection diagram] Fig. 1

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a driving method of a plasma display device known as a large-screen, thin, and lightweight display device.
[0002]
[Prior art]
A driving method of a conventional plasma display device will be described with reference to FIGS.
[0003]
FIG. 9 is a partial perspective view of a conventional AC plasma display panel (hereinafter, referred to as a panel). As shown in FIG. 9, a plurality of pairs of stripe-shaped display electrodes forming pairs of scan electrodes 4 and sustain electrodes 5 are formed on a transparent front substrate 1 made of a glass substrate. Sustain electrode 5 is composed of transparent electrodes 4a, 5a and buses 4b, 5b of silver or the like electrically connected to transparent electrodes 4a, 5a, respectively. A dielectric layer 2 is formed on the front-side substrate 1 so as to cover the plurality of pairs of electrode groups, and a protective film 3 is formed on the dielectric layer 2.
[0004]
On the other hand, a data electrode 8 covered with an insulator layer 7 is formed on a rear substrate 6 made of a glass substrate, and a partition wall 9 is formed on the insulator layer 7 between the data electrodes 8 in parallel with the data electrode 8. Is provided. Further, a phosphor 10 is provided from the surface of the insulator layer 7 to the side surface of the partition 9, and the substrate 1 and the substrate 6 are separated from each other so that the scan electrode 4 and the sustain electrode 5 are orthogonal to the data electrode 8. They are arranged facing each other. The discharge space 11 is filled with at least one rare gas of helium, neon, argon, and xenon as a discharge gas. The discharge space 11 is sandwiched between two adjacent partition walls 9 and forms a pair facing the data electrode 8. A discharge cell 12 is formed in a discharge space at the intersection of the scan electrode 4 and the sustain electrode 5.
[0005]
Next, the operation of the panel main body will be described. The electrode arrangement of the panel main body has a matrix configuration composed of N rows × M columns of discharge cells as shown in FIG. Electrodes SCN1 to SCNn and sustain electrodes SUS1 to SUSn are arranged, and M columns of data electrodes D1 to Dm are arranged in the column direction.
[0006]
When considering light emission of a plasma display, the concept of wall charge becomes very important. A voltage higher than a certain voltage (Vf) cannot be applied between the electrodes of the plasma display, and if a voltage higher than this Vf is applied between the electrodes, a discharge is started. The wall charges are stored in each electrode by this discharge. The inter-electrode voltage Vc is expressed by an externally applied voltage Va and a wall charge Vw,
Discharge starts when Vc = Va + Vw and Vc> Vf. There are two main types of this discharge. One is a strong discharge generated when the externally applied voltage Va suddenly changes and the inter-electrode voltage Vc exceeds Vf, and neutralizes the potential state of the cell. As a result, wall charges accumulate on each electrode. The other is a weak discharge that is generated when the externally applied voltage Va gradually changes and the inter-electrode voltage Vc gradually exceeds Vf. In this weak discharge, the wall charges Vw accumulate while the inter-electrode voltage Vc maintains the state of Vf.
[0007]
Here, an example of a driving method of an AC type plasma display device using the panel body is disclosed in, for example, Patent Document 1. Next, an example of a driving method will be described with reference to FIG.
[0008]
In the initialization period 21, weak positive discharge is generated by the positive gradually changing voltage waveform Vset1 applied to the scan electrode 4 and the negative gradually changing voltage waveform Vset2 applied to the sustain electrode 5, and the scan electrode , Negative wall charges are accumulated, and positive wall charges are accumulated in the sustain electrode 5. Next, after the voltage of the sustain electrode 5 rises to the GND level, the scan electrode 4 is shifted to GND, and the sustain electrode 5 is shifted to Vsus. At this time, a strong discharge is generated by the negative wall charge of the scan electrode 4 and the positive wall charge of the sustain electrode 5, and the positive wall charge is accumulated on the scan electrode 4 and the negative wall charge is accumulated on the sustain electrode 5. The discharge ends when the electric field intensity in the inside becomes zero. Further, when the voltage applied to the sustain electrode 5 rises to GND and the voltage of the scan electrode 4 rises to the sustain voltage Vsus, a strong discharge occurs together with the already stored wall charges, and the wall charges are inverted. That is, the negative wall charges are accumulated in the scan electrodes 4 and the positive wall charges are accumulated in the sustain electrodes 5.
[0009]
Here, when a strong discharge occurs in the cell, the discharge operation is terminated by accumulating wall charges so as to neutralize the strong discharge. Therefore, the data electrode 8 is also affected by the discharge, and the voltage between Vsus and the GND level is intermediate. The wall charge of a specific voltage is accumulated. As a result, when the scan electrode 4 is dropped to GND next time and the address discharge does not occur, the wall charge can be inverted again by raising the sustain electrode 5 to Vsus in the sustain period, and the sustain operation can be performed. . That is, all cells can be turned on by the initialization period 21.
[0010]
In the address period 22, all the sustain electrodes 5 are held at GND, and the positive address pulse voltage + Vd is applied to predetermined data electrodes D1 to Dm corresponding to the discharge cells to be displayed in the first row, and the first row is scanned. When a negative scan pulse voltage -Vsc is applied to each of the electrodes SCN1, an address discharge occurs at the intersection of the predetermined data electrodes D1 to Dm and the first-row scan electrode SCN1. Next, the positive address pulse voltage + Vd is applied to the predetermined data electrodes D1 to Dm corresponding to the discharge cells to be displayed in the second row, and the negative scan pulse voltage -Vsc is applied to the scan electrodes SCN2 in the second row. When applied, an address discharge occurs at the intersection of predetermined data electrodes D1 to Dm and scan electrode SCN2 in the second row.
[0011]
The same operation as described above is sequentially performed, and finally, a positive address pulse voltage + Vd is applied to predetermined data electrodes D1 to Dm corresponding to the discharge cells to be displayed in the Mth column, and a positive address pulse voltage + Vd is applied to the scan electrodes SCNn in the Nth row. When a negative scan pulse voltage -Vsc is applied to each, an address discharge occurs at the intersection of the predetermined data electrodes D1 to Dm and the Nth row scan electrode SCNn. This discharge occurs when a negative voltage is applied to the scan electrode having a negative wall charge and a positive voltage is applied to the data electrode having a positive wall charge.After the discharge, the wall charge in the cell is substantially reduced. Disappear. Here, the scanning panel voltage Vsc is raised from the GND level by the address voltage Vad. This is because if Vad is 0, the self-erasing discharge described later reduces the wall charges on the scan electrode 4 and the data electrode 8, making it difficult to generate an address discharge. Conversely, Vad = Vscn. This is because even if the address operation is not performed, the address is applied by applying the voltage to the scanning panel, so that the address discharge can be smoothly performed.
[0012]
In the next sustain period 23, for the cells in which no address operation has been performed, the scan electrode 4 has a negative wall charge and the sustain electrode 5 has a positive wall charge. Therefore, the scan electrode 4 is set to GND, and the sustain electrode 5 is set to Vsus. Is discharged, and positive wall charges accumulate on the scanning electrode 4 and negative wall charges accumulate on the sustain electrode 5. Then, by applying the opposite voltages to the respective voltages, the opposite wall charges accumulate, and by repeating this, the discharge continues. At the end of the sustain period, the scan electrode 4 is set to Vsus, negative wall charges are accumulated, and the operation ends. This is the same as the initialization period. If the address discharge does not occur in the next sustain period, the discharge can be continued. On the other hand, when the address discharge is performed, the wall charges almost disappear, so that the sustain operation cannot be performed.
[0013]
For example, when one field as shown in FIG. 7 is divided into eight subfields, the first subfield includes an initialization period 21, a writing period 22, and a sustain period 23, and the subsequent two to eight subfields. Is composed of only the write period 22 and the sustain period 23. All the cells are turned on in the initial setup period, and the discharge in the sustain period is continued until the address discharge occurs, and the cells written in the address period do not turn on thereafter. Therefore, as shown in the table of FIG. 7, it is possible to express nine gradations in total, including the case where no sustained light emission is performed. In the drawing, ○ indicates a subfield for sustaining light emission, and × indicates a subfield for address discharge.
[0014]
Next, the falling part of the voltage applied to the scan electrode 4, which is the last step of the initialization period and the sustain period, will be described. FIG. 8A shows the state of the wall charges immediately before this portion (point A in FIG. 6). As shown in the figure, since the rising discharge of the scanning electrode 4 has occurred, negative wall charges are accumulated in the scanning electrode 4 and positive wall charges are accumulated in the sustaining electrode 5. Here, even if the voltage of scan electrode 4 is dropped to GND, the potential difference between scan electrode 4 and sustain electrode 5 does not reach discharge start voltage Vf.
[0015]
On the other hand, as described above, wall charges having a voltage of about half of Vsus are accumulated in the data electrode 8, and the discharge starting voltage between the data electrode 8 and the scan electrode 3 is relatively small. A weak discharge is generated by the positive wall charges on the scan electrode and the negative wall charges on the scan electrode. This is hereinafter referred to as self-erasing discharge. As a result, the wall charges on each of the electrodes are delicately reduced, and the next writing step can be performed smoothly. That is, as shown in FIG. 8B (point B in FIG. 6), the wall charge of the data electrode 8 and the wall charge of the scan electrode 4 are slightly reduced as compared with FIG. 8A.
[0016]
At this time, if a weak self-erasing discharge does not occur, even if there is no positive write pulse applied to the data electrode 8 as shown in FIG. 8C (point C in FIG. 6), the scan electrode 4 An address discharge is generated by the applied negative scanning pulse (erroneous writing), and the cell becomes an unlit cell thereafter. Conversely, if a relatively large self-erasing discharge is involved at this time, as shown in FIG. 8D (point C in FIG. 6), the wall charges of the data electrode 8 and the scanning electrode 4 are required. As a result, the address discharge does not occur (address mistake). At this time, no address discharge occurs, but sufficient wall charges remain for the discharge between the sustain electrode 5 and the scan electrode 4, so that the sustain discharge is continuously performed, resulting in a bright spot cell.
[0017]
[Patent Document 1]
JP 2000-227778 A
[Problems to be solved by the invention]
However, in such a method of driving a plasma display device, the self-erasing discharge is not a strong discharge as described above, nor a weak discharge due to a gradually changing voltage waveform, but a presumed halfway weak discharge. It was difficult to control, and a little variation caused a bright spot or no light. Therefore, not only variations between panels, but also bright spots and non-lighting occur within the panel surface, significantly reducing the operating voltage range, and ultimately lowering the panel production yield. there were.
[0019]
An object of the present invention is to solve such a problem, to absorb in-plane variation of a panel, and to improve a manufacturing yield.
[0020]
[Means for Solving the Problems]
In order to achieve the above object, a method of driving a plasma display apparatus according to the present invention is provided such that one field is divided into a plurality of subfields, and a plurality of continuous subfields are defined as a subfield group. At the beginning, an initialization period in which all the cells of the panel body are turned on, a writing period in which cells are selectively erased and discharged for each subfield in the subfield group, and a cell in which no erasing discharge is performed. And a sustain period in which a sustain discharge is performed only for the sub-field group. A period is provided. This makes it possible to prevent erroneous writing to be unlit and erroneous writing to be a luminescent spot by actively performing wall charge adjustment instead of unstable self-erasing discharge.
[0021]
BEST MODE FOR CARRYING OUT THE INVENTION
That is, the invention according to claim 1 of the present invention is characterized in that at least one partition for arranging a pair of transparent substrates at least on the front side so as to form a discharge space between the substrates and partitioning the discharge space into a plurality of pieces is provided. Driving method of a plasma display device having a panel body provided with an electrode group arranged on a substrate so as to generate a discharge in a discharge space partitioned by the partition wall and provided with a phosphor layer emitting light by the discharge When one field is divided into a plurality of subfields, and a plurality of continuous subfields are defined as a subfield group, at the head of the subfield group, all the cells of the panel body are turned on. And an address for selectively erasing and discharging cells for each subfield in the subfield group And a sustain period in which sustain discharge is performed only for cells in which erasure discharge has not been performed, and a sustain period of one subfield including a sustain emission period of an initialization period of the subfield group and a next subfield. And a method for driving the plasma display device, wherein a wall charge adjustment period is provided between the writing period and the writing period.
[0022]
According to a second aspect of the present invention, in the first aspect, during the wall charge adjustment period, the wall charge adjustment waveform in which the voltage is gradually changed in the scan electrode is stored in the scan electrode and the data electrode. Of these, the characteristic is that they are applied in a direction to decrease the mutual wall charge amount.
[0023]
According to a third aspect of the present invention, in the second aspect, the slope of the wall charge adjustment waveform is 10 V / μs or more.
[0024]
A driving method of a plasma display device according to an embodiment of the present invention will be described with reference to FIGS.
[0025]
First, in FIG. 1, an initialization period 21, a writing period 22, and a sustain period 23 are periods during which the same operation as in the example of FIG. 6 is performed. An adjustment period 24 is provided. In order to perform the writing process smoothly, it is desirable that the potential difference from the data electrode 8 be in the Vf state with the scanning electrode 4 applied. Then, when an address pulse is applied to the data electrode 8, an address discharge is performed, and when no address pulse is applied, nothing occurs. However, in the case of the conventional self-erasing waveform, a certain cell is in a normal Vf state due to a variation between cells, but a certain cell exceeds the Vf voltage when a scan pulse is applied and discharges. That is, the cell is turned off. In addition, a certain cell does not discharge without exceeding Vf even if an address pulse is applied, and becomes a bright spot cell. In order to solve this, in each cell during the address period, the potential difference between the scan electrode 4 in the state where the scan pulse is applied and the data electrode 8 to which the address pulse is not applied can be set to the Vf state without variation. Is desirable.
[0026]
In the wall charge adjustment period 24 of FIG. 1, a voltage waveform that gradually lowers the potential from the Vsus voltage is applied to the scan electrode. Then, the potential is gradually lowered to the same potential as the potential (address voltage) Vad of the scanning pulse. Hereinafter, this is referred to as a wall charge adjustment waveform 25. By applying the wall charge adjustment waveform 25, a weak discharge is generated in each cell, and it is possible to always maintain the Vf state by adjusting the amount of wall charge even between cells having different values of Vf. .
[0027]
FIG. 2 is a diagram schematically illustrating a wall charge state in a plurality of cells with respect to a difference between a self-erasing discharge and a weak discharge based on the wall charge adjustment waveform 25. As shown in FIG. 2, in the case of the self-erasing discharge, the wall charge state becomes unstable, so that many erroneous writing (non-lighting) cells and writing error (bright spot) cells occur. In comparison with this, in the case of the wall charge adjustment waveform 25, the wall charges on the scan electrode 4 and the data electrode 8 can be accumulated very uniformly, and the variation between cells is always maintained in the state where the scan pulse is applied. Therefore, unexpected bright spot cells and unlit cells do not occur.
[0028]
Here, in the self-erasing discharge, the final potential of the sustain waveform is at the GND level, and is different from Vad of the wall charge adjustment waveform 25. This is because the last potential (GND) for sustaining and the address potential Vad are made different to compensate for the charge reduced by the self-erasing discharge. On the other hand, the wall charge adjustment waveform 25 has a voltage up to the address voltage Vad. This is because it is necessary to reduce wall charges by weak discharge by dropping. In other words, in the case of self-erasing discharge, the voltage required for writing is compensated by an externally applied voltage, and in the case of weak discharge of the wall charge adjustment waveform 25, the voltage required for writing is compensated for by wall charge. it can.
[0029]
FIG. 3 shows an example of eight subfields using this waveform. A wall charge adjustment period 24 is always inserted before each write period 22, and a sequence of an initialization period 21 + write period 22 + sustain period 23 + wall charge adjustment period 24 + write period 22 + sustain period 23 + wall charge adjustment period 24+... It becomes. Also in this case, it is possible to express the same nine gradations as in the case of FIG.
[0030]
In the example of FIG. 1, the wall charge adjustment waveform 25 is gradually lowered from the Vsus voltage. However, if the self-erase discharge does not occur, the voltage is rapidly lowered from the Vsus and the voltage is reduced from there. You may make it drop. In this case, the same effect can be realized in the short wall charge adjustment period 24, and the effect of providing the wall charge adjustment period 24 can be reduced.
[0031]
If the slope of the wall charge adjustment waveform is too steep, a strong discharge occurs, neutralizing the wall charges in the cell, and the sustain discharge no longer occurs in that field, resulting in an unlit cell. I will. Therefore, the inclination is desirably 10 V / μs or less.
[0032]
In the example described so far, the field is initialized at the beginning, and thereafter, the writing and the maintenance are repeated. The field frequency of PAL, which is a TV broadcasting system common in Europe, is 50 Hz. In the case of a 50 Hz signal, flicker becomes conspicuous if the number of sustain pulses for each subfield simply increases or decreases as shown in FIG. In order to cope with this, the number of sustain pulses is doubled as shown in FIG. 4, and the number of light emitting subfields of each peak is averaged to emit light. In other words, one subfield includes two subfield groups of initialization period 21 + address period 22 + sustain period 23 + wall charge adjustment period 24 + address period 22 + sustain period 23 + wall charge adjustment period 24+... As described above, the present invention can be used even when one field includes a plurality of subfield groups.
[0033]
The example described so far is a so-called negative logic in which sustained light emission is not performed in a cell in which writing has been performed, but a positive logic waveform in which only the cell in which writing has been performed can be generated. With this positive logic, the address discharge is performed in the first subfield, and only the cells that emit light are brought into a state where the sustain light emission can be performed. Next, erasure is performed by negative logic so as to realize a desired gradation. Note that the initialization period in this case includes sustaining light emission for turning on all the elements as in the example of FIG. 1, and does not cause the luminance of black to increase, but turns off all of them. Therefore, a simple kind of charge adjustment may be used. By realizing such initialization to make the non-lighting state and writing by positive logic, it is possible to prevent black luminance from increasing.
[0034]
Furthermore, in the example shown in FIG. 3, since only nine gradations can be obtained, when an image is actually projected, the quality becomes extremely poor. To improve this, as shown in FIG. 5, using the above-described positive logic writing, the first half of one field is divided into an initialization period 26 + writing period (positive logic) 27 + sustaining period 23 + erasing period 28 + writing period (Positive logic) 27 + sustain period 23 + erase period 28+... May be used, and a negative logic sequence as shown in FIG. Note that the initialization period 26 in this case is to initialize to the non-lighting state described above. At this time, since the first half can be erased after the sustained light emission is performed only on the cells written with the positive logic, each subfield can be controlled independently. Therefore, the number of gradations to be expressed increases, and in the case of FIG. 5, 47 gradations can be expressed, so that the image can be seen more naturally. In other words, in these examples, a subfield group is configured by a part, not all, of one field, but the present invention can be applied to such an example.
[0035]
【The invention's effect】
As is apparent from the above description, according to the present invention, all cells are initialized to be in a lighting state, an erasing discharge is performed in any one subfield, and a sustain period until the erasing discharge is performed is performed. In the driving method in which only the sustain light emission is performed, the wall charge state before the writing operation is stably maintained by using the wall charge adjustment waveform without using the self-erasing discharge in which the wall charge state is very unstable, and The effect of preventing the occurrence of unlit cells and bright spot cells and improving image quality can be obtained.
[Brief description of the drawings]
FIG. 1 is a driving waveform diagram for explaining a driving method of a plasma display device according to an embodiment of the present invention; FIG. 2 is a distribution diagram of cell inner wall charges for explaining an effect of the present invention; FIG. FIG. 4 is an explanatory diagram showing a drive sequence according to another embodiment of the present invention. FIG. 5 is an explanatory diagram showing a drive sequence according to another embodiment of the present invention. 6: driving waveform diagram in the conventional driving method. FIG. 7: explanatory diagram for explaining the conventional driving sequence. FIG. 8: cell inner wall charge distribution diagram for explaining the conventional problem. FIG. 9: plasma display device. FIG. 10 is a perspective view showing a panel structure with a part cut away. FIG. 10 is an explanatory view showing an electrode arrangement of a panel main body of the plasma display device.
21 Initialization period 22 Write period 23 Sustain period 24 Wall charge adjustment period

Claims (3)

A pair of substrates at least on the front side were disposed so as to face each other so that a discharge space was formed between the substrates, and a partition for partitioning the discharge space into a plurality was disposed on at least one substrate, and partitioned by the partition. A method of driving a plasma display device having a panel body provided with a phosphor layer that emits light by discharge while arranging an electrode group on a substrate so that discharge occurs in a discharge space,
If one field is divided into a plurality of subfields, and a plurality of consecutive subfields are defined as a subfield group, initialization is performed to turn on all cells of the panel body at the head of the subfield group A period, a writing period for selectively erasing and discharging cells for each subfield in the subfield group, and a sustaining period for performing sustaining discharge only for cells not performing erasing discharge,
A method of driving a plasma display device, wherein a wall charge adjustment period is provided between a sustain period of one subfield including a sustain emission period of an initialization period of the subfield group and a write period of a next subfield. . In the wall charge adjustment period, a wall charge adjustment waveform in which a voltage gradually changes is applied to the scan electrode in a direction of decreasing the amount of wall charge among the wall charges stored in the scan electrode and the data electrode. The method for driving a plasma display device according to claim 1, wherein: 3. The method according to claim 2, wherein the slope of the wall charge adjustment waveform is 10 V / μs or more.

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