JP2004273561A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device having a BGA (ball grid array) of high reliability which prevents disconnection and deterioration of step coverage. <P>SOLUTION: A support substrate 15 is adhered to the surface of a semiconductor chip 16, and a pad electrode 12 is formed which extends from the surface of the chip 16 to the support substrate 15. The extending part of the electrode 12 and the rear face of the chip 16 are covered with a photosensitive insulating film 17. A contact hole 18 is formed in the insulating film 17 in which a re-wiring layer 21 is embedded. The re-wiring layer 21 is connected with the electrode 12 through the contact hole 18, and extends on the insulating film 17 over the rear face of the chip 16. A ball shape terminal 22 is formed on the re-wiring layer 21. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a BGA (Ball Grid Array) type semiconductor device in which a plurality of ball-shaped conductive terminals are arranged, and a method for manufacturing the same.
[0002]
[Prior art]
In recent years, CSP (Chip Size Package) has attracted attention as a three-dimensional packaging technology and a new packaging technology. The CSP refers to a small package having an outer size substantially the same as the outer size of a semiconductor chip.
[0003]
Conventionally, a BGA type semiconductor device has been known as a kind of CSP. In this BGA type semiconductor device, a plurality of ball-shaped conductive terminals made of a metal member such as solder are arranged in a grid on one main surface of a package, and electrically connected to a semiconductor chip mounted on another surface of the package. Connected to.
[0004]
When this BGA type semiconductor device is incorporated into an electronic device, each conductive terminal is crimped to a wiring pattern on a printed circuit board to electrically connect the semiconductor chip and an external circuit mounted on the printed circuit board. Connected.
[0005]
Such a BGA type semiconductor device is provided with a larger number of conductive terminals than other CSP type semiconductor devices such as SOP (Small Outline Package) and QFP (Quad Flat Package) having lead pins protruding from the side. And has the advantage that it can be miniaturized. This BGA type semiconductor device is used, for example, as an image sensor chip of a digital camera mounted on a mobile phone.
[0006]
FIG. 17 shows a schematic configuration of a conventional BGA type semiconductor device, and FIG. 17 (A) is a front perspective view of the BGA type semiconductor device. FIG. 17B is a perspective view of the back surface side of the BGA type semiconductor device.
[0007]
In the BGA type semiconductor device 101, a semiconductor chip 104 is sealed between first and second glass substrates 102 and 103 via epoxy resins 105a and 105b. On one main surface of the second glass substrate 103, that is, on the back surface of the BGA type semiconductor device 101, a plurality of ball-shaped terminals 106 are arranged in a lattice. The conductive terminal 106 is connected to the semiconductor chip 104 via the first wiring 107. The plurality of first wirings 107 are connected to aluminum wirings drawn out from the inside of the semiconductor chip 104, respectively, and each ball-shaped terminal 106 is electrically connected to the semiconductor chip 104.
[0008]
The sectional structure of the BGA type semiconductor device 101 will be described in more detail with reference to FIG. FIG. 18 shows a sectional view of a BGA type semiconductor device 101 divided into individual chips along a dicing line.
[0009]
The first wiring 107 is provided on the insulating film 108 provided on the surface of the semiconductor chip 104. The semiconductor chip 104 is bonded to the first glass substrate 102 with a resin 105a. The back surface of the semiconductor chip 104 is bonded to the second glass substrate 103 with a resin 105b. One end of the first wiring 107 is connected to the second wiring 110. The second wiring 110 extends from one end of the first wiring 107 to the surface of the second glass substrate 103. Then, ball-shaped conductive terminals 106 are formed on the second wirings 110 extending on the second glass substrate 103.
[0010]
The above-described technique is described in, for example, Patent Document 1 below.
[0011]
[Patent Document 1]
Patent Publication No. 2002-512436
[Problems to be solved by the invention]
However, in the semiconductor device 101 having the above-described BGA, the contact area between the first wiring 107 and the second wiring 110 is very small, so that there is a possibility that the contact may be broken. There is also a problem in the step coverage of the first wiring 107.
[0013]
[Means for Solving the Problems]
Therefore, a semiconductor device of the present invention comprises a semiconductor chip, a support substrate adhered to the surface of the semiconductor chip, and a pad electrode formed on the surface of the semiconductor chip and extending from an end of the semiconductor chip onto the support substrate. An insulating film covering an extended portion of the pad electrode and a back surface of the semiconductor chip; and an insulating film embedded in a contact hole formed in the insulating film, connected to the pad electrode and covering the back surface of the semiconductor chip. And a redistribution layer extending over the insulating film.
[0014]
Further, according to the method of manufacturing a semiconductor device of the present invention, a step of forming an insulating film on a surface of a semiconductor substrate and forming a pad electrode extending on a dicing line region on the insulating film; A step of bonding a substrate, a step of partially etching the semiconductor substrate from the back surface such that a part of the pad electrode is exposed through the insulating film, and a step of coating a photosensitive insulating film on the back surface of the semiconductor substrate. Applying, exposing and developing the photosensitive resin film to form a contact hole reaching the surface of the pad electrode, heat-treating the photosensitive resin film, Forming a seed layer for electrolytic plating on the photosensitive resin film and in the contact hole; forming a resist layer for patterning a rewiring layer on the photosensitive resin film; Forming a rewiring layer by electrolytic plating using a resist layer as a mask, removing the resist layer and the seed layer thereunder, and forming the semiconductor substrate along the dicing line region into a plurality of semiconductor chips. And a dividing step.
[0015]
ADVANTAGE OF THE INVENTION According to the semiconductor device and its manufacturing method of this invention, the disconnection of wiring from the pad electrode of a semiconductor chip to the ball-shaped terminal of the back surface and deterioration of step coverage are prevented, and the semiconductor which has a highly reliable BGA A device can be obtained.
[0016]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, embodiments of the present invention will be described in detail with reference to the drawings.
First, the structure of the semiconductor device will be described with reference to FIGS. FIG. 15 is a cross-sectional view of the semiconductor device, and FIG. 16 is a plan view of the semiconductor device as viewed from the back surface (the surface on which the rewiring 21 is formed). FIG. 15 is a sectional view taken along line XX of FIG.
[0017]
FIGS. 15 and 16 show the semiconductor package 30 divided into individual semiconductor packages 30 along the dicing line center DC, and particularly show the dicing line region and its periphery.
[0018]
The semiconductor chip 16 is, for example, a CCD image sensor chip, and a pad electrode 12 is formed on a surface of the semiconductor chip 16 with an interlayer insulating film 11 interposed therebetween. The pad electrode 12 is connected to an internal circuit in the semiconductor chip 16, and is obtained by extending a pad electrode used for normal wire bonding to a dicing line region in a distance. The pad electrode 12 is formed to extend from the end of the semiconductor chip 16 in the dicing line center DC direction.
[0019]
The surface of the pad electrode 12 is covered with a passivation film 13 such as a silicon nitride film. A transparent support substrate 15 is adhered to the surface of the semiconductor chip 16 on which the pad electrodes 12 are formed, via a resin layer 14 made of, for example, epoxy resin. The reason why the support substrate 15 has light transmittance is to allow external light to reach the CCD formed on the surface of the semiconductor wafer.
[0020]
The back surface of the semiconductor chip 16 is covered with an insulating film, for example, a photosensitive insulating film 17 cured by heat treatment. The photosensitive insulating film 17 is formed from the back surface of the semiconductor chip 16 to a groove region between two adjacent semiconductor chips 16.
[0021]
A contact hole 18 is opened in the photosensitive insulating film 17. The redistribution layer 21 is buried in the contact hole 18, and the redistribution layer 21 is connected to the end 12 </ b> A of the pad electrode 12. The redistribution layer 21 extends on the back surface of the semiconductor chip 16, and a ball-shaped terminal 22 electrically connected to the redistribution layer 21 is formed on a flat portion on the back surface of the semiconductor chip 16.
[0022]
In this manner, wiring from the pad electrode 12 formed on the front surface of the semiconductor chip 16 to the ball-shaped terminal 22 formed on the back surface of the semiconductor chip 16 is enabled. In addition, according to the present invention, since wiring is performed from the front surface to the back surface of the semiconductor chip 16 by using the redistribution layer 21 embedded in the contact hole 18, disconnection hardly occurs and excellent step coverage. Further, the mechanical strength of the wiring is high.
[0023]
Next, a method for manufacturing the semiconductor device will be described. As shown in FIG. 1, a semiconductor integrated circuit (for example, a CCD image sensor) (not shown) is formed on a surface of a semiconductor wafer 10 such as a silicon wafer. An interlayer insulating film 11 such as BPSG is formed on the surface of the semiconductor wafer 10, and a pad electrode 12 extending to the dicing line region is formed on the interlayer insulating film 11. The extended pad electrode 12 is made of aluminum or an aluminum alloy, and has a thickness of about 1 μm. Further, a passivation film 13 such as a silicon nitride film is formed on the pad electrode 12.
[0024]
Then, the semiconductor wafer 10 is supported via a resin layer 14 made of an epoxy resin or the like, and a support substrate 15 (for example, a transparent glass substrate) having a property of transmitting light is bonded.
[0025]
Then, as shown in FIG. 2, in a state where the support substrate 15 is bonded, the back surface of the semiconductor wafer 10 is etched, that is, so-called back grinding is performed, and the thickness is processed to about 100 μm.
[0026]
Next, as shown in FIG. 3, the semiconductor wafer 10 in the dicing line region is partially etched away. That is, the semiconductor wafer 10 is etched such that one end 12A of the pad electrode 12 is exposed via the interlayer insulating film 11. This etching is dry etching using a resist mask. Thus, the semiconductor wafer 10 is separated into individual semiconductor chips 16. That is, the groove region GR is formed between the two adjacent semiconductor chips 16 and 16 as a result of the removal of the semiconductor. Since the separated individual semiconductor chips 16 are adhered to the support substrate 15, the individual semiconductor chips 16 are thereby connected to each other, and maintain a wafer shape as a whole.
[0027]
Here, a wet etching process may be performed so that the corners 16A of the individual semiconductor chips 16 are rounded (rounded). This is effective in improving the coverage of the seed layer formed by the sputtering method thereafter.
[0028]
Next, as shown in FIG. 4, a photosensitive insulating film 17 is applied to the entire surface from the back surface of the semiconductor chip 16 by a spin coating method. The photosensitive insulating film 17 is applied to the back surface and the etched side surface of the semiconductor chip 16 and the groove region GR. The thickness of the flat portion on the back surface of the semiconductor chip 16 is 10 μm to 20 μm, and about 50 μm at the center (the most depressed portion) of the groove region GR. Here, the photosensitive insulating film 17 is made of a photosensitive resin, for example, a novolak resin, and has fluidity and a photosensitive insulating film. It is a possible insulating film. The photosensitive insulating film 17 has the property of being thermally cured by heat treatment (curing) to become an insulating film.
[0029]
At this time, since the end portion 16A of the semiconductor chip 16 is rounded, the photosensitive insulating film 17 is prevented from becoming thinner at this portion as much as possible, and the insulation between the rewiring layer and the semiconductor chip 16 described later is secured. can do. Before the photosensitive insulating film 17 is applied, a CVD oxide film (SiO ₂ ) or a nitride film (SiN or SiON) may be applied to a thickness of about 2 μm so as to cover the back surface of the semiconductor chip 16. . When these films are formed by high-temperature processing at 200 ° C. or more, the characteristics of the CCD device fluctuate. Thus, film formation by a low-temperature plasma CVD method is effective. Thereby, the insulation between the redistribution layer and the semiconductor chip 16 can be further improved.
[0030]
Next, as shown in FIG. 5, the photosensitive insulating film 17 is exposed to light using a mask, and is developed to form a contact hole. The contact hole 18 is formed on the end 12A of the pad electrode 12.
[0031]
Next, as shown in FIG. 6, curing is performed by heating the photosensitive insulating film 17 to a temperature of about 170 ° C. As a result, the photosensitive insulating film 17 is thermally cured, and its insulating property is also improved. At the same time, the end of the contact hole 18 of the photosensitive insulating film 17 is rounded.
[0032]
Next, as shown in FIG. 7, the interlayer insulating film 11 remaining at the bottom of the contact hole 18 is removed by etching.
[0033]
Then, as shown in FIG. 8, a barrier layer (TiN) and a seed layer 19 made of copper (Cu) are formed on the entire surface including the photosensitive insulating film 17 and the bottom of the contact hole 18 by a sputtering method. The seed layer 19 serves as a plating electrode at the time of electrolytic plating described later, that is, a seed (seed) for growing the plating, and has a thickness of 200 nm to 300 nm. The barrier layer is for preventing Si contamination by copper, and may be another film such as TiW. Copper for the seed layer 19 may be formed not only by the sputtering method but also by a combination of the sputtering method and the electroless plating method.
[0034]
Next, as shown in FIG. 9, a resist layer 20 is applied to the entire surface. Then, as shown in FIG. 10, the resist layer 20 is exposed and developed to leave the resist layer 20 in a region excluding the rewiring layer forming region. In FIG. 9, a resist layer 20 is left on a part of the photosensitive insulating film 17 between two adjacent semiconductor chips 16 and 16. That is, the seed layer 19 in this portion is covered with the resist layer 20.
[0035]
Next, electrolytic plating of copper (Cu) is performed as shown in FIG. As a result, a redistribution layer 21 made of copper (Cu) is formed on the seed layer 19 not covered by the resist layer 20. The thickness of the rewiring layer 21 is 20 μm to 30 μm on a flat portion on the back surface of the semiconductor chip 16.
[0036]
Next, as shown in FIG. 12, the resist layer 20 is removed, and as shown in FIG. 13, the seed layer 19 under the resist layer 20 is removed by etching. At this time, the surface of the redistribution layer 21 is also etched, but there is no problem because its thickness is larger than that of the seed layer 19. FIG. 14 is a plan view of the semiconductor device (a plan view as viewed from the back surface side of the semiconductor chip 16), and a cross section taken along line XX in the figure corresponds to the cross sectional view of FIG. After the rewiring layer 21 is formed by the above steps, as shown in FIG. 14, the external connection electrically connected to the rewiring layer 21 is formed on the rewiring layer 21 extending inside the semiconductor chip 16. A ball-shaped terminal 22 (solder ball) as a terminal is formed.
[0037]
Then, as shown in FIGS. 15 and 16, the structure is cut along the dicing line center DC, and divided into individual semiconductor packages 30. In this dicing step, a laser beam or a dicing blade can be used.
[0038]
【The invention's effect】
According to the present invention, there is provided a semiconductor device having a highly reliable BGA that prevents disconnection of wiring and deterioration of step coverage from a pad electrode formed on a front surface of a semiconductor chip to a ball-shaped terminal on the back surface thereof. Obtainable.
[0039]
Further, according to the present invention, various integrated circuit chips can be mounted on a mounting substrate at a high density. In particular, by applying the present invention to an integrated circuit chip of a CCD image sensor, the integrated circuit chip can be mounted on a small mounting board of a small portable electronic device, for example, a mobile phone.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.
FIG. 3 is a sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention.
FIG. 4 is a sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention;
FIG. 5 is a sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention.
FIG. 6 is a sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention.
FIG. 7 is a plan view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention.
FIG. 8 is a sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention.
FIG. 9 is a sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention.
FIG. 10 is a sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention.
FIG. 11 is a sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention.
FIG. 12 is a sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention.
FIG. 13 is a sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention.
FIG. 14 is a plan view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention.
FIG. 15 is a cross-sectional view illustrating a semiconductor device and a method for manufacturing the same according to an embodiment of the present invention.
FIG. 16 is a plan view illustrating a semiconductor device and a method for manufacturing the same according to an embodiment of the present invention.
FIG. 17 is a diagram illustrating a semiconductor device according to a conventional example.
FIG. 18 is a diagram illustrating a semiconductor device according to a conventional example.

Claims (7)

A semiconductor chip,
A support substrate adhered to the surface of the semiconductor chip,
A pad electrode extending from the surface of the semiconductor chip onto the support substrate;
An insulating film covering an extended portion of the pad electrode and a back surface of the semiconductor chip;
A rewiring layer buried in a contact hole formed in the insulating film, connected to the pad electrode, and extending on the insulating film to cover a back surface of the semiconductor chip. . 2. The semiconductor device according to claim 1, wherein said insulating film is formed by heat-treating a photosensitive insulating film. 2. The semiconductor device according to claim 1, further comprising a ball-shaped terminal electrically connected to said redistribution layer. Forming an insulating film on the surface of the semiconductor substrate, and forming a pad electrode extending on the dicing line region on the insulating film;
Bonding a support substrate to the surface of the semiconductor substrate,
Partially etching the semiconductor substrate from the back surface such that a part of the pad electrode is exposed via the insulating film;
Applying a photosensitive insulating film on the back surface of the semiconductor substrate,
Exposing and developing the photosensitive resin film to form a contact hole reaching the surface of the pad electrode;
Heat-treating the photosensitive resin film,
Forming a seed layer for electrolytic plating on the heat-treated photosensitive resin film and in the contact hole;
Forming a resist layer for patterning a rewiring layer on the photosensitive resin film,
Forming a rewiring layer by electrolytic plating using the resist layer as a mask,
Removing the resist layer and the seed layer thereunder;
Dividing the semiconductor substrate into a plurality of semiconductor chips along the dicing line region. 5. The method according to claim 4, further comprising the step of forming a ball-shaped terminal electrically connected to the redistribution layer. In the step of partially etching the semiconductor substrate so that a part of the pad electrode is exposed through the insulating film, wet etching is performed so that a corner of the semiconductor substrate is rounded. 5. The method for manufacturing a semiconductor device according to item 4. After a step of partially etching the semiconductor substrate so that a part of the pad electrode is exposed through the insulating film, a plasma oxide film is formed on the semiconductor substrate, and then a photosensitive insulating film is formed on the semiconductor substrate. 7. The method for manufacturing a semiconductor device according to claim 6, wherein

Images