JP2004274463A - Differential electronic circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a differential electronic circuit for ensuring a peaking amount for a high frequency region without increasing the inductance of a load inductor. <P>SOLUTION: The drains of active transistors 2a, 2b are respectively connected to load resistors 1a, 1b in pairs, the load resistors 1a, 1b are respectively connected to load inductors 11a, 11b in pairs, and a coupling capacitor 20 is connected between a connecting point 21a of the load resistor 1a and the load inductor 11a and a connecting point 21b of the load resistor 1b and the load inductor 11b. Thus, the peaking amount at the high frequency region of the differential electronic circuit is increased. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an electronic circuit using, for example, a semiconductor integrated circuit or formed on a semiconductor substrate, and relates to a differential electronic circuit.
[0002]
[Prior art]
[Non-Patent Document 1] "B. Razavi:" Design of Analog CMOS Integrated Circuits ", McGraw-Hill, page 104"
[Non-Patent Document 2] "J. Savoji, B. Razavi:" High-Speed CMOS Circuits for Optical Receivers ", KLUWER ACADEMIC PUBLISHERS, page 18".
[0003]
In the prior arts shown in Non-Patent Documents 1 and 2, there is a differential amplifier circuit shown in FIG. 7 as a circuit capable of processing a high-speed analog or digital signal. In the differential amplifier circuit of FIG. 7, load resistances 1a and 1b are connected to the drains of a pair of active transistors 2a and 2b, respectively, and the other ends of the load resistances 1a and 1b are connected to a positive power supply terminal 7. The sources of the active transistors 2 a and 2 b are connected to the drain of the current control transistor 3, and the source of the current control transistor 3 is connected to the negative power supply terminal 8. The gate of the current control transistor 3 is fixed to a constant voltage through the current control terminal 6. Opposite-phase input signals are applied to the input terminals 4a and 4b connected to the gates of the active transistors 2a and 2b, and the current flowing through the drains is controlled according to the input signals. The change in current is taken out to the output terminals 5a and 5b as a change in voltage by the load resistors 1a and 1b. In a circuit requiring high-speed operation, if the required operation speed cannot be obtained with the differential amplifier circuit as shown in FIG. 7, a pair of load inductors 11a and 11b are connected in series with the load resistors 1a and 1b as shown in FIG. And a method of expanding the gain band using peaking at a high frequency is used. In the circuit as shown in FIG. 8, the load impedance is increased by using the fact that the impedance of the load inductors 11a and 11b increases at a high frequency to prevent a decrease in gain.
[0004]
[Problems to be solved by the invention]
In this conventional example, when the required operating frequency increases, the signal attenuation due to the parasitic capacitance of the circuit increases, so that a large peaking amount is required to compensate for this. Therefore, the inductance of the pair of load inductors 11a and 11b in FIG. 8 needs to be large, and the area occupied by the load inductors 11a and 11b in the semiconductor integrated circuit increases. If an attempt is made to prevent an increase in the inductance of the load inductors 11a and 11b, an increase in the power supply voltage or a high-speed semiconductor device is required, leading to an increase in energy consumption and an increase in manufacturing cost.
[0005]
The present invention has been made to solve the above-described problems, and has as its object to provide a differential electronic circuit capable of securing a peaking amount at a high frequency without increasing the inductance of a load inductor.
[0006]
[Means for Solving the Problems]
The differential electronic circuit according to claim 1, comprising a pair of transistors, a pair of load resistors, and a pair of load inductors, one end of each of the pair of load resistors is connected to each of the pair of transistors, and In the differential electronic circuit in which the other end of each load resistor is connected to each of the pair of load inductors, the pair of load inductors is connected via a capacitor.
[0007]
In the differential electronic circuit according to the second aspect, the capacitance between the pair of load inductors is a variable capacitance.
[0008]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings described below, those having the same functions are denoted by the same reference numerals, and repeated description thereof will be omitted.
[0009]
A first embodiment of the present invention will be described with reference to FIGS. First, the connection according to the first embodiment of the present invention will be described. FIG. 1 is a diagram showing a first embodiment of the present invention. In FIG. 1, the active transistors 2a and 2b form a differential pair, and their sources are connected to the drain of the current control transistor 3. A current control terminal 6 is connected to the gate of the current control transistor 3, and a negative power supply terminal 8 is connected to the source. The drains of the active transistors 2a and 2b are connected to a pair of load resistors 1a and 1b, respectively, and the load resistors 1a and 1b are connected to a pair of load inductors 11a and 11b, respectively. The other ends of the load inductors 11 a and 11 b are connected to the positive power supply terminal 7. A coupling capacitance 20 is connected between a connection point 21a between the load resistance 1a and the load inductor 11a and a connection point 21b between the load resistance 1b and the load inductor 11b. That is, the load inductors 11 a and 11 b are connected via the coupling capacitance 20. Input terminals 4a and 4b are connected to the gates of the active transistors 2a and 2b, respectively, and output terminals 5a and 5b are connected to a connection point between the drains of the active transistors 2a and 2b and the load resistors 1a and 1b.
[0010]
Since the differential electronic circuit of FIG. 1 is configured symmetrically, the frequency characteristics of the impedances from the paired connection points 21a and 21b to the positive power supply terminal 7 have the same characteristics due to the symmetry of the circuit. .
[0011]
For example, in the case of an integrated circuit on a semiconductor substrate, the coupling capacitance 20 is specialized as a capacitance between metal wirings or a capacitance element such as a metal-insulator-metal (MIM) or a poly-insulator-poly (PIP). Layers can be used.
[0012]
FIG. 2 shows the frequency characteristics of the output gain of the circuit shown in FIG. 1 showing the first embodiment and FIG. 8 showing the conventional example. In FIG. 2, a curve 30 shows the characteristic of the circuit of FIG. 1, and a curve 31 shows the characteristic of the circuit of FIG. The curve 30 secures a constant gain up to high frequencies as compared to the curve 31, and the high-frequency characteristics are improved.
[0013]
The principle of improving the high frequency characteristics will be described. In the circuit of FIG. 1, the impedance from the connection point 21a to the positive power supply terminal 7 is a combined impedance of the load inductor 11a and the series connection of the coupling capacitor 20 and the load inductor 11b in parallel with the load inductor 11a. On the other hand, in the circuit of FIG. 8, the impedance from the connection point 21a to the positive power supply terminal 7 is only the load inductor 11a. FIG. 3A shows a portion of a series connection circuit portion of the load inductor 11a of FIG. 1 and the coupling capacitor 20 and the load inductor 11b in parallel with the load inductor 11a. FIG. 3B shows a circuit extracted from the connection point 21a to the positive power supply terminal 7 in FIG. FIG. 4 is a graph in which the impedance between the connection point 21a and the positive power supply terminal 7 in the circuits of FIGS. 3A and 3B is plotted with respect to the signal frequency. A curve 40 represents the impedance of the circuit of FIG. 3A, and a curve 41 represents the impedance of the circuit of FIG. In the circuit of FIG. 3A, a parallel resonance circuit including the coupling capacitor 20 and the load inductors 11a and 11b is formed, and therefore, the curve 40 has a larger rate of impedance increase in the high frequency region than the curve 41. That is, by connecting the coupling capacitor 20 as shown in FIG. 1, the load impedance in the high frequency region increases as compared with the circuit of FIG. 8, and as a result, the gain in the high frequency region increases, so that the frequency characteristics are improved.
[0014]
FIG. 5 shows a second embodiment of the present invention, in which connection points 21a and 21b are coupled by a variable coupling capacitance 50. That is, the load inductors 11a and 11b are connected via the variable coupling capacitance 50. The peaking amount can be controlled by controlling the variable coupling capacitance 50 with an external voltage. In addition, by controlling the output from a feedback circuit inside the semiconductor integrated circuit, it is possible to correct a change in the frequency characteristic due to a device variation or a power supply voltage variation.
[0015]
FIG. 6 shows a third embodiment of the present invention. By arranging a pair of load inductors 11a and 11b close to each other, the parasitic capacitance between the load inductors 11a and 11b can be reduced without using a special capacitance element. By using the coupling capacitor 60 as a coupling capacitor, that is, connecting the load inductors 11a and 11b via the parasitic capacitor 60, the same effect as in the first embodiment can be obtained.
[0016]
【The invention's effect】
According to the first aspect of the present invention, since a pair of load inductors are connected via a capacitor, an inductor having a small inductance required to obtain the same amount of peaking effect can be used, and the area of the differential electronic circuit can be reduced. Can be reduced in size.
[0017]
According to the second aspect of the present invention, since the coupling capacitance is a variable coupling capacitance, the peaking amount can be controlled by controlling the variable coupling capacitance with an external voltage.
[Brief description of the drawings]
FIG. 1 is a diagram showing a first embodiment of the present invention.
FIG. 2 is a diagram illustrating frequency characteristics of an output gain of the differential electronic circuit according to the first embodiment of the present invention and a conventional example.
FIG. 3 is a diagram showing load impedance.
FIG. 4 is a diagram showing frequency characteristics of the load impedance of FIG. 3;
FIG. 5 is a diagram showing a second embodiment of the present invention.
FIG. 6 is a diagram showing a third embodiment of the present invention.
FIG. 7 shows a conventional differential amplifier circuit.
FIG. 8 shows a conventional differential amplifier circuit using peaking.
[Explanation of symbols]
1a, 1b load resistances 11a, 11b load inductors 2a, 2b active transistor 20 coupling capacitance 50 variable coupling capacitance 60 parasitic capacitance between inductors

Claims (2)

A pair of transistors, a pair of load resistors and a pair of load inductors, one end of each of the pair of load resistors is connected to each of the pair of transistors, and the other end of each of the pair of load resistors is connected to the pair of load resistors. A differential electronic circuit connected to each of the load inductors, wherein the pair of load inductors are connected via a capacitor. 2. The differential electronic circuit according to claim 1, wherein the capacitance between the pair of load inductors is a variable capacitance.

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