JP2004213002A - Organic electroluminescent device and method of manufacturing the same - Google Patents
Organic electroluminescent device and method of manufacturing the same Download PDFInfo
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Abstract
【課題】 高開口率で、生産収率が高く、製造組立が容易である等の有利を有する有機電界発光素子とその製造方法を提供する。
【解決手段】 本発明の有機電界発光素子は、第1基板に薄膜トランジスタアレー部を構成し、第1基板と合着される第2基板に有機発光部を構成する二重プレイト(dual plate)構造である。前記薄膜トランジスタアレー部に構成された第1連結電極と前記発光部の第2電極が接触されるようにし、前記連結電極を通して薄膜トランジスタアレー部の信号が前記発光部に伝達されるようにする。なお、前記発光部の第1電極に信号を伝達する共通電極は薄膜トランジスタアレー部の外廓に構成し、共通電極と前記第1電極を連結する第2連結電極が更に構成される。
前述した構成で、第2連結電極と前記発光部の接触を防止するために、前記薄膜トランジスタアレー部の外廓、即ち共通電極が形成された外側にダミー画素を追加して形成する。前記ダミー画素は前記第2電極を形成する工程中使用されるマスクのアラインマージンの役割をする。
【選択図】 図6
PROBLEM TO BE SOLVED: To provide an organic electroluminescent device having advantages such as a high aperture ratio, a high production yield, and easy manufacturing and assembly, and a method for manufacturing the same.
SOLUTION: The organic electroluminescent device of the present invention has a double plate structure in which a thin film transistor array portion is formed on a first substrate, and an organic light emitting portion is formed on a second substrate bonded to the first substrate. It is. A first connection electrode of the thin film transistor array unit and a second electrode of the light emitting unit are in contact with each other, and a signal of the thin film transistor array unit is transmitted to the light emitting unit through the connection electrode. In addition, a common electrode for transmitting a signal to the first electrode of the light emitting unit is configured outside the thin film transistor array unit, and a second connection electrode connecting the common electrode and the first electrode is further configured.
In the above-described configuration, in order to prevent contact between the second connection electrode and the light emitting unit, a dummy pixel is additionally formed on the outer periphery of the thin film transistor array unit, that is, outside the common electrode. The dummy pixel serves as an alignment margin of a mask used in forming the second electrode.
[Selection] Fig. 6
Description
本発明は有機電界発光素子に関するもので、特に、第1基板には薄膜トランジスタアレー部を構成し、第1基板と合着される第2基板には有機電界発光部を構成した、二重プレイト構造の有機電界発光素子(DPOLED)とその製造方法に関するものである。 The present invention relates to an organic electroluminescent device, and more particularly, to a double plate structure in which a first substrate constitutes a thin film transistor array portion and a second substrate joined to the first substrate constitutes an organic electroluminescent portion. And an organic electroluminescent device (DPOLED).
一般的に、有機電界発光素子は、電子−注入電極(electron−cathode)と正孔−注入電極(hole-anode)からそれぞれ電子(electron)と正孔(hole)を発光層内部に注入させて、注入された電子(electron)と正孔(hole)が結合したエキサイトン(exciton)が励起状態から基底状態に落ちる時発光する素子である。 In general, an organic electroluminescent device has an electron-injection electrode (electron-cathode) and a hole-injection electrode (hole-anode) in which electrons (electrons) and holes (holes) are respectively injected into a light emitting layer. A device that emits light when an exciton, in which injected electrons and holes are combined, falls from an excited state to a ground state.
このような原理により、従来の薄膜液晶表示素子とは異なり別途の光源を必要としないので、素子の体積と重量を減らすことができる長所がある。 According to this principle, unlike the conventional thin film liquid crystal display device, a separate light source is not required, so that there is an advantage that the volume and weight of the device can be reduced.
なお、有機電界発光素子は高品位パネル特性(低電力、高揮度、高反応速度、低重量)を現わす。このような特性のために、OELDは移動通信端末機、CNS、PDA、Camcorder、Palm PC等大部分の家庭用電子応用製品に使用することができる強力な次世代表示裝置と考えられている。
なお、製造工程が単純であるために生産原価を既存のLCDより多く減らすことができる長所もある。
Note that the organic electroluminescent device exhibits high quality panel characteristics (low power, high volatility, high reaction rate, low weight). Due to these characteristics, OELD is considered to be a powerful next-generation display device that can be used in most home electronic application products such as mobile communication terminals, CNS, PDAs, Camcorders, and Palm PCs.
In addition, there is an advantage that the production cost can be reduced more than the existing LCD because the manufacturing process is simple.
このような有機電界発光素子を駆動させる方式は、受動マトリクス型(passive matrix type)と能動マトリクス型(active matrix type)に分けることができる。 The method of driving such an organic electroluminescent device can be classified into a passive matrix type and an active matrix type.
前記受動マトリクス型有機電界発光素子は、その構成が単純であり製造方法もなお単純であるが高い消費電力と表示素子の大面積化に難しさがあり、配線の数が増加すればするほど開口率が低下する短所がある。 The passive matrix organic electroluminescent device has a simple structure and a simple manufacturing method, but has a difficulty in increasing the area of the display device with high power consumption, and the opening increases as the number of wirings increases. There is a disadvantage that the rate decreases.
反面、能動マトリクス型有機電界発光素子は、高い発光効率と高画質を提供することができる長所がある。 On the other hand, the active matrix type organic electroluminescent device has advantages that it can provide high luminous efficiency and high image quality.
図1は従来の有機電界発光素子の構成を概略的に図示した図面である。 FIG. 1 is a diagram schematically illustrating a configuration of a conventional organic electroluminescent device.
図示したように、有機電界発光素子(10)は透明な第1基板(12)の上部に薄膜トランジスタ(T)を含む薄膜トランジスタアレー部(14)と、薄膜トランジスタアレー部(14)と電気的に連結される第1電極(16)と、有機発光層(18)と、第2電極(20)が構成される。 As shown, the organic electroluminescent device (10) is electrically connected to a thin film transistor array (14) including a thin film transistor (T) on a transparent first substrate (12) and a thin film transistor array (14). A first electrode (16), an organic light emitting layer (18), and a second electrode (20).
この時、前記有機発光層(18)は赤(R)、緑(G)、青(B)のカラーを表現するようになるが、一般的な方法では前記各画素(P)毎に赤、緑、青色を発光する別途の有機物質をパターン化して使用する。 At this time, the organic light emitting layer (18) expresses the colors of red (R), green (G), and blue (B), but in a general method, red, A separate organic material that emits green and blue light is patterned and used.
前記第1基板(12)は、吸湿剤(22)が付着された第2基板(28)とシーラント(26)を通して合着されることでカプセル化された有機電界発光素子(10)が完成する。 The first substrate (12) is bonded through the sealant (26) to the second substrate (28) to which the hygroscopic agent (22) is attached to complete the encapsulated organic electroluminescent device (10). .
この時、前記吸湿剤(22)はカプセル内部に浸透することがある水分と酸素を除去するためのものであり、前記第2基板(28)の一部を蝕刻し、その蝕刻された部分に吸湿剤(22)を満たしてテープ(25)で固定する。 At this time, the desiccant (22) is for removing moisture and oxygen that may permeate into the capsule, and etches a part of the second substrate (28). Fill with moisture absorbent (22) and secure with tape (25).
図2は従来の有機電界発光素子に構成される薄膜トランジスタアレー部を概略的に図示した平面図である。 FIG. 2 is a plan view schematically showing a thin film transistor array unit included in a conventional organic electroluminescent device.
一般的に、能動マトリクス型薄膜トランジスタアレー部は、第1基板(12)に定義された多数の画素毎にスイッチング素子(TS)と駆動素子(TD)とストレージキャパシタ(storage capacitor : CST)が構成され、動作の特性に従い前記スイッチング素子(TS)または駆動素子(TD)はそれぞれ一つ以上の薄膜トランジスタの組合せで構成することができる。 Generally, an active matrix type thin film transistor array unit includes a switching element (T S ), a driving element (T D ), and a storage capacitor (C ST ) for each of a large number of pixels defined on the first substrate (12). The switching element (T S ) or the driving element (T D ) can be configured by a combination of one or more thin film transistors, respectively, according to operation characteristics.
この時、前記第1基板(12)は透明な絶縁基板を使用し、その材質としてはガラスかプラスチックの種を挙げることができる。 At this time, the first substrate (12) uses a transparent insulating substrate, and the material thereof may be glass or plastic.
図示したように、第1基板(12)上に互いに所定間隔離隔して一方向に構成されたゲート配線(32)と、ゲート配線(32)に絶縁膜を間に置いて交叉するデータ配線(34)が構成される。 As shown in the figure, a gate wiring (32) formed on a first substrate (12) and spaced apart from each other by a predetermined distance and a data wiring (32) intersecting the gate wiring (32) with an insulating film interposed therebetween. 34) is configured.
同時に、前記データ配線(34)と平行に離隔されゲート配線(32)と交叉する電源配線(35)が構成される。 At the same time, a power supply wiring (35) is formed parallel to the data wiring (34) and intersecting with the gate wiring (32).
前記スイッチング素子(TS)と駆動素子(TD)として、それぞれゲート電極(36,38)とアクティブ層(40,42)とソース電極(46,48)およびドレイン電極(50,52)を含む薄膜トランジスタが使用される。 The switching element (T S ) and the driving element (T D ) include a gate electrode (36, 38), an active layer (40, 42), a source electrode (46, 48), and a drain electrode (50, 52), respectively. Thin film transistors are used.
前述した構成で、前記スイッチング素子(TS)のゲート電極(36)は前記ゲート配線(32)と連結され、前記ソース電極(46)は前記データ配線(34)と連結される。 In the above-described configuration, the gate electrode (36) of the switching element (T S ) is connected to the gate line (32), and the source electrode (46) is connected to the data line (34).
前記スイッチング素子(TS)のドレイン電極(50)は、前記駆動素子(TD)のゲート電極(38)とコンタクトホール(54)を通して連結される。 A drain electrode (50) of the switching element (T S ) is connected to a gate electrode (38) of the driving element (T D ) through a contact hole (54).
前記駆動素子(TD)のソース電極(48)は、前記電源配線(35)とコンタクトホール(56)を通して連結される。 A source electrode (48) of the driving element (T D ) is connected to the power line (35) through a contact hole (56).
なお、前記駆動素子(TD)のドレイン電極(52)は画素部(P)に構成された第1電極(16)と接触するように構成される。 Note that the drain electrode (52) of the driving element (T D ) is configured to be in contact with the first electrode (16) provided in the pixel portion (P).
この時、前記電源配線(35)とその下部の多結晶シリコン層であるキャパシタ第1電極(15)は絶縁膜を間に置いて重畳されてストリジキャパシタ(CST)を形成する。 At this time, the power supply wiring (35) and the capacitor first electrode (15), which is a polycrystalline silicon layer thereunder, are overlapped with an insulating film therebetween to form a storage capacitor (C ST ).
以下、図3は前述したようなアレー構成を有する有機電界発光素子の平面構成を概略的に図示した平面図である。 Hereinafter, FIG. 3 is a plan view schematically illustrating a planar configuration of the organic electroluminescent device having the above-described array configuration.
図示したように、第1基板(12)の表示領域の一側にはデータパッド部(E)が構成され、データパッド部(E)と平行でない表示領域の両側にはゲートパッド部(F1,F2)がそれぞれ構成される。
前記データパッド部(E)と平行な表示領域の一側には共通電極(39)を構成する。
As shown, a data pad section (E) is formed on one side of the display area of the first substrate (12), and a gate pad section (F1, F1) is formed on both sides of the display area that is not parallel to the data pad section (E). F2) are respectively configured.
A common electrode (39) is formed on one side of the display area parallel to the data pad section (E).
この時、前記共通電極(39)は、前記第2電極(陰極電極であり共通電圧を入力する電極(図1の20)に共通電圧を印加して第2電極の電位を維持するような役割をする。 At this time, the common electrode (39) serves to maintain the potential of the second electrode by applying a common voltage to the second electrode (a cathode electrode and an electrode (20 in FIG. 1) for inputting a common voltage). do.
以下、図4aおよび4bを参照して従来の有機電界発光素子の断面構成を説明する。 Hereinafter, a cross-sectional configuration of a conventional organic electroluminescent device will be described with reference to FIGS. 4A and 4B.
図4aは図2のIVa-IVa線に沿って切断した断面図であり、図4bは図3のIVb-IVb線に沿って切断した断面図である。 4A is a cross-sectional view taken along the line IVa-IVa of FIG. 2, and FIG. 4B is a cross-sectional view taken along the line IVb-IVb of FIG.
図示したように、有機電界発光素子にはゲート電極(38)と、アクティブ層(42)と、ソース電極(48)と、ドレイン電極(52)とを含む駆動素子である薄膜トランジスタ(TD)が構成され、駆動素子(TD)の上部には、絶縁膜(57)を間に置いて駆動素子(TD)のドレイン電極(52)と接触する第1電極(陽極電極)(16)と、第1電極(16)の上部に特定な色の光を発光する発光層(18)と、発光層(18)の上部に第2電極(陰極電極)(20)が構成される。 As illustrated, the organic electroluminescent device includes a thin film transistor (T D ) as a driving device including a gate electrode (38), an active layer (42), a source electrode (48), and a drain electrode (52). And a first electrode (anode electrode) (16) that is in contact with the drain electrode (52) of the drive element (T D ) with an insulating film (57) interposed therebetween on the drive element (T D ). A light emitting layer (18) that emits light of a specific color is formed on the first electrode (16), and a second electrode (cathode electrode) (20) is formed on the light emitting layer (18).
前記第1電極(16)と、発光層(18)と、第2電極(20)とで電界発光ダイオード(DEL)を構成する。 The first electrode (16), the light emitting layer (18), and the second electrode (20) constitute an electroluminescent diode ( DEL ).
前記駆動素子(TD)とは並列にストレージキャパシタ(CST)が構成され、ソース電極(56)はストレージキャパシタ(CST)の第2電極(電源配線)(35a)と接触して構成され、前記第2電極(35a)の下部には前記キャパシタ第1電極(15)が構成される。 A storage capacitor (C ST ) is configured in parallel with the driving element (T D ), and a source electrode (56) is configured to be in contact with a second electrode (power supply wiring) (35a) of the storage capacitor (C ST ). The capacitor first electrode (15) is formed below the second electrode (35a).
前記駆動素子(TD)とストレージキャパシタ(CST)と有機発光層(18)が構成された基板の全面には第2電極(20)が構成される。 A second electrode (20) is formed on the entire surface of the substrate on which the driving element (T D ), the storage capacitor (C ST ), and the organic light emitting layer (18) are formed.
前述した構成で、第1基板(12)の外廓には前記第2電極(20)に共通電圧を印加する共通電極(39)を前記駆動素子およびスイッチング素子のゲート電極と同一層同一物質で形成する。 In the above-described configuration, a common electrode (39) for applying a common voltage to the second electrode (20) is formed on the outer periphery of the first substrate (12) with the same layer and the same material as the gate electrodes of the driving element and the switching element. Form.
前記共通電極(39)は、上部に構成された多数の絶縁膜を蝕刻した第1コンタクトホール(50)と第2コンタクトホール(52)により一部が露出され、前記第2電極(20)は、第1コンタクトホール(50)を通して共通電極(39)と接触する構成であり、前記第2コンタクトホール(52)は外部に構成される電源部で前記第2電極(20)に伝達すべき共通電圧を入力するために、外部の電源配線(未図示)と共通電極を連結するための構成である。 The common electrode (39) is partially exposed by a first contact hole (50) and a second contact hole (52) formed by etching a plurality of insulating films formed thereon, and the second electrode (20) is The first contact hole (50) is in contact with the common electrode (39), and the second contact hole (52) is a power supply unit externally connected to the common electrode to be transmitted to the second electrode (20). This is a configuration for connecting an external power supply wiring (not shown) and a common electrode in order to input a voltage.
前述したような構成を通して従来の有機電界発光素子を製作することができる。 Through the above-described configuration, a conventional organic electroluminescent device can be manufactured.
しかし、従来のように、単一の基板上に薄膜トランジスタアレー部と発光部を形成する場合、薄膜トランジスタの収率と有機発光層の収率の2倍が薄膜トランジスタと有機発光層を形成したパネルの収率を決定する。 However, when a thin-film transistor array section and a light-emitting section are formed on a single substrate as in the conventional case, twice the yield of the thin-film transistor and the yield of the organic light-emitting layer are twice as large as that of the panel on which the thin-film transistor and the organic light-emitting layer are formed. Determine the rate.
従って、従来のように構成された基板は、前記有機発光層の収率によりパネルの収率が大きく制限される問題点を有していた。 Therefore, the conventional substrate has a problem that the yield of the panel is greatly limited by the yield of the organic light emitting layer.
特に、薄膜トランジスタが良好に形成されたとしても、1000程度の薄膜を使用する有機発光層の形成時に、異物其の他の要素により不良が発生するとパネルは不良等級と判定される。
これにより良品の薄膜トランジスタを製造するのに要した諸経費および原材料費の損失に繋がり、全体的な収率が低下する問題点を有していた。
In particular, even if a thin film transistor is formed satisfactorily, if a defect occurs due to a foreign substance or other factors during the formation of an organic light emitting layer using a thin film of about 1000, the panel is determined to be defective.
This leads to a loss of various costs and raw material costs required for manufacturing a good thin film transistor, and has a problem that the overall yield is reduced.
なお、前述したような下部発光方式は、インカプセレイションによる安定性および工程の自由度が高い反面、開口率の制限があり高解像度製品に適用するのが難しい問題点があった。 In addition, the above-described bottom emission method has a problem in that it is difficult to apply to a high resolution product due to a limitation of an aperture ratio, while having high stability and a high degree of freedom of a process due to encapsulation.
また、先に説明していないが、上部発光方式は光が上部に出るために光が出ていく方向が下部の薄膜トランジスタアレー部と無関係で薄膜トランジスタ設計が容易であり、開口率向上が可能であるために製品寿命の側面で有利であるが、既存の上部発光方式構造では、有機電界発光層上部に通常的に陰極が位置するので材料選択の幅が狭く、透過度が制限されて光効率が低下する点と、光透過度の低下を最小化するために薄膜型保護膜を構成しなければならない場合、外気を充分に遮断することができない問題点があった。 Although not described above, in the upper light emitting method, since the light is emitted to the upper part, the direction in which the light is emitted is irrelevant to the lower thin film transistor array part, so that the thin film transistor design is easy and the aperture ratio can be improved. However, in the existing top emission type structure, the cathode is usually located above the organic electroluminescent layer, so that the material selection is narrow, the transmittance is limited, and the light efficiency is reduced. When a thin film type protective film must be formed in order to minimize the decrease in light transmittance, there is a problem that the outside air cannot be sufficiently shut off.
本願発明はこのような問題点を解決するために提案されたもので、前記薄膜トランジスタアレー部と発光部を別途の基板に構成した後、これを合着した上部発光方式の有機電界発光素子とその製造方法を提案する。 The present invention has been proposed to solve such problems, after forming the thin film transistor array unit and the light emitting unit on a separate substrate, the top emitting organic electroluminescent device that is combined with this, and the A manufacturing method is proposed.
前述したような二重プレイト構造の有機電界発光素子は、前記薄膜トランジスタアレー部の駆動素子と前記発光部の第2電極を連結する第1連結電極を構成し、前記アレー基板の外廓に構成される共通電極を既存より上位層に構成する。なお前記共通電極と上部基板に構成された第1電極(陽極電極)との連結を容易にするために第2連結電極を更に構成する。 The organic electroluminescent device having the double plate structure as described above constitutes a first connection electrode that connects a driving element of the thin film transistor array unit and a second electrode of the light emitting unit, and is configured on an outer periphery of the array substrate. The common electrode is configured in a higher layer than the existing one. Note that a second connection electrode is further formed to facilitate connection between the common electrode and a first electrode (anode electrode) formed on the upper substrate.
この時、前記発光素子の平面的な構成で、前記共通電極の内側に対応する表示部の境界に隔壁を有するダミー画素(dummy pixel)を追加して構成する。 At this time, a dummy pixel having a partition at the boundary of the display unit corresponding to the inside of the common electrode is added to the planar configuration of the light emitting element.
前記ダミー画素に対応するアレー基板には、スイッチングおよび駆動素子を構成しない。従って工程中、前記発光部の第1電極と第2電極が工程上の誤差により接触する不良が発生してもこれは発光動作に影響を及ぼさない。 No switching and driving elements are formed on the array substrate corresponding to the dummy pixels. Therefore, during the process, even if a defect occurs in which the first electrode and the second electrode of the light emitting unit come into contact due to an error in the process, this does not affect the light emitting operation.
なぜならば、前記第2電極は画素領域毎に独立的にパターン化されるばかりでなく、前記ダミー画素に構成された第2電極は下部の駆動素子と連結されていないので、電気的にフローティングされた状態であるためである。 This is because not only is the second electrode independently patterned for each pixel area, but also the second electrode formed in the dummy pixel is electrically connected to the lower drive element, so that it is electrically floating. This is because it is in a state of being left.
前述したような構成は、従来の有機電界発光素子の問題を解決することができ、なお共通電極と連結される発光部の第1電極が前記発光部の第2電極と接触して現われる接触不良を防止することができる。 The configuration as described above can solve the problem of the conventional organic electroluminescent device, and the first electrode of the light emitting unit connected to the common electrode contacts with the second electrode of the light emitting unit. Can be prevented.
従って、高開口率および高画質を具現する有機電界発光素子を製作することができ、収率を改善することができる。 Accordingly, an organic electroluminescent device having a high aperture ratio and high image quality can be manufactured, and the yield can be improved.
前述したような目的を達成するための本発明の特徴に従う有機電界発光素子は互いに対向して離隔されており、多数の画素領域とダミー画素領域を含む表示部と周辺部を有する第1基板と第2基板と;前記第1基板の内面に形成され、前記多数の画素領域のそれぞれと隣接する多数の駆動薄膜トランジスタと;前記多数の駆動薄膜トランジスタのそれぞれに連結される第1連結電極と;前記第2基板の内面に形成される第1電極と;前記第1電極上部の多数の画素領域と前記ダミー画素領域のそれぞれのふちに形成される隔壁と;前記第1電極上部に形成される有機発光層と;前記有機発光層上部の前記多数の画素領域と前記ダミー画素領域のそれぞれに形成される第2電極において、前記多数の画素領域のそれぞれに形成される前記第2電極は、前記第1連結電極と連結される第2電極と;前記第1基板と第2基板を付着させるシーラントを含む。 The organic electroluminescent device according to the features of the present invention for achieving the above-described object is spaced apart from each other, and has a first substrate having a display portion and a peripheral portion including a large number of pixel regions and dummy pixel regions, and A second substrate; a plurality of driving thin film transistors formed on an inner surface of the first substrate and adjacent to each of the plurality of pixel regions; a first connection electrode connected to each of the plurality of driving thin film transistors; (2) a first electrode formed on the inner surface of the substrate; a plurality of pixel regions on the first electrode and partitions formed on respective edges of the dummy pixel region; and an organic light-emitting formed on the first electrode. A second electrode formed in each of the plurality of pixel regions and the dummy pixel region above the organic light emitting layer, wherein the second electrode formed in each of the plurality of pixel regions is the first electrode, Connecting electrode A second electrode connected; includes a sealant to attach the first substrate and the second substrate.
前記第1基板内面の周辺部に形成されるパッドと;前記パッドに連結され、前記第1連結電極と同一層、同一物質で構成される第2連結電極を更に含むことができる。 The semiconductor device may further include a pad formed on a peripheral portion of the inner surface of the first substrate; and a second connection electrode connected to the pad and having the same layer and the same material as the first connection electrode.
前記ダミー画素領域の第2電極は、電気的にフローティング(floating)され、前記多数の駆動薄膜トランジスタのそれぞれは、駆動アクティブ層、駆動ゲート電極、駆動ソースおよび駆動ドレイン電極を含む。 The second electrode of the dummy pixel region is electrically floating, and each of the plurality of driving thin film transistors includes a driving active layer, a driving gate electrode, a driving source and a driving drain electrode.
前記多数の駆動薄膜トランジスタのそれぞれは、駆動アクティブ層、駆動ゲート電極、駆動ソースおよび駆動ドレイン電極を含み、前記パッドは、前記駆動ソースおよび駆動ドレイン電極と同一な物質で構成される。 Each of the plurality of driving thin film transistors includes a driving active layer, a driving gate electrode, a driving source and a driving drain electrode, and the pad is formed of the same material as the driving source and the driving drain electrode.
前記多数の駆動薄膜トランジスタに連結され、それぞれがスイッチングアクティブ層、スイッチングゲート電極、スイッチングソースおよびスイッチングドレイン電極を含む多数のスイッチング薄膜トランジスタを更に含むことができ、前記駆動アクティブ層とスイッチングアクティブ層は、多結晶シリコンで構成することができる。 The driving thin film transistor may further include a plurality of switching thin film transistors connected to the plurality of driving thin film transistors and each including a switching active layer, a switching gate electrode, a switching source and a switching drain electrode. It can be made of silicon.
前記スイッチングソース電極は前記データ配線と連結され、前記スイッチングドレイン電極は前記駆動ゲート電極と連結され、前記スイッチングゲート電極はゲート配線と連結される。 The switching source electrode is connected to the data line, the switching drain electrode is connected to the driving gate electrode, and the switching gate electrode is connected to a gate line.
前記駆動薄膜トランジスタと連結される電源配線を更に含むことができ、前記駆動薄膜トランジスタに連結されるストレージキャパシタを更に含むことができる。 The display device may further include a power line connected to the driving thin film transistor, and may further include a storage capacitor connected to the driving thin film transistor.
前記第1電極は前記有機発光層に正孔を注入する陽極(anode)であり、前記第2電極は前記有機発光層電子を注入する陰極(cathode)であり、前記第1電極はインジウム-錫-酸化物(ITO)とインジウム-亜鉛-酸化物(IZO)のうちの一つで構成され、前記第2電極はカルシウム(Ca)、アルミニウム(Al)、マグネシウム(Mg)のうちの一つで構成される。 The first electrode is an anode for injecting holes into the organic light emitting layer, the second electrode is a cathode for injecting electrons into the organic light emitting layer, and the first electrode is indium-tin. -Oxide (ITO) and one of indium-zinc-oxide (IZO), the second electrode is one of calcium (Ca), aluminum (Al), magnesium (Mg). Be composed.
前記第1連結電極と第2連結電極間に形成され、前記第2電極と同一な物質で構成される補助電極を更に含むことができ、前記ダミー画素領域は前記多数の画素領域を取り囲み、前記第1電極と前記隔壁中少なくとも一つの間に形成される補助絶縁層を更に含むことができる。 The semiconductor device may further include an auxiliary electrode formed between the first connection electrode and the second connection electrode and made of the same material as the second electrode, wherein the dummy pixel region surrounds the plurality of pixel regions. The liquid crystal display may further include an auxiliary insulating layer formed between the first electrode and at least one of the partition walls.
一方、本発明に従う有機電界発光素子の製造方法は、多数の画素領域とダミー画素領域を含む表示部と周辺部を有する第1基板を準備する段階と;前記第1基板上部に前記多数の画素領域のそれぞれと隣接した多数の駆動薄膜トランジスタを形成する段階と;前記多数の駆動薄膜トランジスタのそれぞれに連結される第1連結電極を形成する段階と;第2基板上部に第1電極を形成する段階と;前記第1電極上部の多数の画素領域と前記ダミー画素領域のそれぞれのふちに隔壁を形成する段階と;前記第1電極上部に有機発光層を形成する段階と;前記有機発光層上部の前記多数の画素領域と前記ダミー画素領域のそれぞれに第2電極を形成する段階に於いて、前記多数の画素領域のそれぞれに形成される前記第2電極が前記第1連結電極と連結されるように第2電極を形成する段階と;前記第1基板と第2基板をシーラントで付着させる段階を含む。 Meanwhile, the method for manufacturing an organic electroluminescent device according to the present invention includes the steps of: preparing a first substrate having a display portion and a peripheral portion including a plurality of pixel regions and a dummy pixel region; and forming the plurality of pixels on the first substrate. Forming a plurality of driving thin film transistors adjacent to each of the regions; forming a first connection electrode connected to each of the plurality of driving thin film transistors; and forming a first electrode on the second substrate. Forming a plurality of pixel regions on the first electrode and partitions on each edge of the dummy pixel region; and forming an organic light emitting layer on the first electrode; and forming the organic light emitting layer on the organic light emitting layer. Forming a second electrode in each of the plurality of pixel regions and the dummy pixel region so that the second electrodes formed in each of the plurality of pixel regions are connected to the first connection electrode; 2nd Forming a; comprising the step of attaching the first substrate and the second substrate with a sealant.
前記第1基板内面の周辺部にパッドを形成する段階と;前記パッドに連結され、前記第1基板および2基板を合着する時前記第1電極と連結される第2連結電極を形成する段階を更に含むことができ、前記多数の駆動薄膜トランジスタのそれぞれは、駆動アクティブ層、駆動ゲート電極、駆動ソースおよび駆動ドレイン電極を含む。 Forming a pad around the inner surface of the first substrate; and forming a second connection electrode connected to the pad and connected to the first electrode when the first and second substrates are joined. And each of the plurality of driving thin film transistors includes a driving active layer, a driving gate electrode, a driving source and a driving drain electrode.
前記多数の駆動薄膜トランジスタのそれぞれは、駆動アクティブ層、駆動ゲート電極、駆動ソースおよび駆動ドレイン電極を含み、前記パッドは、前記駆動ソースおよび駆動ドレイン電極と同時に形成され、前記多数の駆動薄膜トランジスタに連結され、それぞれがスイッチングアクティブ層、スイッチングゲート電極、スイッチングソースおよびスイッチングドレイン電極を含む多数のスイッチング薄膜トランジスタを形成する段階を更に含むことができる。 Each of the plurality of driving thin film transistors includes a driving active layer, a driving gate electrode, a driving source and a driving drain electrode, and the pad is formed simultaneously with the driving source and driving drain electrodes and connected to the plurality of driving thin film transistors. And forming a plurality of switching thin film transistors each including a switching active layer, a switching gate electrode, a switching source and a switching drain electrode.
前記駆動アクティブ層とスイッチングアクティブ層は多結晶シリコンで構成することができ、前記スイッチングソース電極は前記データ配線と連結され、前記スイッチングドレイン電極は前記駆動ゲート電極と連結され、前記スイッチングゲート電極はゲート配線と連結される。 The driving active layer and the switching active layer may be formed of polycrystalline silicon, the switching source electrode is connected to the data line, the switching drain electrode is connected to the driving gate electrode, and the switching gate electrode is a gate. Connected to wiring.
前記駆動薄膜トランジスタと連結される電源配線を形成する段階を更に含むことができ、前記駆動薄膜トランジスタに連結されるストレージキャパシタを形成する段階を更に含むことができる。 The method may further include forming a power line connected to the driving thin film transistor, and further including forming a storage capacitor connected to the driving thin film transistor.
前記第1電極は前記有機発光層に正孔を注入する陽極(anode)であり、前記第2電極は前記有機発光層に電子を注入する陰極(cathode)であり、前記第1電極はインジウム-錫-酸化物(ITO)とインジウム-亜鉛-酸化物(IZO)のうちの一つで構成され、前記第2電極はカルシウム(Ca)、アルミニウム(Al)、マグネシウム(Mg)のうちの一つで構成される。 The first electrode is an anode for injecting holes into the organic light emitting layer, the second electrode is a cathode for injecting electrons into the organic light emitting layer, and the first electrode is indium. The second electrode is composed of one of tin-oxide (ITO) and indium-zinc-oxide (IZO), and the second electrode is one of calcium (Ca), aluminum (Al), and magnesium (Mg). It consists of.
前記第1連結電極と第2連結電極間に、前記第2電極と同時に補助電極を形成する段階を更に含むことができ、前記ダミー画素領域は前記多数の画素領域を取り囲む。 The method may further include forming an auxiliary electrode between the first connection electrode and the second connection electrode at the same time as the second electrode, wherein the dummy pixel region surrounds the plurality of pixel regions.
前記第1電極と前記隔壁のうちの少なくとも一つの間に補助絶縁層を形成する段階を更に含むことができる。 The method may further include forming an auxiliary insulating layer between the first electrode and at least one of the barrier ribs.
一方、本発明に従う有機電界発光素子の製造方法は、多数の画素領域とダミー画素領域を含む表示部と周辺部を有する第1基板上部に第1絶縁層を形成する段階と;前記第1絶縁層上部の前記多数の画素領域のそれぞれに、多結晶シリコンで構成されソースおよびドレイン領域を含むアクティブ層を形成する段階と;前記アクティブ層上部に第2絶縁層を形成する段階と;前記アクティブ層に対応する前記第2絶縁層上部にゲート電極を形成する段階と;前記ゲート電極上部に第3絶縁層を形成する段階と;前記第3絶縁層上部に、前記ソース領域を露出させる第1コンタクトホールと前記ドレイン領域を露出させる第2コンタクトホールを有する第4絶縁層を形成する段階と;前記第4絶縁層上部に、前記第1コンタクトホールを通して前記ソース領域に連結されるソース電極と、前記第2コンタクトホールを通して前記ドレイン領域に連結されるドレイン電極を形成する段階と;前記ソースおよびドレイン電極上部に、前記ドレイン電極を露出させる第3コンタクトホールを有する第5絶縁層を形成する段階と;前記第5絶縁層上部に、前記第3コンタクトホールを通して前記ドレイン電極と連結される第1連結電極を形成する段階と;前記表示部と周辺部を有する第2基板上部に第1電極を形成する段階と;前記第1電極上部の多数の画素領域と前記ダミー画素領域のそれぞれのふちに隔壁を形成する段階と;前記第1電極上部に有機発光層を形成する段階と;前記有機発光層上部の前記多数の画素領域のそれぞれに第2電極を形成する段階と;シーラントを利用して前記第1連結電極が前記第2電極と接触するように前記第1基板と第2基板を付着させる段階を含む。 Meanwhile, the method of manufacturing an organic electroluminescent device according to the present invention includes the steps of: forming a first insulating layer on a first substrate having a display portion and a peripheral portion including a plurality of pixel regions and a dummy pixel region; Forming an active layer made of polycrystalline silicon and including source and drain regions in each of the plurality of pixel regions above the layer; forming a second insulating layer above the active layer; Forming a gate electrode on the second insulating layer corresponding to: a step of forming a third insulating layer on the gate electrode; and a first contact exposing the source region on the third insulating layer. Forming a fourth insulating layer having a hole and a second contact hole exposing the drain region; and connecting to the source region through the first contact hole above the fourth insulating layer. Forming a source electrode and a drain electrode connected to the drain region through the second contact hole; a fifth insulating layer having a third contact hole on the source and drain electrodes to expose the drain electrode Forming a first connection electrode connected to the drain electrode through the third contact hole on the fifth insulating layer; and forming a first connection electrode on the second substrate having the display portion and the peripheral portion. Forming a first electrode; forming a plurality of pixel regions on the first electrode and forming partitions on respective edges of the dummy pixel region; and forming an organic light emitting layer on the first electrode. Forming a second electrode in each of the plurality of pixel regions on the organic light emitting layer; and a first substrate such that the first connection electrode contacts the second electrode using a sealant. Comprising the step of depositing a second substrate.
前記第1絶縁層、第3絶縁層、第4絶縁層および第5絶縁層は前記第1基板内面の前記ダミー画素領域に順序とおりに形成され、前記第4絶縁層上部の周辺部にパッドを形成する段階において、前記第5絶縁層は前記パッドを露出させる第4コンタクトホールおよび5コンタクトホールを有するようにパッドを形成する段階と;前記第5絶縁層上部に、前記パッドに前記第4コンタクトホールを通して連結され、前記第1基板および2基板を合着する時前記第1電極と連結される第2連結電極を形成する段階を更に含むことができる。 The first insulating layer, the third insulating layer, the fourth insulating layer, and the fifth insulating layer are sequentially formed in the dummy pixel region on the inner surface of the first substrate, and a pad is formed on a peripheral portion above the fourth insulating layer. Forming a pad so that the fifth insulating layer has a fourth contact hole and a fifth contact hole exposing the pad; and forming the fourth contact on the pad on the fifth insulating layer. The method may further include forming a second connection electrode connected to the first electrode when the first substrate and the second substrate are connected through the hole.
本発明に従う有機電界発光素子は下記のような効果がある。 The organic electroluminescent device according to the present invention has the following effects.
第1に、上部発光型であるので下部アレーパターンの形状に影響を受けないので高開口率を確保することができる。 First, since it is of the top emission type, it is not affected by the shape of the lower array pattern, so that a high aperture ratio can be ensured.
第2に、前記有機電界発光層を薄膜トランジスタアレーパターンの上部に構成せず別途に構成するために、有機電界発光層を構成する工程中前記薄膜トランジスタに及ぼすことがある影響等を考慮しなくてもよいので収率を向上させることができる。 Second, since the organic electroluminescent layer is formed separately from the upper part of the thin film transistor array pattern without being formed, it is not necessary to consider the influence that may be exerted on the thin film transistor during the process of forming the organic electroluminescent layer. Since it is good, the yield can be improved.
第3に、表示部の外廓に電気的にフローティングされたダミー画素を追加して構成することで、前記共通電極と連結するため、露出された第1電極が有機発光部の第2電極と完璧に電気的にフローティングされることができる構成である。 Third, by adding an electrically floating dummy pixel to the periphery of the display unit and connecting it to the common electrode, the exposed first electrode is connected to the second electrode of the organic light emitting unit. It is a structure that can be completely electrically floated.
即ち、前記ダミー画素は前記第2電極を形成するマスク工程時にアラインマージンの役割をする。 That is, the dummy pixel functions as an alignment margin during a mask process for forming the second electrode.
従って、工程マージン確保で工程上の収率を改善する効果と共に信号不良を防止することができる。 Therefore, it is possible to prevent the occurrence of a signal defect while securing the process margin and improving the yield in the process.
以下、貼付した図面を参照し本発明を実施するための最良の形態を説明する。 Hereinafter, the best mode for carrying out the present invention will be described with reference to the attached drawings.
本発明は二重プレイト構造の有機電界発光素子で表示部の境界にダミー画素を更に構成したことを特徴とする。 The present invention is characterized in that a dummy pixel is further formed at the boundary of the display unit in the organic electroluminescent device having a double plate structure.
図5は本発明に従う有機電界発光素子の平面構成を概略的に図示した平面図である。
図示したように、本発明に従う有機電界発光素子(99)は、薄膜トランジスタアレー部が構成された第1基板(100)と有機発光部が構成された第2基板(200)とで構成され、前記2基板(200)はシーラント(300)を通して合着される。
FIG. 5 is a plan view schematically showing a plane configuration of the organic electroluminescent device according to the present invention.
As shown in the drawing, the organic electroluminescent device (99) according to the present invention includes a first substrate (100) having a thin film transistor array portion and a second substrate (200) having an organic light emitting portion. The two substrates (200) are bonded together through the sealant (300).
前記第1基板(100)の外廓に構成され共通電圧を入力する共通電極(126)を前記第1基板(100)および第2基板(200)の合着境界にわたって構成する。 A common electrode (126), which is arranged outside the first substrate (100) and receives a common voltage, is formed over a joint boundary between the first substrate (100) and the second substrate (200).
そして、前記共通電極(126)の内側表示部の境界(G)にダミー画素(dummy pixel,PD)を更に構成する。 Further, a dummy pixel (dummy pixel, P D ) is further formed on the boundary (G) of the inner display portion of the common electrode (126).
前記ダミー画素に対応する第1基板には駆動素子とスイッチング素子を構成しない。
以下、図6を参照して前述したような平面構成を有する有機電界発光素子の概略的な断面構成を説明する。
No driving element and no switching element are formed on the first substrate corresponding to the dummy pixel.
Hereinafter, a schematic cross-sectional configuration of the organic electroluminescent device having the planar configuration as described above will be described with reference to FIG.
図6は図5のVI-VI線に沿って切断しこれを概略的に図示した断面図である。 FIG. 6 is a cross-sectional view taken along the line VI-VI of FIG. 5 and schematically illustrating the same.
(便宜上薄膜トランジスタアレー部の駆動素子と画素領域に対応する断面構成のみを連続して表示する)
図示したように、本発明に従う有機電界発光素子(99)は、透明な第1基板(100)と第2基板(200)をシーラント(sealant)(300)を通して合着し構成する。
(For convenience, only the cross-sectional configuration corresponding to the driving element and the pixel region of the thin film transistor array section is continuously displayed.)
As shown, the organic electroluminescent device (99) according to the present invention is configured by bonding a transparent first substrate (100) and a second substrate (200) through a sealant (300).
前記第1基板(100)の上部には多数の画素部(発光部)(P)が定義され、各画素部(P)の一側毎に薄膜トランジスタ(スイッチング素子と駆動素子)(T)とアレー配線(未図示)が構成される。 A large number of pixel units (light emitting units) (P) are defined on the first substrate (100), and a thin film transistor (switching element and driving element) (T) and an array are provided for each side of each pixel unit (P). Wiring (not shown) is configured.
前記第2基板(200)の上部には透明なホール注入電極である第1電極(202)を構成する。 A first electrode (202), which is a transparent hole injection electrode, is formed on the second substrate (200).
前記第1電極(202)の上部には画素領域(P)の境界に対応して隔壁(204)を形成し、隔壁(204)内側の画素領域(P)に対応して、有機発光層(206)と第2電極(208)を順次に構成する。前記隔壁(204)と第1電極(202)の間には絶縁補助パターン(203)を更に構成する。 On the first electrode (202), a partition (204) is formed corresponding to the boundary of the pixel region (P), and corresponding to the pixel region (P) inside the partition (204), the organic light emitting layer ( 206) and the second electrode (208) are sequentially formed. An auxiliary insulation pattern (203) is further formed between the partition (204) and the first electrode (202).
前記第2電極(208)と駆動素子(TD)のドレイン電極(122)は、別途の第1連結電極(130)を通して間接的に連結される。即ち、前記第1連結電極(130)を第1基板(100)に構成し、第1基板(100)および第2基板(200)を合着すれば、第1連結電極(130)が発光層(204)の上部に構成された電子注入電極である第2電極(208)と接触するようになる。 The second electrode (208) and the drain electrode (122) of the driving element (T D ) are indirectly connected through a separate first connection electrode (130). That is, if the first connection electrode (130) is formed on a first substrate (100) and the first substrate (100) and the second substrate (200) are bonded together, the first connection electrode (130) becomes a light emitting layer. It comes into contact with the second electrode (208) which is the electron injection electrode formed on the upper part of (204).
前述した構成で、前記第1基板(100)の外廓には共通電極(126)が構成され、前記共通電極(126)と接触する第2連結電極(132)を更に構成し第2基板(200)に構成された第1電極(202)との接触が容易になるようにする。 In the above-described configuration, a common electrode (126) is formed on an outer periphery of the first substrate (100), and a second connection electrode (132) that is in contact with the common electrode (126) is further configured to form a second substrate (100). The contact with the first electrode (202) configured in (200) is facilitated.
この時、前記第1電極(202)が透明電極であり抵抗が高いために、前記第2電極と同一な物質で前記露出された第1電極(202)の上部に補助電極(210)を構成する。 At this time, since the first electrode (202) is a transparent electrode and has high resistance, an auxiliary electrode (210) is formed on the exposed first electrode (202) with the same material as the second electrode. I do.
この時、前記共通電極(126)の内側が発光素子の周りにダミー画素(PD)を更に構成し、ダミー画素(PD)に対応する部分の第1基板(100)には駆動素子とスイッチング素子を構成しないので、前記ダミー画素(PD)に対応して構成された発光部の第2電極(208)を電気的にフローティング(floating)されるようにする。 At this time, the inside of the common electrode (126) is further configured dummy pixel (P D) around the light emitting element, the first substrate (100) of the portion corresponding to the dummy pixel (P D) and the drive element Since the switching element is not configured, the second electrode (208) of the light emitting unit configured corresponding to the dummy pixel (P D ) is electrically floated.
従って、工程上の誤差で前記第1電極(202)が前記第2電極(208)と接触しても、発光部を駆動させるのに何等影響を及ぼさないようにすることができる。 Therefore, even if the first electrode (202) comes into contact with the second electrode (208) due to an error in the process, it is possible to prevent the light emitting unit from being driven at all.
以下、図7aないし図7dおよび図8aないし8dを参照して、本発明に従う薄膜トランジスタアレー部の形成工程を説明する。 Hereinafter, a process of forming a thin film transistor array according to the present invention will be described with reference to FIGS. 7A to 7D and FIGS. 8A to 8D.
図7aないし図7dは図2のIVa-IVa線に対応する部分に沿って切断し、本発明の工程順序に従い図示した工程断面図であり、図8aないし図8dは図5のVIII-VIII線に沿って切断し、本発明の工程順序に從い図示した工程断面図である。 7A to 7D are sectional views taken along a portion corresponding to the line IVa-IVa of FIG. 2 and shown in accordance with the process sequence of the present invention, and FIGS. 8A to 8D are line VIII-VIII of FIG. FIG. 2 is a process sectional view cut along the line and shown in accordance with the process sequence of the present invention.
図7aないし8dに図示したように、基板に多数の画素領域(P)とストレージ領域(C)と表示部の境界に対応してダミー画素領域(PD)を追加して定義する。 As shown in FIGS. 7A to 8D, a dummy pixel area (P D ) is additionally defined on the substrate corresponding to a plurality of pixel areas (P), storage areas (C), and boundaries of the display unit.
前記画素領域(P)の一側にはスイッチング領域(S)と駆動領域(D)を定義する。 A switching area (S) and a driving area (D) are defined on one side of the pixel area (P).
前記多数の領域(D,S,C,P,PD)が定義された基板(100)の全面に窒化シリコン(SiNx)と酸化シリコン(SiO2)を含むシリコン絶縁物質グループ中から選択された一つで第1絶縁膜であるバッファ層(102)を形成する。 The plurality of regions (D, S, C, P, P D ) are selected from a silicon insulating material group including silicon nitride (SiN x ) and silicon oxide (SiO 2 ) on the entire surface of the defined substrate (100). One of them forms a buffer layer (102) as a first insulating film.
前記バッファ層(102)の上部に非晶質シリコン(a-Si:H)を蒸着した後、水素化過程と熱を利用した結晶化工程を進行して多結晶シリコン層を形成しパターン化して、前記駆動領域(D)とストレージ領域(C)にアクティブ層(104,105)を形成する。 After depositing amorphous silicon (a-Si: H) on the buffer layer (102), a hydrogenation process and a crystallization process using heat are performed to form and pattern a polycrystalline silicon layer. An active layer (104, 105) is formed in the drive area (D) and the storage area (C).
前記ストレージ領域(C)に構成されたアクティブ層(105)は、表面に不純物を蒸着させる方法で電極の役割をなすようにすることでストレージキャパシタの第1電極として機能する。 The active layer (105) formed in the storage region (C) functions as an electrode by depositing impurities on the surface, thereby functioning as a first electrode of a storage capacitor.
前記駆動領域(D)に形成したアクティブ層(104)は、第1アクティブ領域(104a)と、第1アクティブ領域(104a)の両側をそれぞれ第2アクティブ領域(104b)(104c)に定義する。 The active layer (104) formed in the drive region (D) defines a first active region (104a) and second active regions (104b) and (104c) on both sides of the first active region (104a).
次に、前記第1アクティブ領域(104a)の上部に、第2絶縁膜であるゲート絶縁膜(106)とゲート電極(108)を積層して構成する。 Next, a gate insulating film (106) as a second insulating film and a gate electrode (108) are laminated on the first active region (104a).
この時、前記ゲート絶縁膜(106)は基板(100)の全面に形成することもできる。 At this time, the gate insulating film (106) may be formed on the entire surface of the substrate (100).
ゲート絶縁膜(106)は、窒化シリコン(SiNX)と酸化シリコン(SiO2)を含む無機絶縁物質グループ中から選択された一つで形成する。 The gate insulating film (106) is formed of one selected from a group of inorganic insulating materials including silicon nitride (SiN x ) and silicon oxide (SiO 2 ).
続いて、前記ゲート電極(108)が形成された基板(100)の全面に3価又は4価の不純物(B又はP)をドーピングして、前記第2アクティブ領域(104b)をオーミックコンタクト(ohmic contact)領域に形成する。 Subsequently, the entire surface of the substrate (100) on which the gate electrode (108) is formed is doped with a trivalent or tetravalent impurity (B or P) to make the second active region (104b) an ohmic contact (ohmic contact). contact) region.
次に、ゲート電極(108)が形成された基板(100)の全面に、第3絶縁膜である層間絶縁膜(110)を形成する。 Next, an interlayer insulating film (110) as a third insulating film is formed on the entire surface of the substrate (100) on which the gate electrode (108) is formed.
前記ゲート電極(108)は、アルミニウム(Al)、アルミニウム合金、銅(Cu)、タングステン(W)、タンタル(Ta)及びモリブテン(Mo)を含む導電性金属グループ中から選択された一つで形成し、層間絶縁膜(110)は前述したような絶縁物質グループ中から選択された一つで形成する。
The gate electrode (108) is formed of one selected from a conductive metal group including aluminum (Al), aluminum alloy, copper (Cu), tungsten (W), tantalum (Ta), and molybdenum (Mo). In addition, the
続いて、前記ストレージ領域(C)の上部に導電性金属で電源配線を形成する。ストレージ領域(C)を通過する電源配線の一部は、キャパシタ第2電極(112a)として機能する。 Subsequently, a power supply wiring is formed on the storage area (C) using a conductive metal. Part of the power supply wiring passing through the storage area (C) functions as the capacitor second electrode (112a).
図7bおよび8bに図示したように、前記キャパシタ第2電極(112a)が形成された基板(100)の全面に第4絶縁膜(114)を形成した後パターン化して、前記第2アクティブ領域(104b)をそれぞれ露出させる第1コンタクトホール(116)と第2コンタクトホール(118)を形成すると同時に、前記キャパシタ第2電極(112a)の一部を露出させる第3コンタクトホール(120)を形成する。 As shown in FIGS.7b and 8b, a fourth insulating film (114) is formed on the entire surface of the substrate (100) on which the capacitor second electrode (112a) is formed and then patterned to form the second active region ( A first contact hole (116) and a second contact hole (118) that respectively expose the 104b) are formed, and a third contact hole (120) that partially exposes the capacitor second electrode (112a) is formed. .
図7cおよび8cに図示したように、層間絶縁膜(110)が形成された基板(100)の全面にクロム(Cr)、モリブテン(Mo)、タンタル(Ta)及びタングステン(W)等を含む導電性金属を蒸着しパターン化して、前記露出された第2アクティブ領域(104b)にそれぞれ接触するドレイン電極(122)とソース電極(124)を形成する。
As shown in FIGS.7c and 8c, a conductive film including chromium (Cr), molybdenum (Mo), tantalum (Ta), tungsten (W), etc. is formed on the entire surface of the substrate (100) on which the interlayer insulating film (110) is formed. A conductive metal is deposited and patterned to form a
同時に、基板(100)の外廓に共通電極(126)を形成する。 At the same time, a common electrode (126) is formed on the outer periphery of the substrate (100).
次に、前記ドレイン電極(122)およびソース電極(124)と共通電極(126)が形成された基板(100)の全面に第5絶縁膜(128)を形成した後パターン化して、前記ドレイン電極(122)の一部を露出させる第4コンタクトホール(134)と、前記共通電極(126)の両側をそれぞれ露出させる第5コンタクトホールおよび第6コンタクトホール(136,128)を形成する。 Next, a fifth insulating film (128) is formed over the entire surface of the substrate (100) on which the drain electrode (122) and the source electrode (124) and the common electrode (126) are formed, and then patterned to form the drain electrode. A fourth contact hole (134) exposing a part of (122) and fifth and sixth contact holes (136, 128) exposing both sides of the common electrode (126) are formed.
続いて、図7dおよび8dに図示したように、前記第5絶縁膜(128)が形成された基板(100)の全面に導電性金属を蒸着しパターン化して、前記ドレイン電極(122)と接触させながら画素部(P)に構成された第1連結電極(130)と、前記第5コンタクトホール(136)を通して共通パッド(126)と接触する第2連結電極(132)を形成する。 Subsequently, as shown in FIGS. 7D and 8D, a conductive metal is deposited and patterned on the entire surface of the substrate (100) on which the fifth insulating film (128) is formed, and is brought into contact with the drain electrode (122). Then, a first connection electrode (130) formed in the pixel portion (P) and a second connection electrode (132) that is in contact with the common pad (126) through the fifth contact hole (136) are formed.
前述した工程を通して本発明に従う薄膜トランジスタアレー基板を形成することができる。 Through the above-described steps, a thin film transistor array substrate according to the present invention can be formed.
前述した構成で、前記ダミー画素領域(PD)に対応してスイッチング素子と駆動素子を形成しないことを特徴とする。 In the above-described configuration, the switching element and the driving element are not formed corresponding to the dummy pixel region (P D ).
以下、図9aないし図9cを通して、前記アレー基板と接触する発光部の形成工程を説明する。 Hereinafter, a process of forming a light emitting unit that contacts the array substrate will be described with reference to FIGS. 9A to 9C.
図9aないし図9cは本発明に従う有機発光層の製造工程を順序に従い図示した工程断面図である。 9a to 9c are cross-sectional views illustrating a process of manufacturing an organic light emitting layer according to the present invention in order.
図9aに図示したように、透明な絶縁基板(200)上に画素領域(P)と基板(200)の周辺にダミー画素領域(PD)を定義する。 As shown in FIG. 9a, a pixel region (P) is defined on a transparent insulating substrate (200) and a dummy pixel region (P D ) is defined around the substrate (200).
前記領域が定義された基板(200)の全面に第1電極(202)を形成する。 A first electrode (202) is formed on the entire surface of the substrate (200) in which the region is defined.
前記第1電極(202)は、有機発光層(未図示)にホール(hole)を注入するホール注入電極として、主に透明で仕事函数(work function)の高いインジウム-錫-酸化物(ITO)を蒸着して形成する。 The first electrode (202) is a hole injection electrode for injecting holes into an organic light emitting layer (not shown), and is mainly transparent and has a high work function (work function) indium-tin-oxide (ITO). Is formed by vapor deposition.
次に、前記画素領域の境界に対応して補助絶縁パターン(203)を更に構成する。 Next, an auxiliary insulating pattern (203) is further formed corresponding to the boundary of the pixel region.
次に、前記補助絶縁パターンの上部に隔壁(204)を形成する。 Next, a partition (204) is formed on the auxiliary insulating pattern.
前記隔壁(204)は一般的に感光性有機物質を塗布しパターン化して形成する。
The
前記補助絶縁パターン(203)は、以後の工程で形成される第2電極と前記第1電極(202)が接触することができる場合を予め防止するために構成するものである。 The auxiliary insulating pattern (203) is configured to prevent a case where a second electrode formed in a subsequent process can contact the first electrode (202) in advance.
前述した構成で、前記補助絶縁パターン(203)と前記隔壁(204)は望ましくは格子形状に構成する。 In the above-described configuration, the auxiliary insulating pattern (203) and the partition (204) are preferably formed in a lattice shape.
次に、図9bに図示したように、前記画素領域(P)に対応する第1電極(202)の上部に、前記各画素領域(P)に対応して位置し赤(R)、緑(G)、青色(B)の光を発光する有機発光層(206)を形成する。 Next, as shown in FIG.9b, on the first electrode (202) corresponding to the pixel region (P), red (R), green ( G) An organic light emitting layer (206) that emits blue (B) light is formed.
この時、前記有機発光層(206)は単層又は多層に構成することができ、前記有機膜が多層に構成される場合には、主発光層(206b)にホール輸送層(Hole Transporting Layer)(206a)と電子輸送層(Electron Transporting Layer : ETL)(206c)を更に構成する。 At this time, the organic light emitting layer (206) may be configured as a single layer or a multilayer, and when the organic film is configured as a multilayer, a hole transport layer (Hole Transporting Layer) may be provided on the main light emitting layer (206b). (206a) and an electron transporting layer (ETL) (206c).
次に、図9cに図示したように、前記発光層(206)の上部に第2電極(208)を蒸着する工程を進行する。
Next, as shown in FIG. 9c, a process of depositing a second electrode 208 on the
前記第2電極(208)は各画素領域(P)に対応して位置し、互いに独立するように構成する。 The second electrodes (208) are located corresponding to the respective pixel regions (P) and are configured to be independent of each other.
前記第2電極(208)を形成する工程と同時に、基板の外廓に前記第1電極と接触する補助電極(210)を形成する。 At the same time as the step of forming the second electrode (208), an auxiliary electrode (210) that contacts the first electrode is formed outside the substrate.
前記補助電極(210)は、前記第2電極(208)とフローティングされて構成される。 The auxiliary electrode (210) is configured to float with the second electrode (208).
前記第2電極(208)を形成する物質は、アルミニウム(Al)、カルシウム(Ca)及びマグネシウム(Mg)中から選択された一つで形成するかフッ化リチウム/アルミニウム(Li/Al)の二重金属層で形成することができる。 The second electrode 208 may be formed of one selected from aluminum (Al), calcium (Ca), and magnesium (Mg), or may be formed of lithium fluoride / aluminum (Li / Al). It can be formed of a heavy metal layer.
前述したような工程を通して製作した薄膜トランジスタアレー部と発光部とを合着することで、図5に図示した本発明に従う有機電界発光素子を製作することができる。 By bonding the thin film transistor array unit and the light emitting unit manufactured through the above-described process, the organic electroluminescent device according to the present invention shown in FIG. 5 can be manufactured.
前述したような本発明に従う有機電界発光素子は、前記共通電極内側の表示境界部に対応して隔壁を有するダミー画素を更に形成することを特徴とする。 The above-described organic electroluminescent device according to the present invention is characterized in that a dummy pixel having a partition wall corresponding to a display boundary inside the common electrode is further formed.
このような構成を前記薄膜トランジスタアレー部と有機発光部を合着する工程で工程マージン(ダミー画素領域が工程マージンになる)を確保することができる構成であり、前記有機発光部の第1電極が有機発光部の第2電極と電気的に完全にフローティングされる構造である。 Such a configuration is a configuration in which a process margin (a dummy pixel region becomes a process margin) can be secured in a step of joining the thin film transistor array unit and the organic light emitting unit, and the first electrode of the organic light emitting unit is This is a structure that is completely electrically floating with the second electrode of the organic light emitting unit.
100 : 第1基板(下部基板)
122 : ドレイン電極
126 : 共通電極
130 : 第1連結電極
132 : 第2連結電極
200 : 第2基板(下部基板)
202 : 第1電極(陽極電極)
203 : 補助絶縁パターン
204 : 隔壁
206 :発光層
208 : 第2電極
300 : シールパターン
100: 1st substrate (lower substrate)
122: Drain electrode
126: Common electrode
130: 1st connection electrode
132: 2nd connection electrode
200: 2nd substrate (lower substrate)
202: 1st electrode (anode electrode)
203: Auxiliary insulation pattern
204: Partition wall
206: Light emitting layer
208: 2nd electrode
300: Seal pattern
Claims (34)
Forming a pad so that the fifth insulating layer has a fourth contact hole and a fifth contact hole exposing the pad, wherein the pad is formed in a peripheral portion above the fourth insulating layer; Forming a second connection electrode on the insulating layer, the second connection electrode being connected to the pad through the fourth contact hole and being connected to the first electrode when the first and second substrates are joined. The method for manufacturing an organic electroluminescent device according to claim 32, wherein:
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| KR10-2002-0088427A KR100500147B1 (en) | 2002-12-31 | 2002-12-31 | The organic electro-luminescence device and method for fabricating of the same |
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| JP (2) | JP4108598B2 (en) |
| KR (1) | KR100500147B1 (en) |
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Also Published As
| Publication number | Publication date |
|---|---|
| KR20040062105A (en) | 2004-07-07 |
| NL1025133C2 (en) | 2006-06-07 |
| DE10361008B4 (en) | 2010-04-29 |
| JP4113237B2 (en) | 2008-07-09 |
| CN1516531A (en) | 2004-07-28 |
| JP4108598B2 (en) | 2008-06-25 |
| FR2849535A1 (en) | 2004-07-02 |
| NL1025133A1 (en) | 2004-07-01 |
| US7304427B2 (en) | 2007-12-04 |
| KR100500147B1 (en) | 2005-07-07 |
| TW200418335A (en) | 2004-09-16 |
| US7311577B2 (en) | 2007-12-25 |
| TWI245580B (en) | 2005-12-11 |
| JP2007156504A (en) | 2007-06-21 |
| FR2849535B1 (en) | 2007-05-18 |
| DE10361008A8 (en) | 2005-04-07 |
| DE10361008A1 (en) | 2004-10-07 |
| US20070054583A1 (en) | 2007-03-08 |
| GB0330027D0 (en) | 2004-01-28 |
| GB2396951B (en) | 2005-02-23 |
| CN100395892C (en) | 2008-06-18 |
| US20040135496A1 (en) | 2004-07-15 |
| GB2396951A (en) | 2004-07-07 |
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