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JP2004304401A - High frequency multilayer circuit board - Google Patents

High frequency multilayer circuit board Download PDF

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Publication number
JP2004304401A
JP2004304401A JP2003093200A JP2003093200A JP2004304401A JP 2004304401 A JP2004304401 A JP 2004304401A JP 2003093200 A JP2003093200 A JP 2003093200A JP 2003093200 A JP2003093200 A JP 2003093200A JP 2004304401 A JP2004304401 A JP 2004304401A
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Prior art keywords
conductor
layer
matching
ground conductor
strip
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Japanese (ja)
Inventor
Mikio Hatamoto
幹夫 畑本
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

【課題】従来の多層伝送線路において、上下トリプレート線路の層間接続部のインダクタンス成分を持つため、整合を取るためのキャパシタンス成分を得るために、同一平面に大きな整合スタブを形成する必要があり、回路構成が大きくなるという課題があった。
【解決手段】第１のトリプレート線路と第２のトリプレート線路のストリップ導体を導体ビアで接続し、接地導体層を複数の導体ビアで接続した多層伝送線路において、接地導体層とストリップ導体の間に任意の高さの導体ビアを設け、一方を接地導体層に接続し、他方に任意の大きさの導体パターンを設けて整合回路とすることにより、従来の同一平面に整合スタブを設ける構造よりも接地導体とストリップ導体間のキャパシタンス成分をより大きく得られることで、回路の小型化を図った。
【選択図】 図１In a conventional multi-layer transmission line, a large matching stub needs to be formed on the same plane in order to obtain a capacitance component for obtaining matching, since the multi-layer transmission line has an inductance component of an interlayer connection part of upper and lower triplate lines. There is a problem that the circuit configuration becomes large.
In a multilayer transmission line in which strip conductors of a first triplate line and a second triplate line are connected by conductor vias and a ground conductor layer is connected by a plurality of conductor vias, a ground conductor layer and a strip conductor are connected. A conventional structure in which a matching stub is provided on the same plane by providing a conductor via of an arbitrary height therebetween, connecting one to a ground conductor layer, and providing a conductor pattern of an arbitrary size on the other to form a matching circuit. The circuit can be miniaturized by obtaining a larger capacitance component between the ground conductor and the strip conductor than in the case of the first embodiment.
[Selection diagram] Fig. 1

Description

【０００１】
【発明の属する技術分野】
この発明は、マイクロ波などを伝送する多層伝送線路を用いた高周波多層回路基板に関するものである。
【０００２】
【従来の技術】
近年、高周波回路の小型化の要求に対し、ストリップ線路またはトリプレート線路等の伝送線路を多層構造配置とし、導体ビアにより等価的に構成された同軸線路構造により電気的に層間接続する多層伝送線路が用いられている。
【０００３】
このような垂直給電部では、上下トリプレート線路の接続部にインダクタンス成分をもつため、良好な高周波特性を得るためには給電点において整合をとる必要がある。
【０００４】
従来の垂直給電部においては、トリプレート線路のストリップ導体に整合スタブを設けて得られるキャパシタンス成分によって整合をとることにより、良好な高周波特性を得ている（例えば、特許文献１参照）。
【０００５】
【特許文献１】
特開２０００−０３１７０９号公報（第２図、第３図）
【０００６】
【発明が解決しようとする課題】
しかし、このような構造では、キャパシタンス成分を得るために、大きな整合スタブが必要となるため、回路構成が大きくなるという問題があった。
【０００７】
この発明は、係る課題を解決するためになされたものであり、回路の小型化を目的とした高周波多層回路基板を得ることを目的とする。
【０００８】
【課題を解決するための手段】
第１の発明による高周波多層回路基板は、第１のストリップ導体と、第１のストリップ導体の上下両側に単層または複数層から成る第１の誘電体層および第２の誘電体層で支持される第１の接地導体層および第２の接地導体層を備えた第１のトリプレート線路と、第２のストリップ導体と、第２のストリップ導体の上下両側に単層または複数層から成る第３の誘電体層および第４の誘電体層で支持される第２の接地導体層および第３の接地導体層を備えた第２のトリプレート線路とを備え、第２のトリプレート線路と第１のトリプレート線路とを多層に配設し、第１のストリップ導体および第２のストリップ導体を第２の接地導体層に開けられる誘電体窓を通して、単層または複数の導体ビアで接続し、第１の接地導体層と第２の接地導体層と第３の接地導体層を単層または複数の導体ビアで接地する垂直給電構造を有する高周波多層回路基板において、第１の接地導体層と第１のストリップ導体の間に、一方は第１の接地導体層に接続され、他方は第１の導体パターンを設けた第１の整合用ビアを有し、第２の接地導体層と第１のストリップ導体の間に、一方は第２の接地導体層に接続され、他方は第２の導体パターンを設けた第２の整合用ビアを有し、第２の接地導体層と第２のストリップ導体の間に、一方は第２の接地導体層に接続され、他方は第３の導体パターンを設けた第３の整合用ビアを有し、第３の接地導体層と第２のストリップ導体の間に、一方は第３の接地導体層に接続され、他方は第４の導体パターンを設けた第４の整合用ビアを有したものである。
【０００９】
【発明の実施の形態】
実施の形態１．
図１は、この発明の実施形態１における高周波多層回路基板を示すものである。また、図１におけるＡ−Ａ’の断面を図２、図１におけるＢ−Ｂ’の断面を図３、図１におけるＣ−Ｃ’の断面を図４、図１におけるＤ−Ｄ’の断面を図５として示す。
図１乃至図５において、多層伝送線路は、第１のストリップ導体１と、その上下に複数層から成る第１の誘電体層９、第２の誘電体層１０で支持された第１の接地導体層３、第２の接地導体層４を備えた第１のトリプレート線路と、第２のストリップ導体２と、その上下に複数層から成る第３の誘電体層１１、第４の誘電体層１２で支持された第２の接地導体層４、第３の接地導体層５を備えた第２のトリプレート線路とを上下に有し、第１のストリップ導体１、第２のストリップ導体２を第２の接地導体層４に開けられた誘電体窓を通して、単一または複数の導体ビア８で接続し、第１の接地導体層３と第２の接地導体層４を導体ビア６（６ａ、６ｂ、６ｃ、６ｄ、６ｅ）で接地し、第２の接地導体層４と第３の接地導体層５を導体ビア７で接地された垂直給電構造において、第１の接地導体３、第２の接地導体４、第３の接地導体５と第１のストリップ導体１、第２のストリップ導体２の間に任意の高さの整合用導体ビア１３、整合用導体ビア１４、整合用導体ビア１５、整合用導体ビア１６を有し、整合用導体ビア１３、整合用導体ビア１４、整合用導体ビア１５、整合用導体ビア１６の一方を接地導体層３、接地導体層４、接地導体層５に接地し、他方に任意の大きさの整合用導体パターン２１、整合用導体パターン２２、整合用導体パターン２３、整合用導体パターン２４を設けている。
【００１０】
次に、動作原理について説明する。図６は、この発明による高周波多層回路基板の実施の形態１の等価回路を示す図である。ここで簡単のために、図１に示す整合用ビア１３、整合用ビア１４、整合用ビア１５、整合用ビア１６の各々の長さが等しくｄ１、整合用導体パターン２１、整合用導体パターン２２、整合用導体パターン２３、整合用導体パターン２４の面積が各々等しくＳ１とする。高周波多層回路基板の等価回路は、整合用ビア１３と整合用導体パターン２１とストリップ導体１によって得られる並列キャパシタンス成分と、整合用ビア１４と整合用導体パターン２２とストリップ導体１によって得られる並列キャパシタンス成分の合成による並列キャパシタンス成分３２と、整合用ビア１５と整合用導体パターン２３とストリップ導体２によって得られる並列キャパシタンス成分と、整合用ビア１６と整合用導体パターン２４とストリップ導体２によって得られる並列キャパシタンス成分の合成による並列キャパシタンス成分３３と、導体ビア８による直列インダクタンス３１とから成るπ型の低域通過フィルタとして表すことができる。
なお、２９、３０は夫々５０Ωトリプレート線路である。
【００１１】
ここで、整合用導体ビア１３、整合用導体ビア１４、整合用導体ビア１５、整合用導体ビア１６の長さｄ１と導体パターン２１、導体パターン２２、導体パターン２３、導体パターン２４の面積Ｓ１を任意に設定することで、ストリップ導体と接地導体の間隔が小さくなり、より大きな並列キャパシタンス３２、並列キャパシタンス３３が設定できるため、従来の整合用スタブよりも小さい面積で、並列キャパシタンス３２、並列キャパシタンス３３と直列インダクタンス３１によるインピーダンス整合が実現できる。
【００１２】
この実施の形態１によれば、インピーダンス整合回路を立体配置することにより面積を小さくすることが可能となり、また接地導体とストリップ導体の距離を変化させることで比較的容易に並列キャパシタンスが得られ、マイクロ波伝送を可能としているため、回路の小型化、信頼性の向上、低コスト化が可能である。
【００１３】
実施の形態２．
図７は、この発明による高周波多層回路基板の実施の形態２の構成を示す図である。また、図７におけるＡ−Ａ’の断面を図８、図７におけるＢ−Ｂ’の断面を図９、図７におけるＣ−Ｃ’の断面を図１０、図７におけるＤ−Ｄ’の断面を図１１として示す。
図７乃至図９において、第１の接地導体層３、第２の接地導体層４、第３の接地導体層５とストリップ導体１、ストリップ導体２の間に、任意の高さの整合用導体ビア１７、整合用導体ビア１８、整合用導体ビア１９、整合用導体ビア２０の一方をストリップ導体１、ストリップ導体２に接続し、他方に任意の大きさの整合用導体パターン２５、整合用導体パターン２６、整合用導体パターン２７、整合用導体パターン２８を設けている。
なお、他の構成はこの発明の実施の形態１の構成と同じであるため、重複する個所は説明を省略する。
【００１４】
次に、動作原理について説明する。図１２は、この発明による高周波多層回路基板の実施の形態２の等価回路を示す図である。ここで簡単のために、図３に示す整合用ビア１７、整合用ビア１８、整合用ビア１９、整合用ビア２０の各々の長さが等しくｄ２、整合用導体パターン２５、整合用導体パターン２６、整合用導体パターン２７、整合用導体パターン２８の面積が各々等しくＳ２とする。高周波多層回路基板の等価回路は、整合用ビア１７と整合用導体パターン２５と接地導体３によって得られる並列キャパシタンス成分と、整合用ビア１８と整合用導体パターン２６と接地導体４によって得られる並列キャパシタンス成分の合成による並列キャパシタンス成分３４と、整合用ビア１９と整合用導体パターン２７と接地導体４によって得られる並列キャパシタンス成分と、整合用ビア２０と整合用導体パターン２８と接地導体５によって得られる並列キャパシタンス成分の合成による並列キャパシタンス成分３５と、導体ビア８による直列インダクタンス３１とから成るπ型の低域通過フィルタとして表すことができる。
なお、２９、３０は夫々５０Ωトリプレート線路である。
【００１５】
ここで、整合用導体ビア１７、整合用導体ビア１８、整合用導体ビア１９、整合用導体ビア２０の長さｄ２と導体パターン２５、導体パターン２６、導体パターン２７、導体パターン２８の面積Ｓ２を任意に設定することで、ストリップ導体と接地導体の間隔が小さくなり、より大きな並列キャパシタンス３４、並列キャパシタンス３５が設定できるため、従来の整合用スタブよりも小さい面積で、並列キャパシタンス３４、並列キャパシタンス３５と直列インダクタンス３１によるインピーダンス整合が実現できる。
【００１６】
この実施の形態２によれば、インピーダンス整合回路を立体配置することにより、回路の小型化が可能となり、信頼性の向上、低コスト化が可能である。
【００１７】
【発明の効果】
この発明によれば、整合回路を立体配置することにより、回路の小型化ができ、信頼性の向上、低コスト化が可能である。
【図面の簡単な説明】
【図１】この発明による高周波多層回路基板の実施の形態１の構成を示す図である。
【図２】この発明による高周波多層回路基板の実施の形態１の一断面を示す図である。
【図３】この発明による高周波多層回路基板の実施の形態１の一断面を示す図である。
【図４】この発明による高周波多層回路基板の実施の形態１の一断面を示す図である。
【図５】この発明による高周波多層回路基板の実施の形態１の一断面を示す図である。
【図６】この発明による高周波多層回路基板の実施の形態１の等価回路を示す図である。
【図７】この発明による高周波多層回路基板の実施の形態２の構成を示す図である。
【図８】この発明による高周波多層回路基板の実施の形態２の一断面を示す図である。
【図９】この発明による高周波多層回路基板の実施の形態２の一断面を示す図である。
【図１０】この発明による高周波多層回路基板の実施の形態２の一断面を示す図である。
【図１１】この発明による高周波多層回路基板の実施の形態２の一断面を示す図である。
【図１２】この発明による高周波多層回路基板の実施の形態２の等価回路を示す図である。
【符号の説明】
１、２ ストリップ導体、 ３、４、５ 接地導体層、
６（６ａ、６ｂ、６ｃ、６ｄ、６ｅ）導体ビア、７、導体ビア、８ 導体ビア、
９、１０、１１、１２ 誘電体層、
１３、１４、１５、１６、１７、１８、１９、２０ 整合用導体ビア、
２１、２２、２３、２４、２５、２６、２７、２８ 整合用導体パターン、
２９、３０ ５０Ωトリプレート線路、
３１ インダクタンス、 ３２、３３、３４、３５ キャパシタンス。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a high-frequency multilayer circuit board using a multilayer transmission line for transmitting microwaves and the like.
[0002]
[Prior art]
In recent years, in response to the demand for miniaturization of high-frequency circuits, transmission lines such as strip lines or triplate lines are arranged in a multilayer structure, and multilayer transmission lines are electrically connected to each other by a coaxial line structure equivalently constituted by conductor vias. Is used.
[0003]
In such a vertical power supply unit, since the connection between the upper and lower triplate lines has an inductance component, it is necessary to match at the power supply point in order to obtain good high-frequency characteristics.
[0004]
In a conventional vertical power supply unit, good high-frequency characteristics are obtained by matching with a capacitance component obtained by providing a matching stub on a strip conductor of a triplate line (for example, see Patent Document 1).
[0005]
[Patent Document 1]
JP-A-2000-031709 (FIGS. 2 and 3)
[0006]
[Problems to be solved by the invention]
However, such a structure requires a large matching stub in order to obtain a capacitance component, and thus has a problem that the circuit configuration becomes large.
[0007]
The present invention has been made to solve such a problem, and an object of the present invention is to provide a high-frequency multilayer circuit board for miniaturizing a circuit.
[0008]
[Means for Solving the Problems]
The high-frequency multilayer circuit board according to the first invention is supported by a first strip conductor, and a first dielectric layer and a second dielectric layer comprising a single layer or a plurality of layers on both upper and lower sides of the first strip conductor. A first triplate line having a first ground conductor layer and a second ground conductor layer, a second strip conductor, and a third layer comprising a single layer or a plurality of layers on both upper and lower sides of the second strip conductor. A second triplate line having a second ground conductor layer and a third ground conductor layer supported by the first and fourth dielectric layers, and the second triplate line and the first And the first strip conductor and the second strip conductor are connected by a single layer or a plurality of conductor vias through a dielectric window opened in the second ground conductor layer. First ground conductor layer and second ground conductor layer In a high-frequency multilayer circuit board having a vertical power supply structure in which a third ground conductor layer is grounded by a single layer or a plurality of conductor vias, one is a first ground conductor between the first ground conductor layer and the first strip conductor. A first matching via provided with a first conductor pattern, the other being provided between the second ground conductor layer and the first strip conductor, one being a second ground conductor layer; And the other has a second matching via provided with a second conductor pattern, and is connected between the second ground conductor layer and the second strip conductor, and one is connected to the second ground conductor layer. The other has a third matching via provided with a third conductor pattern, is connected between the third ground conductor layer and the second strip conductor, and one is connected to the third ground conductor layer, The other has a fourth matching via provided with a fourth conductor pattern.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
Embodiment 1 FIG.
FIG. 1 shows a high-frequency multilayer circuit board according to Embodiment 1 of the present invention. 2 is a cross section taken along the line AA ′ in FIG. 1, FIG. 3 is a cross section taken along the line BB ′ in FIG. 1, FIG. 4 is a cross section taken along the line CC ′ in FIG. Is shown as FIG.
1 to 5, a multilayer transmission line includes a first strip conductor 1 and a first ground layer supported by a plurality of first and second dielectric layers 9 and 10 above and below the first strip conductor 1. A first triplate line having a conductor layer 3 and a second ground conductor layer 4, a second strip conductor 2, and a plurality of third dielectric layers 11 above and below the second strip conductor 2; A first strip conductor 1 and a second strip conductor 2 which have a second ground conductor layer 4 supported by the layer 12 and a second triplate line provided with a third ground conductor layer 5 above and below. Are connected through a dielectric window opened in the second ground conductor layer 4 with one or more conductor vias 8 to connect the first ground conductor layer 3 and the second ground conductor layer 4 to the conductor via 6 (6a). , 6b, 6c, 6d, 6e), and connects the second ground conductor layer 4 and the third ground conductor layer 5 to the conductor vias 7. In the grounded vertical power feeding structure, an arbitrary height between the first ground conductor 3, the second ground conductor 4, the third ground conductor 5, the first strip conductor 1, and the second strip conductor 2 It has matching conductor vias 13, matching conductor vias 14, matching conductor vias 15, and matching conductor vias 16, and has matching conductor vias 13, matching conductor vias 14, matching conductor vias 15, and matching conductor vias 16. Is grounded to the ground conductor layer 3, the ground conductor layer 4, and the ground conductor layer 5, and the other is a matching conductor pattern 21, a matching conductor pattern 22, a matching conductor pattern 23, and a matching conductor pattern of any size. 24 are provided.
[0010]
Next, the operation principle will be described. FIG. 6 is a diagram showing an equivalent circuit of the high-frequency multilayer circuit board according to the first embodiment of the present invention. Here, for simplicity, each of the matching via 13, matching via 14, matching via 15, and matching via 16 shown in FIG. 1 has the same length d1, matching conductive pattern 21, matching conductive pattern 22. , The matching conductor pattern 23 and the matching conductor pattern 24 have the same area S1. The equivalent circuit of the high-frequency multilayer circuit board includes a parallel capacitance component obtained by the matching via 13, the matching conductor pattern 21, and the strip conductor 1, and a parallel capacitance obtained by the matching via 14, the matching conductor pattern 22, and the strip conductor 1. The parallel capacitance component 32 obtained by combining the components, the parallel capacitance component obtained by the matching via 15, the matching conductor pattern 23, and the strip conductor 2, and the parallel capacitance obtained by the matching via 16, the matching conductor pattern 24, and the strip conductor 2 It can be represented as a π-type low-pass filter including a parallel capacitance component 33 obtained by combining capacitance components and a series inductance 31 formed by the conductor via 8.
Reference numerals 29 and 30 denote 50Ω triplate lines, respectively.
[0011]
Here, the length d1 of the matching conductor via 13, the matching conductor via 14, the matching conductor via 15, and the matching conductor via 16 and the area S1 of the conductor patterns 21, 22, 22, and 24 are determined. By setting arbitrarily, the distance between the strip conductor and the ground conductor is reduced, and larger parallel capacitance 32 and parallel capacitance 33 can be set. Therefore, the parallel capacitance 32 and the parallel capacitance 33 can be reduced with a smaller area than the conventional matching stub. Impedance matching by the series inductance 31 can be realized.
[0012]
According to the first embodiment, it is possible to reduce the area by arranging the impedance matching circuit in a three-dimensional manner, and to obtain the parallel capacitance relatively easily by changing the distance between the ground conductor and the strip conductor. Since microwave transmission is enabled, downsizing of a circuit, improvement of reliability, and cost reduction can be achieved.
[0013]
Embodiment 2 FIG.
FIG. 7 is a diagram showing a configuration of a high-frequency multilayer circuit board according to Embodiment 2 of the present invention. 8 is a cross section taken along the line AA ′ in FIG. 7, FIG. 9 is a cross section taken along the line BB ′ in FIG. 7, FIG. 10 is a cross section taken along the line CC ′ in FIG. Is shown as FIG.
7 to 9, a matching conductor having an arbitrary height is provided between the first ground conductor layer 3, the second ground conductor layer 4, the third ground conductor layer 5 and the strip conductors 1 and 2. One of the via 17, the matching conductor via 18, the matching conductor via 19, and the matching conductor via 20 is connected to the strip conductor 1 and the strip conductor 2, and the matching conductor pattern 25 of any size and the matching conductor A pattern 26, a matching conductor pattern 27, and a matching conductor pattern 28 are provided.
Since the other configuration is the same as the configuration of the first embodiment of the present invention, the description of the overlapping portions will be omitted.
[0014]
Next, the operation principle will be described. FIG. 12 is a diagram showing an equivalent circuit of the second embodiment of the high-frequency multilayer circuit board according to the present invention. Here, for simplicity, each of the matching via 17, the matching via 18, the matching via 19, and the matching via 20 shown in FIG. 3 has the same length d2, the matching conductor pattern 25, and the matching conductor pattern 26. , The matching conductor pattern 27 and the matching conductor pattern 28 have the same area S2. The equivalent circuit of the high-frequency multilayer circuit board includes a parallel capacitance component obtained by the matching via 17, the matching conductor pattern 25, and the ground conductor 3, and a parallel capacitance component obtained by the matching via 18, the matching conductor pattern 26, and the ground conductor 4. The parallel capacitance component 34 obtained by combining the components, the parallel capacitance component obtained by the matching via 19, the matching conductor pattern 27, and the ground conductor 4, and the parallel capacitance obtained by the matching via 20, the matching conductor pattern 28, and the ground conductor 5 It can be represented as a π-type low-pass filter including a parallel capacitance component 35 obtained by combining capacitance components and a series inductance 31 formed by the conductor via 8.
Reference numerals 29 and 30 denote 50Ω triplate lines, respectively.
[0015]
Here, the length d2 of the matching conductor via 17, the matching conductor via 18, the matching conductor via 19, and the matching conductor via 20 and the area S2 of the conductor patterns 25, the conductor patterns 26, the conductor patterns 27, and the conductor patterns 28 are determined. By setting arbitrarily, the distance between the strip conductor and the ground conductor is reduced, and larger parallel capacitance 34 and parallel capacitance 35 can be set. Therefore, the parallel capacitance 34 and parallel capacitance 35 can be reduced with an area smaller than that of the conventional matching stub. Impedance matching by the series inductance 31 can be realized.
[0016]
According to the second embodiment, by three-dimensionally arranging the impedance matching circuit, the circuit can be downsized, and the reliability can be improved and the cost can be reduced.
[0017]
【The invention's effect】
According to the present invention, by arranging the matching circuit in a three-dimensional manner, the size of the circuit can be reduced, the reliability can be improved, and the cost can be reduced.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration of a first embodiment of a high-frequency multilayer circuit board according to the present invention.
FIG. 2 is a diagram showing a cross section of the high-frequency multilayer circuit board according to the first embodiment of the present invention;
FIG. 3 is a diagram showing one section of a high-frequency multilayer circuit board according to Embodiment 1 of the present invention;
FIG. 4 is a diagram showing a cross section of Embodiment 1 of the high-frequency multilayer circuit board according to the present invention.
FIG. 5 is a diagram showing a cross section of the high-frequency multilayer circuit board according to the first embodiment of the present invention;
FIG. 6 is a diagram showing an equivalent circuit of the high-frequency multilayer circuit board according to the first embodiment of the present invention.
FIG. 7 is a diagram showing a configuration of a high-frequency multilayer circuit board according to a second embodiment of the present invention;
FIG. 8 is a view showing one section of a high-frequency multilayer circuit board according to a second embodiment of the present invention;
FIG. 9 is a diagram showing one section of a high-frequency multilayer circuit board according to a second embodiment of the present invention;
FIG. 10 is a view showing one section of a high-frequency multilayer circuit board according to a second embodiment of the present invention;
FIG. 11 is a view showing one section of a high-frequency multilayer circuit board according to a second embodiment of the present invention;
FIG. 12 is a diagram showing an equivalent circuit of a high-frequency multilayer circuit board according to Embodiment 2 of the present invention.
[Explanation of symbols]
1, 2 strip conductor, 3, 4, 5 ground conductor layer,
6 (6a, 6b, 6c, 6d, 6e) conductor via, 7, conductor via, 8 conductor via,
9, 10, 11, 12 dielectric layers,
13, 14, 15, 16, 17, 18, 19, 20 Matching conductor vias,
21, 22, 23, 24, 25, 26, 27, 28 Matching conductor pattern,
29, 30 50Ω triplate line,
31 inductance, 32, 33, 34, 35 capacitance.

Claims (2)

第１のストリップ導体と、この第１のストリップ導体の上下両側に単層または複数層から成る第１の誘電体層および第２の誘電体層で支持される第１の接地導体層および第２の接地導体層を備えた第１のトリプレート線路と、
第２のストリップ導体と、この第２のストリップ導体の上下両側に単層または複数層から成る第３の誘電体層および第４の誘電体層で支持される上記第２の接地導体層および第３の接地導体層を備えた第２のトリプレート線路とを備え、
この第２のトリプレート線路と上記第１のトリプレート線路とを多層に配設し、
上記第１のストリップ導体および第２のストリップ導体を上記第２の接地導体層に開けられる誘電体窓を通して、単層または複数の導体ビアで接続し、上記第１の接地導体層と上記第２の接地導体層と上記第３の接地導体層を単層または複数の導体ビアで接地する垂直給電構造を有する高周波多層回路基板において、
上記第１の接地導体層と上記第１のストリップ導体の間に、一方は上記第１の接地導体層に接続され、他方は第１の導体パターンを設けた第１の整合用ビアを有し、
上記第２の接地導体層と上記第１のストリップ導体の間に、一方は上記第２の接地導体層に接続され、他方は第２の導体パターンを設けた第２の整合用ビアを有し、
上記第２の接地導体層と上記第２のストリップ導体の間に、一方は上記第２の接地導体層に接続され、他方は第３の導体パターンを設けた第３の整合用ビアを有し、
上記第３の接地導体層と上記第２のストリップ導体の間に、一方は上記第３の接地導体層に接続され、他方は第４の導体パターンを設けた第４の整合用ビアを有した
ことを特徴とする高周波多層回路基板。A first strip conductor, and a first ground conductor layer and a second ground conductor supported by a first dielectric layer and a second dielectric layer formed of a single layer or a plurality of layers on both upper and lower sides of the first strip conductor. A first triplate line having a ground conductor layer of
A second strip conductor, and the second ground conductor layer and the second ground conductor layer supported by a third dielectric layer and a fourth dielectric layer, which are composed of a single layer or a plurality of layers, on the upper and lower sides of the second strip conductor. A second triplate line having three ground conductor layers,
The second triplate line and the first triplate line are arranged in a multilayer,
The first strip conductor and the second strip conductor are connected by a single layer or a plurality of conductor vias through a dielectric window opened in the second ground conductor layer, and the first ground conductor layer and the second strip conductor are connected to each other. A high-frequency multilayer circuit board having a vertical power supply structure in which the ground conductor layer and the third ground conductor layer are grounded by a single layer or a plurality of conductor vias.
One between the first ground conductor layer and the first strip conductor is connected to the first ground conductor layer, and the other has a first matching via provided with a first conductor pattern. ,
One between the second ground conductor layer and the first strip conductor is connected to the second ground conductor layer, and the other has a second matching via provided with a second conductor pattern. ,
One between the second ground conductor layer and the second strip conductor is connected to the second ground conductor layer, and the other has a third matching via provided with a third conductor pattern. ,
Between the third ground conductor layer and the second strip conductor, one was connected to the third ground conductor layer, and the other had a fourth matching via provided with a fourth conductor pattern. A high-frequency multilayer circuit board, characterized in that: 第１のストリップ導体と、この第１のストリップ導体の上下両側に単層または複数層から成る第１の誘電体層および第２の誘電体層で支持される第１の接地導体層および第２の接地導体層を備えた第１のトリプレート線路と、
第２のストリップ導体と、この第２のストリップ導体の上下両側に単層または複数層から成る第３の誘電体層および第４の誘電体層で支持される上記第２の接地導体層および第３の接地導体層を備えた第２のトリプレート線路とを備え、
この第２のトリプレート線路と上記第１のトリプレート線路とを多層に配設し、
上記第１のストリップ導体および第２のストリップ導体を上記第２の接地導体層に開けられる誘電体窓を通して、単層または複数の導体ビアで接続し、上記第１の接地導体層と上記第２の接地導体層と上記第３の接地導体層を単層または複数の導体ビアで接地する垂直給電構造を有する高周波多層回路基板において、
上記第１の接地導体層と上記第１のストリップ導体の間に、一方は上記第１のストリップ導体に接続され、他方は第１の導体パターンを設けた第１の整合用ビアを有し、
上記第２の接地導体層と上記第１のストリップ導体の間に、一方は上記第１のストリップ導体に接続され、他方は第２の導体パターンを設けた第２の整合用ビアを有し、
上記第２の接地導体層と上記第２のストリップ導体の間に、一方は上記第２のストリップ導体に接続され、他方は第３の導体パターンを設けた第３の整合用ビアを有し、
上記第３の接地導体層と上記第２のストリップ導体の間に、一方は上記第２のストリップ導体に接続され、他方は第４の導体パターンを設けた第４の整合用ビアを有した
ことを特徴とする高周波多層回路基板。A first strip conductor, and a first ground conductor layer and a second ground conductor supported by a first dielectric layer and a second dielectric layer formed of a single layer or a plurality of layers on both upper and lower sides of the first strip conductor. A first triplate line having a ground conductor layer of
A second strip conductor, and the second ground conductor layer and the second ground conductor layer supported by a third dielectric layer and a fourth dielectric layer, which are composed of a single layer or a plurality of layers, on the upper and lower sides of the second strip conductor. A second triplate line having three ground conductor layers,
The second triplate line and the first triplate line are arranged in a multilayer,
The first strip conductor and the second strip conductor are connected by a single layer or a plurality of conductor vias through a dielectric window opened in the second ground conductor layer, and the first ground conductor layer and the second strip conductor are connected to each other. A high-frequency multilayer circuit board having a vertical power supply structure in which the ground conductor layer and the third ground conductor layer are grounded by a single layer or a plurality of conductor vias.
One between the first ground conductor layer and the first strip conductor is connected to the first strip conductor, and the other has a first matching via provided with a first conductor pattern,
One between the second ground conductor layer and the first strip conductor is connected to the first strip conductor, and the other has a second matching via provided with a second conductor pattern,
One between the second ground conductor layer and the second strip conductor is connected to the second strip conductor, and the other has a third matching via provided with a third conductor pattern,
One between the third ground conductor layer and the second strip conductor was connected to the second strip conductor, and the other had a fourth matching via provided with a fourth conductor pattern. A high-frequency multilayer circuit board characterized by the following.
JP2003093200A 2003-03-31 2003-03-31 High frequency multilayer circuit board Pending JP2004304401A (en)

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100703213B1 (en) * 2005-12-19 2007-04-06 삼성전기주식회사 RF Balanced Matching Device
US8513815B2 (en) 2011-07-21 2013-08-20 International Business Machines Corporation Implementing integrated circuit mixed double density and high performance wire structure
US8957325B2 (en) 2013-01-15 2015-02-17 Fujitsu Limited Optimized via cutouts with ground references
CN105914464A (en) * 2015-02-24 2016-08-31 日立金属株式会社 Antenna device
WO2019188785A1 (en) * 2018-03-29 2019-10-03 株式会社村田製作所 Transmission line and mounting structure for same
JP2019530131A (en) * 2016-09-16 2019-10-17 ローゼンベルガー ホーフフレクベンツテクニック ゲーエムベーハー アンド カンパニー カーゲー Connector for connecting optical fiber and conductor
WO2019207828A1 (en) * 2018-04-25 2019-10-31 株式会社村田製作所 Millimeter-wave module
JPWO2021192125A1 (en) * 2020-03-26 2021-09-30

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100703213B1 (en) * 2005-12-19 2007-04-06 삼성전기주식회사 RF Balanced Matching Device
US8513815B2 (en) 2011-07-21 2013-08-20 International Business Machines Corporation Implementing integrated circuit mixed double density and high performance wire structure
US8957325B2 (en) 2013-01-15 2015-02-17 Fujitsu Limited Optimized via cutouts with ground references
CN105914464A (en) * 2015-02-24 2016-08-31 日立金属株式会社 Antenna device
JP2019530131A (en) * 2016-09-16 2019-10-17 ローゼンベルガー ホーフフレクベンツテクニック ゲーエムベーハー アンド カンパニー カーゲー Connector for connecting optical fiber and conductor
US11696392B2 (en) 2018-03-29 2023-07-04 Murata Manufacturing Co., Ltd. Transmission line and mounting structure thereof
WO2019188785A1 (en) * 2018-03-29 2019-10-03 株式会社村田製作所 Transmission line and mounting structure for same
JPWO2019188785A1 (en) * 2018-03-29 2020-10-01 株式会社村田製作所 Transmission line and its mounting structure
WO2019207828A1 (en) * 2018-04-25 2019-10-31 株式会社村田製作所 Millimeter-wave module
JPWO2019207828A1 (en) * 2018-04-25 2021-01-14 株式会社村田製作所 Millimeter wave module
US12100885B2 (en) 2018-04-25 2024-09-24 Murata Manufacturing Co., Ltd. Millimeter wave module
JPWO2021192125A1 (en) * 2020-03-26 2021-09-30
JP7214039B2 (en) 2020-03-26 2023-01-27 三菱電機株式会社 high frequency filter

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