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JP2004327683A - Lead frame and semiconductor device using the same - Google Patents

Lead frame and semiconductor device using the same Download PDF

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Publication number
JP2004327683A
JP2004327683A JP2003119661A JP2003119661A JP2004327683A JP 2004327683 A JP2004327683 A JP 2004327683A JP 2003119661 A JP2003119661 A JP 2003119661A JP 2003119661 A JP2003119661 A JP 2003119661A JP 2004327683 A JP2004327683 A JP 2004327683A
Authority
JP
Japan
Prior art keywords
lead
lead frame
leads
sealing resin
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003119661A
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Japanese (ja)
Inventor
Hidehiro Teramura
英浩 寺村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd, Kansai Nippon Electric Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP2003119661A priority Critical patent/JP2004327683A/en
Publication of JP2004327683A publication Critical patent/JP2004327683A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which is improved in the reliability of wire bonding and in the resistance against thermal stress without causing deformation in leads or bonding failure due to the deformation. <P>SOLUTION: A lead frame is arranged such that a die pad for mounting a semiconductor chip is disposed through hanging leads, and that a number of leads are extended toward the die pad with the intermediate portions thereof being coupled by tie bars. The individual leads are coupled and fixed to the side of the lead frame where no semiconductor chip is mounted, by using a sealing resin for fixing leads. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【発明の属する技術分野】
本発明はリードフレーム及びそのリードフレームを用いた半導体装置に関し、特にインナーリードの変形防止及び信頼性向上に関するものである。
【0001】
【従来の技術】
半導体装置の一例を図6(a)から説明する。図において、2は図6(b)に示す構造のリードフレームで、その内部に半導体チップ3が搭載されるダイパッド4を吊りリード5を介して配置すると共に、ダイパッド4に向かって多数本のリード6を延在させ、各リード6の中間部をタイバ7にて連結している。このリードフレームを用い、先ずダイパッド4に半導体チップ3を搭載し、半導体チップ上の電極(図示せず)とリード6の先端部とを金属ワイヤ8で接続し、タイバ7で囲まれる領域を封止樹脂9にて被覆したのち、封止樹脂9から露出したタイバ7や吊りリード5等の不要部分を切断除去して、個々の半導体装置1が得られる。
【0002】
このような半導体装置は、作今の高密度化要求に伴い、それに使用されるリードフレームも多ピン化、狭ピッチ化が進んでおり、より細くかつ薄くなったリード先端部の変形とそれによるボンディング不良が問題となっている。
【0003】
この問題に対し、図7(a)及び(b)のように液状連結用樹脂11によってリード6の中間部の上面及び側面を固定する方法(特許文献1参照)や、図8のようにリード6の先端部上面を固定用テープで固定する方法(特許文献2参照)が開示されている。
【0004】
また、図9(a)及び(b)のように、絶縁性テープ13上に塗布された熱硬化性接着剤14によってリード6の先端部下面と側面を固定する方法も開示されている(特許文献3参照)。
【0005】
【特許文献1】
特開平11−26684公報(第3頁、第1〜2図)
【特許文献2】
特許第3116940号公報(第2〜3頁、第3図)
【特許文献3】
特公平07−93406公報(第2〜3頁、第1(c)図、第2図)
【0006】
【発明が解決しようとする課題】
しかしながら、前述のリードフレームには下記のような残された課題があった。すなわち、特許文献1〜3の方法は、液状樹脂、熱可塑又は熱硬化性接着剤を用いているため、硬化時に発生するアウトガスや遊離イオンのマイグレーションによりワイヤボンディングの信頼性を悪化させるという問題があった。
【0007】
また、特許文献2及び3のようにポリイミド等のテープ基材を使用したものは、半導体チップ搭載時やワイヤボンディング時の熱履歴によってリード変形を起こしやすいという問題や、固定用テープと封止樹脂の線膨張率等の物性値の違いから、熱ストレスに弱いという問題があった。
【0008】
本発明の課題は、リードの変形とそれに起因するボンディング不良が生ずることなく、ワイヤボンディングの信頼性を改善したリードフレームを提供することである。
【0009】
また、本発明の課題は、リードの変形とそれに起因するボンディング不良が生ずることなく、ワイヤボンディングの信頼性や熱ストレス耐性を改善した半導体装置を提供することである。
【0010】
【課題を解決するための手段】
本発明の半導体チップ非搭載面側で各リードをリード固定用封止樹脂により連結、固定したリードフレーム及びそれを用いた半導体装置によると、各リードの変形とそれに起因するボンディング不良の発生が防止できると共に、アウトガスと遊離イオンの少ない封止樹脂をリード固定用封止樹脂として用いているため、ワイヤボンディングの信頼性が改善される。
【0011】
本発明の請求項1記載のリードフレームは、半導体チップが搭載されるダイパッドを吊りリードを介して配置すると共に、ダイパッドに向かって多数本のリードを延在させ、各リードの中間部をタイバにて連結したリードフレームにおいて、リードフレームの半導体チップ非搭載面側で前記各リードをリード固定用封止樹脂により連結、固定している。
【0012】
本発明の請求項4記載の半導体装置は、半導体チップ非搭載面側で各リードをリード固定用封止樹脂により連結、固定しているリードフレームを用い、半導体チップをダイパッドに搭載し、ダイパッドに向かって延在する多数本のリードと前記半導体チップの電極とを電気的に接続したのち、タイバで囲まれた領域を封止樹脂にて被覆している。
【0013】
【発明の実施の形態】
以下、本発明の実施の形態を添付図面を参照し、同一物には同一の符号を用いて説明する。
【0014】
(第1の実施形態) 本発明の第1の実施形態であるリードフレームは、図1及びそのX−X断面図である図2に示すように、半導体チップが搭載されるダイパッド4を吊りリード5を介して配置すると共に、ダイパッド4に向かって多数本のリード6を延在させ、各リード6の中間部をタイバ7にて連結したリードフレームにおいて、リードフレームの半導体チップ非搭載面側で前記各リード6をリード固定用封止樹脂9aにより連結、固定している。図2の2点鎖線は、組立後の半導体装置のパッケージ外形を示す想像線である。
【0015】
本発明の第1の実施形態である半導体装置は、図3(a)及び図3(b)に示すように、半導体チップ非搭載面側で各リード6をリード固定用封止樹脂9aにより連結、固定しているリードフレーム2を用い、半導体チップ3をダイパッド4に搭載し、ダイパッド4に向かって延在する多数本のリード6と前記半導体チップ3の電極とを電気的に接続したのち、タイバ7で囲まれた領域を封止樹脂9にて被覆している。
【0016】
リード固定用封止樹脂によるリードの連結、固定は、スタンピング又はエッチングによるリード形成の後、公知技術であるトランスファ封入によって行われる。
【0017】
リード固定用封止樹脂は、通常半導体装置のパッケージとして用いられているアウトガスと遊離イオンの少ない封止樹脂9と同一材料を用いる。
【0018】
また、リード固定用封止樹脂による固定部分は、固定強度が向上し封入金型の構造が簡単になるため、各リード下面及び各リード側面間とすることが望ましいが、各リード下面のみであっても良い。
【0019】
本実施形態によれば、図2に示すように、リード固定用封止樹脂9aによって各リード6が連結、固定されるため、各リードの変形とそれに起因するボンディング不良の発生が防止できると共に、アウトガスと遊離イオンの少ない封止樹脂をリード固定用封止樹脂として用いているため、ワイヤボンディングの信頼性が改善される。また、リード固定用封止樹脂9aと半導体装置のパッケージの封止樹脂9が同一材料であり線膨張率等の物性値が同一であるため、固定用テープ等の異種材料を用いた場合に比較し、熱ストレスに強い構造が得られる。
【0020】
図3(a)及び図3(b)に示す本発明の半導体装置は、樹脂封止完了の状態までを説明しているが、その後必要に応じ、リードフレームの外装めっき、捺印、タイバや吊りリードの切断、リード曲げ加工等を行う。
【0021】
(第2の実施形態) 本発明の第2の実施形態であるリードフレームは、図4(a)及び図4(b)に示すように、リード固定用封止樹脂9aに形成した貫通孔10内にダイパッド4の半導体チップ非搭載面が露出しているものである。すなわち、リード固定用封止樹脂を矩形枠状に形成し、その貫通孔内にダイパッドの裏面を露出させる。
【0022】
本実施形態によれば、ダイパッド4に半導体チップを搭載する際に加熱が必要な場合に、リード固定用封止樹脂の貫通孔を介してダイパッドの裏面側から加熱が可能となるため、昇温時間が短縮され生産効率が向上する。
【0023】
本発明の第2の実施形態であるリードフレーム及び半導体装置は、リード固定用封止樹脂の形状以外については、第1の実施形態と同様であり、効果についても同様の効果が得られる。
【0024】
(第3の実施形態) 本発明の第3の実施形態であるリードフレームは、図5(a)及び図5(b)に示すように、リード固定用封止樹脂でタイバ内部の領域を樹脂封止することにより、半導体装置の半導体チップ非搭載面側のパッケージを形成したものである。すなわち、リード固定用封止樹脂を半導体装置のパッケージの一部として使用するものである。
【0025】
本実施形態によれば、リード固定用封止樹脂とパッケージの封止樹脂との界面が存在しないため、耐湿性や温度サイクル等の半導体装置の信頼性が向上する。また、リード固定用封止樹脂の封入金型の構造が簡単になり、パッケージの封止樹脂の封入金型とも兼用できるため、製造費用が低減できる。
【0026】
本発明の第3の実施形態であるリードフレーム及び半導体装置は、リード固定用封止樹脂の形状以外については、第1の実施形態と同様であり、効果についても同様の効果が得られる。
【0027】
尚、本発明のリードフレーム及び半導体装置は、上記の実施形態に限定されるものではなく、本発明の要旨を逸脱しない範囲内において種々変更を加え得る。
【0028】
【発明の効果】
以上、説明したように、リードフレームの半導体チップ非搭載面側で各リードをリード固定用封止樹脂により連結、固定したことを特徴とするリードフレーム及びそれを用いた半導体装置によれば、各リードの変形とそれに起因するボンディング不良の発生が防止できると共に、アウトガスと遊離イオンの少ない封止樹脂をリード固定用封止樹脂として用いているため、ワイヤボンディングの信頼性が改善されるという優れた産業上の効果を奏し得る。
【0029】
また、リード固定用封止樹脂と半導体装置のパッケージの封止樹脂が同一材料であり線膨張率等の物性値が同一であるため、固定用テープ等の異種材料を用いた場合に比較し、熱ストレスに強い構造が得られるという優れた産業上の効果を奏し得る。
【図面の簡単な説明】
【図1】本発明によるリードフレームの第1の実施形態を示す平面図。
【図2】図1X−X断面図。
【図3】(a)本発明による半導体装置の実施形態を示す平面図。
(b)(a)の半導体装置の断面図
【図4】(a)本発明によるリードフレームの第2の実施形態を示す平面図。
(b)(a)のリードフレームの断面図。
【図5】(a)本発明によるリードフレームの第3の実施形態を示す平面図。
(b)(a)のリードフレームの断面図。
【図6】(a)従来の半導体装置を示す断面図。
(b)従来のリードフレームを示す平面図。
【図7】(a)リード変形対策リードフレームの公知例を示す平面図。
(b)(a)のリードフレームのリード部断面図。
【図8】(a)別のリード変形対策リードフレームの公知例を示す平面図。
【図9】(a)別のリード変形対策リードフレームの公知例を示す平面図。
(b)(a)のリードフレームのリード部断面図。
【符号の説明】
1 半導体装置
2 リードフレーム
3 半導体チップ
4 ダイパッド
5 吊りリード
6 リード
7 タイバ
8 金属ワイヤ
9 封止樹脂
9a リード固定用封止樹脂
10 貫通孔
11 液状連結用樹脂
12 固定用テープ
13 絶縁性テープ
14 熱硬化性接着剤
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a lead frame and a semiconductor device using the lead frame, and more particularly to preventing deformation of inner leads and improving reliability.
[0001]
[Prior art]
An example of the semiconductor device will be described with reference to FIG. In the drawing, reference numeral 2 denotes a lead frame having a structure shown in FIG. 6B, in which a die pad 4 on which a semiconductor chip 3 is mounted is arranged via suspension leads 5 and a large number of leads are directed toward the die pad 4. 6 are extended, and intermediate portions of the respective leads 6 are connected by tie bars 7. Using this lead frame, the semiconductor chip 3 is first mounted on the die pad 4, electrodes (not shown) on the semiconductor chip are connected to the tips of the leads 6 with metal wires 8, and the area surrounded by the tie bars 7 is sealed. After covering with the sealing resin 9, unnecessary portions such as the tie bars 7 and the suspension leads 5 exposed from the sealing resin 9 are cut and removed, and individual semiconductor devices 1 are obtained.
[0002]
In such a semiconductor device, the lead frame used for the semiconductor device has been increased in the number of pins and the pitch has been narrowed in accordance with the recent demand for higher density, and the thinner and thinner lead tip portion has been deformed and caused by this. Poor bonding is a problem.
[0003]
To solve this problem, a method of fixing the upper surface and the side surface of the intermediate portion of the lead 6 with the liquid connecting resin 11 as shown in FIGS. 7A and 7B (see Patent Document 1), and a method as shown in FIG. No. 6 discloses a method of fixing the upper surface of the distal end portion with a fixing tape (see Patent Document 2).
[0004]
Further, as shown in FIGS. 9A and 9B, a method of fixing the lower surface and the side surface of the distal end portion of the lead 6 with a thermosetting adhesive 14 applied on an insulating tape 13 is also disclosed (Japanese Patent Application Laid-Open (JP-A) no. Reference 3).
[0005]
[Patent Document 1]
JP-A-11-26684 (page 3, FIGS. 1-2)
[Patent Document 2]
Japanese Patent No. 3116940 (pages 2-3, FIG. 3)
[Patent Document 3]
Japanese Patent Publication No. 07-93406 (pages 2-3, Fig. 1 (c), Fig. 2)
[0006]
[Problems to be solved by the invention]
However, the above-described lead frame has the following remaining problems. That is, since the methods of Patent Documents 1 to 3 use a liquid resin, a thermoplastic or thermosetting adhesive, there is a problem that reliability of wire bonding is deteriorated due to outgassing and migration of free ions generated during curing. there were.
[0007]
Further, those using a tape base material such as polyimide as disclosed in Patent Documents 2 and 3 are liable to lead deformation due to a heat history at the time of mounting a semiconductor chip or wire bonding, and a problem that a fixing tape and a sealing resin are used. Due to the difference in physical property values such as the coefficient of linear expansion, there is a problem that it is vulnerable to thermal stress.
[0008]
SUMMARY OF THE INVENTION It is an object of the present invention to provide a lead frame in which the reliability of wire bonding is improved without causing deformation of leads and bonding defects caused by the deformation.
[0009]
It is another object of the present invention to provide a semiconductor device in which the reliability of wire bonding and the resistance to thermal stress are improved without deformation of leads and bonding defects caused by the deformation.
[0010]
[Means for Solving the Problems]
According to the lead frame in which the leads are connected and fixed by the lead fixing sealing resin on the non-semiconductor chip mounting surface side of the present invention and the semiconductor device using the same, deformation of each lead and occurrence of bonding failure caused by the lead frame are prevented. In addition, the reliability of wire bonding is improved because the sealing resin having less outgas and free ions is used as the sealing resin for fixing the leads.
[0011]
In the lead frame according to the first aspect of the present invention, a die pad on which a semiconductor chip is mounted is arranged via a suspension lead, a number of leads are extended toward the die pad, and an intermediate portion of each lead is connected to a tie bar. The leads are connected and fixed by a lead fixing sealing resin on the side of the lead frame on which the semiconductor chip is not mounted.
[0012]
The semiconductor device according to claim 4 of the present invention mounts a semiconductor chip on a die pad using a lead frame in which each lead is connected and fixed by a lead fixing sealing resin on a semiconductor chip non-mounting surface side. After electrically connecting a large number of leads extending toward the electrodes of the semiconductor chip, a region surrounded by a tie bar is covered with a sealing resin.
[0013]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings, using the same reference numerals for the same components.
[0014]
First Embodiment A lead frame according to a first embodiment of the present invention has a die pad 4 on which a semiconductor chip is mounted as shown in FIG. 1 and FIG. 5 and a plurality of leads 6 are extended toward the die pad 4, and an intermediate portion of each lead 6 is connected by a tie bar 7 in the lead frame on the non-semiconductor chip mounting surface side of the lead frame. The leads 6 are connected and fixed by a lead fixing sealing resin 9a. The two-dot chain line in FIG. 2 is an imaginary line showing the outer shape of the package of the assembled semiconductor device.
[0015]
In the semiconductor device according to the first embodiment of the present invention, as shown in FIGS. 3A and 3B, the leads 6 are connected by a lead fixing sealing resin 9a on the non-semiconductor chip mounting surface side. The semiconductor chip 3 is mounted on the die pad 4 by using the fixed lead frame 2, and after electrically connecting a large number of leads 6 extending toward the die pad 4 to the electrodes of the semiconductor chip 3, A region surrounded by the tie bar 7 is covered with a sealing resin 9.
[0016]
The connection and fixation of the leads by the lead fixing sealing resin are performed by transfer encapsulation, which is a known technique, after forming the leads by stamping or etching.
[0017]
As the lead fixing sealing resin, the same material as the sealing resin 9 having a small amount of outgas and free ions usually used as a package of a semiconductor device is used.
[0018]
In addition, the fixing portion of the lead fixing sealing resin is preferably provided between the lower surfaces of the leads and between the side surfaces of the leads, since the fixing strength is improved and the structure of the encapsulating mold is simplified. May be.
[0019]
According to the present embodiment, as shown in FIG. 2, since the leads 6 are connected and fixed by the lead fixing sealing resin 9a, it is possible to prevent the deformation of each lead and the occurrence of bonding failure due to the deformation, and Since the sealing resin having less outgas and free ions is used as the sealing resin for fixing the leads, the reliability of wire bonding is improved. In addition, since the sealing resin 9a for fixing the lead and the sealing resin 9 of the package of the semiconductor device are the same material and have the same physical properties such as linear expansion coefficient, they are compared with the case where different materials such as fixing tape are used. In addition, a structure resistant to heat stress can be obtained.
[0020]
The semiconductor device of the present invention shown in FIGS. 3 (a) and 3 (b) has been described up to the completion of resin encapsulation, but thereafter, if necessary, exterior plating of the lead frame, marking, tie bars and suspension. Performs lead cutting and lead bending.
[0021]
Second Embodiment As shown in FIGS. 4A and 4B, a lead frame according to a second embodiment of the present invention includes a through hole 10 formed in a lead fixing sealing resin 9a. The semiconductor chip non-mounting surface of the die pad 4 is exposed inside. That is, the lead fixing sealing resin is formed in a rectangular frame shape, and the back surface of the die pad is exposed in the through hole.
[0022]
According to the present embodiment, when the semiconductor chip is mounted on the die pad 4 and heating is required, the heating can be performed from the back side of the die pad through the through hole of the lead fixing sealing resin. Time is shortened and production efficiency is improved.
[0023]
The lead frame and the semiconductor device according to the second embodiment of the present invention are the same as the first embodiment except for the shape of the lead fixing sealing resin, and the same effects can be obtained.
[0024]
Third Embodiment As shown in FIGS. 5A and 5B, a lead frame according to a third embodiment of the present invention uses a lead fixing sealing resin to cover the area inside the tie bar with resin. By sealing, a package on the side of the semiconductor device on which the semiconductor chip is not mounted is formed. That is, the lead fixing sealing resin is used as a part of the package of the semiconductor device.
[0025]
According to the present embodiment, since there is no interface between the lead fixing sealing resin and the package sealing resin, the reliability of the semiconductor device such as moisture resistance and temperature cycle is improved. In addition, the structure of the mold for encapsulating the lead-fixing sealing resin is simplified, and can be used also as the mold for encapsulating the resin for the package.
[0026]
The lead frame and the semiconductor device according to the third embodiment of the present invention are the same as those of the first embodiment except for the shape of the lead fixing sealing resin, and the same effects can be obtained.
[0027]
It should be noted that the lead frame and the semiconductor device of the present invention are not limited to the above embodiments, and various changes can be made without departing from the gist of the present invention.
[0028]
【The invention's effect】
As described above, according to the lead frame and the semiconductor device using the same, each lead is connected and fixed by the lead fixing sealing resin on the semiconductor chip non-mounting surface side of the lead frame. It is possible to prevent the deformation of the lead and the occurrence of bonding failure due to the lead, and to use the sealing resin with less outgas and free ions as the sealing resin for fixing the lead, so that the reliability of the wire bonding is improved. Industrial effects can be achieved.
[0029]
In addition, since the sealing resin for the lead fixing and the sealing resin for the package of the semiconductor device are the same material and have the same physical properties such as linear expansion coefficients, compared with the case where a different material such as a fixing tape is used, An excellent industrial effect that a structure resistant to heat stress can be obtained can be obtained.
[Brief description of the drawings]
FIG. 1 is a plan view showing a first embodiment of a lead frame according to the present invention.
FIG. 2 is a cross-sectional view of FIG. 1XX.
FIG. 3A is a plan view showing an embodiment of a semiconductor device according to the present invention.
4B is a cross-sectional view of the semiconductor device of FIG. 4A. FIG. 4A is a plan view of a lead frame according to a second embodiment of the present invention.
(B) Sectional drawing of the lead frame of (a).
FIG. 5 (a) is a plan view showing a third embodiment of the lead frame according to the present invention.
(B) Sectional drawing of the lead frame of (a).
FIG. 6A is a sectional view showing a conventional semiconductor device.
(B) A plan view showing a conventional lead frame.
FIG. 7A is a plan view showing a known example of a lead deformation countermeasure lead frame.
(B) The sectional view of the lead part of the lead frame of (a).
FIG. 8A is a plan view showing a known example of another lead deformation countermeasure lead frame.
FIG. 9A is a plan view showing a known example of another lead deformation countermeasure lead frame.
(B) The sectional view of the lead part of the lead frame of (a).
[Explanation of symbols]
REFERENCE SIGNS LIST 1 semiconductor device 2 lead frame 3 semiconductor chip 4 die pad 5 suspension lead 6 lead 7 tie bar 8 metal wire 9 sealing resin 9 a lead fixing sealing resin 10 through hole 11 liquid coupling resin 12 fixing tape 13 insulating tape 14 heat Curable adhesive

Claims (4)

半導体チップが搭載されるダイパッドを吊りリードを介して配置すると共に、ダイパッドに向かって多数本のリードを延在させ、各リードの中間部をタイバにて連結したリードフレームにおいて、リードフレームの半導体チップ非搭載面側で前記各リードをリード固定用封止樹脂により連結、固定したことを特徴とするリードフレーム。In a lead frame in which a die pad on which a semiconductor chip is mounted is arranged via suspension leads, a large number of leads extend toward the die pad, and intermediate portions of the leads are connected by tie bars, the semiconductor chip of the lead frame A lead frame, wherein the leads are connected and fixed on a non-mounting surface side by a lead fixing sealing resin. 請求項1に記載のリードフレームにおいて、リード固定用封止樹脂に形成した貫通孔内にダイパッドの半導体チップ非搭載面が露出していることを特徴とするリードフレーム。2. The lead frame according to claim 1, wherein a surface of the die pad on which the semiconductor chip is not mounted is exposed in a through hole formed in the lead fixing sealing resin. 請求項1に記載のリードフレームにおいて、リード固定用封止樹脂で前記タイバ内部の領域を樹脂封止することにより、半導体装置の半導体チップ非搭載面側のパッケージを形成したことを特徴とするリードフレーム。2. The lead frame according to claim 1, wherein a package inside the semiconductor chip non-mounting surface side of the semiconductor device is formed by resin-sealing a region inside the tie bar with a lead fixing sealing resin. flame. 半導体チップ非搭載面側で各リードをリード固定用封止樹脂により連結、固定しているリードフレームを用い、半導体チップをダイパッドに搭載し、ダイパッドに向かって延在する多数本のリードと前記半導体チップの電極とを電気的に接続したのち、タイバで囲まれた領域を封止樹脂にて被覆したことを特徴とする半導体装置。A semiconductor chip is mounted on a die pad using a lead frame connecting and fixing each lead with a lead fixing sealing resin on a semiconductor chip non-mounting surface side, and a large number of leads extending toward the die pad and the semiconductor A semiconductor device, comprising: electrically connecting an electrode of a chip; and covering a region surrounded by a tie bar with a sealing resin.
JP2003119661A 2003-04-24 2003-04-24 Lead frame and semiconductor device using the same Pending JP2004327683A (en)

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