JP2005122497A - Test circuit creation method using analog function description - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To simplify a operation which prepares a plurality of test circuits, matched with a plurality of operation verification items in the case of an analog circuit, and to execute simulation operations required for each of these test circuits. <P>SOLUTION: A circuit block, where the functions of a plurality of test circuits are prepared by one analog function descriptions, is included, and a function of switching the operations for the analog function descriptions according to a parameter or a control signal from the outside is included, in order to make one test circuit continuously execute a plurality of operation verifications by one-time simulation, and a function of suppressing rapid changes in waveform at the switching is included. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an analysis method for simulating the operation of an electronic circuit on a computer.

  In the case of performing analog circuit verification using a simulator, a test circuit in which a signal source corresponding to an input signal, a load element, etc. is created as a circuit diagram separately from the circuit to be inspected and connected to the circuit to be inspected. Had to create.

  For the verification of analog circuits, it is necessary to verify various characteristics and circuit functions such as AC characteristics, DC characteristics, transient characteristics, etc. However, since the power supply voltage and the circuit to be added differ for each characteristic and function, multiple tests are required. It is necessary to create a circuit.

  Therefore, normally, a table called an inspection standard table is first created, and test circuits corresponding to these items are manually created for the number of items. Further, it is necessary to execute the simulation for the number of items to be verified. In this case, the operation of replacing the test circuit and performing the simulation is repeated for the number of items to be verified.

A test circuit in a conventional circuit simulation will be described.
FIG. 4 is an example of an inspection standard table.
P1 to P5 in the first row of the table represent the pin names of the circuit to be inspected.

  Test 1 to test 3 and test 5 to test 7 in each one row from the second row of the table indicate one inspection content, and a column represents an element connected to a pin of a block written in the first row. For example, if “2.5V” is written at “Pin P1,” it means that a voltage source of “2.5V” is connected to “Pin P1,” and “R1.0KΩ” is written. If it is, it means “connect a resistance of 1.0 KΩ”, and if “SP5” is written, it means “short-circuit with pin P5”.

FIG. 5 shows a test circuit corresponding to the inspection standard table of FIG.
FIG. 5A is a test circuit corresponding to the item test1 in FIG. 4, and is for confirming the DC characteristics of the circuit.

FIG. 5B corresponds to the item test 5 in FIG. 4 and is a circuit for confirming the transient characteristics of the circuit.
In FIG. 5, reference numeral 501 denotes a circuit to be inspected, such as an operational amplifier or a comparator. Reference numerals 502 to 504 denote voltage sources, which are power sources and input signals of circuits to be inspected. Reference numeral 505 denotes a load resistance.

  When performing operation verification using these test circuits, first, when measuring DC characteristics, simulation is performed using the circuit diagram of FIG. Next, when measuring transient characteristics, simulation is performed by replacing the circuit diagram in FIG.

As described above, various operation verifications are performed while replacing the test circuit according to the item to be measured.
JP 2000-163455 A

  However, in the case of a large-scale analog circuit, there are very many items to be measured, and in the case of a circuit with several thousand elements, there may be hundreds of verification items, so it is possible to create multiple test circuits or test circuits. There is a problem that it takes a very long time to perform the operation verification by repeatedly performing the simulation while switching.

  The present invention solves the above-described conventional problems, and an object thereof is to provide a test circuit creation method capable of performing a plurality of operation verifications in one simulation and reducing the work related to the simulation execution.

  The test circuit creation method of the present invention uses an analog function description instead of creating an element level circuit diagram of an element connected to a pin of a circuit to be verified for operation verification of an analog circuit by circuit simulation. Connected as an analog function description block created in this way, this analog function description block has functions equivalent to multiple test circuits, and switches the functions of the analog function description block to execute multiple operation verifications It is characterized by.

  In addition, during the simulation, the function of the block created by the analog function description is switched by changing the parameter of the analog function description block or changing the control signal from the outside.

  In addition, a plurality of test circuits corresponding to a plurality of inspection items are expressed in a table format of element values connected to the inspection item numbers and circuit pins to be inspected, and this table is an analog function corresponding to the test circuit. The description is automatically converted into a description by a computer.

  In addition, when switching the function of analog function description by parameter or control signal, the voltage of the power supply or input signal is not switched instantaneously, but it is changed gradually over time to improve the convergence of the simulation. Features.

  The present invention simplifies the work related to the test circuit creation and can reduce the work related to the execution of the simulation, eliminating the need to create a plurality of test circuits that have been conventionally performed as an element level circuit diagram. Because only one test circuit using the function description block needs to be created, the time required for creating the circuit diagram can be greatly shortened, and conventionally only one item can be operated in one simulation. Although it could not be verified, it is possible to verify the operation of multiple items in one simulation by changing the voltage of the control pin during the simulation, replacing the circuit diagram and starting the simulation This eliminates the need for a test circuit, and thus the test time can be greatly reduced.

Hereinafter, a test circuit creation method of the present invention will be described based on specific embodiments shown in FIGS.
FIG. 1 shows a test circuit used in the practice of the present invention.

  In the figure, the test circuit includes a circuit 101 to be inspected such as an operational amplifier and a comparator, to which a power source, an input signal source, a load element, and the like are connected. These are not a circuit diagram at the element level, but Verilog-A or the like. They are connected as an analog function description block 102 created using an analog function description language.

  The analog function description block 102 has pins P1 to P5 having the same name as the circuit 101 to be inspected, and each pin is directly connected to a pin of the circuit to be inspected. In addition to this, the analog function description block 102 has a pin PM for switching the function of the analog function description block 102, and this pin PM is connected to the voltage source 103.

  As described above, the contents of the analog function description block 102 include the power supply, the input signal source, the load resistance, and the like, which are described in an analog function description language such as Verilog-A, and perform the same operation as the element level test circuit. Has been created. The analog function description can represent a circuit equivalent to the element level test circuit in the circuit simulator, and the accuracy and speed in the operation during simulation are the same as the circuit diagram created using elements such as resistors and voltage sources. is there.

  Usually, a plurality of test circuits are required for operation verification of different functions and characteristics. In this method, the functions of a plurality of test circuits are realized as one circuit block by using an analog function description. In this case, since it is necessary to switch the function of the analog function description depending on the operation verification item, a pin PM as a control pin is added to the function description block, and the operation of the function description can be switched by the voltage applied to the control pin. However, it is also possible to switch using circuit parameters.

FIG. 2 shows the operation of the analog function description block 102 when the control voltage applied to the pin PM is changed.
As shown in FIG. 2A, when the voltage at the pin PM is changed during the simulation, the operation of the circuit can be switched during the simulation.

  In this example, when the simulation of the item 1001 is performed, if a voltage of 1001 mV is applied to the pin PM, the analog function description block 102 operates as a test circuit of the item 1001, and if a voltage of 1002 mV is applied, the analog function description block The system 102 operates as a test circuit for the item 1002.

  However, when switching the test circuit by changing the voltage of the pin PM, if the voltage of the pin of the circuit to be inspected is changed abruptly in one unit time in the simulation, the circuit state changes abruptly, and the simulator Often fail to follow circuit changes, resulting in errors such as inability to converge. Therefore, in this system, a gradient is given to the voltage change when the voltage is switched, so that the circuit state can be gradually changed.

  2B and 2C are examples of changes in the output signal. In this case, the voltage of the pin P2 is changed from 0V to 5V by switching the inspection item at time t1 seconds. FIG. 2B is a graph of the pin voltage when no countermeasure is taken. For example, if the unit time for calculation of the simulator is 1 psec, the voltage will be 5 V in t1 + 1p sec, and will rise rapidly. To do.

  FIG. 2 (c) shows the voltage change of this method. If the rise time is specified as 1 n seconds, for example, the voltage changes gradually and reaches 5 V in t1 + 1 n seconds. This makes it possible to perform a stable simulation even when the test circuit is switched.

Next, a function description generation method will be described with reference to FIG.
When creating a test circuit necessary for operation verification, first, an inspection standard table as shown in FIG. The leftmost column of the inspection standard table corresponds to the item of operation verification, but this value is an integer so that it can be expressed by voltage.

Next, a function description corresponding to the test circuit is automatically converted from the inspection standard table by a computer using a conversion program.
FIG. 3B shows an example in which a function description is generated using Verilog-A. Since the inspection standard table describes the pin voltage and the element to be added for each row, the conversion program converts it into a function description corresponding to each row of the inspection standard table as shown in FIG. . Further, a mechanism for performing conditional branching corresponding to the voltage at the pin PM is incorporated so that the operation is switched according to the voltage applied from the pin PM, so that the operation of the test circuit can be switched. In addition, in order to prevent the voltage from changing suddenly when the analog function description block 102 is switched, a mechanism for smoothing the waveform by using a transton filter as shown in FIG.

  The present invention can greatly improve the process of confirming the operation by performing simulation analysis of the electronic circuit, and can contribute to shortening the production period of various electronic circuits manufactured by integration.

The figure which shows the test circuit of this invention The figure which shows the switching operation of a test circuit function in the embodiment Diagram showing conversion from inspection standard table to function description in the same embodiment Figure showing a conventional inspection standards table Diagram showing a conventional test circuit

Explanation of symbols

101 inspection target circuit block 102 analog function description block 103 inspection content control voltage source 501 inspection target circuit block 502 first voltage source 503 second voltage source 504 third voltage source 505 load resistance

Claims (4)

When verifying the operation of an analog circuit by circuit simulation,
Instead of creating an element-level circuit diagram for the elements connected to the pins of the circuit to be verified, connect them as analog function description blocks created using analog function descriptions.
This analog function description block has a function corresponding to a plurality of test circuits, and a test circuit creation method for executing a plurality of operation verifications by switching the functions of the analog function description block. The test circuit creation method according to claim 1, wherein during the simulation, the function of the block created by the analog function description is switched by changing a parameter of the analog function description block or changing a control signal from the outside. Express multiple test circuits corresponding to multiple test items in a tabular form of element values connected to test item numbers and circuit pins to be tested,
3. The test circuit creation method according to claim 1, wherein the table is automatically converted into an analog function description corresponding to the test circuit by a computer. 2. When the function of the analog function description is switched by a parameter or a control signal, the voltage of the power supply or the input signal is not switched instantaneously but is gradually changed with time to improve the convergence of the simulation. The test circuit creation method according to claim 2.

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