JP2005322955A - Ofdm demodulator - Google Patents

Abstract

To improve clock frequency synchronization in an OFDM demodulator and to improve performance to follow transmission path environment fluctuation and synchronization pull-in performance.
A first symbol timing generator for estimating a transmission symbol boundary of an OFDM signal and generating a symbol timing signal, a clock frequency error estimator for estimating a frequency error, and controlling an oscillation frequency based on the clock frequency error. Calculating a time error of the symbol timing signal generated by the first clock generation unit to be performed, the second symbol timing generation unit generating a symbol timing signal at a predetermined clock interval, and the first and second symbol timing generation units A time error calculating unit for controlling the oscillation frequency based on the time error, a FIFO memory unit for writing the output of the quadrature detection unit to the memory and reading the data from the memory, and the output of the FIFO memory unit Is provided with a Fourier transform unit for performing Fourier transform.
[Selection] Figure 1

Description

  The present invention relates to an OFDM (Orthogonal Frequency Division Multiplexing) system demodulator used in domestic terrestrial digital broadcasting and the like, and more particularly, to high-speed pull-in in clock frequency synchronization and improvement of tracking performance to a transmission path environment.

  The OFDM system is adopted in domestic terrestrial digital broadcasting systems (ISDB-T: Integrated Services Digital Broadcasting-Terrestrial transmission, Non-Patent Document 1), and European terrestrial digital broadcasting systems (DVB-T: Digital Video Broadcasting, etc.). This is a multi-carrier digital transmission system.

  Hereinafter, a configuration example of the OFDM demodulator will be described with reference to the drawings.

  FIG. 3 shows the configuration of the OFDM demodulator. From the OFDM signal received by the antenna 31, only a signal in a desired frequency band is extracted by the tuner. The A / D converter 33 converts the analog signal input from the tuner 32 into a digital signal. The quadrature detection unit 34 converts the output of the A / D conversion unit 33 in the intermediate frequency band into a desired base frequency band based on the local oscillation frequency (fc ′). The symbol timing generation unit 35 estimates a transmission symbol boundary of the OFDM signal from the quadrature detection output, and generates a symbol timing signal. The clock frequency error estimator 36 estimates and outputs a sampling clock frequency error from the quadrature detection output. The clock generator 37 controls the oscillation frequency based on the output of the clock frequency error estimator 36 to generate a clock. The clock generated by the clock generation unit 37 is input to each unit of the demodulation device. The Fourier transform unit 38 performs a Fourier transform on the output of the quadrature detection unit 34 based on the symbol cut-out timing input from the symbol timing generation unit 35. The equalization unit 39 estimates transmission path characteristics from the output of the Fourier transform section 38, and performs equalization processing based on the estimated transmission path characteristics. The error correction unit 310 performs error correction on the signal output from the equalization unit 39. The decoding unit 311 decodes data encoded by, for example, a moving picture experts group (MPEG) method, and reproduces data such as video and audio. The display device 312 provides the viewer with the data such as video / audio output from the decoding unit 311 via a display / speaker.

  In the above configuration of the OFDM demodulator, particularly symbol cutout (symbol timing generation) and clock frequency synchronization will be described.

  FIG. 9A shows the configuration of the OFDM signal. An OFDM signal transmission symbol is composed of a guard interval Tg and an effective symbol Tu. In the demodulator, the data of the effective symbol period is cut out from this transmission symbol and Fourier transform is performed (symbol cut out). At this time, if clipping is performed at an incorrect timing and adjacent transmission symbols are mixed into the clipped data, interference occurs between the symbols and signal quality deteriorates (intersymbol interference). Also, if there is a sampling frequency shift, the orthogonality of the OFDM signal is lost, interference between subcarriers occurs, and signal quality deteriorates (intercarrier interference).

  Patent Document 1 describes a symbol cut-out and clock frequency error correction technique for reducing intersymbol interference and intercarrier interference.

  FIG. 5 shows a configuration example of a symbol cut-out and clock frequency error correction unit in the conventional OFDM demodulator described in Patent Document 1. The quadrature detection unit 51 converts the OFDM signal in the intermediate frequency band into a desired base frequency band based on the local oscillation frequency (fc ′). The symbol timing generator 52 estimates a transmission symbol boundary from the output of the quadrature detector 51 and generates a symbol timing signal. The clock frequency error estimator 53 estimates and outputs a sampling clock frequency error based on the outputs of the quadrature detector 51 and the symbol timing generator 52. The clock generation unit 54 controls the oscillation frequency based on the output of the clock frequency error estimation unit 53 and generates a clock. The clock generated by the clock generator 54 is input to each part of the demodulator. The Fourier transform unit 55 performs Fourier transform on the output of the quadrature detection unit 51 based on the symbol cut-out timing input from the symbol timing generation unit 52.

  FIG. 4 shows a configuration example of the symbol timing generator 52. The delay unit 43 delays the output of the quadrature detection unit 51 by an effective symbol period Tu. The conjugate complex number calculation unit 42 calculates the conjugate complex number output from the delay unit 43. The complex multiplier 41 calculates and outputs the complex multiplication of the output of the orthogonal detector 51 and the output of the conjugate complex number calculator 42. The interval integrator 44 integrates the output of the complex multiplier 41 over the guard interval interval Tg. The maximum value detection unit 45 calculates the power of the output of the interval integration unit 44, detects the maximum value, and generates a symbol timing signal using the time when the maximum value is reached as the symbol cut-out timing.

  The operation of the symbol timing generation unit configured as described above will be described with reference to FIG. FIG. 9A shows the configuration of the transmission symbol of the OFDM signal. The OFDM transmission symbol Ts includes a guard interval section Tg and an effective symbol section Tu. In the guard interval section Tg, for example, in the ISDB-T system, data at the rear of the effective symbol period is copied. FIG. 9B shows the output of the delay unit 43. The delay unit 43 delays the OFDM signal shown in FIG. 9A by the effective symbol period Tu and outputs it. At this time, the output of the delay unit 43 is the same signal as the OFDM signal shown in FIG. 9A in the guard interval, and has a strong correlation.

  FIG. 9C shows the output of the complex multiplier 41. Since the output of the delay unit 43 and the output of the quadrature detection unit 51 are the same signal in the guard interval interval, the output of the complex multiplication unit 41 has a strong signal on the real axis in the guard interval interval.

  FIG. 9D shows the output of the interval integration unit 44. By integrating the output of the complex multiplier 41 shown in FIG. 9C over the guard interval section Tg, a triangular waveform shown in FIG. 9D is obtained. The maximum value detector 45 calculates the power of the correlation waveform and detects the maximum value, thereby estimating the transmission symbol boundary of the OFDM signal (FIG. 9 (e)).

  FIG. 6 shows a configuration example of the clock frequency error estimation unit 53. The delay unit 61 delays the output of the quadrature detection unit 51 by an interval obtained by subtracting one sample interval from the effective symbol interval Tu. The filter units 62 and 63 allow the output of the quadrature detection unit 51 to pass signal components in different frequency regions. The conjugate complex number calculation units 64 and 65 calculate and output the conjugate complex numbers of the outputs of the filter units 62 and 63, respectively. The complex multipliers 66 and 67 calculate and output the quadrature detection output and the complex multiplication of the conjugate complex number calculation units 64 and 65, respectively. Arc tangent calculation units 611 and 612 extract phase information from the outputs of the interval integration units 68 and 69 and output the phase information. Adder 610 subtracts the output of arctangent calculator 611 from the output of arctangent calculator 612. The loop filter unit 613 takes in the output of the addition unit 610 at the time of output of the symbol timing generation unit 52 and performs filter processing with a predetermined time constant.

  FIG. 7 shows a configuration example of the filter unit 62. The filter unit 62 includes a delay unit 71 and a multiplier 72.

  FIG. 8 shows a configuration example of the filter unit 63. The filter unit 63 includes delay units 82 and 83, multipliers 81 and 84, and an adder 85.

  The clock frequency error estimation unit configured as described above can estimate the sampling frequency error.

  Next, clock frequency error correction of the OFDM demodulator described in Patent Document 2 will be described with reference to the drawings.

  FIG. 2 shows a configuration example of the OFDM demodulator described in Patent Document 2.

  The quadrature detection unit 21 converts the OFDM signal in the intermediate frequency band into a desired base frequency band based on the local oscillation frequency (fc ′). The first symbol timing generation unit 22 estimates a transmission symbol boundary from the output of the quadrature detection unit 51 and generates a symbol timing signal. The second symbol timing generator 23 generates a symbol timing signal at a predetermined fixed clock interval. The time error calculation unit 24 calculates and outputs a time error between the output of the first symbol timing generation unit 22 and the second symbol timing 23. The clock generator 25 controls the oscillation frequency based on the output of the time error calculator 24 and generates a clock. The clock generated by the clock generator 25 is input to each part of the demodulator. The Fourier transform unit 26 performs a Fourier transform on the output of the quadrature detection unit 21 based on the symbol cutout timing input from the second symbol timing generation unit 23.

  Since the symbol timing generation unit 22 can have the same configuration as the symbol timing generation unit described in Patent Document 1, description thereof is omitted.

  According to the above configuration, since the symbol timing is controlled to be a constant clock interval, the clock frequency error is corrected as a result.

As described above, according to the OFDM demodulators described in Patent Document 1 and Patent Document 2, it is possible to configure an OFDM demodulator that reduces intersymbol interference and intercarrier interference.
Japanese Patent No. 2774961 Japanese Patent No. 2871655 Standard “Digital Terrestrial Television Broadcasting Transmission System” ARIB STD-B31

  However, the conventional configuration has a problem that it cannot follow a change in the transmission path environment such as multipath at high speed.

  FIG. 10 shows a principle diagram of symbol extraction in a multipath environment. It is assumed that the delayed wave shown in FIG. 10 (a) 'is added to the OFDM signal shown in FIG. 10 (a). The output of the delay unit 43 (FIG. 10B) has a correlation in the guard interval section of the main wave and the delayed wave.

  At this time, the outputs of the complex multiplier 41 and the interval integrator 44 are as shown in FIG. 10 (c) and FIG. 10 (d), respectively. For example, when the symbol timing is detected based on the maximum value, the maximum value is not uniquely obtained as shown in FIG. 10E, and the symbol timing varies according to the delay amount of the delayed wave. Even when the symbol timing is uniquely determined by a detection method other than the maximum value, for example, when the delay wave power and the delay time vary as in a mobile environment, the symbol timing varies.

  As described above, in the environment where the symbol timing fluctuates, in the OFDM demodulator described in Patent Document 1, there are cases where the interval between the symbol timings input to the Fourier transform unit does not become a fixed number of clocks. When the symbol interval is not guaranteed, the timing design and circuit design after the Fourier transform unit are complicated, and the circuit scale is increased.

  The OFDM demodulator described in Patent Document 2 is devised to follow the fluctuations in the transmission path environment by guaranteeing the symbol interval and controlling the clock frequency. However, when the time position of the symbol timing is moved, it is necessary to set a clock frequency different from the original clock frequency, and inter-carrier interference occurs due to this clock frequency error. In order to avoid inter-carrier interference, it is necessary to suppress the control amount of the clock frequency, and as a result, the performance to follow the transmission environment deteriorates.

  In order to solve the above-described conventional problems, an OFDM demodulator according to the present invention is an OFDM demodulator that receives and demodulates an OFDM signal composed of transmission symbols composed of an effective symbol interval Tu and a guard interval interval Tg. An orthogonal detector for converting the OFDM signal to a predetermined base frequency band, and a first symbol timing generator for estimating a transmission symbol boundary of the OFDM signal from an output of the orthogonal detector and generating a symbol timing signal A clock frequency error estimator that estimates a sampling clock frequency error based on the output of the quadrature detector and the output of the first symbol timing generator, and the clock frequency error estimated by the clock frequency error estimator A first clock generator for controlling the oscillation frequency based on the A second symbol timing generation unit that generates a symbol timing signal at a fixed clock interval, a symbol timing generated by the first symbol timing generation unit, and a symbol generated by the second symbol timing generation unit Generated by a time error calculator that calculates a time error of the timing signal, a second clock generator that controls the oscillation frequency based on the time error calculated by the time error calculator, and the first clock generator FIFO (First-In First-Out) memory that sequentially writes the outputs of the quadrature detection unit to the memory at the clock timing and reads data sequentially from the memory at the clock timing generated by the second clock generation unit And the output of the FIFO memory And a Fourier transform unit that performs a Fourier transform on the basis of the symbol timing generated by the second symbol timing generation unit.

  An OFDM demodulator that receives and demodulates an OFDM signal composed of transmission symbols composed of an effective symbol interval Tu and a guard interval interval Tg, and converts the OFDM signal into a predetermined base frequency band. A first symbol timing generation unit that estimates a transmission symbol boundary of the OFDM signal from an output of the orthogonal detection unit and generates a symbol timing signal, a first clock generation unit, and a predetermined constant clock A second symbol timing generator that generates symbol timing signals at intervals; a symbol timing generated by the first symbol timing generator; and a time error between the symbol timing signals generated by the second symbol timing generator A time error calculation unit for calculating the time error, and the time error calculation unit A second clock generator for controlling the oscillation frequency based on the time error calculated by the above, and at the clock timing generated by the first clock generator, the outputs of the quadrature detector are sequentially written in the memory, At the clock timing generated by the second clock generation unit, a FIFO (First-In First-Out) memory unit that sequentially reads data from the memory, and an output of the FIFO memory unit by the second symbol timing generation unit A Fourier transform unit that performs a Fourier transform based on the generated symbol timing; and a clock frequency error estimator that estimates a sampling clock frequency error from an output of the Fourier transform unit, wherein the first clock generation unit includes: Based on the output of the frequency error estimator, the oscillation frequency It is characterized by controlling the number.

  Further, the FIFO memory unit adjusts the amount of data stored in the memory by stopping data writing or data reading during the guard interval Tg.

  The OFDM demodulator according to the present invention realizes clock frequency synchronization that follows fluctuations in the transmission path environment at high speed without causing intercarrier interference. Also, by guaranteeing the number of clocks at one transmission symbol interval in the synchronization unit, the timing design and circuit design after the Fourier transform unit are facilitated, and the circuit scale is reduced.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment)
FIG. 1 shows a configuration example of a symbol cut-out and clock frequency error correction unit in the OFDM demodulator according to the embodiment of the present invention. The quadrature detection unit 11 converts the OFDM signal in the intermediate frequency band into a desired base frequency band based on the local oscillation frequency (fc ′). The first symbol timing generator 12 estimates a transmission symbol boundary from the output of the quadrature detector 11 and generates a symbol timing signal. The clock frequency error estimator 13 estimates and outputs a sampling clock frequency error based on the outputs of the quadrature detector 11 and the first symbol timing generator 12. The first clock generator 14 controls the oscillation frequency based on the output of the clock frequency error estimator 13 to generate a clock. The clock generated by the clock generation unit 14 is input to an AD conversion unit (not shown), the quadrature detection unit 11, the symbol timing generation unit 12, the clock frequency error estimation unit 13, and the FIFO memory unit 18. The second symbol timing generation unit 15 generates a symbol timing signal at a predetermined fixed clock interval. Usually, the clock interval is set to the number of samples included in the transmission symbol. The time error calculator 16 calculates and outputs a time error between the first symbol timing generator 12 and the second symbol timing generator 15. The second clock generator 17 controls the oscillation clock frequency based on the output of the time error calculator 16 and generates a clock. The clock generated by the second clock generation unit 17 is a FIFO memory unit 18, a Fourier transform unit 19, a second symbol timing generation unit 15, a time error calculation unit 16, and a signal processing unit (equalization after the Fourier transform unit). And an error correction unit (not shown). A FIFO (First-In First-Out) memory unit 18 sequentially writes the outputs of the quadrature detection unit 11 into the memory in accordance with the clock timing output from the first clock generation unit, and from the second clock generation unit 17. Data is sequentially read from the memory according to the output clock timing and output. The Fourier transform unit 19 performs a Fourier transform on the output of the FIFO memory unit 18 based on the symbol timing of the second symbol timing generation unit 15.

  The operation of the OFDM demodulator configured as described above will be described.

  The first symbol timing generator 12 and the clock frequency error estimator 13 can have the same configuration as the OFDM demodulator described in Patent Document 1. The clock output from the first clock generation unit is controlled only by the output of the clock frequency error estimation unit regardless of the time position of the symbol timing. By performing control so that the clock frequency error is minimized, a signal with reduced inter-carrier interference due to the clock frequency error can be obtained.

  The principle of the second clock generation is shown in FIG. The first symbol timing is a transmission symbol boundary estimated from the received OFDM signal. The second symbol timing is generated at a constant clock interval. When the time positions of the first symbol timing and the second symbol timing are compared, and the first symbol timing precedes the second symbol timing in time, the oscillation frequency of the second clock generator is increased. When the first symbol timing is delayed with respect to the second symbol timing, the clock frequency of the second clock generator is lowered. By repeating the above operation, the first symbol timing and the second symbol timing can be made the same without changing the clock interval of the second symbol timing.

  In the OFDM demodulator according to the present invention, the clock frequency error is minimized by the first clock generation unit to reduce inter-carrier interference. In addition, the number of clocks within the transmission symbol interval is guaranteed by the second clock generation unit, the timing design of the signal processing circuit after the Fourier transform unit is facilitated, and the circuit scale can be reduced. By using a FIFO memory for data transfer between the first clock and the second clock, it is possible to transfer data between clocks without degrading signal quality. Note that the memory capacity required for the FIFO memory can be reduced by adjusting the amount of data stored in the memory by stopping the writing or reading of the FIFO memory during the guard interval period.

  In the OFDM demodulator configured as described above, there is no risk of signal quality degradation due to inter-carrier interference even when the amount of fluctuation of the second clock generator is large. From this, even when the first symbol timing varies due to the variation in the transmission path environment, high-speed tracking is possible.

  Note that the clock frequency error correction unit can be arranged after the Fourier transform unit, and for example, the clock frequency error can be estimated from the phase variation amount of the pilot signal.

  The OFDM demodulator according to the present invention is useful as a domestic terrestrial digital broadcast demodulator capable of following high-speed changes in the transmission path environment. Also, it can be applied to the use of a transmission type demodulator employing the OFDM system such as European terrestrial digital broadcasting.

Configuration diagram of an OFDM demodulator according to an embodiment of the present invention Configuration diagram of conventional OFDM demodulator Overall configuration of OFDM demodulator Configuration diagram of symbol timing generator Configuration diagram of conventional OFDM demodulator Configuration of clock frequency error estimator The figure which shows the structural example of a 1st filter part. The figure which shows the structural example of a 2nd filter part. Symbol timing generation principle Operation principle diagram of symbol timing generation in multipath environment Operation principle diagram of the second clock generator

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Quadrature detection part 12 1st symbol timing generation part 13 Clock frequency error estimation part 14 1st clock generation part 15 2nd symbol timing generation part 16 Time error calculation part 17 2nd clock generation part 18 FIFO memory part 19 Fourier transform unit 21 Quadrature detection unit 22 First symbol timing generation unit 23 Second symbol timing generation unit 24 Time error calculation unit 25 Clock generation unit 26 Fourier transform unit 31 Antenna 32 Tuner 33 A / D conversion unit 34 Orthogonal detection unit 35 Symbol timing generation unit 36 Clock frequency error estimation unit 37 Clock generation unit 38 Fourier transform unit 39 Equalization unit 310 Error correction unit 311 Decoding unit 312 Display device 41 Complex multiplication unit 42 Conjugate complex number calculation unit 43 Delay unit 44 Interval integration unit 45 Maximum value detector 5 1 Quadrature detection unit 52 Symbol timing generation unit 53 Clock frequency error estimation unit 54 Clock generation unit 55 Fourier transform unit 61 Delay unit 62, 63 Filter unit 64, 65 Conjugate complex number calculation unit 66, 67 Complex multiplication unit 68, 69 Interval integration unit 610 Adder 611, 612 Arctangent calculator 613 Loop filter unit 71 Delayer 72 Multiplier 81 Multiplier 82, 83 Delayer 84 Multiplier 85 Adder

Claims (3)

An OFDM demodulator that receives and demodulates an OFDM signal composed of transmission symbols composed of an effective symbol interval Tu and a guard interval interval Tg,
An orthogonal detector for converting the OFDM signal into a predetermined base frequency band;
A first symbol timing generation unit that estimates a transmission symbol boundary of the OFDM signal from an output of the orthogonal detection unit and generates a symbol timing signal;
A clock frequency error estimator for estimating a sampling clock frequency error based on the output of the quadrature detector and the output of the first symbol timing generator;
A first clock generator for controlling the oscillation frequency based on the clock frequency error estimated by the clock frequency error estimator;
A second symbol timing generation unit that generates a symbol timing signal at a predetermined fixed clock interval;
A time error calculation unit that calculates a time error between the symbol timing generated by the first symbol timing generation unit and the symbol timing signal generated by the second symbol timing generation unit;
A second clock generator for controlling the oscillation frequency based on the time error calculated by the time error calculator;
A FIFO that sequentially writes the output of the quadrature detector to the memory at the clock timing generated by the first clock generator and sequentially reads data from the memory at the clock timing generated by the second clock generator. A (First-In First-Out) memory unit;
An OFDM demodulator comprising a Fourier transform unit for performing a Fourier transform on the output of the FIFO memory unit based on the symbol timing generated by the second symbol timing generation unit. An OFDM demodulator that receives and demodulates an OFDM signal composed of transmission symbols composed of an effective symbol interval Tu and a guard interval interval Tg,
An orthogonal detector for converting the OFDM signal into a predetermined base frequency band;
A first symbol timing generation unit that estimates a transmission symbol boundary of the OFDM signal from an output of the orthogonal detection unit and generates a symbol timing signal;
A first clock generator;
A second symbol timing generation unit that generates a symbol timing signal at a predetermined fixed clock interval;
A time error calculator for calculating a time error between the symbol timing generated by the first symbol timing generator and the symbol timing signal generated by the second symbol timing generator;
A second clock generator for controlling the oscillation frequency based on the time error calculated by the time error calculator;
A FIFO that sequentially writes the output of the quadrature detector to the memory at the clock timing generated by the first clock generator, and sequentially reads data from the memory at the clock timing generated by the second clock generator. A (First-In First-Out) memory unit;
A Fourier transform unit that performs a Fourier transform on the output of the FIFO memory unit based on the symbol timing generated by the second symbol timing generation unit;
A clock frequency error estimating unit for estimating a sampling clock frequency error from an output of the Fourier transform unit;
The OFDM demodulator characterized in that the first clock generator controls the oscillation frequency based on the output of the frequency error estimator. The FIFO memory unit adjusts the amount of data stored in the memory by stopping data writing or data reading during the guard interval Tg. 2. The OFDM demodulator according to 2.

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